DC power system fault diagnosis method, device, equipment and storage medium
By combining least squares curve fitting and Taylor series polynomial, the rise rate of fault current of the DC power system is calculated, which solves the problem of long fault diagnosis time and low accuracy in the existing technology, and realizes the high speed of the DC power system , accurate and reliable fault diagnosis.
Patent Information
- Application Number
- CN202310340574.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-03-31
- Publication Date
- 2025-01-07
- Estimated Expiration
- 2043-03-31
AI Technical Summary
The existing fault diagnosis methods for DC power system have problems such as long fault identification time, low accuracy and low reliability. Especially after the capacity of DC power system increases, DDL protection algorithms are in terms of rapidity, accuracy and reliability. Need to improve.
The least squares curve fitting algorithm is used and the Taylor series polynomial to obtain the current pulsation matrix of the main circuit of the DC power system and the reciprocal pulsation matrix of time, calculate the fault current change curve model, and pass the rise of each current data point Comparing the rate with the start criterion, it realizes quick switch off and fault diagnosis.
It significantly reduces the fault diagnosis time, from the original 100μs or more to 10μs, and improves the accuracy and reliability of diagnosis, and can predict the increase in the fault current earlier, reducing the difficulty of breaking the fast switch and the risk of operating the power system.
Smart Images
Figure CN116381560B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of direct current power systems and automation thereof, and more specifically, relates to a direct current power system fault diagnosis method, device, equipment and storage medium. Background Art
[0002] DC power systems are widely used in ships, electromagnetic weapons, rail transit and other fields. With the continuous increase in the capacity of DC power systems, the maximum peak value of short-circuit current can reach 100k, and the short-circuit current rise rate can reach 20A / μs. The direct harm of a DC power system failure is damage to the lines and equipment protected by fast switches, and power loss. The indirect harm is the paralysis of ships, electromagnetic weapons, rail transit, etc. Therefore, the research on high-speed fault diagnosis technology of DC power systems is of great significance.
[0003] At present, DC power grid protection mainly includes large current tripping protection and DDL protection (current rise rate and current increment combined protection), among which DDL protection is at the core. However, with the development of DC power system capacity, the DDL protection algorithm needs to be improved in terms of speed, accuracy, reliability and other indicators. For example, the fault diagnosis time of the algorithm is above 100μs, and there is still a lot of room for improvement in the fault diagnosis time; the calculated fault current rise rate is the average value over a period of time, and the accuracy can be further improved; the use of software to calculate the fault current rise rate has the risk of program failure, and reconfigurable circuit chips can be used to improve reliability;
[0004] If the judgment time is long and the peak value of the fault current is high, it will not only increase the difficulty of disconnecting the fast switch, but also increase the risk factor of the power system operation.
[0005] Therefore, the existing solutions have the technical problems of long fault identification time, low accuracy and low reliability which need to be solved urgently. Summary of the invention
[0006] In view of the above defects or improvement needs of the prior art, the present invention proposes a DC power system fault diagnosis method, device, equipment and storage medium, which are used to realize high-speed, accurate and reliable diagnosis of short-circuit faults in DC power systems, thereby solving the technical problems of the existing solutions such as long fault identification time, low accuracy and reliability that needs to be improved.
[0007] To achieve the above object, according to one aspect of the present invention, a DC power system fault diagnosis method is provided, comprising the following steps:
[0008] Get the DC power system main circuit current pulsation matrix I = [I 00 ,I 10 ,I 20,I 30 ] and the inverse pulsation matrix of time
[0009] Based on the current pulsation matrix and the inverse pulsation matrix of time, the fault current variation curve model is obtained on the basis of the least squares curve fitting algorithm and Taylor series polynomial, and the rising rate of each current data point is calculated by the derivation rule;
[0010] The current rise rate is compared with the starting criterion. When the average rise rate of N current data is greater than the starting criterion, a fast switch shutdown signal is issued to realize fault diagnosis of the DC power system.
[0011] Furthermore, the steps of obtaining the fault current variation curve model based on the current pulsation matrix and the inverse pulsation matrix of time on the basis of the least squares curve fitting algorithm and the Taylor series polynomial, and calculating the rising rate of each current data point by the derivation rule include:
[0012] Based on the current pulsation matrix and the inverse pulsation matrix of time, the fault current variation curve model is obtained based on the least squares curve fitting algorithm and Taylor series polynomial as follows:
[0013]
[0014] in, is the logarithmic current pulsation matrix, is the parameter matrix;
[0015] According to the fault current variation curve model, the parameter matrix of the DC power system main circuit current curve function is calculated:
[0016] According to the derivation rule, calculate the main circuit current derivative function:
[0017] According to the main circuit current conductance function, the rising rate of each current data point is obtained.
[0018] Preferably, the main circuit current of the DC power system is collected by driving the AD at high speed through a reconfigurable circuit chip.
[0019] Preferably, the main circuit current of the DC power system is collected by driving the AD at high speed through a reconfigurable circuit chip to construct a current pulsation matrix.
[0020] Preferably, a reciprocal pulsation matrix of time corresponding to the current data is constructed by a reconfigurable circuit chip.
[0021] Preferably, the rising rates of 100 current data points are calculated for each diagnosis, and when the average rising rate of the 100 current data points is greater than the start criterion, a fast switch shut-off signal is issued to implement fault diagnosis of the DC power system.
[0022] Preferably, the reconfigurable chip includes FPGA and / or CPLD.
[0023] According to a second aspect of the present invention, the present invention provides a DC power system fault diagnosis device, comprising the following modules:
[0024] The pulsation matrix acquisition module is used to obtain the current pulsation matrix of the main circuit of the DC power system I = [I 00 ,I 10 ,I 20 ,I 30 ] and the inverse pulsation matrix of time
[0025] The fault current curve fitting and rise rate calculation module is used to obtain the fault current change curve model based on the current pulsation matrix and the inverse pulsation matrix with time, on the basis of the least squares curve fitting algorithm and Taylor series polynomial, and calculate the rise rate of each current data point through the derivation rule;
[0026] The fault diagnosis module is used to compare the current rise rate with the start-up criterion. When the average rise rate of N current data is greater than the start-up criterion, a fast switch shutdown signal is issued to realize fault diagnosis of the DC power system.
[0027] According to a third aspect of the present invention, the present invention provides an electronic device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the DC power system fault diagnosis method when executing the program.
[0028] According to a fourth aspect of the present invention, the present invention provides a storage medium having a computer program stored thereon, and the computer program, when executed by a processor, implements the steps of the DC power system fault diagnosis method.
[0029] Beneficial technical effects of the present invention:
[0030] Compared with the traditional fault diagnosis method, the fault diagnosis method improves the original calculation of the average current rise rate in each period of time to the calculation of the rise rate of each current data point, which has higher accuracy, and each diagnosis calculates the average rise rate of N current data points to eliminate possible interference; the original fault diagnosis method must first reach a threshold of 1 before starting diagnosis, and the present invention can make a prediction in advance from the moment when the current is normal, thereby reducing the time for the fault current to rise; the present invention also reduces the original fault diagnosis time from more than 100μs to 10μs. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] The present invention will be further described below with reference to the accompanying drawings and embodiments, in which:
[0032] Figure 1 The present invention provides a DC power system fault diagnosis method working flow chart.
[0033] Figure 2 The present invention provides a method for diagnosing faults in a DC power system in accordance with an embodiment of the present invention.
[0034] Figure 3 It is a structural schematic diagram of a DC power system fault diagnosis device provided by an embodiment of the present invention;
[0035] Figure 4 It is a hardware structure diagram of a DC power system fault diagnosis device provided by an embodiment of the present invention;
[0036] Figure 5 It is a schematic diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0037] In order to have a clearer understanding of the technical features, purposes and effects of the present invention, specific embodiments of the present invention are now described in detail with reference to the accompanying drawings.
[0038] The purpose of the present invention can be achieved by the following technical solutions: Figure 1 FIG. 1 is a flow chart of a DC power system fault diagnosis method provided by an embodiment of the present invention, comprising the following steps:
[0039] (1) When a fault occurs in the DC power system, in order to obtain the real-time rising rate of the fault current, the fault current can be equivalent to the following model:
[0040] I=ce b / t (1)
[0041] (2) Construct the current pulsation matrix [I 00 ,I 10 ,I 20 ,I 30 ] and the inverse pulsation matrix of time
[0042] It should be noted that each newly collected current moment is defined as t3, and the latest four current data constitute a new current pulsation matrix for fitting.
[0043] (3) Determine the fitting function: I = ce b / t ;
[0044] (4) Figure 2 As shown, by taking the logarithm of both sides of the fitting function:
[0045] ln(I)=ln(c)+b / t (2)
[0046] (5) Perform matrix processing on the logarithmically processed fitting function:
[0047] AX=Y (3)
[0048] Matrix explanation: is the logarithmic current pulsation matrix, is the parameter matrix;
[0049] (6) Target matrix:
[0050]
[0051] (7) Multiply both sides of equation (3) by the transposed matrix:
[0052] A T AX=A T Y (5)
[0053] Available models:
[0054]
[0055] make
[0056]
[0057] make
[0058]
[0059] (8) The available model:
[0060] BX=C (9)
[0061] (9) Multiply both sides by the inverse matrix of matrix B to obtain the model:
[0062] B -1 BX=B -1 C (10)
[0063] (10) Figure 2 As shown, the b and c parameter matrices are obtained by least squares curve fitting.
[0064]
[0065] At this point, the least squares curve fitting is completed.
[0066] Begin to use Taylor series to process the parameters:
[0067] (11) Verilog language cannot directly calculate the logarithmic function ln(x) and the exponential function e x Therefore, calculating the parameters c, b and the fault current logarithmic ripple matrix ln(I) = [I0, I1, I2, I3] is the difficulty in this solution.
[0068] (12) The expressions of b and c parameters can be obtained from the above least squares curve fitting:
[0069]
[0070] Parameter b is
[0071]
[0072] Let parameter a be
[0073] a=0.7I0+0.4I1+0.1I2-0.2I3 (14)
[0074] (13) Taylor series polynomial processing of logarithmic function ln(x):
[0075] To solve this problem, this solution calculates that the fault current I after the current sensor ratio is in the range of [0-4] A. This solution is modified and verified many times based on the Taylor series polynomial to obtain the polynomial of the ln(x) function in the interval [0-4]:
[0076] ln(x)=0.021x 3 -0.25x 2 +1.25x-1 (15)
[0077] (14) Exponential function e x Taylor series polynomial processing of:
[0078] Since the parameter expression It is impossible to calculate e in Verilog language x Function. In this scheme, the value range of the parameter a=0.7I0+0.4I1+0.1I2-0.2I3 is calculated to be in the neighborhood of 0. This scheme is modified and verified many times based on the Taylor series polynomial to obtain the polynomial of the function in the neighborhood of 0:
[0079] e x =1+x+0.5x 2 +0.17x 3 (16)
[0080] This solves the problem that Verilog language cannot directly calculate the exponential function, and then obtains the parameter c.
[0081] (15) Figure 2 As shown, the short-circuit current rise rate is solved by the derivation rule
[0082] Based on the above scheme, the curve expression of short-circuit fault current I=ce is obtained. b / t We need to find the real-time rising rate of short-circuit current That is the expression I = ce b / t The real-time inverse of . According to the exponential function derivation rule, the fault current rise rate can be obtained:
[0083]
[0084] (16) Figure 2 As shown, the current rise rate is compared with the starting criterion to determine the short circuit fault.
[0085] Compare the current rise rate with the start criteria, such as: K is the start criterion. Each diagnosis calculates the average rise rate of 100 current data points. When the average rise rate of 100 current data points is greater than the start criterion, a fast switch shutdown signal is issued to achieve fault diagnosis and protection of the DC power system. Each clock can complete the calculation of one current data point. The commonly used crystal oscillator of the reconfigurable circuit chip is about 100ns per clock. During each rise rate calculation time, the high-speed AD can perform a current data conversion.
[0086] (17) Design 16-bit floating point multiplication and addition functions
[0087] When the existing FPGA internal resource IP core multiplier is calculating, each calculation will cause the number of data bits to double, which will cause the data bits to increase infinitely when the amount of calculation is large. Therefore, the existing IP core multiplier is not suitable for the least squares curve fitting algorithm with large amount of calculation and complex data. Therefore, this scheme designs a 16-bit floating point multiplication function and addition function. When the accuracy does not affect the fault judgment result, the result of data calculation is always kept at 16 bits. When multiplication and addition operations are required, it is only necessary to call the 16-bit floating point multiplication function and addition function designed by this scheme. Thereby greatly simplifying and saving the calculation process.
[0088] According to another aspect of the present invention, a DC power system fault diagnosis device is provided, the structural diagram of which is shown in FIG. Figure 3 As shown, including:
[0089] The pulsation matrix acquisition module 001 is used to obtain the inverse pulsation matrix of the current pulsation matrix of the main circuit of the DC power system and time;
[0090] The fault current curve fitting and rise rate calculation module 002 is used to obtain the fault current change curve model based on the current pulsation matrix and the inverse pulsation matrix of time on the basis of the least squares curve fitting algorithm and the Taylor series polynomial, and calculate the rise rate of each current data point by the derivation rule;
[0091] The fault diagnosis module 003 is used to compare the current rise rate with the start criterion. When the average rise rate of N current data is greater than the start criterion, a fast switch shutdown signal is issued to realize fault diagnosis of the DC power system.
[0092] The specific implementation of each of the above modules can refer to the description of the method embodiment, and the embodiment of the present invention will not be repeated.
[0093] like Figure 4 The figure shows a hardware structure diagram of a DC power system fault diagnosis device provided by an embodiment of the present invention, which includes the following modules: current sensor, high-speed sampling AD, algorithm acceleration execution reconfigurable circuit chip FPGA, fast switch fast output channel, core processor MCU and host computer communication channel.
[0094] First, high-speed sampling is performed through the current sensor and the AD module, and then the AD module transmits the current data to the high-speed FPGA. The FPGA first constructs the current data into a current pulsation matrix, and then fits the fault current curve through the least squares curve fitting algorithm, and then calculates the short-circuit fault current rise rate through the derivation rule. Each diagnosis calculates the rise rate of N current data points, and then sums and calculates the average rise rate of N current data points. The average rise rate is compared with the start-up criterion to determine whether a fault has occurred. After the FPGA determines that a fault has occurred in the DC power system, it sends a pulse command to the fast switch to disconnect, realizing high-speed diagnosis and protection of DC power system faults. The FPGA then sends the short-circuit fault information to the MCU through SPI communication, and the MCU sends the information to the host computer through CAN communication. The Flash memory in the figure is used to store the FPGA program.
[0095] like Figure 5 As shown, an example of a physical structure diagram of an electronic device is shown, and the electronic device may include: a processor (processor) 610, a communication interface (Communications Interface) 620, a memory (memory) 630 and a communication bus 640, wherein the processor 610, the communication interface 620, and the memory 630 communicate with each other through the communication bus 640. The processor 610 can call the logic instructions in the memory 630 to execute the steps of the above-mentioned DC power system fault diagnosis method, which specifically includes: obtaining the DC power system main circuit current pulsation matrix I = [I 00 ,I 10,I 20 ,I 30 ] and the inverse pulsation matrix of time Based on the current pulsation matrix and the inverse pulsation matrix of time, the fault current change curve model is obtained on the basis of the least squares curve fitting algorithm and Taylor series polynomial, and the rise rate of each current data point is calculated by the derivation rule; the current rise rate is compared with the starting criterion, and when the average rise rate of N current data is greater than the starting criterion, a fast switch shutdown signal is issued to realize intelligent fault diagnosis of DC power system.
[0096] In addition, the logic instructions in the above-mentioned memory 630 can be implemented in the form of software functional units and can be stored in a computer-readable storage medium when sold or used as an independent product. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random15 Access Memory), disk or optical disk and other media that can store program codes.
[0097] In another aspect, an embodiment of the present invention further provides a storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the steps of a DC power system fault diagnosis method are implemented, specifically including: obtaining a DC power system main circuit current pulsation matrix I = [I 00 ,I 10 ,I 20 ,I 30 ] and the inverse pulsation matrix of time Based on the current pulsation matrix and the inverse pulsation matrix of time, the fault current change curve model is obtained on the basis of the least squares curve fitting algorithm and Taylor series polynomial, and the rise rate of each current data point is calculated by the derivation rule; the current rise rate is compared with the starting criterion, and when the average rise rate of N current data is greater than the starting criterion, a fast switch shutdown signal is issued to realize intelligent fault diagnosis of DC power system.
[0098] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or system including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or system. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or system including the element.
[0099] The serial numbers of the embodiments of the present invention are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments. In a unit claim that lists several means, several of these means may be embodied by the same hardware item. The use of the words first, second, and third, etc. does not indicate any order and these words may be interpreted as identifiers.
[0100] The above are only preferred embodiments of the present invention, and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.
Claims
1. A DC power system fault diagnosis method, characterized in that: The following steps are involved: When a fault occurs in the DC power system, the fitting function to determine the fault current is ; Obtain the current ripple matrix of the main circuit of the DC power system The inverse pulsation matrix with time , wherein the inverse of each newly collected current moment is defined as t3, and the latest four current data constitute the current pulsation matrix for fitting; Based on the current pulsation matrix and the inverse pulsation matrix of time, the fault current variation curve model is obtained on the basis of the least squares curve fitting algorithm and Taylor series polynomial, and the rising rate of each current data point is calculated by the derivation rule; The current rise rate is compared with the start-up criterion. When the average rise rate of N current data is greater than the start-up criterion, a fast switch shutdown signal is issued to realize fault diagnosis of the DC power system.
2. The DC power system fault diagnosis method according to claim 1, characterized in that: The steps of obtaining the fault current variation curve model based on the current pulsation matrix and the inverse pulsation matrix of time on the basis of the least squares curve fitting algorithm and the Taylor series polynomial, and calculating the rising rate of each current data point by the derivation rule include: By taking the logarithm of both sides of the fitting function: ; Matrix the logarithmized fitting function and multiply the transposed matrix on both sides of the equation; in, is the logarithmic current pulsation matrix, is the parameter matrix; According to the fault current variation curve model, the parameter matrix of the current curve function of the main circuit of the DC power system is calculated; According to the derivation rule, calculate the main circuit current derivative function: ; According to the main circuit current conductance function, the rising rate of each current data point is obtained.
3. The DC power system fault diagnosis method according to claim 1, characterized in that: The main circuit current of the DC power system is collected by driving a high-speed AD through a reconfigurable circuit chip.
4. The DC power system fault diagnosis method according to claim 3, characterized in that: The reconfigurable circuit chip is used to drive AD at high speed to collect the main circuit current of the DC power system and construct a current pulsation matrix.
5. The DC power system fault diagnosis method according to claim 1, characterized in that: The reciprocal pulsation matrix of the time corresponding to the current data is constructed through the reconfigurable circuit chip.
6. The DC power system fault diagnosis method according to claim 1, characterized in that: Each diagnosis calculates the rising rate of N current data points. When the average rising rate of N current data points is greater than the start criterion, a fast switch shutdown signal is issued to realize fault diagnosis of the DC power system.
7. The DC power system fault diagnosis method according to claim 4 or 5, characterized in that: The reconfigurable chip includes FPGA and CPLD.
8. A DC power system fault diagnosis device, used to implement the DC power system fault diagnosis method according to any one of claims 1 to 7, characterized in that: Includes the following modules: Pulsation matrix acquisition module, used to obtain the current pulsation matrix of the main circuit of the DC power system The inverse pulsation matrix with time ; The fault current curve fitting and rise rate calculation module is used to obtain the fault current change curve model based on the current pulsation matrix and the inverse pulsation matrix with time, on the basis of the least squares curve fitting algorithm and Taylor series polynomial, and calculate the rise rate of each current data point through the derivation rule; The fault diagnosis module is used to compare the current rise rate with the start-up criterion. When the average rise rate of N current data is greater than the start-up criterion, a fast switch shutdown signal is issued to realize fault diagnosis of the DC power system.
9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the steps of the DC power system fault diagnosis method according to any one of claims 1 to 7 are implemented.
10. A storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the DC power system fault diagnosis method according to any one of claims 1 to 7 are implemented.