Force-gate transistor and preparation method thereof, and electronic device

Abstract

The present application provides a force-gate transistor and a method for preparing the same, as well as an electronic device. The transistor includes a substrate having a recess, a semiconductor film layer, a first electrode, and a second electrode. The semiconductor film layer covers the recess, and the first end and the second end of the semiconductor film layer both cover the substrate outside the recess; the first electrode and the second electrode are arranged on both sides of the recess; the semiconductor film layer is configured to regulate the conductivity of the semiconductor film layer between the first electrode and the second electrode by flexural polarization under the action of an external force. The technical solution of the embodiment of the present application can achieve the regulation of the conduction characteristics of the transistor by force control, without the need to additionally set up an electric gate, and can simplify the structure of the transistor.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a force-gate transistor and a method for preparing the same, and an electronic device. Background Art

[0002] As the feature size of integrated circuits continues to shrink, Moore's Law has reached its limit, and how to design new transistor devices has become a focus of attention.

[0003] Traditional field effect transistors (FETs) are based on direct modulation of channel current by an electric gate. In one technical solution, the insulating material of the gate is replaced with a ferroelectric material with a high dielectric constant to obtain a ferroelectric field effect transistor, which uses an electric gate to flip the polarization of the ferroelectric layer and thus modulate the channel current.

[0004] However, the above field effect transistors all need to be provided with an electric gate to modulate the channel current.

[0005] The content of the background technology section is only the information known to the inventor personally, and does not mean that the above information has entered the public domain before the application date of this disclosure, nor does it mean that it can become the prior art of the present disclosure. Summary of the invention

[0006] The present application provides a force-gate transistor and a method for preparing the same, as well as an electronic device, which can achieve regulation of the conduction characteristics of the transistor by force control without the need for an additional electric gate and can simplify the structure of the transistor.

[0007] To achieve the above objectives, the embodiments of the present application adopt the following technical solutions:

[0008] In a first aspect, an embodiment of the present application provides a transistor, including:

[0009] a substrate having a recess;

[0010] A semiconductor thin film layer covers the concave portion, and a first end portion and a second end portion of the semiconductor thin film layer both cover the substrate outside the concave portion;

[0011] A first electrode and a second electrode are arranged on both sides of the recess, the first electrode is in contact with the first end, and the second electrode is in contact with the second end;

[0012] The semiconductor thin film layer is configured to regulate the conductivity of the semiconductor thin film layer between the first electrode and the second electrode by means of flexural polarization under the action of an external force.

[0013] In some example embodiments, based on the above solution, the cross-sectional shape of the recess is circular or square.

[0014] In some example embodiments, based on the above solution, the cross-sectional shape of the recess is circular, the pore size of the recess is in the range of 1 μm to 10 μm, and the depth of the recess is in the range of 10 nm to 200 μm.

[0015] In some example embodiments, based on the above solution, the thickness of the semiconductor thin film layer is in the range of 0.5 nm to 1 μm.

[0016] In some example embodiments, based on the above solution, the semiconductor thin film layer is a channel layer and a gate layer of the transistor.

[0017] In some example embodiments, based on the above solution, the material of the semiconductor thin film layer is one of molybdenum disulfide, molybdenum ditelluride or zinc oxide.

[0018] In some example embodiments, based on the above scheme, the first electrode is a source electrode, the second electrode is a drain electrode, a portion of the source electrode is covered on the substrate, and another portion contacts the first end portion of the semiconductor thin film layer, and a portion of the drain electrode is covered on the substrate, and another portion contacts the second end portion of the semiconductor thin film layer.

[0019] In some example embodiments, based on the above scheme, the thin film polarization of the semiconductor thin film layer is related to the stress condition of the thin film material of the semiconductor thin film layer, the flexoelectric coefficient, the curvature radius of the upper surface, and the curvature radius of the lower surface, wherein the curvature radius of the upper surface and the curvature radius of the lower surface are both related to the thickness of the semiconductor thin film layer and the size of the recess.

[0020] In some example embodiments, based on the above solution, the material of the substrate is a silicon-based material.

[0021] In a second aspect, an embodiment of the present application provides an electronic device, comprising the transistor described in any embodiment of the first aspect above.

[0022] In a third aspect, an embodiment of the present application provides a method for manufacturing a transistor, comprising:

[0023] forming a recess on the substrate;

[0024] Covering the prepared semiconductor film on the concave portion of the substrate, wherein the first end portion and the second end portion of the semiconductor film both cover the substrate outside the concave portion;

[0025] A first electrode and a second electrode are formed on both sides of the recess, the first electrode is in contact with the first end, and the second electrode is in contact with the second end;

[0026] The semiconductor film is configured to regulate the conductivity of the semiconductor film between the first electrode and the second electrode by means of flexural polarization under the action of an external force.

[0027] In an exemplary embodiment, based on the above solution, the cross-sectional shape of the recess is circular or square.

[0028] In an example embodiment, based on the above solution, the cross-sectional shape of the recess is circular, the pore diameter of the recess is in the range of 1 μm to 10 μm, and the depth of the recess is in the range of 10 nm to 200 μm.

[0029] In an example embodiment, based on the above solution, the thickness of the semiconductor film is in the range of 0.5 nm to 1 μm.

[0030] In example embodiments, based on the above scheme, the semiconductor thin film forms a channel layer and a gate layer of the transistor.

[0031] In an example embodiment, based on the above solution, the material of the semiconductor film is one of molybdenum disulfide, molybdenum ditelluride or zinc oxide.

[0032] In an exemplary embodiment, based on the above scheme, the first electrode is a source electrode, the second electrode is a drain electrode, a portion of the source electrode covers the substrate, and another portion contacts the first end portion of the semiconductor film, and a portion of the drain electrode covers the substrate, and another portion contacts the second end portion of the semiconductor film.

[0033] In an exemplary embodiment, based on the above scheme, the film polarization of the semiconductor film layer is related to the stress condition of the film material of the semiconductor film, the flexoelectric coefficient, the curvature radius of the upper surface and the curvature radius of the lower surface.

[0034] The curvature radius of the upper surface and the curvature radius of the lower surface are both related to the thickness of the semiconductor film and the size of the concave portion.

[0035] In an example embodiment, based on the above solution, the material of the substrate is a silicon-based material.

[0036] According to the technical solution of the embodiment of the present application, on the one hand, a "force gate" is formed by the flexural electric polarization generated by the semiconductor thin film layer under the action of an external force, and the conductivity between the first electrode and the second electrode can be regulated by regulating the carrier concentration of the semiconductor thin film layer through the flexural electric effect, without the need to set up an additional electric gate, thereby simplifying the structure of the transistor; on the other hand, since the semiconductor thin film layer covers the recessed portion of the substrate, a larger deformation and strain gradient can be generated when the semiconductor thin film layer is subjected to an external force, thereby inducing a larger flexural electric polarization to more effectively regulate the conduction characteristics of the transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the embodiments of this specification, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0038] Figure 1 A schematic diagram of the structure of a transistor provided according to some embodiments of the present application is shown;

[0039] Figure 2 A schematic diagram of the structure of a transistor provided according to some other embodiments of the present application is shown;

[0040] Figure 3 A schematic diagram of a transistor provided according to some embodiments of the present application is shown;

[0041] Figure 4 A schematic diagram showing a mechanical model of a semiconductor thin film layer provided according to some embodiments of the present application is shown;

[0042] Figure 5 A schematic diagram showing the structure of an electronic device provided according to some embodiments of the present application; and

[0043] Figure 6 A schematic flow chart of a method for preparing a transistor according to some embodiments of the present application is shown.

[0044] Reference numerals: 100 - transistor; 110 - recessed portion; 120 - substrate; 130 - semiconductor thin film layer; 132 - first end portion; 134 - second end portion; 140 - first electrode; 150 - second electrode. DETAILED DESCRIPTION

[0045] The following description provides specific application scenarios and requirements of this specification, with the purpose of enabling those skilled in the art to make and use the contents of this specification. Various local modifications to the disclosed embodiments will be apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of this specification. Therefore, this specification is not limited to the embodiments shown, but to the widest scope consistent with the claims.

[0046] The terms used herein are only used for the purpose of describing specific example embodiments and are not restrictive. For example, unless the context clearly indicates otherwise, as used herein, the singular forms "a", "an" and "the" may also include plural forms. When used in this specification, the terms "include", "comprise" and / or "contain" mean that the associated integers, steps, operations, elements and / or components exist, but do not exclude the existence of one or more other features, integers, steps, operations, elements, components and / or groups or that other features, integers, steps, operations, elements, components and / or groups may be added in the system / method.

[0047] In view of the following description, these and other features of the present specification, as well as the operation and function of the related elements of the structure, and the economy of the combination and manufacture of the parts can be significantly improved. Reference is made to the accompanying drawings, all of which form a part of this specification. However, it should be clearly understood that the drawings are for illustration and description purposes only and are not intended to limit the scope of this specification. It should also be understood that the drawings are not drawn to scale.

[0048] In addition, the drawings provided in the embodiments of the present application are schematic diagrams. It is understood that the various elements, layers, and regions described in the embodiments of the present application may have relative sizes different from those shown in the drawings of the specification. And the illustrated shapes may change accordingly due to manufacturing technology and / or tolerances. The embodiments of the present application should not be interpreted as being limited to the specific shapes of the regions shown in the drawings, but should include deviations in shapes caused by manufacturing, for example. Therefore, the drawings are schematic in nature and are not intended to limit the scope of the present application.

[0049] The flexoelectric effect is a coupling relationship between strain gradient and electric polarization. Under non-uniform strain conditions, the material undergoes local polarization (separation of positive and negative charge centers), thereby generating a polarization electric field (polarization potential). Unlike the piezoelectric effect, which is subject to non-centrosymmetric structures, the flexoelectric effect is widely present in a variety of dielectric materials, such as centrosymmetric semiconductor materials and non-centrosymmetric semiconductor materials. With the development of nanoelectronics, the strain gradient of thin film materials at the micro-nano scale has been significantly enhanced, and the flexoelectric effect of thin film materials has become impossible to ignore.

[0050] Based on the above content, the embodiment of the present application proposes a transistor and a method for preparing the same, and an electronic device. According to the technical solution of the embodiment of the present application, the semiconductor film layer covers the concave portion of the substrate, and a first electrode and a second electrode are provided on both sides of the concave portion, and the semiconductor film layer is configured to regulate the conduction characteristics of the transistor by means of flexural electric polarization under the action of an external force. On the one hand, a "force gate" is formed by the flexural electric polarization generated by the semiconductor film layer under the action of an external force, and the conduction characteristics of the transistor can be regulated by regulating the carrier concentration of the semiconductor film layer, without the need to additionally set up an electric gate, so that the structure of the transistor can be simplified; on the other hand, since the semiconductor film layer covers the concave portion of the substrate, a greater deformation and strain gradient can be generated when the semiconductor film layer is subjected to an external force, thereby inducing a greater flexural electric polarization to more effectively regulate the conduction characteristics of the transistor.

[0051] The technical solution of the embodiment of the present application will be described in detail below with reference to the accompanying drawings:

[0052] Figure 1 A schematic structural diagram of a transistor provided according to some embodiments of the present application is shown.

[0053] Reference Figure 1 As shown, the transistor 100 includes: a substrate 120 having a concave portion 110, a semiconductor film layer 130, a first electrode 140, and a second electrode 150. The semiconductor film layer 130 covers the concave portion 110, and the first end 132 and the second end 134 of the semiconductor film layer 130 are both covered on the substrate outside the concave portion 110; the first electrode 140 and the second electrode 150 are arranged on both sides of the concave portion 110, the first electrode 140 is in contact with the first end 132, and the second electrode 150 is in contact with the second end 134, for example, the first electrode 140 is at least partially arranged on the first end 132 of the semiconductor film layer 130; the second electrode 150 is at least partially arranged on the second end 134 of the semiconductor film layer 130. The semiconductor film layer 130 is configured to adjust the conductivity of the semiconductor film layer 130 between the first electrode 140 and the second electrode 150 by flexural polarization under the action of an external force, thereby adjusting the conduction characteristics of the transistor 100.

[0054] In the exemplary embodiment, the substrate 120 is located at the bottom of the transistor 100, and is used to carry the semiconductor thin film layer 130, the first electrode 140, and the second electrode 150. A recess 110 or groove is provided on the substrate 120, and the recess 110 may be a hole, and the cross-sectional shape of the recess 110 is circular or square, and the semiconductor thin film layer 130 covers the recess 110, and the size of the semiconductor thin film layer 130 is larger than the size of the recess 110. The shape of the semiconductor thin film layer 130 may be square or circular, and the first end 132 and the second end 134 of the semiconductor thin film layer 130 both cover the substrate outside the recess 110.

[0055] It should be noted that, although the cross-section of the recess 110 is described as circular or square, those skilled in the art should understand that the cross-section of the recess 110 may also be other appropriate shapes such as elliptical or polygonal, which is also within the scope of the embodiments of the present application.

[0056] according to Figure 1 According to the technical solution in the example embodiment, on the one hand, a "force gate" is formed by the flexural electric polarization induced by the strain gradient generated by the semiconductor film layer under the action of an external force, and the conductivity between the first electrode and the second electrode can be regulated by regulating the carrier concentration of the semiconductor film layer through the flexural electric effect, without the need to set up an additional gate, so that the structure of the transistor can be simplified; on the other hand, since the semiconductor film layer covers the recessed portion of the substrate, a larger deformation and strain gradient can be generated when the semiconductor film layer is subjected to an external force, thereby inducing a larger flexural electric polarization to more effectively regulate the conduction characteristics of the transistor.

[0057] Further, in some exemplary embodiments, the cross-sectional shape of the concave portion 110 is circular, the aperture of the circular concave portion 110 is in the range of 1 μm to 10 μm, and the depth of the concave portion 110 is in the range of 10 nm to 200 μm. The depth of the concave portion 110 should be large enough to ensure that the bottom of the semiconductor thin film layer 130 in a bent state cannot contact the bottom of the concave portion 110. For example, the aperture of the concave portion 110 is 3 μm and the depth is 200 nm.

[0058] According to the technical solution in the above-mentioned example embodiment, by setting the cross-sectional shape of the recess 110 to a circle, the force on the semiconductor film layer 130 covering the recess 110 can be made more uniform, thereby extending the service life of the semiconductor film layer 130 and further extending the service life of the transistor 100.

[0059] In other exemplary embodiments, the cross-sectional shape of the recess 110 is a square, for example, a square, the side length of the recess 110 is in the range of 1 μm to 10 μm, and the depth of the recess 110 is in the range of 10 nm to 200 μm. The depth of the recess 110 should be large enough to ensure that the bottom of the semiconductor thin film layer 130 in a bent state cannot contact the bottom of the recess 110. For example, the side length of the recess 110 is 3 μm and the depth is 200 nm.

[0060] Further, in some example embodiments, the thickness of the semiconductor thin film layer 130 is in the range of 0.5 nm to 1 μm. The material of the semiconductor thin film layer 130 is molybdenum disulfide (MoS2).

[0061] It should be noted that although the material of the semiconductor thin film layer is molybdenum disulfide as an example, those skilled in the art should understand that the material of the semiconductor thin film layer can also be other appropriate materials such as molybdenum ditelluride or zinc oxide, which is also within the scope of the embodiments of the present application.

[0062] According to the technical solutions in the above exemplary embodiments, different materials of the semiconductor thin film layer and thicknesses of the semiconductor thin film layer can be selected according to different requirements.

[0063] In addition, in some example embodiments, the semiconductor film layer 130 forms a channel layer and / or a gate layer of the transistor 100. Under the action of an external force, the semiconductor film layer 130 bends, generating a significant strain gradient, thereby inducing flexural polarization of the semiconductor friction layer 130 and generating an electric polarization field E P The polarized negative charges attract holes along the polarization field direction, resulting in hole accumulation, forming an enhanced region near the top interface of the semiconductor thin film layer 130 , that is, forming a channel layer of the transistor 100 .

[0064] Furthermore, when the external force applied to the semiconductor film layer 130 is greater than a predetermined threshold, the transistor 100 is turned on; when the semiconductor film layer 130 is in a naturally suspended state, the transistor 100 is in a closed or cut-off state, and a "force gate" of the transistor 100 can be formed through the semiconductor film layer 130, thereby realizing a transistor regulated by the semiconductor film layer 130, namely the "force gate", and achieving a switching ratio of the transistor exceeding 3 orders of magnitude under the action of a mechanical force of hundreds of nN.

[0065] According to the technical solution in the above example embodiment, the channel layer and the gate layer of the transistor 100 are formed by the semiconductor thin film layer 130, so that the channel layer and the gate layer can be integrated into the same semiconductor thin film layer, making the structure of the transistor simpler and facilitating the preparation of the transistor.

[0066] Further, in some example embodiments, the first electrode 140 is a source electrode 140, the second electrode 150 is a drain electrode 150, a portion of the source electrode 140 covers the substrate 120, and another portion contacts the first end 132 of the semiconductor thin film layer 130, and a portion of the drain electrode 150 covers the substrate 120, and another portion contacts the second end 134 of the semiconductor thin film layer 130. In other example embodiments, the first electrode 140 is a drain electrode, and the second electrode 150 is a source electrode.

[0067] In some example embodiments, the cross-sectional shape of the recess 110 is circular, the semiconductor film layer 130 is rectangular, and the first end 132 and the second end 132 of the semiconductor film layer 130 are the ends of the long sides of the rectangle. The top of the recess of the substrate is completely covered with the semiconductor film layer.

[0068] In other exemplary embodiments, the semiconductor thin film layer 130 is circular, and the first end 132 and the second end 132 of the semiconductor thin film layer 130 are both parts of a circle, i.e., arc-shaped. It should be noted that the semiconductor thin film layer can also be other appropriate shapes such as an ellipse, etc., which is also within the scope of the embodiments of the present application.

[0069] In other example embodiments, a portion of the first electrode 140 covers the substrate 120 , and another portion covers the first end 132 of the semiconductor thin film layer 130 ; a portion of the second electrode 150 covers the substrate 120 , and another portion covers the second end 134 of the semiconductor thin film layer 130 .

[0070] According to the technical solution in the above embodiment, by covering a portion of the first electrode and the second electrode on the first end and the second end of the semiconductor film layer respectively, the end of the semiconductor film layer can be fixed, thereby better realizing the flexoelectric effect of the semiconductor film layer.

[0071] It should be noted that, although the example in which a portion of the electrode covers the semiconductor thin film layer is used for explanation, those skilled in the art should understand that the first electrode and the second electrode can also completely cover the first end and the second end of the semiconductor thin film layer, so as to better fix the semiconductor thin film layer.

[0072] Furthermore, in some other example embodiments, the first electrode and the second electrode may not cover the semiconductor thin film layer, for example, they may be disposed below the semiconductor thin film layer or in contact with the semiconductor thin film layer, which is also within the scope of the embodiments of the present application.

[0073] exist Figure 2 A schematic structural diagram of a transistor provided according to some other embodiments of the present application is shown.

[0074] Reference Figure 2As shown, in the exemplary embodiment, the substrate 120 includes a first layer 122 and a second layer 124. The shape and size of the first layer 122 are adapted to the shape and size of the transistor 100, and is used to carry the second layer 124. The first layer 122 can be a base material retained when the transistor is manufactured, or an insulating layer formed on the base material by vacuum evaporation, vapor deposition, spin coating, etc., which is not limited here. In specific implementation, the first layer 122 can be made of oxide thin film materials such as silicon dioxide, hafnium oxide, aluminum oxide, etc., or other appropriate materials.

[0075] Furthermore, the second layer 124 is formed on the first layer 122, and the second layer 124 is provided with a recess 110. For example, the second layer 124 may be first formed on the first layer 122, and then the recess 110 may be formed on the second layer 124 by etching; the second layer 124 with the recess may also be directly formed on the first layer 122. For example, the second layer 124 with the recess may be grown on the first layer 122 by metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).

[0076] It should be noted that the cross-sectional shape of the recess 110 may be circular or square. The second layer 124 may be made of silicon and / or silicon dioxide, or other suitable materials such as silicon carbide, etc., which is not particularly limited in the present embodiment.

[0077] according to Figure 2 According to the technical solution in the example embodiment, by providing two substrates and opening a recess on the second substrate, the recess can be formed on the substrate in a variety of ways, making it more convenient to form the recess on the substrate.

[0078] Figure 3 A schematic diagram of a transistor provided according to some embodiments of the present application is shown.

[0079] Reference Figure 3 As shown, in the exemplary embodiment, based on the flexoelectric effect of the film material itself, under the action of external force, the semiconductor film layer 130 bends, generating a significant strain gradient, thereby inducing flexoelectric polarization of the semiconductor friction layer 130 and generating an electric polarization field E P, affecting the carrier concentration of the semiconductor thin film layer 130, and indirectly regulating the current density of the semiconductor thin film layer 130 of the transistor 100. The polarized negative charges attract holes along the polarization field direction, resulting in hole accumulation, forming an enhanced region near the top interface of the semiconductor thin film layer 130, increasing the width of the effective conductive region of the semiconductor thin film layer 130, and improving the conductivity of the semiconductor thin film layer 130 between the first electrode 140 and the second electrode 150.

[0080] For example, under the action of external force, the semiconductor thin film layer 130 bends and generates a strain gradient. The strain gradient induces a negative flexible polarization charge, thereby causing a negative flexible potential to appear near the interface of the semiconductor thin film layer 130 , which can attract holes near the interface and form a certain concentration of carriers in the semiconductor thin film layer 130 .

[0081] according to Figure 3 The technical solution in the example embodiment utilizes the flexoelectric effect of the semiconductor film layer to regulate the conduction characteristics of the transistor based on external force. Therefore, the polarization of the semiconductor film layer is force-controlled rather than traditional electrical control. Unlike traditional field-effect transistors that regulate the channel layer through voltage, the transistor on / off ratio can exceed three orders of magnitude under the action of a mechanical force of hundreds of nanonewtons.

[0082] Figure 4 A schematic diagram of a mechanical model of a semiconductor thin film layer provided according to some embodiments of the present application is shown.

[0083] Reference Figure 4 As shown in (a), the semiconductor thin film layer 130 bends under the action of the external force F, generating an obvious strain gradient, thereby inducing flexural polarization, affecting the carrier concentration of the semiconductor thin film layer 130, indirectly regulating the current density of the transistor 100, and improving the conductivity of the semiconductor thin film layer 130 between the first electrode and the second electrode.

[0084] Reference Figure 4 As shown in (b), in the exemplary embodiment, the film polarization of the semiconductor film layer 130 is related to the flexoelectric coefficient of the film material of the semiconductor film layer 130, the curvature radius R1 of the upper surface, and the curvature radius R2 of the lower surface. As shown in the following formula (1):

[0085] (1)

[0086] in, is the film polarization per unit area, is the flexoelectric coefficient of the film material, R1 is the radius of curvature of the upper surface of the semiconductor film layer 130 , and R2 is the radius of curvature of the lower surface of the semiconductor film layer 130 .

[0087] Furthermore, the curvature radius R1 of the upper surface and the curvature radius R2 of the lower surface of the semiconductor thin film layer 130 are both related to the thickness d of the semiconductor thin film layer 130 and the aperture w of the recess 110 , as shown in the following formula (2):

[0088]

[0089]

[0090] (2)

[0091] Among them, R is the ideal curvature radius of the semiconductor film layer 130, h is the vertical distance from the center of the recess 110 to the semiconductor film with a curvature radius of R, w is the aperture or diameter of the recess 110, and d is the film thickness of the semiconductor film layer 130.

[0092] according to Figure 4 According to the technical solution in the example embodiment, the flexural electric polarization of the semiconductor film layer is determined according to the flexural electric coefficient of the film material, the curvature radius of the semiconductor film layer and the diameter of the recess, so that the appropriate semiconductor film layer material and the recess size can be selected according to actual needs.

[0093] Figure 5 A schematic structural diagram of an electronic device provided according to some embodiments of the present application is shown.

[0094] Reference Figure 5 As shown, the electronic device 500 includes a transistor 100. In an exemplary embodiment, the electronic device 500 may be a gas pressure control device, which is used to control the conduction characteristics of the transistor 100 according to the gas pressure difference on both sides of the semiconductor film layer, thereby achieving gas pressure control.

[0095] For example, the air pressure on the side of the semiconductor film layer in the transistor close to the substrate is normal atmospheric pressure. If the external atmospheric pressure is greater than the normal atmospheric pressure, the semiconductor film layer bends, generating a significant strain gradient, thereby inducing flexural polarization of the semiconductor friction layer, making the transistor 100 conductive. If the external atmospheric pressure is normal atmospheric pressure, the semiconductor film layer is in a naturally suspended state, and the transistor 100 is in a cut-off state, thereby realizing the control of the on and off of the transistor 100 by air pressure.

[0096] It should be noted that although the electronic device is an air pressure control device as an example, those skilled in the art should understand that the electronic device can also be other appropriate devices such as pressure control devices or pressure detection devices, which is also within the scope of the embodiments of the present application.

[0097] The electronic device provided in the embodiment of the present application uses the transistor described in any of the above embodiments. Therefore, on the one hand, the "force gate" is formed by the flexural electric polarization induced by the strain gradient of the semiconductor film layer, and the carrier concentration of the semiconductor film layer can be regulated by the flexural electric effect to regulate the conduction characteristics of the transistor, without the need to set up an additional electric gate, and the structure of the transistor can be simplified; on the other hand, since the semiconductor film layer covers the concave portion of the substrate, it can produce greater deformation and strain gradient when the semiconductor film layer is subjected to external force, thereby inducing greater flexural electric polarization to more effectively regulate the conduction characteristics of the transistor.

[0098] Since the electronic device in the exemplary embodiment of the present application adopts the above transistor, it has at least all the advantages corresponding to the above transistor.

[0099] It should be noted that the technical solution of the electronic device and the technical solution of the above-mentioned transistor belong to the same concept, and the details of the technical solution of the electronic device that are not described in detail can be found in the description of the technical solution of the above-mentioned transistor.

[0100] Figure 6 A schematic flow chart of a method for preparing a transistor according to some embodiments of the present application is shown.

[0101] Reference Figure 6 As shown, in step S610, a recess is formed on a substrate.

[0102] In an example embodiment, the cross-sectional shape of the recess is circular or square. For example, the cross-sectional shape of the recess is circular, the pore diameter of the recess is in the range of 1 μm to 10 μm, and the depth of the recess is in the range of 10 nm to 200 μm.

[0103] Further, in some example embodiments, a concave portion may be formed on the substrate by etching, for example, by plasma etching.

[0104] In addition, in some other exemplary embodiments, a first substrate may be formed by deposition, and a second layer having a concave portion may be generated on the first substrate. For example, silicon and / or silicon dioxide material may be grown on the first layer by metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).

[0105] In step S620, the prepared semiconductor film is covered on the concave portion of the substrate, and the first end portion and the second end portion of the semiconductor film both cover the substrate outside the concave portion.

[0106] In an exemplary embodiment, a semiconductor film is prepared in advance, and the prepared semiconductor film is transferred and covered on the concave portion of the substrate. The thickness of the semiconductor film is in the range of 0.5 nm to 1 μm, for example, the thickness of the semiconductor film may be 1 nm.

[0107] Further, the first end and the second end of the semiconductor film are both covered on the substrate outside the recess. In some example embodiments, the cross-sectional shape of the recess is circular, the semiconductor film is rectangular, and the first end and the second end of the semiconductor film layer are the ends of the long sides of the rectangle. The top of the recess of the substrate is completely covered with the semiconductor film. In other example embodiments, the semiconductor film layer is circular, and the first end and the second end of the semiconductor film layer are both a part of the circle, that is, an arc.

[0108] It should be noted that the semiconductor film may also be in other appropriate shapes such as an elliptical shape, which is also within the scope of the embodiments of the present application.

[0109] In step S630 , a first electrode and a second electrode are formed on both sides of the concave portion, the first electrode is in contact with the first end portion, and the second electrode is in contact with the second end portion.

[0110] In an example embodiment, the first electrode is a source electrode and the second electrode is a drain electrode; or the first electrode is a drain electrode and the second electrode is a source electrode. Electrode patterns of the first electrode and the second electrode are formed by photolithography on both sides of the concave portion, and the electrode patterns are exposed. The source electrode and the drain electrode 135 can be made of appropriate metal or other materials.

[0111] In some example embodiments, the first electrode and the second electrode are both in contact with the semiconductor thin film layer. For example, the first electrode is a source electrode, the second electrode is a drain electrode, a portion of the source electrode covers the substrate, and another portion contacts the first end of the semiconductor thin film layer, and a portion of the drain electrode covers the substrate, and another portion contacts the second end of the semiconductor thin film layer.

[0112] Further, in some example embodiments, a portion of the first electrode covers the substrate and another portion covers the first end of the semiconductor film layer, and a portion of the drain covers the substrate and another portion covers the second end of the semiconductor film layer.

[0113] Furthermore, in some other example embodiments, the first electrode and the second electrode may not cover the semiconductor thin film layer, for example, they may be disposed below the semiconductor thin film layer, which is also within the scope of the embodiments of the present application.

[0114] Furthermore, the structure after the exposure process is subjected to vapor deposition to form a force-gate transistor. The semiconductor film layer is configured to regulate the conductivity of the semiconductor film layer between the first electrode and the second electrode by flexural polarization under the action of an external force.

[0115] according to Figure 6 According to the technical solution in the example embodiment, on the one hand, a "force gate" is formed by the flexural electric polarization induced by the strain gradient of the semiconductor film layer, and the conductivity between the first electrode and the second electrode can be regulated by regulating the carrier concentration of the semiconductor film layer through the flexoelectric effect, without the need for an additional electric gate, thereby simplifying the structure of the transistor; on the other hand, since the semiconductor film layer covers the recessed portion of the substrate, a larger deformation and strain gradient can be generated when the semiconductor film layer is subjected to external force, thereby inducing a larger flexural electric polarization to more effectively regulate the conduction characteristics of the transistor.

[0116] In an example embodiment, based on the above scheme, the semiconductor thin film forms a channel layer and / or a gate layer of the above transistor.

[0117] In an exemplary embodiment, based on the above solution, the material of the semiconductor film is one of molybdenum disulfide, molybdenum ditelluride or zinc oxide.

[0118] In an exemplary embodiment, based on the above scheme, the first electrode is a source electrode, the second electrode is a drain electrode, a portion of the source electrode is covered on the substrate, and another portion is covered on the first end portion of the semiconductor film, and a portion of the drain electrode is covered on the substrate, and another portion is covered on the second end portion of the semiconductor film.

[0119] In an example embodiment, based on the above scheme, the film polarization of the semiconductor film is related to the stress condition of the film material of the semiconductor film, the flexoelectric coefficient, the radius of curvature of the upper surface and the radius of curvature of the lower surface, wherein the radius of curvature of the upper surface and the radius of curvature of the lower surface are both related to the thickness of the semiconductor film layer and the size of the recess, such as the aperture.

[0120] In an example embodiment, based on the above scheme, the material of the substrate is a silicon-based material.

[0121] It should be noted that the technical solution of the method for preparing the transistor belongs to the same concept as the technical solution of the above-mentioned transistor. For details not described in detail in the technical solution of the method for preparing the transistor, please refer to the description of the technical solution of the above-mentioned transistor.

[0122] The above is a description of a specific embodiment of the present specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require a specific order or a continuous order to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0123] In summary, after reading this detailed disclosure, those skilled in the art will appreciate that the foregoing detailed disclosure may be presented only by way of example and may not be limiting. Although not explicitly stated herein, those skilled in the art will appreciate that this specification requires various reasonable changes, improvements and modifications to the embodiments. These changes, improvements and modifications are intended to be proposed by this specification and are within the spirit and scope of the exemplary embodiments of this specification.

[0124] In the above description, when an element such as a layer, a region or a substrate is referred to as being "on" another element, it may be directly on the other element or an intervening element may be provided. Furthermore, relative terms such as "inside", "outside", "on", "below", "inside", "outside" and the like may be used herein to describe the relative relationship of one layer to another region.

[0125] In addition, certain terms in this specification have been used to describe embodiments of this specification. For example, "one embodiment", "an embodiment" and / or "some embodiments" mean that a particular feature, structure or characteristic described in conjunction with the embodiment may be included in at least one embodiment of this specification. Therefore, it can be emphasized and should be understood that two or more references to "an embodiment" or "one embodiment" or "an alternative embodiment" in various parts of this specification do not necessarily refer to the same embodiment. In addition, specific features, structures or characteristics may be appropriately combined in one or more embodiments of this specification.

[0126] It should be understood that in the foregoing description of the embodiments of this specification, in order to help understand a feature and for the purpose of simplifying this specification, this specification combines various features in a single embodiment, drawing or its description. However, this does not mean that the combination of these features is necessary. When reading this specification, it is entirely possible for a person skilled in the art to extract some of the features and understand them as separate embodiments. In other words, the embodiments in this specification can also be understood as the integration of multiple secondary embodiments. This is also true when the content of each secondary embodiment is less than all the features of a single aforementioned disclosed embodiment.

[0127] Each patent, patent application, patent application publication, and other material, such as articles, books, specifications, publications, documents, articles, etc., cited herein, except any historical prosecution documents to which it is relevant, any identical historical prosecution documents that may be inconsistent or conflicting with this document, or any identical historical prosecution documents that may have a limiting effect on the broadest scope of the claims, may be incorporated herein by reference and used for all purposes now or hereafter associated with this document. In addition, in the event of any inconsistency or conflict between the descriptions, definitions, and / or use of terms associated with any of the incorporated materials and the terminology, descriptions, definitions, and / or use associated with this document, the terminology in this document shall control.

[0128] Finally, it should be understood that the embodiments of the application disclosed herein are explanations of the principles of the embodiments of this specification. Other modified embodiments are also within the scope of this specification. Therefore, the embodiments disclosed in this specification are only used as examples and not as limitations. Those skilled in the art can adopt alternative configurations according to the embodiments in this specification to implement the applications in this specification. Therefore, the embodiments of this specification are not limited to the embodiments accurately described in the application.

Claims

1. A transistor, characterized in that: include: a substrate having a recess; A semiconductor film layer having material characteristics of flexural electric polarization, the semiconductor film layer covers the concave portion, a middle portion of the semiconductor film layer is suspended, a first end portion and a second end portion of the semiconductor film layer both cover the substrate outside the concave portion, and a side of the semiconductor film layer close to the substrate has a target gas pressure; as well as A source electrode and a drain electrode, respectively serving as a first electrode and a second electrode, are arranged on both sides of the recess, the first electrode is in contact with the first end, and the second electrode is in contact with the second end; When the air pressure outside the transistor is the target air pressure, the semiconductor thin film layer is in a naturally suspended state, and the transistor is in a cut-off state; when the air pressure outside the transistor is greater than the target air pressure, the semiconductor thin film layer is bent by the mechanical force caused by the air pressure difference, and the transistor is in a conducting state. Among them, the flexural electric polarization of the semiconductor film layer is related to the stress condition of the film material of the semiconductor film layer, the flexural electric coefficient, the curvature radius of the upper surface and the curvature radius of the lower surface. The curvature radius of the upper surface and the curvature radius of the lower surface are both related to the thickness of the semiconductor film layer and the size of the recess.

2. The transistor according to claim 1, characterized in that The cross-sectional shape of the recess is circular or square.

3. The transistor according to claim 1, characterized in that The thickness of the semiconductor thin film layer is in the range of 0.5 nm to 1 μm.

4. The transistor according to claim 1, characterized in that The semiconductor thin film layer is the channel layer and the gate layer of the transistor.

5. The transistor according to any one of claims 1 to 4, characterized in that The first electrode is a source electrode, and the second electrode is a drain electrode. A portion of the source electrode covers the substrate, and another portion contacts the first end portion of the semiconductor thin film layer. A portion of the drain electrode covers the substrate, and another portion contacts the second end portion of the semiconductor thin film layer.

6. The transistor according to claim 1, characterized in that The semiconductor thin film layer isolates the internal air of the concave portion from the external air.

7. The transistor according to claim 6, characterized in that The mechanical force is air pressure.

8. The transistor according to claim 1, characterized in that The transistor is in an on state after the semiconductor film layer is subjected to a mechanical external force greater than a predetermined threshold and undergoes flexural polarization, and the transistor is in an off state when the semiconductor film layer recovers to the natural suspended state.

9. An electronic device, characterized in that: The electronic device comprises the transistor according to any one of claims 1 to 8.

10. A method for preparing a transistor, characterized in that: include: forming a recess on the substrate; Covering the prepared semiconductor film on the concave portion of the substrate, so that the middle part of the semiconductor film layer is suspended, and the first end and the second end of the semiconductor film layer are both covered on the substrate outside the concave portion, so that when the air pressure outside the transistor is greater than the target air pressure of the semiconductor film layer close to the substrate, the semiconductor film layer is deflected by the mechanical force caused by the air pressure difference, and the semiconductor film has the material property of flexural electric polarization; A first electrode and a second electrode are formed on both sides of the recess, the first electrode is in contact with the first end, and the second electrode is in contact with the second end; When the air pressure outside the transistor is the target air pressure, the semiconductor film layer is in a naturally suspended state, and the transistor is in a cut-off state; when the air pressure outside the transistor is greater than the target air pressure, the semiconductor film layer is bent, and the transistor is in a conducting state. The flexural electric polarization of the semiconductor film layer is related to the stress condition of the film material of the semiconductor film layer, the flexural electric coefficient, the curvature radius of the upper surface and the curvature radius of the lower surface. The curvature radius of the upper surface and the curvature radius of the lower surface are both related to the thickness of the semiconductor film layer and the size of the recess.

11. The method for preparing a transistor according to claim 10, characterized in that: The thickness of the semiconductor thin film layer is in the range of 0.5 nm to 1 μm.

12. The method for preparing a transistor according to claim 10, characterized in that: The semiconductor thin film layer is the channel layer and the gate layer of the transistor.

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