A column planting method for wafer packaging and metal nano sintered body

Abstract

The invention relates to a pillar planting method for wafer packaging and a metal nano sintered body; specifically, a first insulating layer is prepared on the upper and lower end surfaces of a silicon plate respectively; an etching process is adopted to etch the first insulating layer so that a plurality of etching holes arranged at intervals are formed on the insulating layer, and an etching liquid is injected into the etching holes so that etching grooves are formed on the silicon plate; a second insulating layer is formed on the inner wall of the etching hole, the bottom of the etching groove and the side wall by a thermal oxidation process; a sacrificial layer is prepared on the first insulating layer and the second insulating layer; a nano metal slurry is spin-coated on the sacrificial layer, and the nano metal slurry is filled with the etching groove and the etching hole, and a sintering process is adopted to sinter, so that the etching groove and the etching hole form metal probe pillars, and a conductive layer is formed on the sacrificial layer; the sacrificial layer is cleaned, the metal probe pillar and the conductive layer are separated, and a metal nano sintered body with the metal probe pillar is obtained; the above method can solve the technical problems of poor reliability, high cost and low precision of obtaining metal pillars by the existing method.

Description

Technical Field

[0001] The invention relates to the technical field of chip packaging, and in particular to a column planting method and a metal nano sintered body for wafer packaging. Background Art

[0002] Wafer-level packaging (WLP) is an advanced packaging technology that can perform most or all of the packaging and testing procedures directly on the wafer, and then install the solder balls and cut them to produce IC finished units one by one. Wafer-level packaging (WLP) has the advantages of small size, excellent electrical performance, good heat dissipation, and low cost, and has developed rapidly in recent years. The application field of wafer-level packaging (WLP) includes chips in power devices, which have high requirements for heat dissipation performance, mechanical properties, and reliability. Among them, the formation of high-density metal pillars based on the surface of the wafer is an important structure in the WLP process. At present, the commonly used methods mainly include copper pillar transplantation based on friction welding, chemical vapor deposition technology, etc. However, the metal pillars formed by these methods have the disadvantages of poor reliability, high cost, and low precision. In addition, patent CN102157438A discloses a method for preparing a wafer-level adapter plate, which is filled by electroplating to obtain a metal pillar array. However, the traditional electroplating process has low work efficiency and is prone to voids. At the same time, the height of the pillars is limited and the flexibility is poor.

[0003] Therefore, in view of the above problems, the present invention urgently needs to provide a pillar planting method and a metal nano sintered body for wafer packaging. Summary of the invention

[0004] The purpose of the present invention is to provide a pillar planting method and a metal nano sintered body for wafer packaging, and to solve the technical problems of poor reliability, high cost and low precision of obtaining metal pillars by existing methods by proposing a pillar planting method for wafer packaging.

[0005] The present invention provides a column planting method for wafer packaging, comprising the following steps:

[0006] Prepare a first insulating layer on the upper and lower surfaces of the silicon plate respectively;

[0007] Using an etching process, one of the first insulating layers is etched to form a plurality of etching holes arranged at intervals on the insulating layer, and an etching solution is injected into the etching holes to form etching grooves on the silicon plate;

[0008] forming a second insulating layer on the inner wall of the etched hole, the bottom and the side wall of the etched groove by a thermal oxidation process;

[0009] preparing a sacrificial layer on the first insulating layer and the second insulating layer;

[0010] Spin-coating nano-metal slurry on the sacrificial layer, and allowing the nano-metal slurry to fill the etched grooves and etched holes, sintering by adopting a sintering process, the etched grooves and etched holes form metal probes, and a conductive layer is formed on the sacrificial layer;

[0011] The sacrificial layer is cleaned, the metal probe column and the conductive layer are separated, and the metal nano sintered body with the metal probe column is obtained.

[0012] Preferably, the sacrificial layer is at least one of polyvinyl pyrrolidone, sodium polystyrene sulfonate or ethyl cellulose which are easily soluble in water.

[0013] Preferably, the thickness of the first insulating layer is 0.3-0.6 μm.

[0014] Preferably, the thickness of the first insulating layer is 0.5 μm.

[0015] Preferably, the thickness of the second insulating layer is 0.3-0.6 μm.

[0016] Preferably, the thickness of the first insulating layer is 0.5 μm;

[0017] Preferably, the depth of the etched groove is 0.1-1000 μm;

[0018] Preferably, the thickness of the conductive layer is 0.1-50 μm.

[0019] Preferably, the transverse cross section of the etched groove is circular or square.

[0020] Preferably, the sintering process is pressure sintering or pressureless sintering.

[0021] Preferably, the pressure of the pressure sintering is 20-30 mPa.

[0022] Preferably, the first insulating layer and the second insulating layer are both made of silicon dioxide.

[0023] Preferably, the etching process is to use a photoresist as a mask, form a mask layer on the first insulating layer, use a strong base to etch the exposed part, so that etching holes are formed on the first insulating layer, inject a strong base into each etching hole, and continue to etch the silicon plate to form an etching groove on the silicon plate; cleaning the sacrificial layer includes soaking in deionized water or soaking in deionized water with ultrasonic assistance.

[0024] Preferably, the nanometal slurry is a slurry containing metal nanoparticles; the metal nanoparticles are at least one of copper, gold, palladium, silver, aluminum, silver-palladium alloy, gold-palladium alloy, copper-silver alloy, copper-indium alloy, copper-silver-nickel alloy, copper-silver-tin alloy, copper-silver-titanium alloy or copper-aluminum alloy, silver-coated copper, tin-coated copper, organic-coated copper or organic-coated silver particles.

[0025] Preferably, the strong alkaline solution is NaOH or KOH, with a concentration of 30-40wt%; the etching time is 40-70min;

[0026] The spin coating speed is 1000-5000rpm, and the spin coating time is 30-60s.

[0027] The present invention also provides a metal nano-sintered body with a metal probe column obtained based on the column planting method for wafer packaging as described in any one of the above.

[0028] The pillar planting method and metal nano sintered body for wafer packaging provided by the present invention have the following improvements compared with the prior art:

[0029] 1. The column planting method for wafer packaging provided by the present invention adopts a sintering process to form a dense column structure on the wafer, thereby realizing the connection between the power device and the chip. The obtained metal probe column has no voids, high density, high mechanical strength, and good electrical conductivity and thermal conductivity.

[0030] 2. In the column planting method for wafer packaging provided by the present invention, the sacrificial layer adopts the water-soluble organic substance PssNa polystyrene sulfonate, which greatly simplifies the demoulding process. The demoulding agent only needs water and will not produce other waste liquids. It is highly efficient and can be demoulded by putting it in water.

[0031] 3. The column planting method for wafer packaging provided by the present invention can also adopt pressure sintering. Pressure assists in shortening the process time, increasing density, and improving the mechanical strength, electrical conductivity, and thermal conductivity of the metal column. At the same time, the sintering process is simple and the cost is low. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0033] Figure 1 This is a structural diagram of step S1 in a specific implementation manner;

[0034] Figure 2 This is a structural diagram of step S2 in a specific implementation manner;

[0035] Figure 3 It is a structural schematic diagram of steps S3 and S4 in a specific implementation manner;

[0036] Figure 4 This is a structural diagram of step S5 in a specific implementation manner;

[0037] Figure 5 A schematic diagram of the structure of a metal nano sintered body obtained in a specific embodiment;

[0038] Description of reference numerals:

[0039] 1. Silicon plate; 2. First insulating layer; 3. Etched hole; 4. Etched groove; 5. Second insulating layer; 6. Sacrificial layer; 7. Metal probe; 8. Conductive layer. DETAILED DESCRIPTION

[0040] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0041] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0042] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0043] like Figure 1-5 As shown, the present embodiment provides a pillar planting method for wafer packaging, comprising the following steps:

[0044] S1) preparing a first insulating layer 2 on the upper end surface and the lower end surface of the silicon plate 1 respectively;

[0045] S2) etching one of the first insulating layers 2 by an etching process, so that a plurality of etching holes 3 arranged at intervals are formed on the insulating layer 2, and an etching liquid is injected into the etching holes 3 to form etching grooves 4 on the silicon plate 1;

[0046] S3) forming a second insulating layer 5 on the inner wall of the etching hole 3, the bottom and sidewall of the etching groove 4 by a thermal oxidation process;

[0047] S4) preparing a sacrificial layer 6 on the first insulating layer 2 and the second insulating layer 5;

[0048] S5) Spin-coating nano-metal slurry on the sacrificial layer 6, and allowing the nano-metal slurry to fill the etched grooves 4 and the etched holes, and sintering is performed using a sintering process, so that the etched grooves 4 and the etched holes form metal probes 7, and a conductive layer 8 is formed on the sacrificial layer 6;

[0049] S6) cleaning the sacrificial layer, separating the metal probe 7 and the conductive layer 8, and obtaining a metal nano-sintered body with the metal probe.

[0050] Specifically, the sacrificial layer is at least one of polyvinyl pyrrolidone, sodium polystyrene sulfonate or ethyl cellulose which are easily soluble in water.

[0051] Specifically, the thickness of the first insulating layer 2 is 0.3-0.6 μm; preferably, the thickness of the first insulating layer 2 is 0.5 μm;

[0052] The thickness of the second insulating layer 5 is 0.3-0.6 μm; preferably, the thickness of the first insulating layer 2 is 0.5 μm;

[0053] The depth of the etched groove 4 is 0.1-1000 μm;

[0054] The thickness of the conductive layer 8 is 0.1-50 μm.

[0055] Specifically, the transverse cross section of the etching groove (4) is circular or square.

[0056] Specifically, the sintering process is pressure sintering or pressureless sintering.

[0057] Specifically, the pressure of the pressure sintering is 20-30 mPa.

[0058] Specifically, the first insulating layer 2 and the second insulating layer 5 are both made of silicon dioxide.

[0059] Specifically, the etching process is to use photoresist as a mask, form a mask layer on the first insulating layer, use strong alkali to etch the exposed part, so that etching holes are formed on the first insulating layer, inject strong alkali into each etching hole, and continue to etch the silicon plate to form an etching groove on the silicon plate; cleaning the sacrificial layer includes soaking in deionized water or soaking in deionized water with ultrasonic assistance.

[0060] Specifically, the nanometal slurry is a slurry containing metal nanoparticles; the metal nanoparticles are at least one of copper, gold, palladium, silver, aluminum, silver-palladium alloy, gold-palladium alloy, copper-silver alloy, copper-indium alloy, copper-silver-nickel alloy, copper-silver-tin alloy, copper-silver-titanium alloy or copper-aluminum alloy, silver-coated copper, tin-coated copper, organic-coated copper or organic-coated silver particles.

[0061] Specifically, the strong alkaline solution is NaOH or KOH, with a concentration of 30-40wt%; the etching time is 40-70min;

[0062] The spin coating speed is 1000-5000rpm, and the spin coating time is 30-60s.

[0063] The present invention also provides a metal nano-sintered body with a metal probe column obtained based on the column planting method for wafer packaging as described in any one of the above.

[0064] The column planting method for wafer packaging provided by the present invention adopts a sintering process to form a dense column structure on the wafer, thereby realizing the connection between the power device and the chip. The obtained metal probe column has no voids, high density, high mechanical strength, and good electrical conductivity and thermal conductivity.

[0065] The column planting method for wafer packaging provided by the present invention adopts water-soluble organic substance PssNa polystyrene sulfonate as the sacrificial layer, which greatly simplifies the demoulding process. The demoulding agent only needs water and does not generate other waste liquids. It is highly efficient and can be demoulded by putting it in water.

[0066] The column planting method for wafer packaging provided by the present invention can also adopt pressure sintering, and pressure assists in shortening the process time, increasing the density, and improving the mechanical strength, electrical conductivity, and thermal conductivity of the metal column. At the same time, the sintering process is simple and the cost is low.

[0067] The preparation process of the metal nano-sintered body with a metal probe includes the following steps:

[0068] 101) preparing a first insulating layer 2 on the upper end surface and the lower end surface of the silicon plate 1 respectively, wherein the first insulating layer 2 is made of silicon dioxide;

[0069] 102) using photoresist as a mask, forming a mask layer on the first insulating layer 2, forming an opening in the silicon dioxide layer on the silicon wafer by etching, the size of the opening depends on the pillar planting requirements, using a strong base to etch the exposed part, so that etching holes 3 are formed on the first insulating layer, injecting a strong base into each etching hole 3, and continuing to etch the silicon plate, so that etching grooves 4 are formed on the silicon plate;

[0070] 103) forming a second insulating layer 5 on the inner wall of the etching hole 3, the bottom and the side wall of the etching groove 4 by a thermal oxidation process; the material of the second insulating layer 5 is silicon dioxide;

[0071] 104) preparing a sacrificial layer 6 on the first insulating layer 2 and the second insulating layer 5, wherein the sacrificial layer is at least one of polyvinyl pyrrolidone, sodium polystyrene sulfonate or ethyl cellulose which is easily soluble in water;

[0072] 105) Spin-coating nano-metal slurry on the sacrificial layer 6, and allowing the nano-metal slurry to fill the etched grooves 4 and the etched holes, and sintering is performed using a sintering process, so that the etched grooves 4 and the etched holes form metal probes 7, and a conductive layer 8 is formed on the sacrificial layer 6;

[0073] 106) Soaking in deionized water to separate the metal probe 7 and the conductive layer 8, and obtaining a metal nano sintered body with the metal probe.

[0074] The thickness of the first insulating layer 2 of the present invention is 0.3-0.6 μm; the thickness of the first insulating layer 2 can be adjusted according to the specific process, and the thickness of the first insulating layer 2 is preferably 0.5 μm;

[0075] The thickness of the second insulating layer 5 of the present invention is 0.3-0.6 μm, which can be adjusted according to the specific process. The thickness of the first insulating layer 2 is preferably 0.5 μm.

[0076] The depth of the etching groove 4 of the present invention is 0.1-1000 μm, which is selected according to the specific process.

[0077] The thickness of the conductive layer 8 of the present invention is 0.1-50 μm, which is selected according to the specific process.

[0078] The transverse cross section of the etching groove 4 of the present invention is circular or square. The shape may be circular, square or any other desired shape. The preferred shape is circular.

[0079] The sintering process is pressureless sintering or pressure sintering.

[0080] When pressure sintering is selected, the pressure of pressure sintering is 20-30mPa, which can shorten the process time, increase the density, and improve the mechanical strength, electrical conductivity, and thermal conductivity of the metal column.

[0081] Nanometal slurry is a slurry containing metal nanoparticles; the metal nanoparticles are at least one of copper, gold, palladium, silver, aluminum, silver-palladium alloy, gold-palladium alloy, copper-silver alloy, copper-indium alloy, copper-silver-nickel alloy, copper-silver-tin alloy, copper-silver-titanium alloy or copper-aluminum alloy, silver-coated copper, tin-coated copper, organic-coated copper or organic-coated silver particles.

[0082] The strong alkaline solution is NaOH or KOH, with a concentration of 30-40wt%; the etching time is 40-70min;

[0083] The spin coating speed is 1000-5000rpm, and the spin coating time is 30-60s;

[0084] The sacrificial layer can also be cleaned by soaking in deionized water and using ultrasound to improve work efficiency.

[0085] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A pillar planting method for wafer packaging, Features: The steps include: Preparing a first insulating layer (2) on the upper end surface and the lower end surface of the silicon plate (1) respectively; Using an etching process, one of the first insulating layers (2) is etched to form a plurality of etching holes (3) arranged at intervals on the insulating layer (2); and an etching liquid is injected into the etching holes (3) to form etching grooves (4) on the silicon plate (1); Forming a second insulating layer (5) on the inner wall of the etching hole (3) and the bottom and side wall of the etching groove (4) through a thermal oxidation process; Preparing a sacrificial layer (6) on the first insulating layer (2) and the second insulating layer (5); Spin-coating a nano-metal slurry on the sacrificial layer (6) and allowing the nano-metal slurry to fill the etched groove (4) and the etched hole, performing sintering using a sintering process, the etched groove (4) and the etched hole forming a metal probe column (7), and forming a conductive layer (8) on the sacrificial layer (6); The sacrificial layer is cleaned, the metal probe column (7) and the conductive layer (8) are separated, and a metal nano sintered body having the metal probe column is obtained.

2. The pillar planting method for wafer packaging according to claim 1, Features: The sacrificial layer is at least one of polyvinyl pyrrolidone, sodium polystyrene sulfonate or ethyl cellulose which are easily soluble in water.

3. The pillar planting method for wafer packaging according to claim 1, Features: The thickness of the first insulating layer (2) is 0.3-0.6 μm; the thickness of the second insulating layer (5) is 0.3-0.6 μm; The depth of the etching groove (4) is 0.1-1000 μm; the thickness of the conductive layer (8) is 0.1-50 μm.

4. The pillar planting method for wafer packaging according to claim 1, Features: The transverse cross section of the etching groove (4) is circular or square.

5. The pillar planting method for wafer packaging according to claim 1, Features: The sintering process is pressure sintering or pressureless sintering.

6. The pillar planting method for wafer packaging according to claim 1, Features: The first insulating layer (2) and the second insulating layer (5) are both made of silicon dioxide.

7. The pillar planting method for wafer packaging according to claim 1, Features: The etching process comprises using a photoresist as a mask to form a mask layer on the first insulating layer (2), using a strong alkali to etch the exposed portion, so that etching holes (3) are formed on the first insulating layer (2), injecting a strong alkali into each etching hole, and continuing to etch the silicon plate (1), so that etching grooves (4) are formed on the silicon plate (1); cleaning the sacrificial layer comprises soaking in deionized water or soaking in deionized water with ultrasonic assistance.

8. The pillar planting method for wafer packaging according to claim 1, Features: Nanometal slurry is a slurry containing metal nanoparticles; the metal nanoparticles are at least one of copper, gold, palladium, silver, aluminum, silver-palladium alloy, gold-palladium alloy, copper-silver alloy, copper-indium alloy, copper-silver-nickel alloy, copper-silver-tin alloy, copper-silver-titanium alloy or copper-aluminum alloy, silver-coated copper, tin-coated copper, organic-coated copper or organic-coated silver particles.

9. The pillar planting method for wafer packaging according to claim 1, Features: The strong alkaline solution is NaOH or KOH, with a concentration of 30-40wt%; the etching time is 40-70min; The spin coating speed is 1000-5000rpm, and the spin coating time is 30-60s.

10. A metal nano-sintered body with a metal probe obtained based on the pillar planting method for wafer packaging according to any one of claims 1 to 9.

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