Pixel structure, image sensor, electronic device and control method

Abstract

The present invention provides a pixel structure, an image sensor, an electronic device, and a control method. The pixel structure includes a plurality of pixel units arranged in an array. The pixel units include: a first photoelectric conversion element; a first transfer transistor coupled to a first floating diffusion region and configured to transfer charge accumulated by the first photoelectric conversion element to the first floating diffusion region; a second photoelectric conversion element having a sensitivity less than that of the first photoelectric conversion element; a second transfer transistor coupled to a second floating diffusion region and configured to transfer charge accumulated by the second photoelectric conversion element to the second floating diffusion region; and a readout circuit coupled to the first floating diffusion region and the second floating diffusion region and configured to read out voltage signals from the first floating diffusion region and the second floating diffusion region. The present invention can achieve the purpose of enabling an image sensor to compatibly recognize both high-light and low-light information, improve dynamic range, and enhance overall image sensor performance through layout design.

Description

Technical Field

[0001] The present invention belongs to the field of image sensing, and in particular relates to a pixel structure, an image sensor, an electronic device and a control method. Background Art

[0002] Image sensors are a crucial component of digital cameras. Depending on the component, they can be categorized into two main types: CCD (charge-coupled device) and CMOS (metal oxide semiconductor). With the continuous advancement of CMOS integrated circuit manufacturing processes, particularly the design and manufacturing of CMOS image sensors, CMOS image sensors have gradually replaced CCD image sensors as the mainstream. CMOS image sensors offer advantages such as higher industrial integration and lower power consumption.

[0003] Existing standard image sensors have a limited dynamic range of approximately 60dB to 70dB. However, the dynamic range of real-world brightness is much greater. Natural scenes often span a range of 90dB and above. To simultaneously capture both bright lights and shadows, high dynamic range (HDR) technology has been used in image sensors to increase the captured dynamic range. The most common technique for increasing dynamic range is to combine multiple exposures captured with a standard (low dynamic range) image sensor into a single linear high dynamic range image, which has a much larger dynamic range than a single exposure. However, existing technologies struggle to effectively improve dynamic range while maintaining image sensor performance. Furthermore, sometimes it is necessary to capture images in environments with flickering. For example, a car is equipped with various onboard devices, including image sensors for traffic sign recognition. Traffic signs include LED lights with extremely high flickering frequencies. Traditional on-board image sensors use single pixels for recognition, making them incompatible with both low-light and brightly lit images. This can lead to misinterpretations of traffic signs, potentially causing serious traffic accidents.

[0004] It should be noted that the above introduction to the technical background is merely intended to provide a clear and complete description of the technical solutions of this application and facilitate understanding by those skilled in the art. Simply because these solutions are described in the background technology section of this application, it should not be assumed that the above technical solutions are well known to those skilled in the art. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the object of the present invention is to provide a pixel structure, image sensor, electronic device and control method for solving the problem in the prior art that the dynamic range of traditional image sensors is difficult to compatibly recognize low-light information and high-brightness information.

[0006] To achieve the above-mentioned objectives and other related objectives, the present invention provides a pixel structure, which includes a plurality of pixel units arranged in an array, and the pixel units include: a first photoelectric conversion element; a first transfer transistor coupled to a first floating diffusion region, for transferring the charge accumulated by the first photoelectric conversion element to the first floating diffusion region; a second photoelectric conversion element, the sensitivity of the second photoelectric conversion element being less than the sensitivity of the first photoelectric conversion element; a second transfer transistor coupled to a second floating diffusion region, for transferring the charge accumulated by the second photoelectric conversion element to the second floating diffusion region; and a readout circuit coupled to the first floating diffusion region and the second floating diffusion region, for reading out the voltage signals of the first floating diffusion region and the second floating diffusion region.

[0007] The present invention further provides an image sensor, which includes the pixel structure described in any one of the above solutions.

[0008] The present invention also provides an electronic device, comprising the image sensor as described above.

[0009] The present invention further provides a method for controlling an image sensor, applicable to the image sensor described in any one of the above solutions, the method comprising:

[0010] Reading out information of a first pixel, where the first pixel includes the first photoelectric conversion element and the first transfer transistor, the reading out information of the first pixel specifically comprising: resetting a storage area in the first pixel and quantizing to obtain a first reset signal; transmitting image information corresponding to the first photoelectric conversion element and quantizing to obtain a first image sampling signal;

[0011] Reading out information of a second pixel, where the second pixel includes the second photoelectric conversion element and the second transfer transistor, specifically comprising: transmitting image information corresponding to the second photoelectric conversion element, and quantizing it to obtain a second image sampling signal; wherein, a first actual image signal of the first pixel is obtained based on the first reset signal and the first image sampling signal, and a second actual image signal of the second pixel is obtained based on the second image sampling signal.

[0012] As described above, the pixel structure, image sensor, electronic device, and control method of the present invention have the following beneficial effects:

[0013] The present invention adopts a first photoelectric conversion element and a second photoelectric conversion element with different sensitivities. The first photoelectric conversion element has high sensitivity (such as a large area) and is mainly used to obtain low-light information. The second photoelectric conversion element has low sensitivity (such as a small area) and is mainly used to obtain highlight information, thereby achieving the purpose of the image sensor being compatible with recognizing highlight information and low-light information, and improving the dynamic range.

[0014] The present invention can effectively reduce signal noise and improve readout accuracy through the layout design of the pixel structure. At the same time, it can reduce the leakage of electrons from the large-area first photoelectric conversion element to the small-area second photoelectric conversion element, thereby improving the overall performance of the image sensor. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The accompanying drawings are included to provide a further understanding of the embodiments of the present application, and constitute a part of the specification, and are used to illustrate the implementation of the present application and, together with the text description, to explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application.

[0016] Figure 1 Shown is a schematic diagram of the circuit principle of the pixel structure of Example 1 of the present invention.

[0017] Figure 2 and Figure 3 Shown is a schematic diagram of the layout structure of the pixel structure of Example 1 of the present invention.

[0018] Figure 4 It shows the timing diagram of reading out the second pixel and reading out the first pixel in low-gain mode in Example 1.

[0019] Figure 5 The timing diagram for reading out the second pixel and the first pixel in high-gain mode in Example 1 is shown.

[0020] Figure 6 It shows a timing diagram of first reading the image signal and then reading the reset signal when reading the first pixel and the second pixel in both low-gain and high-gain modes in Example 1.

[0021] Figure 7 It shows a timing diagram of first reading the reset signal and then reading the image signal when reading the first pixel and the second pixel in both low-gain and high-gain modes in Example 1.

[0022] Figure 8 Shown is a schematic diagram of the circuit principle of the pixel structure of Example 2 of the present invention.

[0023] Figure 9 and Figure 10 Shown is a schematic diagram of the layout structure of the pixel structure of Example 2 of the present invention.

[0024] Figure 11 It shows a timing diagram of first reading the image signal and then reading the reset signal and setting the switching transistor when reading the first pixel and the second pixel in both low gain and high gain modes in Example 2.

[0025] Figure 12 It shows the timing diagram of reading out the first pixel and the second pixel in both low gain and high gain modes in Example 2, first reading out the reset signal and then reading out the image signal, and setting and not setting the switching transistor.

[0026] Component number description

[0027] 100, 400 first pixel

[0028] 200, 500 second pixel

[0029] 300, 600 third pixel

[0030] PD1, PD3 first photoelectric conversion element

[0031] TX1, TX3 first transmission transistor

[0032] PD2, PD4 Second photoelectric conversion element

[0033] TX2, TX4 second transmission transistor

[0034] RST1 first reset transistor

[0035] SF1 first source follower transistor

[0036] SEL1 first row selection transistor

[0037] RST2 Second reset transistor

[0038] SF2 Second source follower transistor

[0039] SEL2 Second row selection transistor

[0040] DCG1, DCG2 gain control transistors

[0041] C1, C2 capacitors

[0042] SUB substrate contact

[0043] SW switching transistor

[0044] RST3 reset transistor

[0045] SF3 source follower transistor

[0046] SEL3 row select transistor DETAILED DESCRIPTION

[0047] The following describes the embodiments of the present invention through specific examples. Those skilled in the art will readily understand the other advantages and benefits of the present invention from the disclosure herein. The present invention may also be implemented or applied through various other specific embodiments, and the details in this specification may be modified or altered based on different viewpoints and applications without departing from the spirit of the present invention.

[0048] It should be emphasized that the term "include / comprising" when used herein refers to the presence of features, integers, steps or components, but does not exclude the presence or addition of one or more other features, integers, steps or components.

[0049] Features described and / or illustrated with respect to one embodiment may be used in the same or similar manner in one or more other embodiments, combined with features in other embodiments, or substituted for features in other embodiments.

[0050] For example, when describing the embodiments of the present invention, cross-sectional views of device structures may be partially enlarged to scale for ease of explanation. Furthermore, these schematic views are merely illustrative and should not limit the scope of the present invention. Furthermore, in actual manufacturing, three-dimensional dimensions, including length, width, and depth, should be included.

[0051] For convenience, spatially relative terms such as "under," "below," "below," "below," "above," and "on" may be used herein to describe the relationship of one element or feature to other elements or features shown in the drawings. It will be understood that these spatially relative terms are intended to encompass orientations of the device in use or operation in addition to the orientation depicted in the drawings. Additionally, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.

[0052] In the context of the present application, a structure described as a first feature being "above" a second feature may include embodiments where the first and second features are formed in direct contact, and may also include embodiments where an additional feature is formed between the first and second features, such that the first and second features may not be in direct contact.

[0053] It should be noted that the illustrations provided in this embodiment are only used to schematically illustrate the basic concept of the present invention. Therefore, the illustrations only show components related to the present invention and are not drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component can be changed at will, and the component layout type may also be more complicated.

[0054] Conventional vehicle-mounted image sensors use a single pixel for recognition, and are unable to recognize both low-light information and high-brightness information, resulting in misjudgment of traffic signs, which may in turn cause serious traffic accidents. The purpose of the present invention is to provide a pixel structure, an image sensor, an electronic device, and a control method to solve the problem in the prior art that the dynamic range of conventional image sensors is difficult to recognize both low-light information and high-brightness information. Based on the above problem, the present invention provides a pixel structure, the pixel structure comprising a plurality of pixel units arranged in an array, the pixel unit comprising: a first photoelectric conversion element; a first transfer transistor coupled to a first floating diffusion region, for transferring the charge accumulated by the first photoelectric conversion element to the first floating diffusion region; a second photoelectric conversion element, the sensitivity of the second photoelectric conversion element being less than the sensitivity of the first photoelectric conversion element; a second transfer transistor coupled to a second floating diffusion region, for transferring the charge accumulated by the second photoelectric conversion element to the second floating diffusion region; and a readout circuit coupled to the first floating diffusion region and the second floating diffusion region, for reading out the voltage signals of the first floating diffusion region and the second floating diffusion region. The sensitivity of the second photoelectric conversion element is smaller than that of the first photoelectric conversion element. For example, the photosensitive area of ​​the second photoelectric conversion element can be set to be smaller than the photosensitive area of ​​the first photoelectric conversion element, so that the first photoelectric conversion element can be mainly used to obtain low-light information, and the second photoelectric conversion element can be mainly used to obtain high-light information, thereby achieving the purpose of the image sensor to recognize both high-light information and low-light information, thereby improving the dynamic range. Of course, in other embodiments, other methods can also be used, such as by providing an anti-reflection layer on the second photoelectric conversion element, so that the sensitivity of the second photoelectric conversion element is smaller than that of the first photoelectric conversion element, and the examples listed here are not limited.

[0055] Example 1

[0056] like Figures 1 to 3 As shown, this embodiment provides a pixel structure, which includes a plurality of pixel units arranged in an array, and the pixel unit includes: a first photoelectric conversion element PD1, a first transmission transistor TX1, a second photoelectric conversion element PD2, a second transmission transistor TX2 and a readout circuit.

[0057] The first photoelectric conversion element PD1 is used to convert the optical signal into an electrical signal, which can be used to expose and capture low-light information. Of course, it can also capture scene information according to actual needs; the first photoelectric conversion element PD1 includes but is not limited to a photodiode, such as a Pin-type photodiode.

[0058] The first transfer transistor TX1 is coupled to the first floating diffusion region and is configured to transfer charge accumulated by the first photoelectric conversion element PD1 to the first floating diffusion region. The first floating diffusion region can be a shared charge collection area or comprised of multiple floating diffusion points, with the charge collected by each floating diffusion point serving as the charge collected by the first floating diffusion region. The first photoelectric conversion element PD1, the first transfer transistor TX1, and the first floating diffusion region can utilize existing structures.

[0059] The second photoelectric conversion element PD2 has a lower sensitivity than the first photoelectric conversion element PD1. The second photoelectric conversion element PD2 is used to convert the optical signal into an electrical signal, which can be used to expose and capture highlight light information. The second photoelectric conversion element PD2 includes, but is not limited to, a photodiode, such as a Pin-type photodiode.

[0060] The second transfer transistor TX2 is coupled to the second floating diffusion region and is configured to transfer charge accumulated by the second photoelectric conversion element PD2 to the second floating diffusion region. The second floating diffusion region can be a shared charge collection area or comprised of multiple floating diffusion points, where the charge collected by each floating diffusion point serves as the charge collected by the first floating diffusion region. The second photoelectric conversion element PD2, the second transfer transistor TX2, and the second floating diffusion region can employ existing structures.

[0061] like Figure 1 As shown, the readout circuit includes: a first reset transistor RST1, a first source follower transistor SF1, a second reset transistor RST2 and a second source follower transistor SF2. Each of the above transistors can be an NMOS transistor.

[0062] The source terminal of the first reset transistor RST1 is coupled to the first floating diffusion region, and the drain terminal of the first reset transistor RST1 is coupled to the first voltage terminal for resetting the first floating diffusion region; the gate terminal of the first reset transistor RST1 is connected to the first reset signal terminal to reset the first floating diffusion region under the control of the first reset signal.

[0063] A gate terminal of the first source follower transistor SF1 is connected to the first floating diffusion region, a drain terminal of the first source follower transistor SF1 is coupled to a second voltage terminal, and a source terminal of the first source follower transistor SF1 is coupled to a first output column line.

[0064] The source terminal of the second reset transistor RST2 is coupled to the second floating diffusion region, and the drain terminal of the second reset transistor RST2 is coupled to the third voltage terminal for resetting the second floating diffusion region; the gate terminal of the second reset transistor RST2 is connected to the second reset signal terminal to reset the second floating diffusion region under the control of the second reset signal.

[0065] A gate terminal of the second source follower transistor SF2 is connected to the second floating diffusion region, a drain terminal of the second source follower transistor SF2 is coupled to a fourth voltage terminal, and a source terminal of the second source follower transistor SF2 is coupled to a second output column line.

[0066] The second output column line and the first output column line can be two different output column lines or a shared output column line. This allows for serial and parallel output of different models based on the different output column line configurations. In this embodiment, the second output column line and the first output column line are a shared output column line BIT.

[0067] In one embodiment, the first voltage terminal, the second voltage terminal, the third voltage terminal, and the fourth voltage terminal are the same voltage terminal VDD, so as to simplify circuit design and wiring, save circuit manufacturing cost, and improve signal acquisition accuracy.

[0068] In one embodiment, the readout circuit further includes a gain control transistor DCG1, coupled between the first floating diffusion region and the first reset transistor RST1, thereby improving the dynamic range of the pixel structure. The gain control transistor DCG1 can be an NMOS transistor. In a further example, a capacitor can be provided between the reset transistor RST1 and the gain control transistor DCG1. The capacitor can be a parasitic capacitor or a device capacitor. Switching between low conversion gain and high conversion gain modes is achieved by turning the gain control transistor DCG1 on and off.

[0069] In one embodiment, the readout circuit further includes a first row select transistor SEL1, wherein the drain terminal of the first row select transistor SEL1 is coupled to the source terminal of the first source follower transistor SF1, and the source terminal of the first row select transistor SEL1 is coupled to the first output column line. The first row select transistor SEL1 can be an NMOS transistor.

[0070] In one embodiment, the readout circuit further includes a second row select transistor SEL2, wherein the drain terminal of the second row select transistor SEL2 is coupled to the source terminal of the second source follower transistor SF2, and the source terminal of the second row select transistor SEL2 is coupled to the second output column line. The second row select transistor SEL2 can be an NMOS transistor.

[0071] In addition, it should be noted that the ratio of the number of the first pixel to the second pixel can be understood as the ratio of the number of the first photoelectric conversion element PD1 to the second photoelectric conversion element PD2, which can be designed according to actual needs, for example, set to 1:1, 2:1 and 4:1, etc. In this embodiment, it is set to 1:1, see Figure 2 and Figure 3 shown.

[0072] like Figure 2 and Figure 3 As shown, in one embodiment, the first photoelectric conversion element PD1, the first transfer transistor TX1, the first floating diffusion area, the first reset transistor RST1, the first source follower transistor SF1 and the first row selection transistor SEL1 constitute a first pixel 100 arranged along a first direction; the second photoelectric conversion element PD2, the second transfer transistor TX2, the second floating diffusion area, the second reset transistor RST2, the second source follower transistor SF2 and the second row selection transistor SEL2 constitute a second pixel 200 arranged along the first direction; a plurality of first pixels 100 are arranged in an array, and a plurality of second pixels 200 are arranged in an array.

[0073] In one embodiment, for the first pixel, the pixels are arranged in rows along the first direction and in columns along the second direction. Optionally, the first direction is perpendicular to the second direction. At the same time, for the second pixel, the pixels are arranged in rows along the first direction and in columns along the second direction. In a further example, the projections of the first photoelectric conversion element in the first pixel and the second photoelectric conversion element in the second pixel in the first direction are arranged alternately at intervals, and the projections in the second direction are arranged alternately at intervals.

[0074] In one embodiment, among the adjacent first pixels 100 and second pixels 200, the first pixel 100 and the second pixel 200 corresponding to the first row selection transistor SEL1 and the second row selection transistor SEL2 with the shortest projection distance in the first direction are selected to form the pixel unit. Figure 2 As shown, in this embodiment, the first pixel 100 and the second pixel 200 corresponding to the first row selection transistor SEL1 and the second row selection transistor SEL2 with the shortest projection distance in the first direction are selected to form the pixel unit. Figure 3Based on the above conditions, the two pixels adjacent to the second pixel 200 (the first pixel 100 and the third pixel 300; for ease of description, the other first pixel adjacent to the second pixel 200 in the figure is described as the third pixel 300) can both form the pixel unit. This arrangement is beneficial to the wiring in the pixel unit and the acquisition and transmission of image signals.

[0075] In a further example, the first row selection transistor SEL1 and the second row selection transistor SEL2 share the same output column line BIT. The closer first row selection transistor SEL1 and the second row selection transistor SEL2 can facilitate the wiring of the output column line BIT in a pixel unit. The corresponding output column line BIT can facilitate reducing signal noise and improving readout accuracy.

[0076] At the same time, in one embodiment, in the same pixel unit, the distance D2 between the first source follower transistor SF1 of the first pixel 100 and the second pixel 200 is smaller than the distance D3 between the first row selection transistor SEL1 of the first pixel 100 and the second pixel 200. This setting can make the first source follower transistor SF1 of the first pixel 100 and the first floating diffusion region be arranged adjacent to each other, so as to facilitate the output of the first floating diffusion region, improve the signal conversion gain, and help reduce noise. Figure 3 shown.

[0077] Based on the setting of the above conditions, in the two pixels adjacent to the second pixel 200 (the first pixel 100 and the third pixel 300), although the projection distances between the row selection transistors of the first pixel 100 and the third pixel 300 and the row selection transistor of the second pixel 200 are both the shortest (D1), the distance between the first source follower transistor SF1 of the first pixel 100 and the second pixel 200 is shorter. Therefore, this embodiment defines that the second pixel 200 and the first pixel 100 constitute the pixel unit to obtain a better layout design, thereby improving the overall performance of the image sensor.

[0078] See also Figure 2As shown, in one embodiment, each second photoelectric conversion element PD2 is disposed at the center of four arrayed first photoelectric conversion elements PD1, and the second transmission transistor TX2, the second reset transistor RST2, the second source follower transistor SF2, and the second row selection transistor SEL2 are sequentially arranged along the first direction between two adjacent second photoelectric conversion elements PD2. In a further optional example, the first reset transistor RST1, the first source follower transistor SF1, and the first row selection transistor SEL1 are arranged between two adjacent second photoelectric conversion elements PD2 along the second direction, with the first direction being perpendicular to the second direction. Furthermore, four second photoelectric conversion elements PD2 are correspondingly arranged in the four corner regions of each first photoelectric conversion element PD1, and four first photoelectric conversion elements PD1 are correspondingly arranged in the four corner regions of each second photoelectric conversion element PD2.

[0079] In one embodiment, when the pixel unit further includes the gain control transistor DCG1, the gain control transistor DCG1 and the first reset transistor RST1 are arranged in the same column along the second direction, the first source follower transistor SF1 and the first row selection transistor SEL1 are arranged in the same column along the second direction, and the gain control transistor DCG1 and the first reset transistor RST1 are arranged close to the first photoelectric conversion element PD1 in the same first pixel.

[0080] In one embodiment, the pixel unit further includes a substrate contact SUB, which is disposed along the second direction on a side of the first source follower transistor SF1 away from the first row select transistor SEL1. Under a certain potential, the substrate contact SUB can form a potential barrier for electron flow, which can effectively prevent electrons in the first pixel 100 from leaking to the surrounding second pixel 200, thereby isolating the first pixel 100 from the second pixel 200.

[0081] In one embodiment, in the second direction, a distance L1 between the first photoelectric conversion element PD1 and the second photoelectric conversion element PD2 in the same pixel unit is greater than a distance L2 between the first photoelectric conversion element PD1 and the second photoelectric conversion element PD2 in adjacent pixel units. In this embodiment, the first photoelectric conversion element PD1 is relatively far away from the second photoelectric conversion element PD2 in the same pixel unit. When electrons leak from the first photoelectric conversion element PD1, the longer distance lengthens the electron leakage path, making the leaked electrons more easily drawn away by the voltage terminal VDD of the same first pixel. In other words, the distance is relatively close to the voltage terminal VDD corresponding to the first photoelectric conversion element PD1 itself, thereby effectively reducing electrons leaking from the first photoelectric conversion element PD1 to the second photoelectric conversion element PD2 and improving image accuracy.

[0082] In one embodiment, in the first direction, the distance M1 between the first photoelectric conversion element PD1 and the second photoelectric conversion element PD2 in the same pixel unit is equal to the distance M2 between the first photoelectric conversion element PD1 and the second photoelectric conversion element PD2 in adjacent pixel units.

[0083] In one embodiment, the area of ​​the first photoelectric conversion element PD1 is larger than the area of ​​the second photoelectric conversion element PD2 , so that the sensitivity of the second photoelectric conversion element PD2 is smaller than the sensitivity of the first photoelectric conversion element PD1 .

[0084] In another embodiment, the pixel structure may also be provided with an anti-reflection layer, which is disposed at least between the second photoelectric conversion element PD2 and the incident light, so that the sensitivity of the second photoelectric conversion element PD2 is lower than the sensitivity of the first photoelectric conversion element PD1. The anti-reflection layer may adopt a conventional anti-reflection structure design, for example, by disposing an anti-reflection material layer, a metal grid, etc. between the photoelectric conversion element and the incident light. The anti-reflection layer may be disposed directly opposite the light-receiving surface of the second photoelectric conversion element PD2. In other examples, the anti-reflection layer may further extend around the first photoelectric conversion element PD1.

[0085] In one embodiment, within the same pixel unit, the first pixel 100 and the second pixel 200 are provided with color filters of the same color. In one example, the arrayed first pixels 100 can form a Bayer array arrangement; the arrayed second pixels 200 can form a Bayer array arrangement; of course, other color filter configurations can also be implemented based on actual needs. In this embodiment, the first pixel 100 and the second pixel 200 within the same pixel unit defined above are provided with color filters of the same color, that is, the first photoelectric conversion element PD1 and the second photoelectric conversion element PD2 within the same pixel unit are configured with color filters of the same color.

[0086] In one embodiment, within the same pixel unit, the first pixel 100 corresponds to the first lens, and the second pixel 200 corresponds to the second lens. In this embodiment, a plurality of first pixels 100 correspond one-to-one with a plurality of first lenses, and a plurality of second pixels 200 correspond one-to-one with a plurality of second lenses. The first lens and the second lens can be configured differently, such as with different heights, and can be designed based on actual needs.

[0087] In one embodiment, see Figure 1 As shown, the pixel unit further includes a charge storage device, one end of the charge storage device is coupled to the second floating diffusion region, and the other end of the charge storage device is grounded or connected to a variable voltage.

[0088] As an embodiment, the charge storage device may be a capacitor C1, wherein the charge storage element may be used to store the charge generated by the second transfer transistor TX2, thereby facilitating an increase in the full well capacity of the second pixel 200, thereby reducing the sensitivity of the photoelectric conversion element while increasing the full well capacity. Optionally, the capacitor C1 may be a separate device capacitor or a parasitic capacitor.

[0089] This embodiment further provides an image sensor, which includes the pixel structure described in the above embodiment. The image sensor in this embodiment can be a CMOS image sensor or any other image sensor that can use the pixel structure described in the above embodiment.

[0090] This embodiment also provides an electronic device, comprising the image sensor described above. The electronic device may be, for example, a vehicle-mounted device comprising an image sensor. The specific structure of the image sensor is as described in the above embodiments. Since this vehicle-mounted device utilizes all of the technical solutions of all of the above embodiments, it at least possesses all of the beneficial effects of the technical solutions of the above embodiments, and therefore will not be further detailed here. Of course, the electronic device in this embodiment may also be a monitoring device, machine vision system, drone, mobile phone, camera, etc.

[0091] like Figure 4-7 As shown, this embodiment further provides a method for controlling an image sensor, which is applicable to the image sensor described in any of the above solutions. The control method includes:

[0092] Reading out information of the first pixel 100, where the first pixel 100 includes the first photoelectric conversion element PD1 and the first transmission transistor TX1, specifically includes:

[0093] 1) Resetting the storage area in the first pixel 100 and quantizing to obtain a first reset signal Vrst1;

[0094] 2) transmitting image information corresponding to the first photoelectric conversion element PD1 and quantizing it to obtain a first image sampling signal Vsig1;

[0095] Reading out information of the second pixel 200, where the second pixel 200 includes the second photoelectric conversion element PD2 and the second transmission transistor TX2, specifically includes:

[0096] 3) Transmitting image information corresponding to the second photoelectric conversion element PD2 and quantizing it to obtain a second image sampling signal Vsig2;

[0097] A first actual image signal of the first pixel 100 is obtained based on the first reset signal and the first image sampling signal, and a second actual image signal of the second pixel 200 is obtained based on the second image sampling signal. It should be noted that the order of steps 1) through 3) above does not strictly represent the order of the steps in the image sensor control method protected by the present invention. Those skilled in the art may modify the order based on the above steps according to actual needs. Based on the above-mentioned first pixel reading method, correlated double sampling (CDS) can be implemented.

[0098] In one embodiment, the process of reading out the information of the second pixel 200 further includes:

[0099] The storage area in the second pixel 200 is reset and quantized to obtain a second image reset signal Vrst2, and the second actual image signal is obtained based on the second image reset signal and the second image sampling signal.

[0100] The reset signal quantization in this example may occur after step 3), as shown in FIG. Figure 4-6 As shown; it can also occur between step 2) and step 3), such as Figure 7 In addition, it should be noted that the 3.0 μm pixel in the figure represents an example of the first pixel, and the 1.0 μm pixel represents an example of the second pixel, and this is used as an example for schematic description.

[0101] In one embodiment, the readout mode of the first pixel 100 includes at least one of a low conversion gain mode and a high conversion gain mode. The readout mode of the first pixel can be read out in the low conversion gain mode (see Figure 4 shown), can be read in high conversion gain mode (see Figure 5 As shown), of course, it can also be read in both low conversion gain mode and high conversion gain mode (see Figure 6 and7 ), thereby achieving a high dynamic range. The high conversion gain mode and the low conversion gain mode can be implemented by providing a conversion gain transistor DCG1 between the first reset transistor RST1 and the first floating diffusion region of the first pixel, and further providing a capacitor between the first reset transistor RET1 and the conversion gain transistor DCG1. The low conversion gain and high conversion gain modes are achieved by turning the conversion gain transistor DCG1 on and off. Of course, other methods well known in the art can also be used.

[0102] See also Figure 6 and Figure 7 As shown, when both the low conversion gain mode and the high conversion gain mode are adopted for reading the first pixel 100, the readout method of the first pixel 100 includes the steps of:

[0103] 1) resetting the storage area in the first pixel in the low conversion gain LCG mode, and quantizing to obtain a first reset signal lcgrst1 in the low conversion gain mode;

[0104] 2) resetting the storage area in the first pixel in the high conversion gain HCG mode, and quantizing to obtain a first reset signal hcgrst1 in the high conversion gain mode;

[0105] 3) transmitting image information corresponding to the first photoelectric conversion element in a high conversion gain HCG mode, and quantizing to obtain a first image sampling signal hcgsig1 in the high conversion gain mode;

[0106] 4) reallocating image information corresponding to the first photoelectric conversion element in the low conversion gain LCG mode, and quantizing to obtain a first image sampling signal lcgsig1 in the low conversion gain mode;

[0107] The first actual image signal of the first pixel is obtained based on the first reset signal lcgrst1 and the first image sampling signal lcgsig1 in the low conversion gain mode, and the first reset signal hcgrst1 and the first image sampling signal hcgsig1 in the high conversion gain mode.

[0108] Also, see Figure 6 and Figure 7 As shown, for the readout of the second pixel 200, the image information corresponding to the second photoelectric conversion element may be first transmitted and quantized to obtain the second image sampling signal sig2, and then the storage area in the second pixel may be reset and quantized to obtain the second reset signal rst2. Figure 6As shown; the readout of the second pixel 200 can also be to first reset the storage area in the second pixel and quantize to obtain the second reset signal rst2, then transmit the image information corresponding to the second photoelectric conversion element, and quantize to obtain the second image sampling signal sig2, to achieve correlated double sampling CDS, this method refers to Figure 7 Of course, the readout of the second pixel can also be performed using other timings.

[0109] Example 2

[0110] like Figures 8 to 10 As shown, this embodiment provides a pixel structure, which includes a plurality of pixel units arranged in an array, and the pixel unit includes: a first photoelectric conversion element PD3, a first transmission transistor TX3, a second photoelectric conversion element PD4, a second transmission transistor TX4 and a readout circuit.

[0111] The first photoelectric conversion element PD3 is used to convert an optical signal into an electrical signal, which can be used for exposure and capturing weak light information; the first photoelectric conversion element PD3 includes but is not limited to a photodiode, such as a Pin-type photodiode.

[0112] The first transfer transistor TX3 is coupled to the first floating diffusion region and is configured to transfer charge accumulated by the first photoelectric conversion element PD3 to the first floating diffusion region. The first floating diffusion region can be a shared charge collection area or comprised of multiple floating diffusion points, with the charge collected by each floating diffusion point serving as the charge collected by the first floating diffusion region. The first photoelectric conversion element PD3, the first transfer transistor TX3, and the first floating diffusion region can employ existing structures.

[0113] The second photoelectric conversion element PD4 has a lower sensitivity than the first photoelectric conversion element PD3. The second photoelectric conversion element PD4 is used to convert the optical signal into an electrical signal, which can be used for exposure and capturing highlight light information. The second photoelectric conversion element PD4 includes, but is not limited to, a photodiode, such as a Pin-type photodiode.

[0114] The second transfer transistor TX4 is coupled to the second floating diffusion region and is configured to transfer charge accumulated by the second photoelectric conversion element PD4 to the second floating diffusion region. The second floating diffusion region can be a shared charge collection area or comprised of multiple floating diffusion points, with the charge collected by each floating diffusion point serving as the charge collected by the second floating diffusion region. The second photoelectric conversion element PD4, the second transfer transistor TX4, and the second floating diffusion region can employ existing structures.

[0115] like Figure 4As shown, the readout circuit includes: a reset transistor RST3, wherein the source terminal of the reset transistor RST3 is coupled to the first floating diffusion region and the second floating diffusion region respectively, and the drain terminal of the reset transistor RST3 is coupled to the first common voltage terminal for resetting the first floating diffusion region and the second floating diffusion region; a source follower transistor SF3, wherein the gate terminal of the source follower transistor SF3 is coupled to the first floating diffusion region and the second floating diffusion region respectively, the drain terminal of the source follower transistor SF3 is coupled to the second common voltage terminal, and the source terminal of the source follower transistor SF3 is coupled to the column output line. Each of the above transistors can be an NMOS transistor.

[0116] In one embodiment, the readout circuit further includes a row select transistor SEL3, wherein the drain terminal of the row select transistor SEL3 is coupled to the source terminal of the source follower transistor SF3, and the source terminal of the row select transistor SEL3 is coupled to the co-column output line. The row select transistor SEL3 can be an NMOS transistor.

[0117] In one embodiment, the readout circuit further includes a switching transistor SW, wherein the source terminal of the reset transistor RST3 is coupled to the second floating diffusion region via the switching transistor SW, and the gate terminal of the source follower transistor SF3 is coupled to the second floating diffusion region via the switching transistor SW. By turning the switching transistor SW on and off, the second floating diffusion region can be turned on and off, thereby enabling independent readout of the first floating diffusion region and the second floating diffusion region. This embodiment can effectively save transistors in the readout circuit. By adding only one switching transistor SW, two pixels can share one reset transistor RST3, one source follower transistor SF3, and one row select transistor SEL3, effectively saving the area of ​​the pixel structure and reducing the manufacturing cost of the image sensor.

[0118] In one embodiment, the readout circuit further includes a gain control transistor DCG2 coupled between the first floating diffusion region and the reset transistor RST3, thereby improving the dynamic range of the pixel structure. The gain control transistor DCG2 can be an NMOS transistor. In a further example, a capacitor can be provided between the reset transistor RST3 and the gain control transistor DCG2. The capacitor can be a parasitic capacitor or a device capacitor. Switching between low conversion gain and high conversion gain modes is achieved by turning the gain control transistor DCG2 on and off.

[0119] In addition, it should be noted that the ratio of the number of the first pixel to the second pixel can be understood as the ratio of the number of the first photoelectric conversion element PD1 to the second photoelectric conversion element PD2, which can be designed according to actual needs, for example, set to 1:1, 2:1 and 4:1, etc. In this embodiment, it is set to 1:1, see Figure 9 and Figure 10 shown.

[0120] like Figure 9 and Figure 10 As shown, in one embodiment, the first photoelectric conversion element PD3, the first transfer transistor TX3, and the first floating diffusion region constitute a first pixel 400 arranged along a first direction; the second photoelectric conversion element PD4, the second transfer transistor TX4, and the second floating diffusion region constitute a second pixel 500 arranged along the first direction; a plurality of the first pixels 400 are arranged in an array, and a plurality of the second pixels 500 are arranged in an array.

[0121] In one embodiment, for the first pixel, the pixels are arranged in rows along the first direction and in columns along the second direction. Optionally, the first direction is perpendicular to the second direction. At the same time, for the second pixel, the pixels are arranged in rows along the first direction and in columns along the second direction. In a further example, the projections of the first photoelectric conversion element in the first pixel and the second photoelectric conversion element in the second pixel in the first direction are arranged alternately at intervals, and the projections in the second direction are arranged alternately at intervals.

[0122] In one embodiment, among the adjacent first pixels 400 and second pixels 500, the first pixel and the second pixel corresponding to the first floating diffusion region and the second floating diffusion region of the first transfer transistor TX3 whose projections in the first direction avoid each other are selected to form the pixel unit. Figure 9 As shown, in this example, the second pixel 500 can form the pixel unit with the two adjacent first pixels (the first pixel 400 and the fourth pixel 700, for the sake of convenience of description, the other first pixel adjacent to the second pixel 500 in the figure is described as the fourth pixel 700), that is, the second pixel 500 can form the pixel unit with the first pixel in the adjacent solid line frame, rather than the second pixel 500 and the first pixel in the adjacent dotted line frame forming the pixel unit, which is beneficial to alleviate the impact of wiring on signal transmission.

[0123] At the same time, if Figure 9As shown, when the switching transistor SW exists, the switching transistor SW is arranged on one side of the second transfer transistor TX4 along the first direction, and the side is away from the second photoelectric conversion element PD4, wherein, among the adjacent first pixels 400 and second pixels 500, the first floating diffusion region with the farthest projection distance in the first direction and the first pixel 400 and the second pixel 500 corresponding to the switching transistor SW are selected to form the pixel unit, thereby, based on the switching transistor SW and the first floating diffusion region with a farther distance, it is beneficial to avoid the first transfer transistor TX3 while realizing that the second pixel 500 is connected to the first pixel 400 to share a readout circuit.

[0124] like Figure 6 As shown, based on the above conditions, in the two pixels adjacent to the second pixel 500 (the first pixel 400 and the third pixel 600; for ease of description, the other first pixel adjacent to the second pixel 500 in the figure is described as the third pixel 600), when the switching transistor SW is connected to the reset transistor RST3, if the connection shown by D5 is selected, its projection in the first direction is short from the first floating diffusion area of ​​the third pixel 600. When the switching transistor SW needs to be operated, it will have a greater impact on the first floating diffusion area. Therefore, in this embodiment, the second pixel 500 is selected to form the pixel unit with the first pixel 400, so that the projection distance of the switching transistor SW in the first direction is far from the distance D4 of the first floating diffusion area, thereby greatly reducing the impact of the switching transistor SW on the first floating diffusion area. In addition, when the switching transistor SW is connected to the reset transistor RST3 through wiring, the wiring does not pass through the first transfer transistor of the first pixel, which helps to reduce the impact of the signal.

[0125] In one embodiment, in the same pixel unit, the distance between the first source follower transistor SF3 of the first pixel 400 and the second pixel 500 is smaller than the distance between the first row selection transistor SEL3 of the first pixel 400 and the second pixel 500. Figure 10 As shown, based on the above configuration, the first pixel 400 and the second pixel 500 form the pixel unit, so as to obtain a better layout design, thereby improving the overall performance of the image sensor.

[0126] See also Figure 9As shown, in one embodiment, each second photoelectric conversion element PD4 is disposed at the center of four arrayed first photoelectric conversion elements PD3. The second transmission transistor TX4 and the switch transistor SW are sequentially arranged between two adjacent second photoelectric conversion elements PD4 along the first direction. The first reset transistor RST3, the first source follower transistor SF3, and the first row select transistor SEL3 are arranged between two adjacent second photoelectric conversion elements PD4 in the second direction, with the first direction being perpendicular to the second direction. Furthermore, four second photoelectric conversion elements PD4 are correspondingly arranged in the four corner regions of each first photoelectric conversion element PD3, and four first photoelectric conversion elements PD3 are correspondingly arranged in the four corner regions of each second photoelectric conversion element PD4.

[0127] In one embodiment, when the pixel unit further includes the gain control transistor DCG2, the gain control transistor DCG2 and the first reset transistor RST3 are arranged in the same column along the second direction, the first source follower transistor SF3 and the first row selection transistor SEL3 are arranged in the same column along the second direction, and the gain control transistor DCG2 and the first reset transistor RST3 are close to the first photoelectric conversion element PD3 in the same first pixel.

[0128] In one embodiment, the pixel unit also includes a substrate contact SUB, which is arranged along the first direction on the side of the second photoelectric conversion element PD4 away from the second transfer transistor TX4, that is, the substrate contact SUB is arranged in the area between the first photoelectric conversion element PD3 and the second photoelectric conversion element PD4 in the same pixel unit, so that under a certain electric potential, the substrate contact SUB can form a potential barrier for electron flow, which can effectively prevent electrons in the first pixel 400 from leaking to the surrounding second pixel 500, thereby realizing isolation of the first pixel 400 from the second pixel 500.

[0129] In one embodiment, in the second direction, a spacing P1 between the first photoelectric conversion element PD3 and the second photoelectric conversion element PD4 in the same pixel unit is greater than a spacing P2 between the first photoelectric conversion element PD3 and the second photoelectric conversion element PD4 in adjacent pixel units. In this embodiment, the first photoelectric conversion element PD3 is relatively far away from the second photoelectric conversion element PD4 in the same pixel unit. When electrons leak from the first photoelectric conversion element PD3, the longer distance lengthens the electron leakage path, making the leaked electrons more easily drawn away by the voltage terminal VDD of the same first pixel. In other words, the distance is relatively close to the voltage terminal VDD corresponding to the first photoelectric conversion element PD3 itself, thereby effectively reducing electrons leaking from the first photoelectric conversion element PD3 to the second photoelectric conversion element PD4 and improving image accuracy.

[0130] In one embodiment, in the first direction, the distance N1 between the second photoelectric conversion element PD4 and the first photoelectric conversion element PD3 in the same pixel unit is equal to the distance N2 between the second photoelectric conversion element PD4 and the first photoelectric conversion element PD3 in two adjacent pixel units.

[0131] In one embodiment, the area of ​​the first photoelectric conversion element PD3 is larger than the area of ​​the second photoelectric conversion element PD4 , so that the sensitivity of the second photoelectric conversion element PD4 is smaller than the sensitivity of the first photoelectric conversion element PD3 .

[0132] In another embodiment, the pixel structure may also be provided with an anti-reflection layer, which is disposed at least between the second photoelectric conversion element PD4 and the incident light, so that the sensitivity of the second photoelectric conversion element PD4 is lower than the sensitivity of the first photoelectric conversion element PD3. The anti-reflection layer may adopt a conventional anti-reflection structure design, for example, by disposing an anti-reflection material layer, a metal grid, etc. between the photoelectric conversion element and the incident light. The anti-reflection layer may be disposed directly opposite the light-receiving surface of the second photoelectric conversion element PD4. In other examples, the anti-reflection layer may further extend around the first photoelectric conversion element PD3.

[0133] In one embodiment, within the same pixel unit, the first pixel 400 and the second pixel 500 are provided with color filters of the same color. In one example, the arrayed first pixels 400 can form a Bayer array arrangement; the arrayed second pixels 500 can form a Bayer array arrangement; of course, other color filter configurations can also be implemented based on actual needs. In this embodiment, the first pixel 400 and the second pixel 500 within the same pixel unit defined above are provided with color filters of the same color, that is, the first photoelectric conversion element PD3 and the second photoelectric conversion element PD4 within the same pixel unit are configured with color filters of the same color.

[0134] In one embodiment, within the same pixel unit, the first pixel 400 corresponds to the first lens, and the second pixel 500 corresponds to the second lens. In this embodiment, a plurality of first pixels 400 correspond one-to-one with a plurality of first lenses, and a plurality of second pixels 500 correspond one-to-one with a plurality of second lenses. The first lens and the second lens can be configured differently, such as with different heights, and can be designed based on actual needs.

[0135] In one embodiment, see Figure 8 As shown, the pixel unit further includes a charge storage device, one end of the charge storage device is coupled to the second floating diffusion region, and the other end of the charge storage device is grounded or connected to a variable voltage.

[0136] As an embodiment, the charge storage device may be a capacitor C2, wherein the charge storage element may be used to store the charge generated by the second transfer transistor TX4, thereby facilitating an increase in the full well capacity of the second pixel 500, thereby increasing the full well capacity while reducing the sensitivity of the photoelectric conversion element. Optionally, the capacitor C2 may be a separate device capacitor or a parasitic capacitor.

[0137] This embodiment further provides an image sensor, which includes the pixel structure described in the above embodiment. The image sensor in this embodiment can be a CMOS image sensor or any other image sensor that can use the pixel structure described in the above embodiment.

[0138] This embodiment also provides an electronic device, comprising the image sensor described above. The electronic device may be, for example, a vehicle-mounted device comprising an image sensor. The specific structure of the image sensor is as described in the above embodiments. Since this vehicle-mounted device utilizes all of the technical solutions of all of the above embodiments, it at least possesses all of the beneficial effects of the technical solutions of the above embodiments, and therefore will not be further detailed here. Of course, the electronic device in this embodiment may also be a monitoring device, machine vision system, drone, mobile phone, camera, etc.

[0139] like Figure 11-12 Shown and participated Figure 4-7 This embodiment further provides a method for controlling an image sensor, which is applicable to the image sensor described in any one of the above solutions. The control method includes:

[0140] Reading out information of the first pixel 400, where the first pixel 400 includes the first photoelectric conversion element PD3 and the first transfer transistor TX3, and reading out information of the first pixel 400 specifically includes:

[0141] 1) Resetting the storage area in the first pixel 400 and quantizing to obtain a first reset signal Vrst1;

[0142] 2) Transmitting image information corresponding to the first photoelectric conversion element PD3 and quantizing it to obtain a first image sampling signal Vsig1;

[0143] Reading out information of the second pixel 500, where the second pixel 500 includes the second photoelectric conversion element PD4 and the second transmission transistor TX4, specifically includes:

[0144] 3) Transmitting image information corresponding to the second photoelectric conversion element PD4 and quantizing it to obtain a second image sampling signal Vsig2;

[0145] A first actual image signal for the first pixel 400 is obtained based on the first reset signal and the first image sampling signal, and a second actual image signal for the second pixel 500 is obtained based on the second image sampling signal. It should be noted that the order of steps 1) through 3) above does not strictly represent the order of the steps in the image sensor control method protected by the present invention. Those skilled in the art may modify the order based on the above steps based on actual needs. Based on the above-described first pixel reading method, correlated double sampling (CDS) can be implemented.

[0146] In one embodiment, the process of reading out the information of the second pixel 500 further includes:

[0147] The storage area in the second pixel 500 is reset and quantized to obtain a second image reset signal Vrst2, and the second actual image signal is obtained based on the second image reset signal and the second image sampling signal.

[0148] The reset signal quantization in this example may occur after step 3), as shown in FIG. Figure 11 As shown; it can also occur between step 2) and step 3), such as Figure 12 In addition, it should be noted that the 3.0 μm pixel in the figure represents an example of the first pixel, and the 1.0 μm pixel represents an example of the second pixel, and this is used as an example for schematic description.

[0149] In one embodiment, the readout mode of the first pixel 400 includes at least one of a low conversion gain mode and a high conversion gain mode. The readout mode of the first pixel can be readout in the low conversion gain mode (see Figure 4 shown), can be read in high conversion gain mode (see Figure 5 As shown), of course, it can also be read in both low conversion gain mode and high conversion gain mode (as shown Figure 11 and12 ), thereby achieving a high dynamic range. The high conversion gain mode and the low conversion gain mode can be implemented by providing a conversion gain transistor DCG2 between the reset transistor RST3 and the first floating diffusion region, and further providing a capacitor between the reset transistor RET3 and the conversion gain transistor DCG2. The low conversion gain and high conversion gain modes are achieved by turning the conversion gain transistor DCG2 on and off. Of course, other methods well known in the art may also be used.

[0150] join Figure 11 and Figure 12 As shown, when both the low conversion gain mode and the high conversion gain mode are adopted for reading the first pixel 400, the readout method of the first pixel 400 includes the steps of:

[0151] 1) resetting the storage area in the first pixel in the low conversion gain LCG mode, and quantizing to obtain a first reset signal lcgrst1 in the low conversion gain mode;

[0152] 2) resetting the storage area in the first pixel in the high conversion gain HCG mode, and quantizing to obtain a first reset signal hcgrst1 in the high conversion gain mode;

[0153] 3) transmitting image information corresponding to the first photoelectric conversion element in a high conversion gain HCG mode, and quantizing to obtain a first image sampling signal hcgsig1 in the high conversion gain mode;

[0154] 4) reallocating image information corresponding to the first photoelectric conversion element in the low conversion gain LCG mode, and quantizing to obtain a first image sampling signal lcgsig1 in the low conversion gain mode;

[0155] The first actual image signal of the first pixel is obtained based on the first reset signal lcgrst1 and the first image sampling signal lcgsig1 in the low conversion gain mode, and the first reset signal hcgrst1 and the first image sampling signal hcgsig1 in the high conversion gain mode. It should be noted that in this embodiment, the readout timing of the first pixel in a single gain mode (low gain mode or high gain mode) can refer to the timing of the first pixel in embodiment 1. Figure 4 and Figure 5 Make a design.

[0156] Also, see Figure 11 and Figure 12 As shown, for the readout of the second pixel 500, the image information corresponding to the second photoelectric conversion element may be first transmitted and quantized to obtain the second image sampling signal sig2, and then the storage area in the second pixel may be reset and quantized to obtain the second reset signal rst2. Figure 11 As shown, Figure 11 The signal transmission timing of the switching transistor SW is shown in FIG. ; the readout of the second pixel 200 can also be performed by first resetting the storage area in the second pixel and quantizing the second reset signal rst2, then transmitting the image information corresponding to the second photoelectric conversion element and quantizing the second image sampling signal sig2, thereby realizing correlated double sampling CDS. Figure 12 As shown, Figure 12 1 and 2 show the signal transmission timing when the switch transistor SW is not provided and the signal transmission timing when the switch transistor SW is provided (see the dotted line corresponding to SW in the figure). Of course, the readout of the second pixel can also be performed using other timings.

[0157] As described above, the pixel structure, image sensor, electronic device, and control method of the present invention have the following beneficial effects:

[0158] The present invention adopts a first photoelectric conversion element and a second photoelectric conversion element with different sensitivities. The first photoelectric conversion element has high sensitivity (such as a large area) and is mainly used to obtain low-light information. The second photoelectric conversion element has low sensitivity (such as a small area) and is mainly used to obtain highlight information, thereby achieving the purpose of the image sensor being compatible with recognizing highlight information and low-light information, and improving the dynamic range.

[0159] The present invention can effectively reduce signal noise and improve readout accuracy through the layout design of the pixel structure. At the same time, it can reduce the leakage of electrons from the large-area first photoelectric conversion element to the small-area second photoelectric conversion element, thereby improving the overall performance of the image sensor.

[0160] Therefore, the present invention effectively overcomes various shortcomings of the prior art and has high industrial utilization value.

[0161] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Anyone skilled in the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by one of ordinary skill in the art without departing from the spirit and technical principles disclosed herein are intended to be covered by the claims of the present invention.

Claims

1. A pixel structure, characterized in that: The pixel structure includes a plurality of pixel units arranged in an array, and the pixel units include: a first photoelectric conversion element; a first transfer transistor coupled to the first floating diffusion region, configured to transfer the charge accumulated in the first photoelectric conversion element to the first floating diffusion region; a second photoelectric conversion element, wherein the sensitivity of the second photoelectric conversion element is lower than the sensitivity of the first photoelectric conversion element; a second transfer transistor coupled to the second floating diffusion region, configured to transfer the charge accumulated in the second photoelectric conversion element to the second floating diffusion region; a readout circuit coupled to the first floating diffusion region and the second floating diffusion region, and configured to read out voltage signals of the first floating diffusion region and the second floating diffusion region; The readout circuit includes a first reset transistor and a first source follower transistor, and the first reset transistor and the first source follower transistor are arranged between two adjacent second photoelectric conversion elements.

2. The pixel structure according to claim 1, wherein: The readout circuit comprises: a first reset transistor, wherein a source terminal of the first reset transistor is coupled to the first floating diffusion region, a drain terminal of the first reset transistor is coupled to a first voltage terminal, and is used to reset the first floating diffusion region; a first source-follower transistor, wherein a gate terminal of the first source-follower transistor is connected to the first floating diffusion region, a drain terminal of the first source-follower transistor is coupled to a second voltage terminal, and a source terminal of the first source-follower transistor is coupled to a first output column line; a second reset transistor, wherein a source terminal of the second reset transistor is coupled to the second floating diffusion region, a drain terminal of the second reset transistor is coupled to a third voltage terminal, and is used to reset the second floating diffusion region; A second source follower transistor has a gate terminal connected to the second floating diffusion region, a drain terminal coupled to a fourth voltage terminal, and a source terminal coupled to a second output column line.

3. The pixel structure according to claim 2, wherein: The readout circuit further includes a gain control transistor coupled between the first floating diffusion region and the first reset transistor.

4. The pixel structure according to claim 2, wherein: The first voltage terminal, the second voltage terminal, the third voltage terminal and the fourth voltage terminal are the same voltage terminal; and / or the first output column line and the second output column line are the same output column line.

5. The pixel structure according to claim 2, wherein: The readout circuit further includes: a first row selection transistor, wherein a drain terminal of the first row selection transistor is coupled to a source terminal of the first source follower transistor, and a source terminal of the first row selection transistor is coupled to the first output column line; A second row selection transistor has a drain terminal coupled to a source terminal of the second source follower transistor, and a source terminal of the second row selection transistor is coupled to the second output column line.

6. The pixel structure according to claim 5, wherein: The first photoelectric conversion element, the first transfer transistor, the first floating diffusion area, the first reset transistor, the first source follower transistor and the first row selection transistor constitute a first pixel arranged along the first direction, the second photoelectric conversion element, the second transfer transistor, the second floating diffusion area, the second reset transistor, the second source follower transistor and the second row selection transistor constitute a second pixel arranged along the first direction, a plurality of first pixels are arranged in an array, and a plurality of second pixels are arranged in an array, wherein, among adjacent first pixels and second pixels, the first pixel and the second pixel corresponding to the first row selection transistor and the second row selection transistor with the shortest projection distance in the first direction are selected to form the pixel unit.

7. The pixel structure according to claim 6, wherein: In the same pixel unit, a distance between the first source follower transistor of the first pixel and the second pixel is smaller than a distance between the first row selection transistor of the first pixel and the second pixel.

8. The pixel structure according to claim 6, wherein: Each of the second photoelectric conversion elements is arranged at the center position of the four first photoelectric conversion elements arranged in an array, the second transmission transistor, the second reset transistor, the second source follower transistor and the second row selection transistor are arranged in sequence between two adjacent second photoelectric conversion elements along the first direction, and the first reset transistor, the first source follower transistor and the first row selection transistor are arranged between two adjacent second photoelectric conversion elements along a second direction perpendicular to the first direction.

9. The pixel structure according to claim 8, wherein: When the pixel unit further includes a gain control transistor, the gain control transistor and the first reset transistor are arranged in the same column along the second direction, the first source follower transistor and the first row selection transistor are arranged in the same column along the second direction, and the gain control transistor and the first reset transistor are arranged close to the first photoelectric conversion element in the same first pixel.

10. The pixel structure according to claim 9, wherein: The pixel unit further includes a substrate contact disposed along the second direction at a side of the first source follower transistor away from the first row selection transistor.

11. The pixel structure according to claim 6, wherein: In the second direction, the distance between the first photoelectric conversion element and the second photoelectric conversion element in the same pixel unit is greater than the distance between the first photoelectric conversion element and the second photoelectric conversion element in the adjacent pixel unit; And / or, in the first direction, the distance between the first photoelectric conversion element and the second photoelectric conversion element in the same pixel unit is equal to the distance between the first photoelectric conversion element and the second photoelectric conversion element in adjacent pixel units.

12. The pixel structure according to claim 1, wherein: The readout circuit comprises: a first reset transistor, wherein a source terminal of the first reset transistor is coupled to the first floating diffusion region and the second floating diffusion region respectively, and a drain terminal of the first reset transistor is coupled to a first common voltage terminal, for resetting the first floating diffusion region and the second floating diffusion region; A first source follower transistor, wherein the gate terminal of the first source follower transistor is coupled to the first floating diffusion region and the second floating diffusion region respectively, the drain terminal of the first source follower transistor is coupled to the second common voltage terminal, and the source terminal of the first source follower transistor is coupled to the common column output line.

13. The pixel structure according to claim 12, wherein: The readout circuit further includes a switch transistor, wherein the source terminal of the first reset transistor is coupled to the second floating diffusion region through the switch transistor, and the gate terminal of the first source follower transistor is coupled to the second floating diffusion region through the switch transistor.

14. The pixel structure according to claim 12, wherein: The readout circuit further includes a gain control transistor coupled between the first floating diffusion region and the first reset transistor.

15. The pixel structure according to claim 12, wherein: The readout circuit further includes a first row selection transistor, wherein a drain terminal of the first row selection transistor is coupled to a source terminal of the first source follower transistor, and a source terminal of the row selection transistor is coupled to the co-column output line.

16. The pixel structure according to claim 15, wherein: The first photoelectric conversion element, the first transfer transistor, and the first floating diffusion area constitute a first pixel arranged along a first direction; the second photoelectric conversion element, the second transfer transistor, and the second floating diffusion area constitute a second pixel arranged along the first direction; a plurality of first pixels are arranged in an array; a plurality of second pixels are arranged in an array; wherein, among adjacent first pixels and second pixels, the first pixels and the second pixels corresponding to the first floating diffusion area and the second floating diffusion area whose projections in the first direction avoid the first transfer transistor are selected to constitute the pixel unit.

17. The pixel structure according to claim 16, wherein: When a switching transistor is present, the switching transistor is arranged along the first direction on a side of the first transfer transistor away from the first photoelectric conversion element, wherein, among the adjacent first pixels and second pixels, the first floating diffusion region with the farthest projection distance in the first direction and the first pixel and second pixel corresponding to the switching transistor are selected to form the pixel unit.

18. The pixel structure according to claim 16, wherein: In the same pixel unit, a distance between the first source follower transistor of the first pixel and the second pixel is smaller than a distance between the first row selection transistor of the first pixel and the second pixel.

19. The pixel structure according to claim 17, wherein: Each of the second photoelectric conversion elements is arranged at the center position of the four array-arranged first photoelectric conversion elements, the second transmission transistor and the switching transistor are arranged in sequence between two adjacent second photoelectric conversion elements along the first direction, and the first reset transistor, the first source follower transistor, and the first row selection transistor are arranged between two adjacent second photoelectric conversion elements along a second direction perpendicular to the first direction.

20. The pixel structure according to claim 19, wherein: When the pixel unit further includes a gain control transistor, the gain control transistor and the first reset transistor are arranged in the same column along the second direction, the first source follower transistor and the first row selection transistor are arranged in the same column along the second direction, and the gain control transistor and the first reset transistor are close to the first photoelectric conversion element in the same first pixel.

21. The pixel structure according to claim 20, wherein: The pixel unit further includes a substrate contact, which is disposed along the first direction on a side of the second photoelectric conversion element away from the second transfer transistor.

22. The pixel structure according to claim 19, wherein: In the second direction, a distance between the first photoelectric conversion element and the second photoelectric conversion element in the same pixel unit is greater than a distance between the first photoelectric conversion element and the second photoelectric conversion element in adjacent pixel units; And / or, in the first direction, a distance between the first photoelectric conversion element and the second photoelectric conversion element in the same pixel unit is equal to a distance between the first photoelectric conversion element and the second photoelectric conversion element in adjacent pixel units.

23. The pixel structure according to any one of claims 1 to 22, wherein: The pixel structure further includes an anti-reflection layer, which is at least disposed between the second photoelectric conversion element and the incident light; and / or the area of ​​the first photoelectric conversion element is larger than that of the second photoelectric conversion element.

24. The pixel structure according to any one of claims 6 to 11 and 16 to 22, wherein: In the same pixel unit, the first pixel and the second pixel are provided with color filters of the same color; And\or, in the same pixel unit, the first pixel corresponds to the first lens, and the second pixel corresponds to the second lens.

25. The pixel structure according to any one of claims 1 to 22, wherein: The pixel unit further includes a charge storage device, one end of which is coupled to the second floating diffusion region, and the other end of which is grounded or connected to a variable voltage.

26. An image sensor, characterized in that Comprising the pixel structure as described in any one of claims 1-25.

27. An electronic device, characterized in that: Comprising the image sensor of claim 26.

28. A method for controlling an image sensor, applicable to the image sensor according to claim 26, characterized in that: The control method includes: Reading out information of a first pixel, where the first pixel includes the first photoelectric conversion element and the first transfer transistor, and reading out information of the first pixel specifically includes: Resetting the storage area in the first pixel and quantizing to obtain a first reset signal; Transmitting image information corresponding to the first photoelectric conversion element and quantizing it to obtain a first image sampling signal; Reading out information of a second pixel, where the second pixel includes the second photoelectric conversion element and the second transfer transistor, and reading out information of the second pixel specifically includes: Transmitting image information corresponding to the second photoelectric conversion element and quantizing it to obtain a second image sampling signal; A first actual image signal of the first pixel is obtained based on the first reset signal and the first image sampling signal, and a second actual image signal of the second pixel is obtained based on the second image sampling signal.

29. The method for controlling an image sensor according to claim 28, wherein: The process of reading out the information of the second pixel further includes: The storage area in the second pixel is reset and quantized to obtain a second image reset signal, and the second actual image signal is obtained based on the second image reset signal and the second image sampling signal.

30. The method for controlling an image sensor according to claim 28 or 29, wherein: The readout mode of the first pixel includes at least one of readout in a low conversion gain mode and readout in a high conversion gain mode. When both the low conversion gain mode and the high conversion gain mode are adopted for reading the first pixel, the readout method of the first pixel includes the steps of: Resetting the storage area in the first pixel in the low conversion gain mode, and quantizing to obtain a first reset signal in the low conversion gain mode; Resetting the storage area in the first pixel in the high conversion gain mode, and quantizing to obtain a first reset signal in the high conversion gain mode; Transmitting image information corresponding to the first photoelectric conversion element in a high conversion gain mode, and quantizing to obtain a first image sampling signal in the high conversion gain mode; Redistributing image information corresponding to the first photoelectric conversion element in a low conversion gain mode, and quantizing to obtain a first image sampling signal in the low conversion gain mode; The first actual image signal of the first pixel is obtained based on the first reset signal and the first image sampling signal in the low conversion gain mode and the first reset signal and the first image sampling signal in the high conversion gain mode.

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