A method for etching a seed layer on a polyimide layer

Abstract

The present invention relates to a method for etching a seed layer on a polyimide layer, the method comprising the following steps: (1) using an etching solution to pre-etch the seed layer on a multi-layer circuit polyimide layer to obtain a pre-etched structure; (2) the pre-etched structure obtained in step (1) is sequentially subjected to ion bombardment treatment and acid washing treatment to obtain a multi-layer circuit polyimide layer with the seed layer removed. The present invention etches the seed layer by using a wet etching process combined with a dry ion etching bombardment process, thereby achieving the purpose of etching the seed layer on the polyimide layer cleanly with less damage to the surface circuit, thereby ensuring that the conductive insulation performance meets the requirements.

Description

Technical Field

[0001] The invention relates to the technical field of metal etching, and in particular to a method for etching a seed layer on a polyimide layer. Background Art

[0002] RDL (Re-Distribution Layer) technology, also known as rewiring technology, is a commonly used process in integrated circuit packaging. It is usually used in system-on-chip (SoC), multi-chip modules, chip stacking and other high-density packaging technologies to redistribute input and output (I / O) signals and connect the internal functional blocks of the chip with the package pins or other chips.

[0003] In RDL technology, there are usually two methods for etching metal lines, namely dry etching and wet etching, which can remove the seed layer in the non-line area. Multilayer lines use polyimide as an isolation layer, and the seed layer on the polyimide layer is etched. If wet etching is used, it is easy to cause line size failure or even line drift loss due to drilling; while dry etching, on the one hand, has high cost and toxic gases used for etching, and on the other hand, polyimide leakage is easy to occur after dry etching.

[0004] CN 117747542A discloses a method for dry etching a polyimide layer, a method for preparing a rewiring layer and a rewiring layer. The method for preparing the rewiring layer comprises: depositing a metal seed layer on the surface of the polyimide, a first predetermined layer and a second predetermined layer respectively; electroplating copper on the metal seed layer corresponding to the surface of the polyimide layer, the first predetermined layer and the second predetermined layer respectively to form a filling preparation of a single-layer wiring layer; using chemical mechanical grinding to remove the copper on the surface of the polyimide layer and the metal seed layer, and removing the copper corresponding to the second predetermined layer and protruding from the surface of the polyimide layer. CN 103474394A discloses a TSV process method without metal CMP, including: providing a wafer as a substrate, forming a blind hole in the wafer, making an insulating layer on the upper surface of the wafer and the inner wall of the blind hole; making a barrier layer and a seed layer on the insulating layer on the upper surface of the wafer and the inner wall of the blind hole; filling a second metal material in the blind hole; removing the second metal material and the seed layer on the surface of the wafer during the filling of the blind hole by electrochemical polishing technology; performing an annealing process on the wafer; removing the barrier layer on the surface of the wafer by wet etching process; correcting the step between the top of the second metal material filled in the blind hole and the surface of the wafer by electrochemical polishing technology; uniformly coating a first dielectric layer on the surface of the wafer; realizing the patterning of the first dielectric layer, forming a first dielectric layer through hole at the top position of the blind hole; forming a first rewiring structure on the first dielectric layer and in the first dielectric layer through hole. However, the above method uses chemical mechanical grinding or electrochemical polishing to remove the seed layer, which easily leads to incomplete removal of the seed layer, thereby affecting the progress of the subsequent process.

[0005] Therefore, in view of the shortcomings of the prior art, it is necessary to provide a method for etching a seed layer with a small circuit drilling degree and a good etching effect. Summary of the invention

[0006] The purpose of the present invention is to provide a method for etching a seed layer on a polyimide layer. By utilizing a mixed process of wet etching and dry etching, the purpose of cleanly etching the seed layer on the polyimide layer with less damage to the surface circuit is achieved, so that the conductive insulation performance meets the requirements.

[0007] In order to achieve the purpose of the invention, the present invention adopts the following technical solutions:

[0008] The present invention provides a method for etching a seed layer on a polyimide layer, the method comprising the following steps:

[0009] (1) using an etching solution to pre-etch a seed layer on a multi-layer circuit polyimide layer to obtain a pre-etched structure;

[0010] (2) The pre-etched structure obtained in step (1) is subjected to ion bombardment treatment and acid pickling treatment in sequence to obtain a multi-layer circuit polyimide layer with the seed layer removed.

[0011] The method for etching a seed layer on a polyimide layer provided by the present invention first uses an etching solution to pre-etch the seed layer, wet-removes the metal of the seed layer, and then performs a dry ion bombardment treatment combined with an acid pickling treatment, thereby achieving the purpose of cleanly etching the seed layer on the polyimide layer with less impact on the degree of surface circuit drilling, thereby ensuring that the conductive insulation performance meets the requirements.

[0012] Preferably, the structure of the multilayer circuit in step (1) comprises a groove structure with a line width and a line spacing ≥ 10 μm or a columnar structure with a diameter ≥ 30 μm.

[0013] The groove structure with a line width and line spacing of ≥10 μm may be, for example, 10 μm, 12 μm, 15 μm, 18 μm or 20 μm, but is not limited to the listed values, and other values ​​not listed within the numerical range are also applicable.

[0014] The columnar structure with a diameter of ≥30 μm may be, for example, 30 μm, 32 μm, 35 μm, 38 μm or 40 μm, but is not limited to the listed values, and other values ​​not listed within the numerical range are also applicable.

[0015] Preferably, the seed layer in step (1) comprises a titanium layer and a copper layer stacked in sequence in a direction away from the polyimide layer.

[0016] Preferably, the pre-etching process in step (1) includes sequentially performing pre-etching of the copper layer and pre-etching of the titanium layer.

[0017] Preferably, the etching solution used for pre-etching the copper layer includes a sulfuric acid-hydrogen peroxide system etching solution.

[0018] Preferably, the mass percentage of sulfuric acid in the sulfuric acid-hydrogen peroxide system etching solution is 5wt%, and the mass percentage of hydrogen peroxide is 1wt%.

[0019] Preferably, the end point of the copper layer pre-etching is to change the color of the seed layer surface from copper yellow to silver white.

[0020] Preferably, the etching solution used for pre-etching the titanium layer includes hydrofluoric acid with a concentration of 0.8-1.2‰, for example, it can be 0.8‰, 0.9‰, 1‰, 1.1‰ or 1.2‰, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0021] Preferably, the end point of the pre-etching of the titanium layer is to make the silver-white color disappear.

[0022] Preferably, the temperatures for pre-etching the copper layer and pre-etching the titanium layer are both room temperature.

[0023] Preferably, the copper layer pre-etching and the titanium layer pre-etching respectively and independently include the steps of water washing and air drying.

[0024] Preferably, the power of the ion bombardment treatment in step (2) is 95-105 W, for example, 95 W, 98 W, 100 W, 102 W or 105 W, but is not limited to the listed values, and other values ​​not listed within the numerical range are also applicable.

[0025] Preferably, the time of the ion bombardment treatment in step (2) is 55-65 s, for example, 55 s, 58 s, 60 s, 62 s or 65 s, but is not limited to the listed values, and other values ​​not listed within the numerical range are also applicable.

[0026] Preferably, the acid solution used for the pickling treatment in step (2) comprises dilute sulfuric acid with a concentration of 4-6%, for example, it can be 4%, 4.5%, 5%, 5.5% or 6%, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0027] Preferably, the temperature of the pickling treatment in step (2) is room temperature.

[0028] Preferably, the pickling time in step (2) is 0.8-1.2 min, for example, 0.8 min, 0.9 min, 1 min, 1.1 min or 1.2 min, but is not limited to the listed values, and other values ​​not listed within the numerical range are also applicable.

[0029] Preferably, the acid pickling treatment in step (2) also includes water washing and air drying steps.

[0030] As a preferred technical solution of the method of the present invention, the method comprises the following steps:

[0031] (1) using an etching solution to pre-etch a seed layer on a polyimide layer of a multi-layer circuit to obtain a pre-etched structure; the structure of the multi-layer circuit includes a groove structure with a line width and line spacing of ≥10 μm or a columnar structure with a diameter of ≥30 μm;

[0032] The seed layer includes a titanium layer and a copper layer stacked in sequence in a direction away from the polyimide layer; the pre-etching treatment includes: using a sulfuric acid-hydrogen peroxide system etching solution at room temperature to pre-etch the copper layer until the color of the seed layer surface changes from copper yellow to silver white, and then washing with water and air drying; using hydrofluoric acid with a concentration of 0.8-1.2‰ at room temperature to pre-etch the titanium layer until the silver white disappears, and then washing with water and air drying; the mass percentage of sulfuric acid in the sulfuric acid-hydrogen peroxide system etching solution is 5wt%, and the mass percentage of hydrogen peroxide is 1wt%;

[0033] (2) The pre-etched structure obtained in step (1) is subjected to ion bombardment treatment at 95-105W for 55-65s, pickling treatment with dilute sulfuric acid with a concentration of 4-6% at room temperature for 0.8-1.2min, and then washed with water and air-dried to obtain a multi-layer circuit polyimide layer with the seed layer removed.

[0034] Compared with the prior art, the present invention has the following beneficial effects:

[0035] The method for etching a seed layer on a polyimide layer provided by the present invention first uses an etching solution to pre-etch the seed layer, wet-removes the metal of the seed layer, and then performs a dry ion bombardment treatment combined with an acid pickling treatment, wherein the drilling degree of the structure is less than 1 μm, and basically has no obvious effect on the structure, thereby achieving the purpose of cleanly etching the seed layer on the polyimide layer with less damage to the surface circuit, thereby ensuring that the conductive insulation performance meets the requirements. DETAILED DESCRIPTION

[0036] The technical solution of the present invention is further described below by specific implementation methods. It should be understood by those skilled in the art that the embodiments are only to help understand the present invention and should not be regarded as specific limitations of the present invention.

[0037] Example 1

[0038] This embodiment provides a method for etching a seed layer on a polyimide layer, the method comprising the following steps:

[0039] (1) using an etching solution to pre-etch a seed layer on a polyimide layer of a multi-layer circuit to obtain a pre-etched structure; the structure of the multi-layer circuit is a groove structure with a line width and a line spacing of 15 μm;

[0040] The seed layer includes a titanium layer and a copper layer stacked in sequence in a direction away from the polyimide layer; the pre-etching treatment includes: using a sulfuric acid-hydrogen peroxide system etching solution at room temperature to pre-etch the copper layer until the color of the seed layer surface changes from copper yellow to silver white, and then washing with water and air drying; using hydrofluoric acid with a concentration of 1‰ at room temperature to pre-etch the titanium layer until the silver white disappears, and then washing with water and air drying; the mass percentage of sulfuric acid in the sulfuric acid-hydrogen peroxide system etching solution is 5wt%, and the mass percentage of hydrogen peroxide is 1wt%;

[0041] (2) The pre-etched structure obtained in step (1) was subjected to ion bombardment treatment at 100 W for 60 seconds, pickled with 5% dilute sulfuric acid at room temperature for 1 minute, washed with water and air-dried to obtain a multilayer circuit polyimide layer with the seed layer removed.

[0042] In this embodiment, the drilling degree of the multi-layer circuit structure is 0.5 μm, which has no obvious impact on the multi-layer circuit structure. The seed layer on the polyimide layer is effectively removed, and the performance requirements of conduction and insulation can be met.

[0043] Example 2

[0044] This embodiment provides a method for etching a seed layer on a polyimide layer, the method comprising the following steps:

[0045] (1) using an etching solution to pre-etch a seed layer on a polyimide layer of a multi-layer circuit to obtain a pre-etched structure; the structure of the multi-layer circuit is a groove structure with a line width and a line spacing of 10 μm;

[0046] The seed layer includes a titanium layer and a copper layer stacked in sequence in a direction away from the polyimide layer; the pre-etching treatment includes: using a sulfuric acid-hydrogen peroxide system etching solution at room temperature to pre-etch the copper layer until the color of the seed layer surface changes from copper yellow to silver white, and then washing with water and air drying; using hydrofluoric acid with a concentration of 0.8‰ at room temperature to pre-etch the titanium layer until the silver white disappears, and then washing with water and air drying; the mass percentage of sulfuric acid in the sulfuric acid-hydrogen peroxide system etching solution is 5wt%, and the mass percentage of hydrogen peroxide is 1wt%;

[0047] (2) The pre-etched structure obtained in step (1) was subjected to ion bombardment treatment at 95W for 65s, pickling treatment with 4% dilute sulfuric acid at room temperature for 1.2min, and then washed with water and air-dried to obtain a multi-layer circuit polyimide layer with the seed layer removed.

[0048] In this embodiment, the drilling degree of the multi-layer circuit structure is 0.7 μm, which has no obvious impact on the multi-layer circuit structure. The seed layer on the polyimide layer has a good removal effect and can meet the performance requirements of conduction and insulation.

[0049] Example 3

[0050] This embodiment provides a method for etching a seed layer on a polyimide layer, the method comprising the following steps:

[0051] (1) using an etching solution to pre-etch a seed layer on a polyimide layer of a multi-layer circuit to obtain a pre-etched structure; the structure of the multi-layer circuit is a columnar structure with a diameter of 30 μm;

[0052] The seed layer includes a titanium layer and a copper layer stacked in sequence in a direction away from the polyimide layer; the pre-etching treatment includes: using a sulfuric acid-hydrogen peroxide system etching solution at room temperature to pre-etch the copper layer until the color of the seed layer surface changes from copper yellow to silver white, and then washing with water and air drying; using hydrofluoric acid with a concentration of 1.2‰ at room temperature to pre-etch the titanium layer until the silver white disappears, and then washing with water and air drying; the mass percentage of sulfuric acid in the sulfuric acid-hydrogen peroxide system etching solution is 5wt%, and the mass percentage of hydrogen peroxide is 1wt%;

[0053] (2) The pre-etched structure obtained in step (1) was subjected to ion bombardment treatment at 105W for 55s, pickled with 6% dilute sulfuric acid at room temperature for 0.8min, washed with water and air-dried to obtain a multilayer circuit polyimide layer with the seed layer removed.

[0054] In this embodiment, the drilling degree of the multi-layer circuit structure is 0.8 μm, which has no obvious impact on the multi-layer circuit structure. The seed layer on the polyimide layer is effectively removed, and the performance requirements of conduction and insulation can be met.

[0055] Example 4

[0056] This embodiment provides a method for etching a seed layer on a polyimide layer. The difference from Embodiment 1 is that the titanium layer pre-etching in step (1) is performed by plasma etching, and the rest is the same as Embodiment 1.

[0057] In this embodiment, a dry method is used to pre-etch the titanium layer, and the drilling degree of the multi-layer circuit structure is 1.2 μm. The removal effect of the seed layer on the polyimide layer is lower than that in Embodiment 1.

[0058] Example 5

[0059] This embodiment provides a method for etching a seed layer on a polyimide layer. The difference from Embodiment 1 is that except for adjusting the power of the ion bombardment treatment in step (2) to 90 W, the rest is the same as Embodiment 1.

[0060] In this embodiment, since the power of the ion bombardment treatment is too low, the etching effect is reduced, the drilling degree of the multi-layer circuit structure is 1.1 μm, and the removal effect of the seed layer on the polyimide layer is reduced compared with Example 1.

[0061] Example 6

[0062] This embodiment provides a method for etching a seed layer on a polyimide layer. The difference from Embodiment 1 is that except for adjusting the power of the ion bombardment treatment in step (2) to 110 W, the rest is the same as Embodiment 1.

[0063] In this embodiment, since the power of the ion bombardment treatment is too high, there is a risk of leakage of the polyimide layer after etching. The degree of drilling of the multi-layer circuit structure is 1.2 μm, and the effect of removing the seed layer on the polyimide layer is reduced compared with Example 1.

[0064] Example 7

[0065] This embodiment provides a method for etching a seed layer on a polyimide layer. The difference from Embodiment 1 is that except that the concentration of the dilute sulfuric acid used in the pickling treatment in step (2) is adjusted to 20%, the rest is the same as Embodiment 1.

[0066] In this embodiment, since the concentration of the dilute sulfuric acid used in the pickling treatment is too high, the drilling degree of the multi-layer circuit structure is 1.4 μm, and the removal effect of the seed layer on the polyimide layer has no obvious change.

[0067] Comparative Example 1

[0068] This comparative example provides a method for etching a seed layer on a polyimide layer. The difference from Example 1 is that step (2) is not provided, and the pre-etching treatment time of step (1) is adaptively extended by 2 times. The rest is the same as Example 1.

[0069] In this comparative example, since only wet method is used for seed layer etching, circuit dimension failure or even circuit drift loss due to drilling is prone to occur. The drilling degree of the multi-layer circuit structure is 2μm, and there is no obvious change in the seed layer removal effect on the polyimide layer.

[0070] Comparative Example 2

[0071] This comparative example provides a method for etching a seed layer on a polyimide layer. The difference from Example 1 is that step (2) does not include an acid-washing step, and the rest is the same as Example 1.

[0072] In this comparative example, since the pickling step is not provided, the seed layer is not completely removed, and the degree of drilling and etching of the multi-layer circuit structure is not significantly affected. The seed layer removal effect on the polyimide layer is significantly reduced compared with Example 1.

[0073] In summary, the method for etching a seed layer on a polyimide layer provided by the present invention first uses an etching solution to pre-etch the seed layer, wet-removes the metal of the seed layer, and then performs a dry ion bombardment treatment combined with an acid pickling treatment. The degree of structural drilling is less than 1μm, and there is basically no obvious effect on the structure. The purpose of cleanly etching the seed layer on the polyimide layer with less damage to the surface circuit is achieved, so that the conductive insulation performance meets the requirements.

[0074] The above description is only a specific implementation mode of the present invention, but the protection scope of the present invention is not limited thereto. Those skilled in the art should understand that any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention are within the protection scope and disclosure scope of the present invention.

Claims

1. A method for etching a seed layer on a polyimide layer, characterized in that: The method comprises the following steps: (1) using an etching solution to pre-etch a seed layer on a multi-layer circuit polyimide layer to obtain a pre-etched structure; (2) the pre-etched structure obtained in step (1) is subjected to ion bombardment treatment and acid washing treatment in sequence to obtain a multi-layer circuit polyimide layer with the seed layer removed; The seed layer in step (1) comprises a titanium layer and a copper layer stacked in sequence in a direction away from the polyimide layer; the pre-etching process comprises pre-etching the copper layer and pre-etching the titanium layer in sequence; The end point of the copper layer pre-etching is to make the color of the seed layer surface change from copper yellow to silver white; the end point of the titanium layer pre-etching is to make the silver white disappear; The acid solution used in the pickling treatment in step (2) includes dilute sulfuric acid with a concentration of 4-6%; The power of the ion bombardment treatment in step (2) is 95-105 W; the time of the ion bombardment treatment is 55-65 s.

2. The method according to claim 1, characterized in that The structure of the multilayer circuit in step (1) includes a groove structure with a line width and line spacing ≥ 10 μm or a columnar structure with a diameter ≥ 30 μm.

3. The method according to claim 1, characterized in that The etching solution used for pre-etching the copper layer includes a sulfuric acid-hydrogen peroxide system etching solution.

4. The method according to claim 3, characterized in that The mass percentage of sulfuric acid in the sulfuric acid-hydrogen peroxide system etching solution is 5 wt %, and the mass percentage of hydrogen peroxide is 1 wt %.

5. The method according to claim 1, characterized in that The etching solution used for pre-etching the titanium layer includes hydrofluoric acid with a concentration of 0.8-1.2‰.

6. The method according to claim 1, characterized in that The temperatures for the copper layer pre-etching and the titanium layer pre-etching are both room temperature.

7. The method according to claim 1, characterized in that After the copper layer pre-etching and the titanium layer pre-etching, water washing and air drying steps are independently included.

8. The method according to claim 1, characterized in that The temperature of the pickling treatment in step (2) is room temperature.

9. The method according to claim 1, characterized in that: The pickling time in step (2) is 0.8-1.2 min.

10. The method according to claim 1, characterized in that The acid pickling treatment in step (2) further includes water washing and air drying steps.

11. The method according to claim 1, characterized in that: The method comprises the following steps: (1) Pre-etching a seed layer on a multi-layer circuit polyimide layer using an etching solution to obtain a pre-etched structure; the structure of the multi-layer circuit includes a groove structure with a line width and line spacing of ≥10 μm or a columnar structure with a diameter of ≥30 μm; The seed layer includes a titanium layer and a copper layer stacked in sequence in a direction away from the polyimide layer; the pre-etching treatment includes: using a sulfuric acid-hydrogen peroxide system etching solution at room temperature to pre-etch the copper layer until the color of the seed layer surface changes from copper yellow to silver white, and then washing with water and air drying; using hydrofluoric acid with a concentration of 0.8-1.2‰ at room temperature to pre-etch the titanium layer until the silver white disappears, and then washing with water and air drying; the mass percentage of sulfuric acid in the sulfuric acid-hydrogen peroxide system etching solution is 5wt%, and the mass percentage of hydrogen peroxide is 1wt%; (2) The pre-etched structure obtained in step (1) is subjected to ion bombardment treatment at 95-105W for 55-65s, pickling treatment with dilute sulfuric acid with a concentration of 4-6% at room temperature for 0.8-1.2min, and then washed with water and air-dried to obtain a multilayer circuit polyimide layer with the seed layer removed.