A high voltage current limiting control protection circuit and semiconductor testing equipment

Abstract

The present application discloses a high-voltage current limiting control protection circuit and a semiconductor testing device, which relate to the field of circuit design. Among them, the drain of the first N-type MOS tube is connected to the high-voltage power supply port, the source of the first N-type MOS tube is connected to the first end of the sampling resistor and grounded, and the gate of the first N-type MOS tube is connected to the output end of the operational amplifier; the second end of the sampling resistor is connected to the first input end of the operational amplifier and the output port of the control circuit; the second input end of the operational amplifier is connected to the first end of the isolated digital-to-analog conversion circuit, and the power supply end of the operational amplifier is connected to the first end of the low-voltage isolated power supply circuit and grounded. It can be seen that in this application, a low-voltage isolated power supply circuit is used to power its operational amplifier, and at the same time, the isolated floating ground technology is used in the connection relationship between the operational amplifier and the first N-type MOS tube, which can reduce the selection specifications of the operational amplifier as a whole and reduce costs.

Description

Technical Field

[0001] The present application relates to the field of circuit design, and in particular to a high-voltage current limiting control protection circuit and a semiconductor testing device. Background Art

[0002] In recent years, current limiting and shutdown protection circuits under high voltage are usually achieved through Figure 1 The circuit shown in the figure is implemented. Its working principle is: after the high-voltage power supply port 11 is processed by the high-voltage power supply 12, the 2kV voltage is transmitted to the operational amplifier 13 (OPA) to supply power to it. At the same time, the sampling resistor 14 collects the current at the high-voltage power supply port 11, and the current at this time and the sampling resistor 14 constitute the sampling voltage. The current DAC circuit 15 will provide a set voltage value, and the operational amplifier 13 will judge and control the conduction or shutdown of the P-type MOS tube 16 according to the sampling voltage and the set voltage value, and then control the voltage of the high-voltage power supply port 11 to be transmitted to the control circuit output port 17.

[0003] However, in the application of this circuit, it can be seen that the voltage transmission is 2Kv high-voltage transmission, but there are few optional models of operational amplifiers 13 and P-type MOS tubes 16 that can operate at voltages of thousands of volts, and there are safety risks under high voltages. In addition, this type of operational amplifier 13 is expensive, and the thermal power consumption of the P-type MOS tube 16 is high.

[0004] In view of the above technology, seeking a high-voltage current limiting control protection circuit is an urgent problem to be solved by those skilled in the art. Summary of the invention

[0005] The purpose of the present application is to provide a high-voltage current limiting control protection circuit and semiconductor testing equipment, which can reduce the selection specifications of circuit components in the prior art and improve safety.

[0006] In order to solve the above technical problems, the present application provides a high-voltage current limiting control protection circuit, including: a first N-type MOS tube, a sampling resistor, an operational amplifier, an isolated digital-to-analog conversion circuit and a low-voltage isolated power supply circuit;

[0007] The drain of the first N-type MOS tube is connected to the high voltage source power supply port, the source of the first N-type MOS tube is connected to the first end of the sampling resistor and is grounded, and the gate of the first N-type MOS tube is connected to the output end of the operational amplifier;

[0008] The second end of the sampling resistor is connected to the first input end of the operational amplifier and the output port of the control circuit respectively;

[0009] The second input terminal of the operational amplifier is connected to the first terminal of the isolated digital-to-analog conversion circuit, and the power supply terminal of the operational amplifier is connected to the first terminal of the low-voltage isolated power supply circuit and is grounded.

[0010] Preferably, it also includes an early warning trigger circuit, which includes: a current sampling comparison circuit and an isolation detection circuit;

[0011] The first end of the current sampling comparison circuit is connected to the second end of the sampling resistor and the first input end of the operational amplifier as the first end of the early warning trigger circuit, and the second end of the current sampling comparison circuit is connected to the first end of the isolation detection circuit;

[0012] The second end of the isolation detection circuit is connected to the controller as the second end of the early warning trigger circuit.

[0013] Preferably, the isolated digital-to-analog conversion circuit comprises: an isolation circuit and a digital-to-analog conversion circuit;

[0014] The first end of the isolation circuit is connected to the second input end of the operational amplifier as the first end of the isolation digital-to-analog conversion circuit, and the second end of the isolation circuit is connected to the first end of the digital-to-analog conversion circuit.

[0015] Preferably, the current sampling comparison circuit comprises: a comparator, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first capacitor and a second capacitor;

[0016] Wherein, the first end of the first resistor is connected to the second end of the sampling resistor, the first input end of the operational amplifier and the output port of the control circuit respectively as the first end of the current sampling comparison circuit;

[0017] A first end of the second resistor is connected to the power supply end;

[0018] The second end of the first resistor is respectively connected to the second end of the second resistor, the inverting input end of the comparator and the first end of the first capacitor;

[0019] The non-inverting input terminal of the comparator is grounded, and the output terminal of the comparator is respectively connected to the second terminal of the first capacitor, the first terminal of the third resistor, and the first terminal of the fourth resistor;

[0020] The second end of the third resistor is connected to the first end of the second capacitor;

[0021] The second terminal of the second capacitor is grounded;

[0022] The second end of the fourth resistor and the first end of the fifth resistor are connected to the first end of the isolation detection circuit as the second end of the current sampling comparison circuit;

[0023] A second terminal of the fifth resistor is grounded.

[0024] Preferably, the isolation detection circuit comprises: an optical coupler, a diode, a second N-type MOS transistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor and a third capacitor;

[0025] The anode of the diode and the first end of the isolation detection circuit are respectively connected to the second end of the fourth resistor and the first end of the fifth resistor, and the cathode of the diode is connected to the first end of the sixth resistor;

[0026] The second end of the sixth resistor is connected to the gate of the second N-type MOS transistor and the first end of the seventh resistor respectively;

[0027] The source of the second N-type MOS transistor is connected to the second end of the seventh resistor and is grounded, and the drain of the second N-type MOS transistor is connected to the first end of the optical coupler;

[0028] The second end of the optical coupler is connected to the first end of the eighth resistor, the third end of the optical coupler is connected to the first end and the signal end of the ninth resistor respectively, and the fourth end of the optical coupler is grounded;

[0029] The second end of the eighth resistor is connected to the first end of the third capacitor;

[0030] A second terminal of the third capacitor is grounded;

[0031] The second end of the ninth resistor is connected to the controller as the second end of the isolation detection circuit.

[0032] Preferably, the isolation circuit comprises: an isolation chip, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourth capacitor and a fifth capacitor;

[0033] The first pin of the isolation chip is respectively connected to the first end of the tenth resistor, the first end of the eleventh resistor and the first end of the fourth capacitor;

[0034] The second pin of the isolation chip is connected to the second end of the tenth resistor;

[0035] The third pin of the isolation chip is connected to the second end of the eleventh resistor;

[0036] The fourth pin of the isolation chip and the fifth pin of the isolation chip are grounded;

[0037] The sixth pin of the isolation chip is connected to the first end of the twelfth resistor;

[0038] The seventh pin of the isolation chip is connected to the first end of the thirteenth resistor;

[0039] The eighth pin of the isolation chip is respectively connected to the second end of the twelfth resistor, the second end of the thirteenth resistor and the first end of the fifth capacitor;

[0040] The second terminal of the fifth capacitor is grounded;

[0041] The seventh pin and the sixth pin of the isolation chip are connected to the first end of the digital-to-analog conversion circuit as the second end of the isolation circuit.

[0042] Preferably, the digital-to-analog conversion circuit comprises: a digital-to-analog conversion chip, a first inductor, a sixth capacitor and a fourteenth resistor;

[0043] Wherein, the first pin of the digital-to-analog conversion chip is connected to the power supply terminal;

[0044] The second pin of the digital-to-analog conversion chip is grounded;

[0045] The third pin of the digital-to-analog conversion chip is respectively connected to the first end of the first inductor and the first end of the sixth capacitor;

[0046] The fourth pin and the fifth pin of the digital-to-analog conversion chip are connected to the seventh pin and the sixth pin of the isolation chip as the first end of the digital-to-analog conversion circuit;

[0047] The sixth pin of the digital-to-analog conversion chip is connected to the first end of the fourteenth resistor;

[0048] The second end of the first inductor is connected to the eighth pin of the isolation chip;

[0049] A second terminal of the sixth capacitor and a second terminal of the fourteenth resistor are grounded.

[0050] Preferably, the low-voltage isolated power supply circuit comprises: a first power supply circuit, a second power supply circuit and a third power supply circuit, wherein the first power supply circuit, the second power supply circuit and the third power supply circuit have the same structure; the first power supply circuit comprises: a power supply chip, a second inductor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a fifteenth resistor and a sixteenth resistor;

[0051] Wherein, the first end of the seventh capacitor is connected to the first end of the second inductor, and the second end of the seventh capacitor is respectively connected to the first end of the eighth capacitor and the first pin of the power chip, and is grounded;

[0052] The second end of the second inductor is respectively connected to the second end of the eighth capacitor and the second pin of the power chip;

[0053] The third pin of the power chip is respectively connected to the fourth pin of the power chip, the first end of the fifteenth resistor, the first end of the ninth capacitor, the first end of the tenth capacitor, the first end of the eleventh capacitor, the first end of the twelfth capacitor and the first end of the sixteenth resistor, and is grounded;

[0054] The fifth pin of the power chip is connected to the second end of the fifteenth resistor;

[0055] The sixth pin of the power chip is respectively connected to the second end of the ninth capacitor, the second end of the tenth capacitor, the second end of the eleventh capacitor, the second end of the twelfth capacitor and the second end of the sixteenth resistor.

[0056] Preferably, it further comprises: a seventeenth resistor, an eighteenth resistor, a nineteenth resistor and a thirteenth capacitor;

[0057] A first end of the seventeenth resistor is connected to the source of the first N-type MOS tube and the first end of the sampling resistor respectively, and a second end of the seventeenth resistor is grounded;

[0058] A first end of the eighteenth resistor is connected to the gate of the first N-type MOS transistor, and a second end of the eighteenth resistor is connected to a first end of the nineteenth resistor and an output end of the operational amplifier respectively;

[0059] The second end of the nineteenth resistor is connected to the first end of the thirteenth capacitor;

[0060] A second terminal of the thirteenth capacitor is grounded.

[0061] Preferably, it further comprises: a twentieth resistor, a twenty-first resistor, a twenty-second resistor, a fourteenth capacitor, a fifteenth capacitor and a sixteenth capacitor;

[0062] The first end of the twentieth resistor is respectively connected to the second end of the sampling resistor and the output port of the control circuit, and the second end of the twentieth resistor is respectively connected to the non-inverting input end of the operational amplifier as the first input end of the operational amplifier, the first end of the twenty-first resistor, the first end of the fourteenth capacitor, and the first end of the sixteenth capacitor;

[0063] The second end of the twenty-first resistor is connected to the first end of the early warning trigger circuit;

[0064] The second end of the fourteenth capacitor is respectively connected to the second end of the nineteenth resistor, the non-inverting input end of the operational amplifier, and the first end of the fifteenth capacitor;

[0065] The second end of the fifteenth capacitor is respectively connected to the inverting input terminal of the operational amplifier serving as the second input terminal of the operational amplifier and the first end of the twenty-second resistor;

[0066] A second end of the twenty-second resistor is grounded;

[0067] A second terminal of the sixteenth capacitor is grounded.

[0068] In order to solve the above technical problems, the present application also provides a semiconductor testing device, which includes the above high-voltage current limiting control protection circuit.

[0069] A high-voltage current-limiting control protection circuit provided in the present application includes: a first N-type MOS tube, a sampling resistor, an operational amplifier, an isolated digital-to-analog conversion circuit and a low-voltage isolated power supply circuit; wherein the drain of the first N-type MOS tube is connected to the high-voltage power supply port, the source of the first N-type MOS tube is connected to the first end of the sampling resistor and grounded, and the gate of the first N-type MOS tube is connected to the output end of the operational amplifier; the second end of the sampling resistor is connected to the first input end of the operational amplifier and the output port of the control circuit; the second input end of the operational amplifier is connected to the first end of the isolated digital-to-analog conversion circuit, and the power supply end of the operational amplifier is connected to the first end of the low-voltage isolated power supply circuit and grounded. It can be seen that the low-voltage isolated power supply circuit is used in the present application to power its operational amplifier, and the isolated floating ground technology is used in the connection relationship between the operational amplifier and the first N-type MOS tube, which can reduce the selection specifications of the operational amplifier as a whole and reduce the cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0070] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0071] Figure 1 A circuit diagram of a current limiting and shutdown protection circuit under high voltage in the prior art;

[0072] Figure 2 A module diagram of a high-voltage current limiting control protection circuit provided in an embodiment of the present application;

[0073] Figure 3 A circuit diagram of a warning trigger circuit provided in an embodiment of the present application;

[0074] Figure 4 A circuit diagram of an isolation circuit provided in an embodiment of the present application;

[0075] Figure 5 A circuit diagram of a digital-to-analog conversion circuit provided in an embodiment of the present application;

[0076] Figure 6 A circuit diagram of a low-voltage isolated power supply circuit provided in an embodiment of the present application;

[0077] Figure 7 A circuit diagram of a current limiting protection circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0078] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0079] The core of this application is to provide a high-voltage current limiting control protection circuit and a semiconductor testing device.

[0080] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0081] Figure 2 A module diagram of a high-voltage current limiting control protection circuit provided in an embodiment of the present application, as shown in the figure, includes: a first N-type MOS tube Q1, a sampling resistor RC, an operational amplifier U1, an isolated digital-to-analog conversion circuit 1 and a low-voltage isolated power supply circuit 3; in addition, Figure 2 It also includes: a high voltage source power supply port 4 and a control circuit output port 5.

[0082] The connection relationship of the circuit is as follows: the drain of the first N-type MOS transistor Q1 is connected to the high-voltage power supply port 4, the source of the first N-type MOS transistor Q1 is connected to the first end of the sampling resistor RC and grounded, and the gate of the first N-type MOS transistor Q1 is connected to the output end of the operational amplifier U1;

[0083] The second end of the sampling resistor RC is connected to the first input end of the operational amplifier U1 and the control circuit output port 5;

[0084] The second input terminal of the operational amplifier U1 is connected to the first terminal of the isolated digital-to-analog conversion circuit 1 , and the power supply terminal of the operational amplifier U1 is connected to the first terminal of the low-voltage isolated power supply circuit 3 and is grounded.

[0085] In a specific embodiment, the sampling resistor RC collects the current obtained by the first N-type MOS tube Q1 from the high-voltage power supply port 4. At this time, the sampling resistor RC and the current constitute a sampling voltage, and are input into the operational amplifier U1. The isolation digital-to-analog conversion circuit 1 connected to the operational amplifier U1 simultaneously inputs a set voltage. The operational amplifier U1 controls the conduction or shutdown of the first N-type MOS tube Q1 under the comparison of the sampling voltage and the set voltage, thereby realizing the high-voltage current limiting control protection of the circuit. Among them, the operational amplifier U1 is no longer powered by the high-voltage power supply port 4, but is powered by the low-voltage isolation power supply circuit 3 (12V~48V) for normal use.

[0086] It can be seen that the main circuit in the present application is the high-voltage source power supply port 4-the first N-type MOS tube Q1-the sampling resistor RC-the operational amplifier U1. The first N-type MOS tube Q1 in the high-voltage current limiting control protection circuit provided in the present application is used to control the conduction or disconnection of the main circuit, and is controllable by the operational amplifier U1; the sampling resistor RC in the present application can accurately collect the current value in the high-voltage current limiting control protection circuit and provide it to the operational amplifier U1; the isolated digital-to-analog conversion circuit 1 in the present application is used to provide a set current value or voltage value for comparison with the sampled voltage.

[0087] A high-voltage current-limiting control protection circuit provided in the present application includes: a first N-type MOS tube, a sampling resistor, an operational amplifier, an isolated digital-to-analog conversion circuit and a low-voltage isolated power supply circuit; wherein the drain of the first N-type MOS tube is connected to the high-voltage power supply port, the source of the first N-type MOS tube is connected to the first end of the sampling resistor and grounded, and the gate of the first N-type MOS tube is connected to the output end of the operational amplifier; the second end of the sampling resistor is connected to the first input end of the operational amplifier and the output port of the control circuit; the second input end of the operational amplifier is connected to the first end of the isolated digital-to-analog conversion circuit, and the power supply end of the operational amplifier is connected to the first end of the low-voltage isolated power supply circuit and grounded. It can be seen that the low-voltage isolated power supply circuit is used in the present application to power its operational amplifier, and the isolated floating ground technology is used in the connection relationship between the operational amplifier and the first N-type MOS tube, which can reduce the selection specifications of the operational amplifier as a whole and reduce the cost.

[0088] On the basis of the above embodiment, as a preferred embodiment, it further comprises an early warning trigger circuit, wherein the early warning trigger circuit comprises: a current sampling comparison circuit and an isolation detection circuit;

[0089] The first end of the current sampling comparison circuit is connected to the second end of the sampling resistor and the first input end of the operational amplifier as the first end of the early warning trigger circuit, and the second end of the current sampling comparison circuit is connected to the first end of the isolation detection circuit;

[0090] The second end of the isolation detection circuit is connected to the controller as the second end of the early warning trigger circuit.

[0091] In a specific embodiment, the early warning trigger circuit needs to first obtain the voltage in the circuit, and then perform a voltage judgment to determine whether the voltage in the circuit exceeds the range within which the circuit can be used normally. If so, an alarm is issued, otherwise, the circuit is used normally.

[0092] Among them, as a preferred embodiment, Figure 3As shown, the current sampling comparison circuit includes: a comparator U2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first capacitor C1 and a second capacitor C2. Among them, the first end of the first resistor R1 is connected to the second end of the sampling resistor RC, the first input end of the operational amplifier U2 and the control circuit output port 5 as the first end of the current sampling comparison circuit, that is, the first end of the first resistor R1 is connected to HVI-VDA+, and the first end of the second resistor R2 is connected to the isolated power supply (HVPWR-SOURCE); the second end of the first resistor R1 is connected to the second end of the second resistor R2, the inverting input end of the comparator U2 and the first end of the first capacitor C1; the non-inverting input end of the comparator U2 is grounded (GND-HVI), and the output end of the comparator U2 is connected to the second end of the first capacitor C1, the first end of the third resistor R3 and the first end of the fourth resistor R4; the second end of the third resistor R3 is connected to the first end of the second capacitor C2; the second end of the second capacitor C2 is grounded (GND-HVI); the second end of the fourth resistor R4 and the first end of the fifth resistor R5 are connected to the first end of the isolation detection circuit as the second end of the current sampling comparison circuit; the second end of the fifth resistor R5 is grounded (GND-HVI).

[0093] Isolation detection circuit such as Figure 3 As shown, it includes: an optical coupler T, a diode D1, a second N-type MOS tube Q2, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9 and a third capacitor C3. The anode of the diode D1 is connected to the second end of the fourth resistor R4 and the first end of the fifth resistor R5 as the first end of the isolation detection circuit, and the cathode of the diode D1 is connected to the first end of the sixth resistor R6; the second end of the sixth resistor R6 is connected to the gate of the second N-type MOS transistor Q2 and the first end of the seventh resistor R7; the source of the second N-type MOS transistor Q2 is connected to the second end of the seventh resistor R7 and is grounded (GND-HVI), and the drain of the second N-type MOS transistor Q2 is connected to the first end of the optical coupler T; the second end of the optical coupler T is connected to the first end of the eighth resistor R8, the third end of the optical coupler T is connected to the first end of the ninth resistor R9, and is also connected to the signal end (HV_COP), and the fourth end of the optical coupler T is grounded (GND); the second end of the eighth resistor R8 is connected to the first end of the third capacitor C3, and is also connected to the voltage signal end (HV-PWR+5V); the second end of the third capacitor C3 is grounded (GND-HVI); the second end of the ninth resistor R9 is connected to the controller (V+3.3-MCU) as the second end of the isolation detection circuit.

[0094] In the current sampling comparison circuit and isolation detection circuit provided in the present application, the function of the circuit is: the circuit takes the voltage value at the same point on the sampling resistor RC, obtains the voltage at this time according to the voltage division ratio of the first resistor R1 and the second resistor R2, and warns the controller when the current reaches 90% of the protection current setting value to perform corresponding warning functions, such as generating a warning interface, closing the signal output in advance, etc. When the input value of the inverting input terminal of the comparator U2 reaches the upper limit value, if the inverting input terminal of the comparator U2 is lower than the inverting input terminal of the comparator U2, the output terminal of the comparator U2 is low level, if the inverting input terminal of the comparator U2 is higher than the inverting input terminal of the comparator U2, the output terminal of the comparator U2 is reversed and outputs a high level, and the output signal flows through the fourth resistor R4, the fifth resistor R5, the diode D1, and the sixth resistor R6 to reach the gate of the second N-type MOS tube Q2, and the digital signal level is transmitted to the controller after isolation by the optical coupler T.

[0095] It should be noted that this application is only one possible implementation method, but is not limited to this implementation method and can be set according to user needs.

[0096] The present application provides a warning trigger circuit, which can improve the safe use of the circuit.

[0097] Based on the above embodiments, as a preferred embodiment, the isolated digital-to-analog conversion circuit includes: an isolation circuit and a digital-to-analog conversion circuit;

[0098] The first end of the isolation circuit is connected to the second input end of the operational amplifier as the first end of the isolation digital-to-analog conversion circuit, and the second end of the isolation circuit is connected to the first end of the digital-to-analog conversion circuit.

[0099] Among them, as a preferred embodiment, Figure 4As shown, the isolation circuit includes: an isolation chip T1, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourth capacitor C4 and a fifth capacitor C5; a first pin of the isolation chip T1 is connected to a first end of the tenth resistor R10, a first end of the eleventh resistor R11 and a first end of the fourth capacitor C4, and is connected to a controller (V+3.3-MCU); a second pin of the isolation chip T1 is connected to a second end of the tenth resistor R10, and is also connected to I2C-SDA2 in the bus I2C; a third pin of the isolation chip T1 is connected to a second end of the eleventh resistor R11, and is adjacent to I2C-SCL2 in the bus I2C; a fourth pin of the isolation chip T1 is connected to the isolation chip T The fifth pin of the isolation chip T1 is connected to the ground (GND-HVI); the sixth pin of the isolation chip T1 is connected to the first end of the twelfth resistor R12, and is also connected to HVI-SCL2 in the circuit; the seventh pin of the isolation chip T1 is connected to the first end of the thirteenth resistor R13, and is also connected to HVI-SDA2 in the circuit; the eighth pin of the isolation chip T1 is connected to the second end of the twelfth resistor R12, the second end of the thirteenth resistor R13 and the first end of the fifth capacitor C5, and is also connected to the voltage signal end (HV-PWR-+5V); the second end of the fifth capacitor C5 is grounded (GND-HVI); wherein the seventh pin and the sixth pin of the isolation chip T1 are connected together as the second end of the isolation circuit to the first end of the digital-to-analog conversion circuit.

[0100] As a preferred embodiment, Figure 5 As shown, the digital-to-analog conversion circuit includes: a digital-to-analog conversion chip T2, a first inductor L1, a sixth capacitor C6 and a fourteenth resistor R14; the first pin of the digital-to-analog conversion chip T2 is connected to the power supply terminal (HVI-VDA+); the second pin of the digital-to-analog conversion chip T2 is grounded (GND-HVI); the third pin of the digital-to-analog conversion chip T2 is connected to the first end of the first inductor L1 and the first end of the sixth capacitor C6; the fourth pin and the fifth pin of the digital-to-analog conversion chip T2 are connected to the seventh pin and the sixth pin of the isolation chip T1 as the first end of the digital-to-analog conversion circuit, that is, the fourth pin of the digital-to-analog conversion chip T2 is connected to HVI-SDA2, and the fifth pin of the digital-to-analog conversion chip T2 is connected to HVI-SCL2; the sixth pin of the digital-to-analog conversion chip T2 is connected to the first end of the fourteenth resistor R14; the second end of the first inductor L1 is connected to the voltage signal terminal (HV-PWR-+5V); the second end of the sixth capacitor C6 and the second end of the fourteenth resistor R14 are grounded (GND-HVI).

[0101] Among them, the isolation chip T1 is used to realize electrical isolation in the circuit, etc., the digital-to-analog conversion chip T2 is used to realize digital-to-analog conversion in the circuit, and its resistors and capacitors form an RC filter circuit to filter the signals in the circuit.

[0102] In addition, the high-voltage current limiting control protection circuit also includes: a low-voltage isolation power supply circuit, and the low-voltage isolation power supply circuit includes: a first power supply circuit, a second power supply circuit and a third power supply circuit, wherein the first power supply circuit, the second power supply circuit and the third power supply circuit have the same structure, such as Figure 6 As shown (taking the first power supply circuit as an example); the first power supply circuit includes: a power supply chip T3, a second inductor L2, a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, a twelfth capacitor C12, a fifteenth resistor R15 and a sixteenth resistor R16; wherein the first end of the seventh capacitor C7 is connected to the first end of the second inductor L2 and is also connected to the 12V voltage terminal (VIN-12V), the second end of the seventh capacitor C7 is connected to the first end of the eighth capacitor C8 and the first pin of the power supply chip T3, and is grounded; the second end of the second inductor L2 is connected to the second end of the eighth capacitor C8 and the second pin of the power supply chip T3; the power supply chip The third pin of the chip T3 is connected to the fourth pin of the power chip T4, the first end of the fifteenth resistor R15, the first end of the ninth capacitor C9, the first end of the tenth capacitor C10, the first end of the eleventh capacitor C11, the first end of the twelfth capacitor C12 and the first end of the sixteenth resistor R16, and is grounded; the fifth pin of the power chip T3 is connected to the second end of the fifteenth resistor R15; the sixth pin of the power chip T3 is connected to the second end of the ninth capacitor C9, the second end of the tenth capacitor C10, the second end of the eleventh capacitor C11, the second end of the twelfth capacitor C12 and the second end of the sixteenth resistor R16, and is also connected to the power signal terminal (HIV-PWR-+5V).

[0103] In addition, Figure 7As shown, it also includes: a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, a thirteenth capacitor C13, a twentieth resistor R20, a twenty-first resistor R21, a twenty-second resistor R22, a fourteenth capacitor C14, a fifteenth capacitor C15 and a sixteenth capacitor C16, which together with the sampling resistor RC and the operational amplifier U1 form a current limiting protection circuit. The connection relationship is as follows: the first end of the seventeenth resistor R17 is connected to the source of the first N-type MOS transistor Q1 and the first end of the sampling resistor RC, the drain of the first N-type MOS transistor is connected to the high-voltage power supply port (HIVPWR-SOURCE-IN), and the second end of the seventeenth resistor R17 is grounded; the first end of the eighteenth resistor R18 is connected to the gate of the first N-type MOS transistor Q1, the second end of the eighteenth resistor R18 is connected to the first end of the nineteenth resistor R19 and the output end of the operational amplifier U1; the second end of the nineteenth resistor R19 is connected to the first end of the thirteenth capacitor C13; the second end of the thirteenth capacitor C13 is grounded; the first end of the twentieth resistor R20 is connected to the second end of the sampling resistor RC and the control circuit output port 5, and is also connected to the isolated power supply (HVIWR-SOURCE), the twentieth resistor R20 is connected to the second end of the sampling resistor RC and the control circuit output port 5, and is also connected to the isolated power supply (HVIWR-SOURCE), The second end of R20 is connected to the inverting input terminal of the operational amplifier U1 serving as the first input terminal of the operational amplifier U1, the first end of the twenty-first resistor R21, the first end of the fourteenth capacitor C14, and the first end of the sixteenth capacitor C16; the second end of the twenty-first resistor R21 is connected to the first end (HVI-VDA+) of the early warning trigger circuit; the second end of the fourteenth capacitor C14 is connected to the second end of the nineteenth resistor R19, the output terminal of the operational amplifier U1, and the first end of the fifteenth capacitor C15; the second end of the fifteenth capacitor C15 is connected to the non-inverting input terminal of the operational amplifier U1 serving as the second input terminal of the operational amplifier U1 and the first end of the twenty-second resistor R22; the second end of the twenty-second resistor R22 is grounded (GND-HVI); the second end of the sixteenth capacitor C16 is grounded (GND-HVI).

[0104] The function of the current limiting protection circuit is as follows: first, the current limiting upper limit value required in the circuit is set, and the isolation digital-to-analog conversion circuit outputs it to the in-phase input terminal of the operational amplifier U1. When the circuit is working, it does not work under normal circumstances. When the current on the high-voltage current limiting control protection circuit increases, the voltage value generated on the sampling resistor RC increases (U=I*R). The floating ground method is adopted here, and the voltage is sent to the inverting input terminal of the operational amplifier U1. According to the principle of the operational amplifier U1, and a comparison control loop is formed with the in-phase input terminal of the operational amplifier U1, the output terminal of the operational amplifier U1 controls the gate of the first N-type MOS tube. When the main circuit current exceeds the set value, the in-phase input terminal of the operational amplifier U1 is lower than the inverting input terminal of the operational amplifier U1, and the output terminal of the operational amplifier U1 outputs a low level, thereby controlling the voltage at the gate of the first N-type MOS tube to decrease, thereby controlling the main current to decrease, so as to achieve the purpose of current limiting. The resistors in the circuit are used for voltage division and current limiting, and the capacitors are used for signal filtering.

[0105] It should be noted that the circuit provided in this application is only one possible implementation method, but is not limited to this implementation method and can be set according to the needs of the user.

[0106] The present application provides a high-voltage current-limiting control protection circuit, comprising: a first N-type MOS tube, a sampling resistor, an operational amplifier, an isolated digital-to-analog conversion circuit and a low-voltage isolated power supply circuit; wherein the drain of the first N-type MOS tube is connected to the high-voltage power supply port, the source of the first N-type MOS tube is connected to the first end of the sampling resistor and grounded, and the gate of the first N-type MOS tube is connected to the output end of the operational amplifier; the second end of the sampling resistor is connected to the first input end of the operational amplifier and the output port of the control circuit; the second input end of the operational amplifier is connected to the first end of the isolated digital-to-analog conversion circuit, and the power supply end of the operational amplifier is connected to the first end of the low-voltage isolated power supply circuit and grounded. It can be seen that the present application adopts a low-voltage isolated power supply circuit to power its operational amplifier, and at the same time, the isolated floating ground technology is adopted in the connection relationship between the operational amplifier and the first N-type MOS tube, which can reduce the selection specifications of the operational amplifier as a whole and reduce the cost.

[0107] On the other hand, the present application also provides a semiconductor test device, which includes the above-mentioned high-voltage current limiting control protection circuit and has the same beneficial effects. The embodiment of the semiconductor test device is the same as the embodiment of the above-mentioned high-voltage current limiting control protection circuit, and the present application will not repeat them here.

[0108] It should be noted that semiconductor testing equipment includes but is not limited to wafer-level aging testing equipment and power chip testing equipment.

[0109] The above is a detailed introduction to a high-voltage current limiting control protection circuit and a semiconductor testing device provided by the present application. The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the embodiments can refer to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can refer to the method part description. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.

[0110] It should also be noted that, in this specification, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

Claims

1. A high voltage current limiting control protection circuit, characterized in that: include: A first N-type MOS tube, a sampling resistor, an operational amplifier, an isolated digital-to-analog conversion circuit and a low-voltage isolated power supply circuit; The drain of the first N-type MOS transistor is connected to a high voltage power supply port, the source of the first N-type MOS transistor is connected to a first end of the sampling resistor and is grounded, and the gate of the first N-type MOS transistor is connected to an output end of the operational amplifier; The second end of the sampling resistor is connected to the first input end of the operational amplifier and the output port of the control circuit respectively; The second input terminal of the operational amplifier is connected to the first terminal of the isolated digital-to-analog conversion circuit, and the power supply terminal of the operational amplifier is connected to the first terminal of the low-voltage isolated power supply circuit and is grounded; Wherein, the connection relationship between the operational amplifier and the first N-type MOS transistor adopts an isolated floating ground technology; It also includes an early warning trigger circuit, which includes: a current sampling comparison circuit and an isolation detection circuit; The first end of the current sampling comparison circuit is connected to the second end of the sampling resistor and the first input end of the operational amplifier as the first end of the early warning trigger circuit, and the second end of the current sampling comparison circuit is connected to the first end of the isolation detection circuit; The second end of the isolation detection circuit is connected to the controller as the second end of the early warning trigger circuit; Wherein, the current sampling comparison circuit comprises: a comparator, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first capacitor and a second capacitor; The first end of the first resistor is connected to the second end of the sampling resistor, the first input end of the operational amplifier and the output port of the control circuit as the first end of the current sampling comparison circuit; The first end of the second resistor is connected to a power source; The second end of the first resistor is respectively connected to the second end of the second resistor, the inverting input end of the comparator and the first end of the first capacitor; The non-inverting input terminal of the comparator is grounded, and the output terminal of the comparator is respectively connected to the second terminal of the first capacitor, the first terminal of the third resistor, and the first terminal of the fourth resistor; The second end of the third resistor is connected to the first end of the second capacitor; The second terminal of the second capacitor is grounded; The second end of the fourth resistor and the first end of the fifth resistor are connected to the first end of the isolation detection circuit as the second end of the current sampling comparison circuit; The second end of the fifth resistor is grounded; Wherein, the isolation detection circuit includes: an optical coupler, a diode, a second N-type MOS tube, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor and a third capacitor; The anode of the diode and the first end of the isolation detection circuit are respectively connected to the second end of the fourth resistor and the first end of the fifth resistor, and the cathode of the diode is connected to the first end of the sixth resistor; The second end of the sixth resistor is connected to the gate of the second N-type MOS transistor and the first end of the seventh resistor respectively; The source of the second N-type MOS transistor is connected to the second end of the seventh resistor and is grounded, and the drain of the second N-type MOS transistor is connected to the first end of the optical coupler; The second end of the optical coupler is connected to the first end of the eighth resistor, the third end of the optical coupler is connected to the first end and the signal end of the ninth resistor respectively, and the fourth end of the optical coupler is grounded; The second end of the eighth resistor is connected to the first end of the third capacitor; The second end of the third capacitor is grounded; The second end of the ninth resistor is connected to the controller as the second end of the isolation detection circuit.

2. The high voltage current limiting control protection circuit according to claim 1, characterized in that: The isolated digital-to-analog conversion circuit comprises: an isolation circuit and a digital-to-analog conversion circuit; The first end of the isolation circuit is connected to the second input end of the operational amplifier as the first end of the isolation digital-to-analog conversion circuit, and the second end of the isolation circuit is connected to the first end of the digital-to-analog conversion circuit.

3. The high voltage current limiting control protection circuit according to claim 2, characterized in that: The isolation circuit comprises: an isolation chip, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourth capacitor and a fifth capacitor; The first pin of the isolation chip is respectively connected to the first end of the tenth resistor, the first end of the eleventh resistor and the first end of the fourth capacitor; The second pin of the isolation chip is connected to the second end of the tenth resistor; The third pin of the isolation chip is connected to the second end of the eleventh resistor; The fourth pin of the isolation chip and the fifth pin of the isolation chip are grounded; The sixth pin of the isolation chip is connected to the first end of the twelfth resistor; The seventh pin of the isolation chip is connected to the first end of the thirteenth resistor; The eighth pin of the isolation chip is respectively connected to the second end of the twelfth resistor, the second end of the thirteenth resistor and the first end of the fifth capacitor; The second end of the fifth capacitor is grounded; The seventh pin and the sixth pin of the isolation chip are connected to the first end of the digital-to-analog conversion circuit as the second end of the isolation circuit.

4. The high voltage current limiting control protection circuit according to claim 3, characterized in that: The digital-to-analog conversion circuit comprises: a digital-to-analog conversion chip, a first inductor, a sixth capacitor and a fourteenth resistor; Wherein, the first pin of the digital-to-analog conversion chip is connected to the power supply terminal; The second pin of the digital-to-analog conversion chip is grounded; The third pin of the digital-to-analog conversion chip is respectively connected to the first end of the first inductor and the first end of the sixth capacitor; The fourth pin and the fifth pin of the digital-to-analog conversion chip are connected to the seventh pin and the sixth pin of the isolation chip as the first end of the digital-to-analog conversion circuit; The sixth pin of the digital-to-analog conversion chip is connected to the first end of the fourteenth resistor; The second end of the first inductor is connected to the eighth pin of the isolation chip; A second end of the sixth capacitor and a second end of the fourteenth resistor are grounded.

5. The high voltage current limiting control protection circuit according to claim 1, characterized in that: The low-voltage isolation power supply circuit includes: a first power supply circuit, a second power supply circuit and a third power supply circuit, wherein the first power supply circuit, the second power supply circuit and the third power supply circuit have the same structure; the first power supply circuit includes: a power chip, a second inductor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a fifteenth resistor and a sixteenth resistor; Wherein, the first end of the seventh capacitor is connected to the first end of the second inductor, the second end of the seventh capacitor is respectively connected to the first end of the eighth capacitor and the first pin of the power chip, and is grounded; The second end of the second inductor is connected to the second end of the eighth capacitor and the second pin of the power chip respectively; The third pin of the power chip is respectively connected to the fourth pin of the power chip, the first end of the fifteenth resistor, the first end of the ninth capacitor, the first end of the tenth capacitor, the first end of the eleventh capacitor, the first end of the twelfth capacitor and the first end of the sixteenth resistor, and is grounded; The fifth pin of the power chip is connected to the second end of the fifteenth resistor; The sixth pin of the power chip is respectively connected to the second end of the ninth capacitor, the second end of the tenth capacitor, the second end of the eleventh capacitor, the second end of the twelfth capacitor and the second end of the sixteenth resistor.

6. The high voltage current limiting control protection circuit according to claim 1, characterized in that: Also includes: a seventeenth resistor, an eighteenth resistor, a nineteenth resistor and a thirteenth capacitor; The first end of the seventeenth resistor is connected to the source of the first N-type MOS transistor and the first end of the sampling resistor respectively, and the second end of the seventeenth resistor is grounded; The first end of the eighteenth resistor is connected to the gate of the first N-type MOS transistor, and the second end of the eighteenth resistor is connected to the first end of the nineteenth resistor and the output end of the operational amplifier respectively; The second end of the nineteenth resistor is connected to the first end of the thirteenth capacitor; A second terminal of the thirteenth capacitor is grounded.

7. The high voltage current limiting control protection circuit according to claim 6, characterized in that: Also includes: a twentieth resistor, a twenty-first resistor, a twenty-second resistor, a fourteenth capacitor, a fifteenth capacitor, and a sixteenth capacitor; The first end of the 20th resistor is respectively connected to the second end of the sampling resistor and the output port of the control circuit, and the second end of the 20th resistor is respectively connected to the non-inverting input end of the operational amplifier as the first input end of the operational amplifier, the first end of the 21st resistor, the first end of the 14th capacitor, and the first end of the 16th capacitor; The second end of the twenty-first resistor is connected to the first end of the early warning trigger circuit; The second end of the fourteenth capacitor is respectively connected to the second end of the nineteenth resistor, the non-inverting input end of the operational amplifier, and the first end of the fifteenth capacitor; The second end of the fifteenth capacitor is respectively connected to the inverting input end of the operational amplifier serving as the second input end of the operational amplifier and the first end of the twenty-second resistor; A second end of the twenty-second resistor is grounded; a second end of the sixteenth capacitor is grounded.

8. A semiconductor testing device, characterized in that: The semiconductor testing device comprises the high voltage current limiting control protection circuit as claimed in any one of claims 1 to 7.

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