Miniaturized Multi-channel Phased Array SiP Module

Abstract

The present invention discloses a miniaturized multi-channel phased array SiP module, which relates to the technical field of phased array radars. The SiP module includes a first SiP cavity module, a second SiP cavity module, and a third SiP cavity module arranged from top to bottom. The upper surface of the first SiP cavity module is provided with a plurality of AiP antennas, and the lower surface of the first SiP cavity module is provided with a plurality of power modulation chips, a plurality of first bidirectional amplifier chips, and a plurality of first BGA interconnection structures; a plurality of multi-functional chips and a plurality of second BGA interconnection structures are formed on the upper surface of the second SiP cavity module; a plurality of third BGA interconnection structures and a plurality of intermediate frequency connectors are provided on the lower surface of the second SiP cavity module, and a plurality of fourth BGA interconnection structures are formed on the upper surface of the third SiP cavity module. The SiP module has the advantages of small volume, good airtightness, and strong radio frequency performance.

Description

Technical Field

[0001] The present invention relates to the technical field of phased array radar, and in particular to a miniaturized multi-channel phased array SiP module. Background Art

[0002] Globally, the progress of defense technology is driving the integration and miniaturization of multi-functional systems such as radar, communication, and electronic warfare. The phased array SiP module, as the core component of the active phased array radar system, is of great significance for enhancing the flexibility and multi-functionality of the radar system. Modern active phased array radar technology can plan different regions to complete different functions simultaneously, and can also enable all components of the entire array to complete multiple tasks at different times, which is an important technology for improving the combat capabilities of airborne radars and developing new radars integrating multiple functions.

[0003] With the evolution of the global military strategy, the future development of phased array radar technology will be integrated into a new generation of combat platforms, giving rise to various new radar system structures. For missile-borne and airborne platforms, miniaturization, lightweight, and the ability to adapt to more complex environments are the key directions for the development of phased array radar technology. Currently, the design of phased array SiP modules mainly relies on the high-temperature co-fired ceramic (HTCC) process. Compared with the traditional printed circuit board (PCB) process, this process has lower losses and better heat dissipation performance, and can also integrate more discrete devices based on specific material properties. However, with the development of phased array radar technology, the increase in the number of channels has led to an increase in the system volume, which is in opposition to the requirement for module miniaturization in applications. Therefore, improving the integration level has become a necessary way to meet the miniaturization requirements. Summary of the Invention

[0004] The technical problem to be solved by the present invention is how to provide a miniaturized multi-channel phased array SiP module with a small volume, good airtightness, and strong radio frequency performance.

[0005] To solve the above technical problem, the technical solution adopted by the present invention is: a miniaturized multi-channel phased array SiP module, including a first SiP cavity module, a second SiP cavity module, and a third SiP cavity module arranged from top to bottom. The upper surface of the first SiP cavity module is provided with a plurality of AiP antennas, and the lower surface of the first SiP cavity module is provided with a plurality of power modulation chips, a plurality of first bi-directional amplifier chips, and a plurality of first BGA interconnection structures;

[0006] The upper surface of the second SiP cavity module is formed with a plurality of multi-functional chips and a plurality of second BGA interconnection structures. After the first BGA interconnection structure is connected to the second BGA interconnection structure, the first SiP cavity module and the second SiP cavity module are connected together;

[0007] A plurality of third BGA interconnection structures and a plurality of intermediate frequency connectors are provided on the lower surface of the second SiP cavity module. A plurality of fourth BGA interconnection structures are formed on the upper surface of the third SiP cavity module. After the third BGA interconnection structure is connected to the fourth BGA interconnection structure, the second SiP cavity module and the third SiP cavity module are connected together.

[0008] A further technical solution lies in that: the first SiP cavity module includes a first HTCC substrate. The AiP antennas are arranged in an array on the upper surface of the first HTCC substrate. The lower surface of the first HTCC substrate is divided into four identical regions. A power modulation chip is provided at the center of each region. 16 first bi-directional amplifier chips are provided around each power chip. The power modulation chip and the first bi-directional amplifier chips are respectively located in corresponding chip placement cavities. A plurality of circles of first BGA interconnection structures are formed on the outer periphery of the rectangular structure enclosed by the 16 first bi-directional amplifier chips. The AiP antennas are connected to the first bi-directional amplifier chips and the power modulation chip through the internal leads of the first HTCC substrate. The first bi-directional amplifier chips and the power modulation chip are connected to the first BGA interconnection structures through the internal leads of the first HTCC substrate.

[0009] A further technical solution lies in that: the second SiP cavity module includes a second HTCC substrate. The upper surface of the second HTCC substrate is divided into four identical regions. Four multi-functional chips are provided in each region. A plurality of circles of second BGA interconnection structures are formed on the outer periphery of the four multi-functional chips. Four groups of third BGA interconnection structures, a low-frequency control connector, 4 intermediate frequency connectors and 4 local oscillator connectors are provided on the lower surface of the second HTCC substrate; the second BGA interconnection structures, the third BGA interconnection structures, the multi-functional chips, the low-frequency control connector, the intermediate frequency connectors and the local oscillator connectors are connected through the internal leads of the second HTCC substrate.

[0010] A further technical solution lies in that: the third SiP cavity module includes a third HTCC substrate, a set of fourth BGA interconnection structures are formed on the upper surface of the third HTCC substrate, a signal processing circuit is arranged on the lower surface of the third HTCC substrate, and the signal processing circuit is located in a chip placement cavity on the lower surface of the third HTCC substrate. The signal processing circuit includes a combiner chip, a second bidirectional amplifier chip, a filter chip and a mixer chip. The combiner chip is connected to the second bidirectional amplifier chip, the second bidirectional amplifier chip is connected to the filter chip, and the filter chip is connected to the mixer chip through microstrip lines or strip lines. The combiner chip and the mixer chip are connected to the fourth BGA interconnection structure through internal leads of the third HTCC substrate, and the fourth BGA interconnection structure is connected to the third BGA interconnection structure.

[0011] A further technical solution lies in that: when the SiP module transmits signals, the signals are accessed to the link through four intermediate frequency connectors on the back of the second SiP cavity module. The radio frequency signals complete the first frequency conversion and splitting with various chips in the third SiP cavity module through the third BGA interconnection structure and the fourth BGA interconnection structure. The 16-channel signals after frequency conversion and splitting are sent to 16 four-channel multi-functional chips in the second SiP cavity module through the fourth BGA interconnection structure and the third BGA interconnection structure. The multi-functional chips complete the splitting and adjust the phase of the signals according to the control instructions sent by the low-frequency control connectors to complete the formation of the beam. The 64-channel signals in each channel of the multi-functional chips are correspondingly connected to each first bidirectional amplifier chip in the first SiP cavity module, and after supplementing the gain, they are fed to the AiP antenna, and the beam is radiated by the AiP antenna.

[0012] A further technical solution lies in that: when the SiP module receives signals, the 64-channel signals received by the AiP antenna are amplified by the first bidirectional amplifier chips on the back of the first SiP cavity module, and then sent to 16 multi-functional chips in the front cavity of the second SiP cavity module through the first BGA interconnection structure and the second BGA interconnection structure to complete the combining and amplitude-phase modulation. Then, the 16-channel signals are sent to the third SiP module in four quadrants through the third BGA interconnection structure and the fourth BGA interconnection structure. After the signals pass through each chip in the third SiP module to complete the down-conversion and combining, the intermediate frequency signals in the four quadrants flow through the fourth BGA interconnection structure and the third BGA interconnection structure and are output through the intermediate frequency connectors on the back of the second SiP module.

[0013] The beneficial effects of adopting the above technical solutions are as follows: In the SiP module of the present application, all the radio frequency chips are respectively arranged inside three SiP cavity modules in a cavity - digging manner. All three SiP cavity modules are cavity - dug on both sides and interconnected in the form of BGA, which greatly improves the space utilization rate, thereby realizing the miniaturized design of the phased - array SiP module; the first SiP cavity module, the second SiP cavity module, and the third SiP cavity module are all made of HTCC. Based on the airtight characteristics and electrical properties of HTCC, good transmission performance and airtightness are achieved.

[0014] In the present application, the radio frequency link includes each channel link. The radio frequency signals in each channel flow through the respective functional chips and are designed hierarchically according to different radio frequency functions. Chips with the same function are arranged on the same horizontal plane, thereby realizing the vertical layout of the system in terms of function and reducing the volume of the SiP module.

[0015] The radio frequency link includes each channel link. The signals in these channels are output in four quadrants after flowing through chips with different functions. A reasonable interval is satisfied between the intermediate - frequency connector and the local - oscillator connector. This layout is beneficial to the realization of the miniaturization of the SiP module; through the design of transition - matching stubs at the interconnections between microstrip lines, strip lines, and BGA, the radio frequency performance of the SiP module is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The present invention will be further described in detail below in conjunction with the drawings and specific embodiments.

[0017] Figure 1 is a schematic three - dimensional structure diagram of the SiP module according to an embodiment of the present invention;

[0018] Figure 2 is a schematic three - dimensional structure diagram of the SiP module according to an embodiment of the present invention;

[0019] Figure 3 is a schematic structure diagram of the lower surface of the first SiP cavity module in the SiP module according to an embodiment of the present invention;

[0020] Figure 4 is a schematic structure diagram of the upper surface of the second SiP cavity module in the SiP module according to an embodiment of the present invention;

[0021] Figure 5 is a schematic structure diagram of the lower surface of the second SiP cavity module in the SiP module according to an embodiment of the present invention;

[0022] Figure 6 is a schematic structure diagram of the lower surface of the third SiP cavity module in the SiP module according to an embodiment of the present invention;

[0023] Figure 7It is a schematic structural diagram of the lower surface of the third SiP cavity module in the SiP module according to the embodiment of the present invention;

[0024] Wherein: 1. The first SiP cavity module; 1-1. The AiP antenna; 1-2. The power modulation chip; 1-3. The first bi-directional amplifier chip; 1-4. The first BGA interconnection structure; 1-5. The first HTCC substrate;

[0025] 2. The second SiP cavity module; 2-1. The multi-functional chip; 2-2. The second BGA interconnection structure; 2-3. The third BGA interconnection structure; 2-4. The intermediate frequency connector; 2-5. The second HTCC substrate; 2-6. The low-frequency control connector; 2-7. The local oscillator connector;

[0026] 3. The third SiP cavity module; 3-1. The fourth BGA interconnection structure; 3-2. The third HTCC substrate; 3-3. The fourth BGA interconnection structure; 3-4. The combiner chip; 3-5. The second bi-directional amplifier chip; 3-6. The filter chip; 3-7. The mixer chip. Specific embodiments

[0027] Next, with reference to the accompanying drawings in the embodiments of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present invention.

[0028] In the following description, many specific details are set forth in order to fully understand the present invention. However, the present invention may also be implemented in other ways different from those described herein. Those skilled in the art can make similar generalizations without departing from the connotation of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed below.

[0029] Such as Figures 1-7As shown in the figure, an embodiment of the present invention discloses a miniaturized multi-channel phased array SiP module, which includes a first SiP cavity module 1, a second SiP cavity module 2, and a third SiP cavity module 3 arranged from top to bottom. The first SiP cavity module 1, the second SiP cavity module 2, and the third SiP cavity module 3 are all cavities made based on the HTCC multi-layer ceramic process. The first SiP cavity module 1 and the second SiP cavity module 2 are interconnected by BGA, and the second SiP cavity module 2 and the third SiP cavity module 3 are also interconnected by BGA. The first SiP cavity module 1 is mainly used to supply power to the active chip, provide gain to the signal, and perform functions of transmitting or receiving; the second SiP cavity module 2 is used to form a beamforming network to complete the amplitude-phase adjustment of the signal; the third SiP cavity module 3 mainly completes functions such as frequency conversion and combining / splitting of the received / transmitted signals.

[0030] On the upper surface of the first SiP cavity module 1, there are several AiP antennas 1-1. On the lower surface of the first SiP cavity module 1, there are several power modulation chips 1-2, several first bi-directional amplifier chips 1-3, and several first BGA interconnection structures 1-4. On the upper surface of the second SiP cavity module 2, there are several multi-functional chips 2-1 and several second BGA interconnection structures 2-2. After the first BGA interconnection structure 1-4 is connected to the second BGA interconnection structure 2-2, the first SiP cavity module 1 and the second SiP cavity module 2 are connected together. On the lower surface of the second SiP cavity module 2, there are several third BGA interconnection structures 2-3 and several intermediate frequency connectors 2-4. On the upper surface of the third SiP cavity module 3, there are several fourth BGA interconnection structures 3-1. After the third BGA interconnection structure 2-3 is connected to the fourth BGA interconnection structure 3-1, the second SiP cavity module 2 and the third SiP cavity module 3 are connected together.

[0031] Further, as Figure 1 and Figure 3As shown in the figure, the first SiP cavity module 1 includes a first HTCC substrate 1-5. The AiP antenna 1-1 is arranged in an array on the upper surface of the first HTCC substrate 1-5. The lower surface of the first HTCC substrate 1-5 is divided into four identical regions, and a power modulation chip 1-2 is arranged at the center of each region. Sixteen first two-way amplifier chips 1-3 are arranged around each power chip 1-2. The power modulation chip 1-2 and the first two-way amplifier chips 1-3 are respectively located in corresponding chip placement cavities. Several circles of first BGA interconnection structures 1-4 are formed on the outer periphery of the rectangular structure surrounded by the 16 first two-way amplifier chips 1-3. The AiP antenna 1-1 is connected to the first two-way amplifier chips 1-3 and the power modulation chip 1-2 through the internal leads of the first HTCC substrate 1-5. The first two-way amplifier chips 1-3 and the power modulation chip 1-2 are connected to the first BGA interconnection structures 1-4 through the internal leads of the first HTCC substrate 1-5.

[0032] Further, as Figure 2 、 Figure 4 and Figure 5 shown, the second SiP cavity module 2 includes a second HTCC substrate 2-5. The upper surface of the second HTCC substrate 2-5 is divided into four identical regions, and four multifunctional chips 2-1 are arranged in each region. Several circles of second BGA interconnection structures 2-2 are formed on the outer periphery of the four multifunctional chips 2-1. Four groups of third BGA interconnection structures 2-3, a low-frequency control connector 2-6, 4 intermediate-frequency connectors 2-4 and 4 local oscillator connectors 2-7 are arranged on the lower surface of the second HTCC substrate 2-5. The second BGA interconnection structures 2-2, the third BGA interconnection structures 2-3, the multifunctional chips 2-1, the low-frequency control connector 2-6, the intermediate-frequency connectors 2-4 and the local oscillator connectors 2-7 are connected through the internal leads of the second HTCC substrate 2-5. The low-frequency control connector 2-6 is used to receive control signals and power supply, and transmit low-frequency signals to the multifunctional chip 2-1 control chip. The multifunctional chip 2-1 is used to form a beamforming network and change the amplitude and phase in each channel according to the control signal.

[0033] Further, as Figures 6-7As shown, the third SiP cavity module 3 includes a third HTCC substrate 3-2. A set of fourth BGA interconnection structures 3-3 are formed on the upper surface of the third HTCC substrate 3-2. A signal processing circuit is provided on the lower surface of the third HTCC substrate 3-2. The signal processing circuit is located in the chip placement cavity on the lower surface of the third HTCC substrate 3-2. The signal processing circuit includes a combiner chip 3-4, a second bi-directional amplifier chip 3-5, a filter chip 3-6, and a mixer chip 3-7. The combiner chip 3-4 is connected to the second bi-directional amplifier chip 3-5, the second bi-directional amplifier chip 3-5 is connected to the filter chip 3-6, and the filter chip 3-6 is connected to the mixer chip 3-7 through microstrip lines or strip lines. The combiner chip 3-4 and the mixer chip 3-7 are connected to the fourth BGA interconnection structure 3-3 through the internal leads of the third HTCC substrate 3-2. The fourth BGA interconnection structure 3-3 is connected to the third BGA interconnection structure 2-3.

[0034] Preferably, the pads of each first bi-directional amplifier chip 1-3, power modulation chip 1-2, filter chip 3-6, combiner chip 3-4, mixer chip 3-7, and second bi-directional amplifier chip 3-5 inside the chip placement cavities of the first SiP cavity module 1 and the third SiP cavity module 3 are connected to the RF links in the HTCC substrates of the first SiP cavity module 1 and the third SiP cavity module 3 by wire bonding with gold wires. The multi-functional chip 2-1 in the second SiP cavity module 2 is soldered inside the cavity in the form of BGA packaging. Further, the RF links include respective channel links. The RF signals in each channel flow through the respective functional chips and are hierarchically designed according to different RF functions. The chips with the same function are arranged on the same horizontal plane. Each channel link includes multi-terminal microstrip lines and multi-terminal strip lines. Matching stubs are provided between the strip lines and microstrip lines for transmitting the same signal.

[0035] Further, the first bi-directional amplifier chip 1-3, power modulation chip 1-2, mixer chip 3-7, combiner chip 3-4, filter chip 3-6, and second bi-directional amplifier chip 3-5 are arranged in the chip placement cavities of the corresponding SiP cavity modules by cavity excavation. The four side walls of the chip placement cavity are metallized.

[0036] Working principle:

[0037] When the SiP module transmits signals, it accesses the link through four intermediate-frequency connectors 2-4 on the back of the second SiP cavity module 2. The radio-frequency signals complete the first frequency conversion and splitting with various chips in the third SiP cavity module 3 through the third BGA interconnection structure 2-3 and the fourth BGA interconnection structure 3-3. The 16 signals after frequency conversion and splitting are sent to 16 four-channel multi-functional chips 2-1 in the second SiP cavity module 2 through the fourth BGA interconnection structure 3-3 and the third BGA interconnection structure 2-3. The multi-functional chips 2-1 complete the splitting and adjust the phase of the signals according to the control instructions sent by the low-frequency control connectors 2-6 to complete the formation of the beam. The 64 signals in each multi-functional chip channel are correspondingly connected to each first bi-directional amplifier chip 1-3 in the first SiP cavity module 1. After supplementing the gain, they are fed to the AiP antenna 1-1, and the beam is radiated by the AiP antenna 1-1.

[0038] When the SiP module receives signals, the 64 signals received by the AiP antenna 1-1 are amplified by the first bi-directional amplifier chip 1-3 on the back of the first SiP cavity module 1, and then sent to 16 multi-functional chips 2-1 in the front cavity of the second SiP cavity module 2 through the first BGA interconnection structure 1-4 and the second BGA interconnection structure 2-2 to complete the combining and amplitude-phase modulation. Then, the 16 signals are sent to the third SiP module 3 in four quadrants through the third BGA interconnection structure 2-3 and the fourth BGA interconnection structure 3-3. After completing the down-conversion and combining by each chip in the third SiP module 3, the intermediate-frequency signals in the four quadrants flow through the fourth BGA interconnection structure 3-3 and the third BGA interconnection structure 2-3 and are output through the intermediate-frequency connectors 2-4 on the back of the second SiP module 2.

[0039] The miniaturized multi-channel phased array SiP module, based on SiP technology, is a phased array front-end module operating in the K band, which can meet the requirements of modern radar systems for miniaturization, high performance and multi-functionality.

Claims

1. A miniaturized multi-channel phased array SiP module, characterized in that: Comprising a first SiP cavity module (1), a second SiP cavity module (2) and a third SiP cavity module (3) arranged from top to bottom, the upper surface of the first SiP cavity module (1) being provided with a plurality of AiP antennas (1-1), and the lower surface of the first SiP cavity module (1) being provided with a plurality of power modulation chips (1-2), a plurality of first bidirectional amplifier chips (1-3) and a plurality of first BGA interconnect structures (1-4); A plurality of multifunctional chips (2-1) and a plurality of second BGA interconnect structures (2-2) are formed on the upper surface of the second SiP cavity module (2); the first BGA interconnect structure (1-4) is connected to the second BGA interconnect structure (2-2), thereby connecting the first SiP cavity module (1) and the second SiP cavity module (2) together; A plurality of third BGA interconnect structures (2-3) and a plurality of intermediate frequency connectors (2-4) are arranged on the lower surface of the second SiP cavity module (2); a plurality of fourth BGA interconnect structures (3-1) are formed on the upper surface of the third SiP cavity module (3); and after the third BGA interconnect structures (2-3) are connected to the fourth BGA interconnect structures (3-1), the second SiP cavity module (2) and the third SiP cavity module (3) are connected together; The first SiP cavity module (1) comprises a first HTCC substrate (1-5), the AiP antenna (1-1) is arranged in an array on the upper surface of the first HTCC substrate (1-5), the lower surface of the first HTCC substrate (1-5) is divided into four identical areas, a power modulation chip (1-2) is arranged at the center of each area, 16 first bidirectional amplifier chips (1-3) are arranged around each power modulation chip (1-2), and the power modulation chip (1-2) and the first bidirectional amplifier chip (1-3) are respectively located The corresponding chip is placed in the cavity, a plurality of circles of first BGA interconnection structures (1-4) are formed on the periphery of a rectangular structure surrounded by 16 first bidirectional amplifier chips (1-3), the AiP antenna (1-1) is connected to the first bidirectional amplifier chip (1-3) and the power modulation chip (1-2) through internal leads of the first HTCC substrate (1-5), and the first bidirectional amplifier chip (1-3) and the power modulation chip (1-2) are connected to the first BGA interconnection structure (1-4) through internal leads of the first HTCC substrate (1-5); The second SiP cavity module (2) comprises a second HTCC substrate (2-5); the upper surface of the second HTCC substrate (2-5) is divided into four identical areas; four multifunctional chips (2-1) are arranged in each area; a plurality of circles of second BGA interconnection structures (2-2) are formed on the outer periphery of the four multifunctional chips (2-1); four groups of third BGA interconnection structures (2-3), a low-frequency control connector (2-6), four intermediate frequency connectors (2-4) and four local oscillator connectors (2-7) are arranged on the lower surface of the second HTCC substrate (2-5); the second BGA interconnection structure (2-2), the third BGA interconnection structure (2-3), the multifunctional chip (2-1) and the low-frequency control connector (2-6), the intermediate frequency connector (2-4) and the local oscillator connector (2-7) are connected via leads inside the second HTCC substrate (2-5); The third SiP cavity module (3) comprises a third HTCC substrate (3-2), a group of fourth BGA interconnect structures (3-1) are formed on the upper surface of the third HTCC substrate (3-2), a signal processing circuit is arranged on the lower surface of the third HTCC substrate (3-2), and the signal processing circuit is located in a chip placement cavity on the lower surface of the third HTCC substrate (3-2).

2. The miniaturized multi-channel phased array SiP module according to claim 1, characterized in that: The signal processing circuit comprises a combiner chip (3-4), a second bidirectional amplifier chip (3-5), a filter chip (3-6) and a mixer chip (3-7); the combiner chip (3-4) and the second bidirectional amplifier chip (3-5), the second bidirectional amplifier chip (3-5) and the filter chip (3-6), and the filter chip (3-6) and the mixer chip (3-7) are connected via microstrip lines or strip lines; the combiner chip (3-4) and the mixer chip (3-7) are connected to the fourth BGA interconnection structure (3-1) via internal leads of the third HTCC substrate (3-2); and the fourth BGA interconnection structure (3-1) is connected to the third BGA interconnection structure (2-3).

3. The miniaturized multi-channel phased array SiP module according to claim 1, characterized in that: When the SiP module transmits a signal, the link is accessed through four intermediate frequency connectors (2-4) on the back of the second SiP cavity module (2), and the radio frequency signal is frequency-converted and branched once through the third BGA interconnection structure (2-3) and the fourth BGA interconnection structure (3-1) with various chips in the third SiP cavity module (3); the 16 signals after frequency conversion and branching are sent to the 16 4-channel multifunctional chips (2-1) in the second SiP cavity module (2) through the fourth BGA interconnection structure (3-1) and the third BGA interconnection structure (2-3); the multifunctional chip (2-1) completes the branching and adjusts the phase of the signal according to the control instruction sent by the low-frequency control connector (2-6), completing the formation of the beam; the 64 signals in each multifunctional chip channel are correspondingly connected to each first bidirectional amplifier chip (1-3) in the first SiP cavity module (1), and fed to the AiP antenna (1-1) after supplementing the gain, and the AiP antenna (1-1) radiates the beam.

4. The miniaturized multi-channel phased array SiP module according to claim 1, characterized in that: When the SiP module receives signals, the 64 signals received by the AiP antenna (1-1) are amplified by the first bidirectional amplifier chip (1-3) on the back of the first SiP cavity module (1), and then sent to the 16 multifunctional chips (2-1) in the front cavity of the second SiP cavity module (2) through the first BGA interconnection structure (1-4) and the second BGA interconnection structure (2-2). After the signals are combined and amplitude-phase modulated, the 16 signals are divided into four quadrants and sent to the third SiP cavity module (3) through the third BGA interconnection structure (2-3) and the fourth BGA interconnection structure (3-1). After the chips in the third SiP cavity module (3) complete down-conversion and combination, the intermediate frequency signals of the four quadrants flow through the fourth BGA interconnection structure (3-1) and the third BGA interconnection structure (2-3) and are output through the intermediate frequency connector (2-4) on the back of the second SiP cavity module (2).

5. The miniaturized multi-channel phased array SiP module according to claim 1, characterized in that: The pads of the first bidirectional amplifier chip (1-3), the power modulation chip (1-2), the filter chip (3-6), the combiner chip (3-4), the mixer chip (3-7) and the second bidirectional amplifier chip (3-5) in the chip placement cavity of the first SiP cavity module (1) and the third SiP cavity module (3) are connected to the radio frequency link in the HTCC substrate of the first SiP cavity module (1) and the third SiP cavity module (3) by gold wire bonding, and the multifunctional chip (2-1) in the second SiP cavity module (2) is welded inside the cavity in the form of BGA packaging.

6. The miniaturized multi-channel phased array SiP module according to claim 5, characterized in that: The radio frequency link includes various channel links, and the radio frequency signals in each channel flow through various functional chips accordingly. The radio frequency link is designed in a hierarchical manner according to different radio frequency functions, and the chips with the same functions are arranged on the same level.

7. The miniaturized multi-channel phased array SiP module according to claim 6, characterized in that: The channel link comprises a multi-terminal microstrip line and a multi-terminal stripline, and matching branches are arranged between the stripline and the microstrip line for transmitting the same signal.

8. The miniaturized multi-channel phased array SiP module according to claim 1, wherein: A first bidirectional amplifier chip (1-3), a power modulation chip (1-2), a mixer chip (3-7), a combiner chip (3-4), a filter chip (3-6) and a second bidirectional amplifier chip (3-5) are arranged in a chip placement cavity of a corresponding SiP cavity module by means of a cavity excavation method, and four sides of the side walls of the chip placement cavity are metallized.

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