A power bank disconnection detection circuit

Abstract

The invention relates to the technical field of mobile power sources, and specifically discloses a disconnection detection circuit for a power bank, comprising a detection module, a main control chip, a hub, and a USB connection line; the main control chip is connected to the detection module and the hub; there are multiple USB connection lines, and each USB connection line is connected to the hub; the hub is used to feed back connection status signals of multiple USB connection lines to the main control chip; the main control chip samples the connection status voltage and the reference signal of the corresponding USB connection line to the detection module; and each USB connection line is subjected to disconnection and virtual connection detection by one or more detection modules, and a fault signal is fed back to the main control chip.

Description

Technical Field

[0001] The present invention relates to the technical field of mobile power supplies, and in particular to a power bank disconnection detection circuit. Background Art

[0002] Publication No.: CN213780339U discloses a disconnection detection circuit for multiple types of charging cables and a power bank. By setting a first detection module and a second detection module that can detect the disconnection of the protocol port, the power bank can simultaneously detect the disconnection of different types of charging cables, but cannot distinguish the type of fault. When there is a virtual connection fault, the sampled signal changes, and the power bank with a fault will still be put into use. Another problem is that no matter what port protocol USB is used for charging, when the USB connection harness is integrated for detection, the number of external circuits is too large, and the more types of detection protection, the more chip I / O pins are occupied. Summary of the invention

[0003] In view of the above technical problems, the purpose of the present invention is to provide a power bank disconnection detection circuit, including a detection module, a main control chip, a hub, and a USB connection line; the main control chip is connected to the detection module and the hub; there are multiple USB connection lines, and each USB connection line is connected to the hub; the hub is used to feedback the connection status signals of multiple USB connection lines to the main control chip; the main control chip samples the connection status voltage and the reference signal of the corresponding USB connection line to the detection module; each USB connection line is detected for disconnection and virtual connection through one detection module or multiple detection modules, and the fault signal is fed back to the main control chip.

[0004] Preferably, the detection module is connected to the DET1 pin of the hub through the inverting end of the first operational amplifier U1 and the I / O_2 pin of the main control chip; connected to the I / O_1 pin of the main control chip through the gate of the first field effect transistor Q1; connected to the I / O_3 pin of the main control chip through the cathode of the third diode D3, the cathode of the second diode D2; the in-phase end of the first operational amplifier U1 is connected to the power supply through the first resistor R1; the in-phase end of the first operational amplifier U1 is connected to the ground through the third resistor R3; the output end of the first operational amplifier U1 is connected to the base of the second transistor Q2 and the gate of the fourth field effect transistor Q4; the emitter of the second transistor Q2 is connected to the control electrode of the third thyristor Q3 and the anode of the second diode D2; the cathode of the third thyristor Q3 and the source of the fourth field effect transistor Q4 are connected to the ground through the fifth resistor R5; the drain of the fourth field effect transistor Q4 is connected to the anode of the third diode D3; the source of the first field effect transistor Q1, the collector of the second transistor Q2 and the power supply are connected.

[0005] Preferably, the Vbus2 pin of the USB connection line is connected to the DET2 pin through the second resistor R2; DET2 feeds back a signal to the hub DET1 pin; the hub DET1 pin is connected to the ground through the fourth resistor R4; the hub Vbus1 is connected to the power supply and feeds back a power supply signal to the Vbus2 of the USB connection line, and the resistance of the second resistor R2 of each USB connection line is different.

[0006] Preferably, a second NAND chip U2, a third operational amplifier U3, a fourth operational amplifier U4 and a fifth operational amplifier U5 are also connected in series between the inverting end of the first operational amplifier U1 and the I / O_2 pin of the main control chip in the detection module; wherein the inverting end of the first operational amplifier U1 and the output end of the second NAND chip U2 are connected to the ground through the seventh resistor R7; the two input ends of the second NAND chip U2 are respectively connected to the output end of the third operational amplifier U3 and the output end of the fourth operational amplifier U4; the in-phase end of the third operational amplifier U3 and the in-phase end of the fourth operational amplifier U4 are connected to the I / O_2 pin of the control chip; the inverting end of the third operational amplifier U3 is connected to the ground through the eighth resistor R7; the second NAND chip U2 ... Resistor R8 is connected to the ground; the inverting end of the third operational amplifier U3 is connected in parallel with the non-inverting end of the fourth operational amplifier U4 and the tenth resistor R10 through the ninth resistor R9; the tenth resistor R10 is connected to the output end of the fifth operational amplifier U5 and the eleventh resistor R11; the non-inverting end of the fifth operational amplifier U5 is connected to the I / O_4 pin of the main control chip through the fourteenth resistor R14, and the non-inverting end of the fifth operational amplifier U5 also inputs the variable signal Vref through the fifteenth resistor R15; the inverting end of the fifth operational amplifier U5 is feedback-connected to the output end of the fifth operational amplifier U5 through the eleventh resistor R11, and is connected to the ground through the twelfth resistor R12.

[0007] Preferably, a first indicator light D1 is also connected in series between the emitter of the second transistor Q2 and the ground.

[0008] Preferably, a fourth indicator light D4 is also connected in series between the drain of the fourth field effect transistor Q4 and the ground.

[0009] Preferably, it also includes a communication module, and the communication module is connected to the I / O_3 pin of the main control chip.

[0010] The beneficial effects of the present invention compared with the prior art are:

[0011] The present invention can detect and distinguish the disconnection fault and virtual connection fault of the power bank, and can provide a locking indication when the power bank is virtual connected, which is convenient for maintenance and avoids the situation where the power bank cannot be put into use again when the staff fails to find the fault during inspection.

[0012] In addition, when multiple USB connection harnesses are powered, each USB connection line can be tested for circuit breakage cycles, effectively reducing port occupancy and circuit volume. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the prior art and the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0014] Figure 1 A schematic diagram of the overall structure provided by the present invention;

[0015] Figure 2 A schematic diagram of the circuit connection structure of the detection module provided by the present invention;

[0016] Figure 3 This is a schematic diagram of the circuit connection structure of another detection module provided by the present invention. DETAILED DESCRIPTION

[0017] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making a clearer and more explicit definition of the protection scope of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work belong to the scope of protection of the present invention.

[0018] The terms "including" and "having" and any variations thereof in the specification and claims of the present invention and the above-mentioned drawings are intended to cover non-exclusive inclusions. The terms "first", "second", etc. in the specification and claims of the present invention or the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. The directional words such as "upper", "lower", "left", "right", "front", "rear", "side", etc. in the specification and claims of the present invention or the above-mentioned drawings are used to describe the relative positions of the provided drawings, and are not used to describe the specific order of the actual products.

[0019] See also Figure 1 The embodiment of the present invention provides a power bank disconnection detection circuit, specifically, comprising a detection module, a main control chip, a hub, and a USB connection line; the main control chip is connected to the detection module and the hub; there are multiple USB connection lines, each of which is connected to the hub; the hub is used to feed back multiple USB connection line connection status signals to the main control chip; the main control chip samples the connection status voltage and the reference signal of the corresponding USB connection line to the detection module; each USB connection line is detected for disconnection and virtual connection through one or more detection modules, and a fault signal is fed back to the main control chip.

[0020] Further, the detection module is connected to the DET1 pin of the hub through the inverting end of the first operational amplifier U1 and the I / O_2 pin of the main control chip; connected to the I / O_1 pin of the main control chip through the gate of the first field effect transistor Q1; connected to the I / O_3 pin of the main control chip through the cathode of the third diode D3, the cathode of the second diode D2; the in-phase end of the first operational amplifier U1 is connected to the power supply through the first resistor R1; the in-phase end of the first operational amplifier U1 is connected to the ground through the third resistor R3; the output end of the first operational amplifier U1 is connected to the base of the second transistor Q2 and the gate of the fourth field effect transistor Q4; the emitter of the second transistor Q2 is connected to the control electrode of the third thyristor Q3 and the anode of the second diode D2; the cathode of the third thyristor Q3 and the source of the fourth field effect transistor Q4 are connected to the ground through the fifth resistor R5; the drain of the fourth field effect transistor Q4 is connected to the anode of the third diode D3; the source of the first field effect transistor Q1, the collector of the second transistor Q2 and the power supply are connected.

[0021] Furthermore, the Vbus2 pin of the USB connection line is connected to the DET2 pin through the second resistor R2; DET2 feeds back a signal to the hub DET1 pin; the hub DET1 pin is connected to the ground through the fourth resistor R4; the hub Vbus1 is connected to the power supply and feeds back a power supply signal to the Vbus2 of the USB connection line, and the resistance of the second resistor R2 of each USB connection line is different.

[0022] Furthermore, a second NAND chip U2, a third operational amplifier U3, a fourth operational amplifier U4 and a fifth operational amplifier U5 are connected in series between the inverting end of the first operational amplifier U1 and the I / O_2 pin of the main control chip in the detection module; wherein the inverting end of the first operational amplifier U1 and the output end of the second NAND chip U2 are connected to the ground through the seventh resistor R7; the two input ends of the second NAND chip U2 are connected to the output end of the third operational amplifier U3 and the output end of the fourth operational amplifier U4 respectively; the in-phase end of the third operational amplifier U3 and the in-phase end of the fourth operational amplifier U4 are connected to the I / O_2 pin of the control chip; the inverting end of the third operational amplifier U3 is connected to the ground through the eighth resistor R7; the second NAND chip U2 ... Resistor R8 is connected to the ground; the inverting end of the third operational amplifier U3 is connected in parallel with the non-inverting end of the fourth operational amplifier U4 and the tenth resistor R10 through the ninth resistor R9; the tenth resistor R10 is connected to the output end of the fifth operational amplifier U5 and the eleventh resistor R11; the non-inverting end of the fifth operational amplifier U5 is connected to the I / O_4 pin of the main control chip through the fourteenth resistor R14, and the non-inverting end of the fifth operational amplifier U5 also inputs the variable signal Vref through the fifteenth resistor R15; the inverting end of the fifth operational amplifier U5 is feedback-connected to the output end of the fifth operational amplifier U5 through the eleventh resistor R11, and is connected to the ground through the twelfth resistor R12.

[0023] Furthermore, a first indicator light D1 is connected in series between the emitter of the second transistor Q2 and the ground.

[0024] Furthermore, a fourth indicator light D4 is connected in series between the drain of the fourth field effect transistor Q4 and the ground.

[0025] Furthermore, it also includes a communication module, which is connected to the I / O_3 pin of the main control chip.

[0026] See also Figure 1 and Figure 2 In one embodiment, after the USB cable and the hub are plugged in, Vbus1 feeds back the power signal to Vbus2 and feeds back to DET2 through the second resistor R2. After the plugging in, DET2 feeds back the voltage-divided signal of the second resistor R2 and the fourth resistor R4 to the I / O_2 pin of the main control chip through the fourth resistor R4 and the ground loop. The inverting end of the first operational amplifier U1 is connected to the I / O_2 pin. The inverting end of the first operational amplifier U1 sets a reference signal through the first resistor R1 and the third resistor R3. The amplitude of the reference signal is greater than the voltage at the connection end of the second resistor R2 and the fourth resistor R4. According to the plugging state of the USB cable and the hub, DET1 feeds back a high-level signal when there is no disconnection, and the first operational amplifier U1 does not output. When the circuit is disconnected, DET1 feeds back a low-level signal through the fourth resistor R4 ground loop. The first operational amplifier U1 compares the voltage of the inverting end and the inverting end and then outputs a signal to the second transistor Q2. The second transistor Q2 is turned on to feed back the power signal to the third thyristor Q3 and the second transistor Q2 The output of the second diode D2 indicates that the current fault is an open circuit. When the virtual connection fault causes the DET1 potential to be pulled up again, the first operational amplifier U1 is turned off and the fourth field effect tube Q4 is turned on. The I / O_1 pin is a reset pin. The output is performed after the maintenance is completed. Initially, there is no output. The first field effect tube Q1 is turned on to allow the power to be fed back to the fourth indicator light D4 and the fifth transistor Q5 gate after the third thyristor Q3 and the fourth field effect tube Q4. The fifth transistor Q5 is turned off and the fourth indicator light D4 is turned on. The fourth indicator light D4 indicates the current virtual connection fault. The fifth transistor Q5 is connected in series between the output end of the first operational amplifier U1 and the gate of the fourth field effect tube Q4. It is used to lock the state of the fourth field effect tube Q4 when the fourth indicator light D4 outputs to prevent the first operational amplifier U1 from outputting again when the virtual connection occurs and the fourth indicator light D4 cannot indicate. The fourth indicator light D4 can also be replaced by a buzzer to distinguish it from the first indicator light D1. The maintenance personnel perform maintenance according to the fault types indicated by the first indicator light D1 and the fourth indicator light D4.

[0027] See also Figure 3 In one embodiment, the Vbus2 pins of the plurality of USB connection lines are connected to the Vbus1 pin of the hub, the DET2 pin is connected to the DET1 pin, and the second resistor R2 of each USB connection line has a different resistance value. When detecting the plurality of USB connection lines, in addition to making the number of detection modules correspond to the number of USB connection lines, it is also possible to Figure 3The setting method uses a detection module to detect multiple USB connection lines, wherein the I / O_4 of the main control chip sequentially inputs reference signals corresponding to the resistance value of the second resistor R2 of the USB connection line. Assuming that there are three USB connection lines, and the resistance values ​​of the second resistor R2 are respectively X1, X2, and X3 (the resistance value is from low to high), when the resistance value of the first resistor R1 and VDD are fixed, when any one of them is disconnected, the other two second resistors R2 and the fourth resistor R4 divide the voltage, and the voltage of the corresponding signal is XV1, XV2, and XV3 (the voltage is from low to high). The XV1 main control chip passes the voltage of the corresponding signals XV1, XV2, and XV3. After being input into the detection module through the I / O_4 pin loop, each corresponding signal is first input into the in-phase terminal of the fifth operational amplifier U5 through the fourteenth resistor R14, and the fifteenth resistor R15 inputs the variable signal Vref to increase the corresponding signal amplitude, so that the voltage of the output signal of the fifth operational amplifier U5 fed back to the in-phase terminal of the fourth operational amplifier U4 after being divided by the tenth resistor R10, the ninth resistor R9, and the eighth resistor R8 is greater than the corresponding signal. After being fed back to the inverting terminal of the third operational amplifier U3 through the ninth resistor R9 and the eighth resistor R8, the detection range of the third operational amplifier U3 and the fourth operational amplifier U4 is the detection interval of the corresponding signal. When the I / O_2 connection status voltage signal is fed back After reaching the third operational amplifier U3 in-phase terminal and the fourth operational amplifier U4 inverting terminal, if a circuit-breaking fault of the current corresponding signal occurs, the voltage fed back by I / O_2 is within the output range of the third operational amplifier U3 and the fourth operational amplifier U4, and both the third operational amplifier U3 and the fourth operational amplifier U4 output signals to the second NAND chip U2, and the second NAND chip U2 outputs to the first operational amplifier U1. After the fault detection and feedback are performed by the circuit of the above embodiment, when the I / O_2 connection state voltage signal is not within the detection interval of the current corresponding signal, one of the third operational amplifier U3 or the fourth operational amplifier U4 does not output, and the second NAND chip U2 has no output, so as to avoid the corresponding signal of the lower voltage from being detected. When the corresponding USB connection line is broken, any corresponding signal will cause the second NAND chip U2 to output (when there is no detection interval). When the circuit breaker fault is not in the detection interval of the corresponding signal, wait for the cyclic input of the corresponding signal of the main control chip I / O_4 until the corresponding USB connection line is broken. The signal fed back by I / O_2 falls into the detection interval of the third op amp U3 and the fourth op amp U4. The first indicator light D1 or the fourth indicator light D4 indicates and is input to the I / O_3 pin of the main control chip through the second diode D2 and the third diode D3. The main control chip stops the cycle and notifies through the communication module or waits for maintenance personnel to conduct inspections and repairs.

[0028] The implementation modes of the present application are described in detail above in conjunction with the accompanying drawings, but the present application is not limited to the above implementation modes, and various changes can be made within the knowledge scope of ordinary technicians in the field without departing from the purpose of the present application.

Claims

1. A power bank disconnection detection circuit, characterized in that: It includes a detection module, a main control chip, a hub, and a USB connection line; the main control chip is connected to the detection module and the hub; there are multiple USB connection lines, each of which is connected to the hub; the hub is used to feed back connection status signals of multiple USB connection lines to the main control chip; the main control chip samples the connection status voltage and the reference signal of the corresponding USB connection line to the detection module; Perform disconnection and virtual connection detection on each USB connection line through one or more detection modules, and feed back fault signals to the main control chip; The detection module is connected to the DET1 pin of the hub through the inverting end of the first operational amplifier and the I / O_2 pin of the main control chip; connected to the I / O_1 pin of the main control chip through the gate of the first field effect transistor; connected to the I / O_3 pin of the main control chip through the cathode of the third diode, the cathode of the second diode; the in-phase end of the first operational amplifier is connected to the power supply through the first resistor; the in-phase end of the first operational amplifier is connected to the ground through the third resistor; the output end of the first operational amplifier is connected to the base of the second transistor and the gate of the fourth field effect transistor; the emitter of the second transistor is connected to the control electrode of the third thyristor and the anode of the second diode; The cathode of the third thyristor and the source of the fourth field effect transistor are connected to the ground through the fifth resistor; the drain of the fourth field effect transistor is connected to the anode of the third diode; the source of the first field effect transistor and the collector of the second transistor are connected to the power supply.

2. The power bank disconnection detection circuit according to claim 1, characterized in that: The Vbus2 pin of the USB connection line is connected to the DET2 pin through a second resistor; DET2 feeds back a signal to the hub DET1 pin; the hub DET1 pin is connected to the ground through a fourth resistor; the hub Vbus1 is connected to the power supply and feeds back a power supply signal to the Vbus2 of the USB connection line, and the resistance of the second resistor of each USB connection line is different.

3. The power bank disconnection detection circuit according to claim 1, characterized in that: A second NAND chip, a third operational amplifier, a fourth operational amplifier and a fifth operational amplifier are also connected in series between the inverting end of the first operational amplifier and the I / O_2 pin of the main control chip in the detection module; The first operational amplifier inverting terminal and the second NAND chip output terminal are connected to the ground through the seventh resistor; the two input terminals of the second NAND chip are connected to the third operational amplifier output terminal and the fourth operational amplifier output terminal respectively; the third operational amplifier in-phase terminal and the fourth operational amplifier in-phase terminal are connected to the I / O_2 pin of the control chip; The inverting terminal of the third operational amplifier is connected to the ground through the eighth resistor; the inverting terminal of the third operational amplifier is connected in parallel with the non-inverting terminal of the fourth operational amplifier and the tenth resistor through the ninth resistor; The tenth resistor is connected to the output terminal of the fifth operational amplifier and the eleventh resistor; the in-phase terminal of the fifth operational amplifier is connected to the I / O_4 pin of the main control chip through the fourteenth resistor, and the in-phase terminal of the fifth operational amplifier also inputs the variable signal Vref through the fifteenth resistor; the inverting terminal of the fifth operational amplifier is feedback-connected to the output terminal of the fifth operational amplifier through the eleventh resistor, and is connected to the ground through the twelfth resistor.

4. The power bank disconnection detection circuit according to claim 1, characterized in that: A first indicator light is also connected in series between the emitter of the second transistor and the ground.

5. The power bank disconnection detection circuit according to claim 1, characterized in that: A fourth indicator light is also connected in series between the drain of the fourth field effect tube and the ground.

6. The power bank disconnection detection circuit according to claim 1, characterized in that: It also includes a communication module, which is connected to the I / O_3 pin of the main control chip.

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