Diode structure and method for preparing diode structure

Abstract

The present application discloses a diode structure and a method for preparing the diode structure. The diode structure includes a substrate and a first epitaxial layer, a second epitaxial layer and a first conductive layer stacked on the substrate, wherein the first epitaxial layer and the second epitaxial layer have the same doping type. The diode structure also includes a plurality of first injection regions spaced apart in the first epitaxial layer and in contact with the second epitaxial layer; a plurality of second injection regions are located in the second epitaxial layer and are respectively in contact with the first injection regions and the first conductive layer, wherein the first injection regions correspond one to one with the second injection regions; at least one third injection region is located in the second epitaxial layer between adjacent second injection regions, and the third injection region is in contact with the first conductive layer; wherein the first injection region, the second injection region and the third injection region have the same doping type and are different from the doping type of the first epitaxial layer, so as to solve the problems of weak product performance advantages and complex process flow of diode devices in related technologies.

Description

Technical Field

[0001] The present application relates to the field of semiconductors, and in particular to a diode structure and a method for preparing the diode structure. Background Art

[0002] At present, with the development of microelectronic devices towards low power consumption, high voltage resistance and high reliability, the requirements for semiconductor materials are gradually increasing. Microelectronic devices are increasingly used in special environments such as high temperature, high radiation, high frequency and high power. In order to meet the application of microelectronic devices in the fields of high temperature resistance and radiation resistance, new semiconductor materials need to be developed to maximize the performance of microelectronic devices. Traditional silicon devices and gallium arsenide devices limit the improvement of device and system performance. The third-generation semiconductor materials represented by silicon carbide (SiC) and gallium nitride (GaN) have become ideal semiconductor materials for making high temperature resistant, high power and radiation resistant electronic devices due to the advantages of the wide bandgap and high critical breakdown electric field of the materials themselves. The SiC-based devices currently under study include high temperature and power SiC devices, microwave and high frequency SiC devices, SiC optoelectronic devices, radiation resistant devices, etc. The critical breakdown field strength of SiC materials is 10 times that of Si materials, the bandgap and thermal conductivity of SiC are both 3 times that of Si materials, and the concentration of intrinsic carriers is only one-tenth of that of silicon materials. These excellent physical properties make semiconductor power devices made of SiC materials have great advantages in high frequency, high temperature, high power and high radiation environments. SiC can form different crystal structures under different environments. The three commonly used crystal structures are 3C-SiC, 4H-SiC and 6H-SiC. 4H-SiC material has become the mainstream material for manufacturing semiconductor devices due to its higher bandgap width and hole mobility and lower intrinsic carrier concentration.

[0003] At present, the SiC diode device structure has not been optimized according to the material characteristics of SiC, resulting in no obvious performance advantage over Si devices in some parameters. In terms of process flow, SiC diodes have adopted the traditional process of Si diodes. Affected by the characteristics of SiC materials, the process flow is complicated and requires the use of special equipment (for Al ion implantation, special implantation equipment is required), resulting in high production costs. Summary of the invention

[0004] The present application provides a diode structure and a method for preparing the diode structure to solve the problems of weak product performance advantages and complex process flow of diode devices in related technologies.

[0005] According to one aspect of the present application, a diode structure is provided, comprising a substrate and a first epitaxial layer, a second epitaxial layer and a first conductive layer stacked on the substrate, wherein the first epitaxial layer and the second epitaxial layer have the same doping type, and the diode structure also includes: a plurality of first injection regions, the plurality of first injection regions are arranged at intervals in the first epitaxial layer and contact the second epitaxial layer; a plurality of second injection regions, the second injection regions are located in the second epitaxial layer and contact the first injection regions and the first conductive layer respectively, wherein the first injection regions correspond one-to-one to the second injection regions; at least one third injection region, the third injection region is located in the second epitaxial layer between adjacent second injection regions, and the third injection region contacts the first conductive layer; wherein the first injection region, the second injection region and the third injection region have the same doping type, and are different from the doping type of the first epitaxial layer.

[0006] Optionally, in the first direction, the length of the first injection region is greater than the length of the second injection region, and in the second direction, the length of the first injection region is less than the length of the second injection region, wherein the first direction is a direction parallel to a plane in which the first epitaxial layer contacts the second epitaxial layer, and the second direction is a direction perpendicular to a plane in which the first epitaxial layer contacts the second epitaxial layer.

[0007] Optionally, a length of the third injection region in a third direction is greater than a length of the second injection region, and the third direction is a direction parallel to a plane in which the first epitaxial layer contacts the second epitaxial layer.

[0008] Optionally, the doping concentrations of the first injection region, the second injection region and the third injection region are all 10 14 cm -3 ~10 16 cm -3 .

[0009] Optionally, the first conductive layer includes a first conductive part, a second conductive part and a third conductive part, wherein the first conductive part contacts the second injection region, the second conductive part contacts the third injection region, and the third conductive part contacts the first conductive part and the second conductive part, respectively.

[0010] Optionally, the first conductive portion, the second conductive portion and the third conductive portion have different work functions.

[0011] Optionally, the doping concentration of the second epitaxial layer is greater than the doping concentration of the first epitaxial layer.

[0012] According to another aspect of the present application, a method for preparing a diode structure is provided, comprising: providing the substrate; forming a first epitaxial layer and a plurality of first injection regions on the substrate, the plurality of first injection regions being arranged at intervals in the first epitaxial layer; forming a second epitaxial layer, a plurality of second injection regions and a third injection region on a side of the first epitaxial layer and the first injection region away from the substrate, wherein the second injection region is located in the second epitaxial layer and in contact with the first injection region, the second injection region corresponds one-to-one to the first injection region, and the third injection region is located in the second epitaxial layer between adjacent second injection regions; forming a first conductive layer on a side of the second epitaxial layer away from the substrate, the first conductive layer being in contact with the second injection region, the third injection region and the second epitaxial layer located between adjacent second injection regions, respectively.

[0013] Optionally, the process of forming the first implantation region, the second implantation region and the third implantation region comprises an ion implantation process.

[0014] Optionally, the step of forming the first conductive layer includes: forming a first conductive portion on a side of the second injection region facing away from the substrate using a deposition process; forming a second conductive portion between adjacent first conductive portions using a deposition process; and forming a third conductive portion on a side of the first conductive portion and the second conductive portion facing away from the substrate using a deposition process, wherein the first conductive portion, the second conductive portion and the third conductive portion have different work functions.

[0015] Through the technical solution of the present application, a diode structure is provided, which adopts a multiple epitaxial scheme to form a first epitaxial layer and a second epitaxial layer, and has a first injection region in the first epitaxial layer, that is, a buried layer is formed inside the epitaxial layer, which improves the high-voltage resistance of the diode structure. In addition, the depth of the second injection region is greater than the depth of the third injection region, the second injection region is a deep injection region, and the third injection region is a shallow injection region. A combination structure of a deep injection region and a shallow injection region is formed on the second epitaxial layer, which can greatly reduce the leakage current of the diode structure. Therefore, the above-mentioned diode structure can enhance the product performance advantages. In addition, through the double-layer epitaxial structure of the first epitaxial layer and the second epitaxial layer, the process flow is simplified and the production cost is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0017] Figure 1 is a schematic cross-sectional structure diagram of a diode structure provided according to an embodiment of the present application;

[0018] Figure 2 is a schematic cross-sectional structure diagram of another diode structure provided according to an embodiment of the present application;

[0019] Figure 3 is a schematic cross-sectional structure diagram of another diode structure provided according to an embodiment of the present application;

[0020] Figure 4 is a schematic cross-sectional structure diagram of another diode structure provided according to an embodiment of the present application;

[0021] Figure 5 is a flow chart of a method for preparing a diode structure provided according to an embodiment of the present application;

[0022] Figure 6 It is a schematic diagram of a cross-sectional structure of a substrate provided in a method for preparing a diode structure provided in an embodiment of the present application;

[0023] Figure 7 is Figure 6 A schematic cross-sectional structure diagram of a substrate after a first epitaxial layer is formed on the substrate shown;

[0024] Figure 8 is Figure 7 The schematic cross-sectional structure diagram of the substrate after the first implantation region is formed in the first epitaxial layer is shown;

[0025] Fig. 9 is Figure 8 A schematic cross-sectional structure diagram of a substrate after a second epitaxial layer is formed on the first epitaxial layer;

[0026] Fig.10 is Fig. 9 The schematic cross-sectional structure diagram of the substrate after the second implantation region is formed in the second epitaxial layer shown;

[0027] Fig.11 is Fig.10 The schematic cross-sectional structure diagram of the substrate after the third implantation region is formed in the second epitaxial layer is shown;

[0028] Fig.12 According to an embodiment of the present application, a Fig.11 A schematic cross-sectional structure diagram of a substrate after a first conductive layer is formed on the second epitaxial layer shown;

[0029] Fig.13 is Fig.12 A schematic cross-sectional structure diagram of the substrate after a second conductive layer is formed on the substrate and a dielectric layer is formed on the second epitaxial layer;

[0030] Fig.14 According to the embodiment of the present application, another Fig.11A schematic diagram of the cross-sectional structure of the substrate after the first conductive portion is formed on the first injection region shown;

[0031] Fig.15 is Fig.14 A schematic diagram of the cross-sectional structure of the substrate after the second conductive portion is formed on the second injection region shown;

[0032] Fig.16 is Fig.15 A schematic cross-sectional structure diagram of the substrate after the third conductive part is formed on the first conductive part and the second conductive part;

[0033] Fig.17 is Fig.16 The cross-sectional structure diagram of the base body is shown after a second conductive layer is formed on the substrate and a dielectric layer is formed on the second epitaxial layer.

[0034] The above drawings include the following reference numerals:

[0035] 10. substrate; 20. first epitaxial layer; 30. second epitaxial layer; 40. first conductive layer; 41. first conductive portion; 42. second conductive portion; 43. third conductive portion; 44. second conductive layer; 51. first injection region; 52. second injection region; 53. third injection region; 60. dielectric layer. DETAILED DESCRIPTION

[0036] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0037] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0038] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0039] As described in the background technology, the current SiC diode device structure has not been optimized for the material properties of SiC, resulting in no obvious performance advantage in some parameters compared to Si devices. The SiC diode uses the traditional process of Si diodes in the process flow. Affected by the characteristics of SiC materials, the process flow is complicated and requires the use of special equipment (for Al ion implantation, special implantation equipment is required), resulting in high production costs. In order to solve the above technical problems, the present application provides a diode structure and a method for preparing the diode structure.

[0040] According to one aspect of the present application, a diode structure is provided, such as Figure 1As shown, it includes a substrate 10 and a first epitaxial layer 20, a second epitaxial layer 30 and a first conductive layer 40 stacked on the substrate 10, wherein the first epitaxial layer 20 and the second epitaxial layer 30 have the same doping type, and the diode structure also includes: a plurality of first injection regions 51, the plurality of first injection regions 51 are arranged at intervals in the first epitaxial layer 20 and contact the second epitaxial layer 30; a plurality of second injection regions 52, the second injection regions 52 are located in the second epitaxial layer 30 and contact the first injection regions 51 and the first conductive layer 40 respectively, wherein the first injection regions 51 correspond to the second injection regions 52 one by one; at least one third injection region 53, the third injection region 53 is located in the second epitaxial layer 30 between adjacent second injection regions 52, and the third injection region 53 contacts the first conductive layer 40; wherein the first injection region 51, the second injection region 52 and the third injection region 53 have the same doping type, and are different from the doping type of the first epitaxial layer 20. The diode structure adopts a multiple epitaxial scheme to form the first epitaxial layer 20 and the second epitaxial layer 30, and has a first injection region 51 in the first epitaxial layer 20, that is, a buried layer is formed inside the epitaxial layer, which improves the high voltage resistance of the diode structure. In addition, the depth of the second injection region 52 is greater than the depth of the third injection region 53, the second injection region 52 is a deep injection region, and the third injection region 53 is a shallow injection region. A combination structure of a deep injection region and a shallow injection region is formed on the second epitaxial layer 30, which can greatly reduce the leakage current of the diode structure. Therefore, the diode structure can enhance the product performance advantages. In addition, through the double-layer epitaxial structure of the first epitaxial layer 20 and the second epitaxial layer 30, the process flow is simplified and the production cost is reduced.

[0041] In some optional embodiments, such as Figure 1 As shown, in the first direction A, the length of the first injection region 51 is greater than the length of the second injection region 52, and in the second direction B, the length of the first injection region 51 is less than the length of the second injection region 52, wherein the first direction A is a direction parallel to the plane in which the first epitaxial layer 20 contacts the second epitaxial layer 30, and the second direction B is a direction perpendicular to the plane in which the first epitaxial layer 20 contacts the second epitaxial layer 30.

[0042] Specifically, Figure 1 As shown, in the second direction B, the first injection region 51 and the second injection region 52 have the same doping type, and the doping types of the first injection region 51 and the second injection region 52 are opposite to those of the first epitaxial layer 20, then a first PN junction structure is formed in the area where the first injection region 51 contacts the first epitaxial layer 20, and the second injection region 52 and the first conductive layer 40 can form a Schottky contact to reduce the forward voltage drop of the diode device.

[0043] Among them, since the first injection region 51 has a wider width in the first direction A and a shallower depth in the second direction B, the contact area of ​​the first PN junction structure can be increased, and when the diode structure is under the action of a large current, the contact area of ​​the Schottky contact is also increased. When a large forward voltage is applied to the diode structure, the first PN junction structure will be turned on and minority carriers will be injected into the first epitaxial layer 20, thereby reducing the resistance of the diode structure and reducing the forward voltage drop. In addition, there are multiple first PN junction structures in the above-mentioned diode structure, which have a shunting effect when a forward voltage is applied, effectively improving the breakdown voltage of the diode structure.

[0044] In some optional embodiments, the length of the third injection region 53 in the third direction is greater than that of the second injection region 52 , and the third direction is a direction parallel to the plane in which the first epitaxial layer 20 contacts the second epitaxial layer 30 .

[0045] Specifically, the third injection region 53 and the second epitaxial layer 30 form a second PN junction structure, and the first PN junction structure and the second PN junction structure have the same function. When the above-mentioned diode structure is reverse biased, the depletion region of the second PN junction structure forms a conductive state, and the potential barrier formed after the depletion region is turned on will increase the flow of carriers in the depletion region, thereby reducing the reverse leakage current; when the diode structure is forward biased, the second PN junction structure has a very low turn-on voltage, and when the diode structure is forward biased and the current is large, the third injection region 53 has a wider width, and the second PN junction structure can transport more minority carriers. Then, due to the conductivity modulation effect, the second PN junction structure can more significantly reduce the resistance of the diode structure, thereby improving the surge resistance of the diode structure.

[0046] In some optional embodiments, the doping concentrations of the first implantation region 51, the second implantation region 52, and the third implantation region 53 are all 10 14 cm -3 ~10 16 cm -3 .

[0047] Specifically, the doping concentrations of the first injection region 51 , the second injection region 52 , and the third injection region 53 may be different or the same, which is not limited in the present application.

[0048] Wherein, the first conductive layer 40 includes a metal material, and the second injection region 52 and the third injection region 53 can form a metal-semiconductor structure with the first conductive layer 40, that is, a Schottky contact can be formed to increase current conductivity. In addition, when the third injection region 53 has a higher doping concentration, for example, the doping concentration is 10 15 cm -3 ~10 16 cm -3When the third injection region forms an ohmic contact structure with the first conductive layer 40, the on-resistance of the device can be reduced, thereby improving the surge resistance of the diode structure.

[0049] In some optional embodiments, such as Figure 2 As shown, the first conductive layer 40 includes a first conductive portion 41, a second conductive portion 42 and a third conductive portion 43. The first conductive portion 41 contacts the second injection region 52, the second conductive portion 42 contacts the third injection region 53, and the third conductive portion 43 contacts the first conductive portion 41 and the second conductive portion 42 respectively.

[0050] Among them, the first conductive part 41, the second conductive part 42 and the third conductive part 43 all include metal materials, and the metal materials include but are not limited to alloy materials composed of any one or more of silver, copper, aluminum, gold, titanium, platinum, nickel and palladium metals. The metal material has good conductivity and can improve the current transmission efficiency of the diode structure.

[0051] Specifically, the metal-semiconductor structure can form a Schottky contact or an Ohmic contact according to the doping concentration of the semiconductor material. In the Schottky contact, when the metal material and the semiconductor material are in contact, the energy band of the semiconductor material at the contact interface bends to form a Schottky barrier, so that a large number of carriers exist at the interface. Therefore, the Schottky contact can reduce the forward voltage drop of the diode structure and increase the breakdown voltage. The Ohmic contact is based on the metal-semiconductor structure, in which the semiconductor material has a higher doping concentration, and the carriers can pass through the barrier with the help of the tunnel effect. Therefore, the Ohmic contact has a lower resistance and improves the surge resistance of the diode structure.

[0052] In the above embodiment, the first conductive part 41 and the second conductive part 42 are metal structures in a metal-semiconductor structure. Those skilled in the art can match metal materials with semiconductor materials in the injection region to form Schottky contacts or ohmic contacts according to product functional requirements to achieve product functional requirements.

[0053] In the above embodiment, the third conductive portion 43 is used as thickened metal in the first conductive layer 40 , which not only improves the conductivity, but also supports the diode structure and facilitates packaging.

[0054] In some optional embodiments, the first conductive portion, the second conductive portion, and the third conductive portion have different work functions.

[0055] Specifically, the work function refers to the minimum energy required to move an electron from the inside to the surface, reflecting the ease with which a metal material loses ionization. The work function of a metal material determines the height of the electron barrier between the metal and the semiconductor material, and can affect the transmission properties of electrons in the contact area. In addition, in a diode structure with multiple PN junction structures, metal materials with low work functions can be flexibly selected as the metal structure in the Schottky contact.

[0056] Exemplarily, the first conductive part is metal nickel, the work function of metal nickel is 4.6eV, the second conductive part is metal titanium, the work function of metal titanium is 4.33eV, and the third conductive part is metal aluminum 4.1eV. Among them, the metal nickel material forms a Schottky contact with the second injection region, and the metal titanium also forms a Schottky contact with the third injection region, which reduces the on-resistance and forward voltage drop of the diode structure. The metal aluminum has good conductivity and improves the current transmission efficiency of the diode structure.

[0057] In some optional embodiments, the first conductive layer includes a first conductive portion and a second conductive portion, and the first conductive portion and the second conductive portion have different work functions to reduce the thickness of the diode device.

[0058] In some other optional embodiments, the doping concentration of the second epitaxial layer is greater than the doping concentration of the first epitaxial layer.

[0059] Exemplarily, the first epitaxial layer and the second epitaxial layer are N-type epitaxial layers, and the second epitaxial layer has a higher doping concentration. When the second epitaxial layer is in contact with the first conductive layer, the higher the doping concentration of the second epitaxial layer, the smaller the transition barrier of the power device, the smaller the on-resistance of the power device, and the lower the on-voltage of the device. In addition, the doping concentration of the second epitaxial layer is greater than the doping concentration of the first epitaxial layer, that is, a doping gradient is formed between the first epitaxial layer and the second epitaxial layer, which can slow down the transition barrier of carriers moving in the epitaxial layer, promote the movement of carriers, reduce the forward voltage drop of the device, increase the withstand voltage of the device, and improve the reliability and stability of the device. At the same time, the electric field distribution in the diode structure can also be optimized, the performance of the device can be improved, and the efficiency and performance indicators of the device can be improved. By designing the doping concentration of the first epitaxial layer and the first sub-epitaxial portion, precise control of the electric field can also be achieved, thereby improving the performance and characteristics of the device.

[0060] In some optional embodiments, such as Figure 3 and Figure 4 As shown, a second conductive layer 44 is formed on the side of the substrate away from the first epitaxial layer 20 to form an ohmic contact with the substrate 10, thereby improving the surge capability of the device and reducing the forward voltage drop.

[0061] According to another aspect of the present application, a method for preparing a diode structure is provided, such as Figure 5As shown, including:

[0062] Step S101: providing a substrate;

[0063] Step S102: forming a first epitaxial layer and a plurality of first implantation regions on a substrate, wherein the plurality of first implantation regions are arranged at intervals in the first epitaxial layer;

[0064] Step S103: forming a second epitaxial layer, a plurality of second implantation regions and a third implantation region on a side of the first epitaxial layer and the first implantation region facing away from the substrate, wherein the second implantation region is located in the second epitaxial layer and in contact with the first implantation region, the second implantation region corresponds to the first implantation region one by one, and the third implantation region is located in the second epitaxial layer between adjacent second implantation regions;

[0065] Step S104: forming a first conductive layer on a side of the second epitaxial layer facing away from the substrate, the first conductive layer respectively contacting the second implantation region, the third implantation region and the second epitaxial layer located between adjacent second implantation regions.

[0066] The above-mentioned preparation method of the embodiment of the present application is adopted, on the basis of the traditional diode structure, multiple epitaxial processes are adopted to form a double-layer epitaxy of the first epitaxial layer and the second epitaxial layer, and at the same time, a first injection region is formed in the first epitaxial layer, that is, a buried layer is formed inside the epitaxial layer, which reduces the number of ion injections, simplifies the process, reduces the production and manufacturing costs, and can also improve the high-voltage resistance of the diode structure. In addition, the depth of the second injection region formed is greater than the depth of the third injection region, the second injection region is a deep injection region, and the third injection region is a shallow injection region. A combination structure of a deep injection region and a shallow injection region is formed on the second epitaxial layer, which can greatly reduce the leakage current of the diode structure. Therefore, the preparation method of the above-mentioned diode structure simplifies the process flow while improving the product performance advantages.

[0067] The following will describe in more detail the exemplary embodiments of the method for preparing the diode structure provided by the present application in conjunction with the accompanying drawings. However, these exemplary embodiments can be implemented in a variety of different forms and should be interpreted as being limited to the embodiments described herein. It should be understood that these embodiments are provided to make the disclosure of the present application thorough and complete, and to fully convey the concepts of these exemplary embodiments to those of ordinary skill in the art.

[0068] First, if Figure 6 As shown, step S101 is performed: providing a substrate 10 .

[0069] Specifically, the material of the substrate 10 includes silicon carbide, silicon, quartz, silicon nitride, gallium nitride, gallium oxide, aluminum oxide, aluminum nitride and the like. Personnel skilled in the art can make reasonable selections according to actual needs, and no specific limitation is made without application.

[0070] After the step of providing a substrate, as Figures 7 and 8 As shown, step S102 is performed: a first epitaxial layer 20 and a plurality of first implantation regions 51 are formed on the substrate 10;

[0071] The doping type of the first epitaxial layer 20 is the same as the doping type of the substrate 10 , and the doping type of the first epitaxial layer 20 is smaller than the doping type of the substrate 10 .

[0072] Specifically, a plurality of first injection regions 51 are arranged in the first epitaxial layer 20 at intervals. The doping type of the first injection region 51 is different from the doping type of the first epitaxial layer 20. The doping concentration of the first injection region is 10 14 cm -3 ~10 16 cm -3 A PN junction structure is formed between the first injection region 51 and the first epitaxial layer 20. After the diode structure is turned on, multiple PN junction structures can achieve shunting effect and have strong surge resistance. Those skilled in the art can flexibly select metal materials with low work function as metal materials in Schottky contacts.

[0073] Then, if Figures 9 to 11 As shown, step S103 is performed: a second epitaxial layer 30, a plurality of second implantation regions 52 and a third implantation region 53 are formed on the side of the first epitaxial layer 20 and the first implantation region 51 away from the substrate 10;

[0074] Specifically, the materials of the first epitaxial layer 20 and the second epitaxial layer 30 may include silicon carbide, silicon, quartz, silicon nitride, gallium nitride, gallium oxide, aluminum oxide, aluminum nitride and other materials. Personnel in the art can make reasonable selections according to actual needs, and no specific limitation is made without application. Exemplarily, the materials of the first epitaxial layer 20 and the second epitaxial layer 30 are silicon carbide materials, which can improve the problem that the product performance advantages of SiC diode devices are not obvious in some parameters.

[0075] In some optional embodiments, the first injection region 51, the second injection region 52 and the third injection region 53 have the same doping concentration, and the doping concentration of the second injection region 52 and the third injection region 53 is 10 14 cm -3 ~10 16 cm -3 .

[0076] In other optional embodiments, the process of forming the first epitaxial layer 20 and the second epitaxial layer 30 includes but is not limited to a deposition process and an epitaxial growth process. In the epitaxial growth process, the doping concentration of impurities is relatively easy to control, and the activation rate is relatively fixed, and it is easy to achieve the target doping distribution, which is not only suitable for silicon-based power devices, but also can avoid the difficulty of injection doping of silicon carbide power devices and improve the efficiency of their terminal structures. The deposition process is relatively mature, simple to operate, and has a low cost. Among them, the deposition process includes but is not limited to physical vapor deposition (PVD), chemical vapor deposition (CVD) and atomic layer deposition (ALD), among which physical vapor deposition (PVD) includes but is not limited to magnetron sputtering process, reactive sputtering process, DC sputtering process, AC sputtering process, vacuum coating process, arc evaporation process, chemical vapor deposition (CVD) includes but is not limited to plasma enhanced chemical vapor deposition (PECVD), metal organic chemical vapor deposition (MOCVD), laser induced chemical vapor deposition (LCVD), and those skilled in the art can make reasonable selections according to actual needs, and no specific limitation is made without application.

[0077] In an optional embodiment, the first injection region 51 has a shallow depth and a wide width, which increases the contact area of ​​the PN junction structure. When the diode structure is under the action of a large current, the contact area of ​​the Schottky contact is increased, thereby reducing the resistance of the diode structure, reducing the forward voltage drop, and increasing the breakdown voltage of the diode structure. The third injection region 53 also has a wide width, which also increases the contact area of ​​the PN junction structure, reduces the resistance of the diode structure, reduces the forward voltage drop, and increases the breakdown voltage of the diode structure.

[0078] In an optional embodiment, the process of forming the first implantation region 51 , the second implantation region 51 , and the third implantation region 53 includes an ion implantation process.

[0079] Specifically, for silicon carbide materials, the carbon-silicon bond energy is relatively high, and impurity atoms are difficult to diffuse in silicon carbide materials. The ion implantation process is a method of adding a certain amount and type of impurities into semiconductor materials to change the electrical properties. The ion implantation process has a low injection temperature, and can flexibly and accurately control the doping distribution, which can reduce the damage of high temperature to silicon carbide materials and improve the doping efficiency. However, the cost of ion implantation is relatively expensive and the cost is relatively high. The diode structure of the present application uses a double-layer epitaxial material to form a first epitaxial layer and a second epitaxial layer, which can reduce the number of ion implantations, simplify the process, and reduce the production cost. In addition, the ion implantation process does not require high-temperature treatment, that is, it can achieve precise control of the concentration and depth of the implanted ions, while achieving precise doping, it can avoid damage and deformation of the material structure. The ion implantation process can accurately control the doping concentration and depth of the implanted area.

[0080] Then, if Figures 12 to 17 As shown, step S103 is performed: a first conductive layer 40 is formed on a side of the second epitaxial layer 30 facing away from the substrate 10;

[0081] In some optional embodiments, the deposition process includes but is not limited to physical vapor deposition (PVD), chemical vapor deposition (CVD) and atomic layer deposition (ALD), wherein physical vapor deposition (PVD) includes but is not limited to magnetron sputtering process, reactive sputtering process, DC sputtering process, AC sputtering process, vacuum coating process, arc evaporation process, chemical vapor deposition (CVD) includes but is not limited to plasma enhanced chemical vapor deposition (PECVD), metal organic compound chemical vapor deposition (MOCVD), laser induced chemical vapor deposition (LCVD), and technicians in this field can make reasonable selections according to actual needs, and no specific limitation is made without application.

[0082] In an optional embodiment, if Fig.16 As shown, a deposition process is used to form a first conductive portion 41 on a side of the second injection region facing away from the substrate, a deposition process is used to form a second conductive portion 42 between adjacent first conductive portions 41, and a deposition process is used to form a third conductive portion 43 on a side of the first conductive portion 41 and the second conductive portion 42 facing away from the substrate 10, wherein the first conductive portion 41, the second conductive portion 42 and the third conductive portion 43 have different work functions.

[0083] In the above embodiment, the first conductive part 41, the second conductive part 42 and the third conductive part 43 all include metal materials, and the metal materials include but are not limited to alloy materials composed of any one or more of silver, copper, aluminum, gold, titanium, platinum, nickel and palladium metals. The metal material has good conductivity and can improve the current transmission efficiency of the diode structure.

[0084] Specifically, the first conductive part 41 and the second conductive part 42 form a metal structure in a metal-semiconductor structure. The metal-semiconductor structure can form a Schottky contact or an ohmic contact according to the doping concentration of the semiconductor material. In the Schottky contact, when the metal material and the semiconductor material are in contact, the energy band of the semiconductor material at the contact interface bends to form a Schottky barrier, so that a large number of carriers exist at the interface. Therefore, the Schottky contact can reduce the forward voltage drop of the diode structure and increase the breakdown voltage. The ohmic contact is based on the metal-semiconductor and the semiconductor material has a higher doping concentration. The carriers can pass through the barrier with the help of the tunnel effect. Therefore, the ohmic contact has a lower resistance and improves the surge resistance of the diode structure. The third conductive part acts as a thickened metal in the first conductive layer. On the one hand, it improves the conductivity, and on the other hand, it supports the diode structure and facilitates packaging.

[0085] In the above embodiment, the first conductive portion 41 , the second conductive portion 42 and the third conductive portion 43 have different work functions, which reduces the on-resistance and forward voltage drop of the diode structure while improving the current transmission efficiency of the diode structure.

[0086] The diode structure formed by the method for preparing the diode structure of the present application will be described below in conjunction with an embodiment.

[0087] Example 1

[0088] The method for preparing the diode structure provided in this embodiment comprises the following steps:

[0089] Provide an N-type SiC substrate 10, such as Figure 6 As shown;

[0090] An N-type SiC first epitaxial layer 20 is formed on the N-type SiC substrate 10 by using an epitaxial growth process. Figure 7 As shown;

[0091] An ion implantation process is used to form two spaced apart P-type first implantation regions 51 on the side of the N-type SiC first epitaxial layer 20 facing away from the substrate. Figure 8 As shown;

[0092] An N-type SiC second epitaxial layer 30 is formed on the side of the N-type SiC first epitaxial layer 20 and the P-type first implantation region 51 away from the N-type SiC substrate 10 by using an epitaxial growth process. Fig. 9 As shown;

[0093] Two P-type second implantation regions 52 are formed in the N-type SiC second epitaxial layer 30 by using an ion implantation process. The P-type second implantation regions 52 are in contact with the P-type first implantation regions 51. Fig.10 As shown;

[0094] An ion implantation process is used to form a P-type third implantation region 53 in the N-type SiC second epitaxial layer 30 between adjacent P-type second implantation regions 52, such as Fig.11 As shown;

[0095] A metal aluminum layer is deposited on the P-type second implantation region 52, the P-type third implantation region 53 and the N-type SiC second epitaxial layer 30 between the two P-type second implantation regions 52 by a deposition process to form a first conductive layer 40, such as Fig.12 As shown;

[0096] A metal aluminum layer is formed on the side of the N-type SiC substrate 10 away from the N-type SiC first epitaxial layer 20 by a deposition process to form a second conductive layer 44, and a dielectric layer 60 is formed on the side of the N-type SiC second epitaxial layer 30 away from the N-type SiC substrate 10 by a deposition process. Fig.13 shown.

[0097] Example 2

[0098] The method for preparing the diode structure provided in this embodiment comprises the following steps:

[0099] Provide an N-type SiC substrate 10, such as Figure 6 As shown;

[0100] An N-type SiC first epitaxial layer 20 is formed on the N-type SiC substrate 10 by using an epitaxial growth process. Figure 7 As shown;

[0101] An ion implantation process is used to form two spaced apart P-type first implantation regions 51 on the side of the N-type SiC first epitaxial layer 20 facing away from the substrate. Figure 8 As shown;

[0102] An N-type SiC second epitaxial layer 30 is formed on the side of the N-type SiC first epitaxial layer 20 and the P-type first implantation region 51 away from the N-type SiC substrate 10 by using an epitaxial growth process. Fig. 9 As shown;

[0103] Two P-type second implantation regions 52 are formed in the N-type SiC second epitaxial layer 30 by using an ion implantation process. The P-type second implantation regions 52 are in contact with the P-type first implantation regions 51. Fig.10 As shown;

[0104] An ion implantation process is used to form a P-type third implantation region 53 in the N-type SiC second epitaxial layer 30 between adjacent P-type second implantation regions 52, such as Fig.11 As shown;

[0105] A metal nickel material is deposited on the side of the P-type second implantation region 52 away from the N-type SiC substrate 10 by a deposition process to form a first conductive portion 41. Fig.14 As shown;

[0106] A metal titanium material is deposited on the side of the N-type SiC second epitaxial layer 30 and the P-type third implantation region 53 facing away from the N-type SiC substrate 10 between the adjacent P-type second implantation regions 52 by a deposition process to form a second conductive portion 42, such as Fig.15 As shown;

[0107] A metal aluminum material is deposited on the side of the first conductive portion 41 and the second conductive portion 42 away from the N-type SiC substrate 10 by a deposition process to form a third conductive portion 43. Fig.16 As shown;

[0108] A metal aluminum layer is formed on the side of the N-type SiC substrate 10 away from the N-type SiC first epitaxial layer 20 by a deposition process to form a second conductive layer 44, and a dielectric layer 60 is formed on the side of the N-type SiC second epitaxial layer 30 away from the N-type SiC substrate 10 by a deposition process. Fig.17 shown.

[0109] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0110] The above are only embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included within the scope of the claims of the present application.

Claims

1. A diode structure, characterized in that: The diode structure comprises a substrate and a first epitaxial layer, a second epitaxial layer and a first conductive layer stacked on the substrate, wherein the first epitaxial layer and the second epitaxial layer have the same doping type, and the diode structure further comprises: A plurality of first implantation regions, wherein the plurality of first implantation regions are arranged at intervals in the first epitaxial layer and contact the second epitaxial layer; a plurality of second implantation regions, wherein the second implantation regions are located in the second epitaxial layer and are in contact with the first implantation regions and the first conductive layer respectively, wherein the first implantation regions correspond to the second implantation regions one by one; at least one third implantation region, the third implantation region being located in the second epitaxial layer between adjacent second implantation regions and contacting the first conductive layer; Wherein, the first implantation region, the second implantation region and the third implantation region have the same doping type, and are different from the doping type of the first epitaxial layer; The first conductive layer includes a first conductive portion, a second conductive portion and a third conductive portion, wherein the first conductive portion contacts the second injection region, the second conductive portion contacts the third injection region, and the third conductive portion contacts the first conductive portion and the second conductive portion respectively; The length of the first injection region in a first direction is greater than the length of the second injection region, and the length of the first injection region in a second direction is less than the length of the second injection region, wherein the first direction is a direction parallel to a plane in contact with the first epitaxial layer and the second epitaxial layer, and the second direction is a direction perpendicular to a plane in contact with the first epitaxial layer and the second epitaxial layer; The length of the third injection region in a third direction is greater than that of the second injection region, and the third direction is a direction parallel to a plane in which the first epitaxial layer contacts the second epitaxial layer.

2. The diode structure according to claim 1, characterized in that: The doping concentrations of the first injection region, the second injection region and the third injection region are all 10 14 cm -3 ~10 16 cm -3 .

3. The diode structure according to claim 1, characterized in that: The first conductive portion, the second conductive portion, and the third conductive portion have different work functions.

4. The diode structure according to claim 1, characterized in that: The doping concentration of the second epitaxial layer is greater than the doping concentration of the first epitaxial layer.

5. A method for preparing a diode structure according to any one of claims 1 to 4, characterized in that: include: providing the substrate; forming a first epitaxial layer and a plurality of first implantation regions on the substrate, wherein the plurality of first implantation regions are arranged at intervals in the first epitaxial layer; A second epitaxial layer, a plurality of second injection regions and a third injection region are formed on a side of the first epitaxial layer and the first injection region away from the substrate, wherein the second injection region is located in the second epitaxial layer and in contact with the first injection region, the second injection region corresponds to the first injection region one by one, and the third injection region is located in the second epitaxial layer between adjacent second injection regions; forming a first conductive layer on a side of the second epitaxial layer facing away from the substrate, wherein the first conductive layer is in contact with the second injection region, the third injection region and the second epitaxial layer located between adjacent second injection regions respectively; The length of the first injection region in a first direction is greater than the length of the second injection region, and the length of the first injection region in a second direction is less than the length of the second injection region, wherein the first direction is a direction parallel to a plane in contact with the first epitaxial layer and the second epitaxial layer, and the second direction is a direction perpendicular to a plane in contact with the first epitaxial layer and the second epitaxial layer; The length of the third injection region in a third direction is greater than that of the second injection region, and the third direction is a direction parallel to a plane in which the first epitaxial layer contacts the second epitaxial layer.

6. The preparation method according to claim 5, characterized in that: The process of forming the first implant region, the second implant region, and the third implant region includes an ion implantation process.

7. The preparation method according to claim 5, characterized in that: The step of forming the first conductive layer comprises: forming a first conductive portion on a side of the second injection region away from the substrate by a deposition process; forming a second conductive portion between adjacent first conductive portions by a deposition process; A third conductive portion is formed on a side of the first conductive portion and the second conductive portion facing away from the substrate by using a deposition process, wherein the first conductive portion, the second conductive portion and the third conductive portion have different work functions.

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