A data reading and writing method and system based on SATA and PCIe mixed plug-in interface

Abstract

The present invention relates to the field of data communication, and discloses a data reading and writing method and system based on a SATA and PCIe mixed plug-in interface, the method comprising: constructing a PCB layout of a SATA and PCIe mixed plug-in interface; calculating the signal integrity and electromagnetic compatibility of the PCB layout, and constructing an interface data reading and writing system of a SATA and PCIe mixed plug-in interface; analyzing the request characteristics of an interface read and write request, calculating the interface load of the interface corresponding to the interface of the interface data reading and writing system, and selecting the data transmission interface of the interface read and write request by using an intelligent routing module in the interface data reading and writing system; constructing an aggregate interface of an interface read and write request; identifying the request read and write mode of the interface read and write request, migrating the read and write data corresponding to the interface read and write request to the aggregate interface, obtaining the interface read and write data, and executing the data reading and writing of the SATA and PCIe mixed plug-in interface according to the interface read and write data. The present invention can improve the data reading and writing efficiency of the SATA and PCIe mixed plug-in interface.

Description

Technical Field

[0001] The present invention relates to the field of data communication, and in particular to a data reading and writing method and system based on a SATA and PCIe mixed plug-in interface. Background Art

[0002] SATA (Serial ATA) and PCIe (Peripheral Component Interconnect Express) mixed interface data reading and writing refers to the use of SATA and PCIe interfaces for data transmission and storage operations in a storage system. It achieves efficient and flexible data storage and management by taking advantage of the advantages of both SATA and PCIe interfaces.

[0003] Currently, traditional data reading and writing methods usually rely on a single interface type of SATA and PCIe interfaces, lack intelligent data routing and caching strategies, and are difficult to adapt to different data access modes, resulting in insufficient resource utilization and high energy consumption. Summary of the invention

[0004] The present invention provides a data reading and writing method and system based on a SATA and PCIe mixed plug-in interface, the main purpose of which is to improve the data reading and writing efficiency of the SATA and PCIe mixed plug-in interface.

[0005] To achieve the above object, the present invention provides a data reading and writing method based on a SATA and PCIe mixed plug-in interface, comprising:

[0006] Analyze the data read and write requirements of the SATA and PCIe mixed plug-in interface, determine the bridge chip of the SATA and PCIe mixed plug-in interface, and construct the PCB layout of the SATA and PCIe mixed plug-in interface according to the data read and write requirements and the bridge chip;

[0007] Calculating the signal integrity and electromagnetic compatibility of the PCB layout, and when the signal integrity and electromagnetic compatibility both meet the preset signal integrity threshold and electromagnetic compatibility threshold, constructing the interface data reading and writing system of the SATA and PCIe mixed plug-in interface according to the PCB layout;

[0008] Obtaining an interface read / write request of the interface data read / write system, analyzing request characteristics of the interface read / write request, calculating an interface load of an interface corresponding to the interface of the interface data read / write system, and selecting a data transmission interface of the interface read / write request by using an intelligent routing module in the interface data read / write system according to the request characteristics and the interface load;

[0009] Using the load balancing algorithm and data transmission interface in the interface data reading and writing system, an aggregation interface for the interface reading and writing request is constructed;

[0010] According to the request characteristics, the data migration model in the interface data read and write system is used to identify the request read and write mode of the interface read and write request, and according to the request read and write mode, the read and write data corresponding to the interface read and write request is migrated to the aggregation interface to obtain the interface read and write data, and the data reading and writing of the SATA and PCIe mixed plug-in interface are performed according to the interface read and write data.

[0011] Optionally, constructing the PCB layout of the SATA and PCIe mixed plug-in interface according to the data reading and writing requirements and the bridge chip includes:

[0012] Based on the data reading and writing requirements, determining the chip specifications of the bridge chip;

[0013] Analyze the number of SATA interfaces and the number of PCIe interfaces of the SATA and PCIe mixed interface according to the chip specifications and data reading and writing requirements;

[0014] Based on the data reading and writing requirements, define the component architecture of the SATA and PCIe mixed plug-in interface;

[0015] Constructing a multi-layer PCB layout plan for the SATA and PCIe mixed interfaces based on the number of SATA interfaces, the number of PCIe interfaces, and the component architecture;

[0016] According to the multi-layer PCB layout plan, construct a wiring diagram of the SATA and PCIe mixed plug-in interface;

[0017] Based on the multi-layer PCB layout plan and wiring diagram, a PCB layout of the SATA and PCIe mixed plug-in interface is constructed.

[0018] Optionally, calculating the signal integrity and electromagnetic compatibility of the PCB layout includes:

[0019] Establishing a PCB circuit model of the PCB layout and defining analog signal characteristics of the PCB circuit model;

[0020] Based on the analog signal characteristics, construct an analog signal of the PCB circuit model;

[0021] Using the PCB circuit model to perform transient simulation on the analog signal to obtain a transient simulation result;

[0022] Calculating the distortion state of the analog signal according to the transient simulation result;

[0023] Analyzing the signal integrity of the PCB layout through the distortion state;

[0024] Establishing an electromagnetic field simulation model of the PCB layout;

[0025] Constructing electromagnetic interference of the electromagnetic field simulation model;

[0026] Analyzing the sensitivity and emission characteristic index of the electromagnetic field simulation model under electromagnetic interference;

[0027] The electromagnetic compatibility of the PCB layout is analyzed based on the sensitivity and emission characteristic index.

[0028] Optionally, analyzing the sensitivity and emission characteristic index of the electromagnetic field simulation model under electromagnetic interference includes:

[0029] Recording electromagnetic interference data of the electromagnetic field simulation model under electromagnetic interference;

[0030] Analyzing the sensitivity parameters and emission characteristic index parameters of the electromagnetic field simulation model according to the electromagnetic interference data;

[0031] Analyzing the conduction coefficient, conduction path length, electromagnetic interference source strength, and PCB power impedance of the electromagnetic field simulation model according to the sensitivity parameters;

[0032] Based on the conduction coefficient, conduction path length, electromagnetic interference source strength and PCB power impedance, the sensitivity of the electromagnetic field simulation model under electromagnetic interference is calculated using the following formula:

[0033] ;

[0034] in, Indicates the sensitivity of the electromagnetic field simulation model under electromagnetic interference, represents the conductivity of the electromagnetic field simulation model, represents the conduction path length of the electromagnetic field simulation model, Represents the electromagnetic interference source strength of the electromagnetic field simulation model, Represents the PCB electrical impedance of the electromagnetic field simulation model;

[0035] Analyzing the receiving sky gain, electromagnetic field radiation power and electromagnetic field distance of the electromagnetic field simulation model through the emission characteristic index parameter;

[0036] Based on the receiving sky gain, electromagnetic field radiation power and electromagnetic field distance, the emission characteristic index of the electromagnetic field simulation model under electromagnetic interference is calculated using the following formula:

[0037] ;

[0038] in, Represents the emission characteristic index of the electromagnetic field simulation model under electromagnetic interference, represents the receiving antenna gain of the electromagnetic field simulation model, represents the electromagnetic field radiation power of the electromagnetic field simulation model, represents the electromagnetic field distance of the electromagnetic field simulation model, Represents pi.

[0039] Optionally, constructing the interface data reading and writing system of the SATA and PCIe mixed plug-in interface according to the PCB layout includes:

[0040] Identifying hardware components of the PCB layout;

[0041] analyzing performance indicators of the hardware components;

[0042] Based on the performance indicators, construct functional software for the PCB layout;

[0043] Analyzing control coefficients of said functional software and hardware components;

[0044] When the control coefficient meets a preset control threshold, the functional software and hardware components are integrated to obtain an integrated data reading and writing system;

[0045] Debugging system parameters of the integrated data reading and writing system, and analyzing the software and hardware coordination coefficient of the integrated data reading and writing system based on the system parameters;

[0046] When the software-hardware synergy coefficient meets a preset synergy threshold, the integrated data reading and writing system is used as an interface data reading and writing system.

[0047] Optionally, the calculating the interface load of the interface corresponding to the interface data reading and writing system includes:

[0048] Determine the load impact factor of the interface corresponding to the interface data reading and writing system;

[0049] Collecting interface load data of the interface corresponding to the interface of the interface data reading and writing system through the load influence factor;

[0050] Calculating the load index of the interface corresponding to the interface of the interface data reading and writing system according to the interface load data;

[0051] Calculating a load indicator weight of the load indicator;

[0052] Based on the load index and the load index weight, an interface load of the interface corresponding to the interface data reading and writing system is determined.

[0053] Optionally, selecting the data transmission interface of the interface read / write request by using the intelligent routing module in the interface data read / write system according to the request characteristics and the interface load includes:

[0054] Analyzing interface performance parameters of the interface data reading and writing system;

[0055] Determining an interface selection rule of the interface data reading and writing system;

[0056] Calculate the interface matching degree of the interface read and write request using the intelligent routing module according to the interface performance parameters, interface load, interface selection rules and request characteristics;

[0057] Analyze the interface quantity requirement of the interface read and write request based on the interface performance parameters and request characteristics;

[0058] The data transmission interface of the interface read / write request is determined according to the interface matching degree and the interface quantity requirement.

[0059] Optionally, the utilizing the load balancing algorithm and the data transmission interface in the interface data reading and writing system to construct an aggregation interface for the interface reading and writing request includes:

[0060] Calculate the resources required for the task of the interface read / write request based on the request characteristics corresponding to the interface read / write request;

[0061] Marking currently available resources of the data transmission interface;

[0062] Based on the resources required for the task and the currently available resources, the target data transmission interface of the interface read / write request is marked using the load balancing algorithm;

[0063] Constructing a virtual interface for the interface read and write request;

[0064] The target data transmission interface is integrated into the virtual interface to obtain an aggregate interface for the interface read and write requests.

[0065] Optionally, the step of migrating the read / write data corresponding to the interface read / write request to an aggregate interface according to the request read / write mode to obtain the interface read / write data includes:

[0066] Analyze the total amount of read and write data corresponding to the interface read and write request;

[0067] Based on the requested read / write mode and the total data volume, construct a migration strategy for the read / write data;

[0068] Configure migration parameters of the migration strategy;

[0069] Based on the migration parameters, the migration rate of the read and write data is calculated using the following formula:

[0070] ;

[0071] in, Indicates the migration rate of read and write data. Indicates the concurrency corresponding to the migration parameters. Indicates the number of single migrations corresponding to the migration parameters. Indicates the single migration time corresponding to the migration parameters. Indicates the total amount of read and write data. represents the minimum function;

[0072] When the migration rate meets the preset migration rate standard, the read and write data corresponding to the interface read and write request is migrated to the aggregate interface to obtain the interface read and write data. In order to solve the above problem, the present invention also provides a data read and write system based on SATA and PCIe mixed plug-in interface, the system comprising:

[0073] A PCB layout construction module is used to analyze the data read and write requirements of the SATA and PCIe mixed plug-in interface, determine the bridge chip of the SATA and PCIe mixed plug-in interface, and construct the PCB layout of the SATA and PCIe mixed plug-in interface according to the data read and write requirements and the bridge chip;

[0074] A read / write system construction module, used to calculate the signal integrity and electromagnetic compatibility of the PCB layout, and when the signal integrity and electromagnetic compatibility meet the preset signal integrity threshold and electromagnetic compatibility threshold, an interface data read / write system of the SATA and PCIe mixed plug-in interface is constructed according to the PCB layout;

[0075] A transmission interface determination module, used for obtaining an interface read / write request of the interface data read / write system, analyzing the request characteristics of the interface read / write request, calculating the interface load of the interface corresponding to the interface of the interface data read / write system, and selecting the data transmission interface of the interface read / write request by using the intelligent routing module in the interface data read / write system according to the request characteristics and the interface load;

[0076] An aggregate interface construction module, used to construct an aggregate interface for the interface read and write request by utilizing a load balancing algorithm and a data transmission interface in the interface data read and write system;

[0077] The interface data read and write module is used to identify the request read and write mode of the interface read and write request according to the request characteristics and the data migration model in the interface data read and write system, and according to the request read and write mode, migrate the read and write data corresponding to the interface read and write request to the aggregation interface to obtain the interface read and write data, and perform data reading and writing of the SATA and PCIe mixed plug-in interface according to the interface read and write data.

[0078] The present invention constructs the PCB layout of the SATA and PCIe mixed interface according to the data reading and writing requirements and the bridge chip, which can provide guarantee for the performance and reliability of the system; the present invention guides the optimization of the PCB layout and wiring design by calculating the signal integrity and electromagnetic compatibility of the PCB layout, thereby improving the reliability of the subsequent reading and writing system; further, the present invention constructs the interface data reading and writing system of the SATA and PCIe mixed interface according to the PCB layout when the signal integrity and electromagnetic compatibility simultaneously meet the preset signal integrity threshold and electromagnetic compatibility threshold, which can ensure that the data reading and writing method of the SATA and PCIe mixed interface can efficiently process data transmission and storage, meet the needs of high-performance data processing, and provide a stable operating environment and a good user experience, and further The present invention uses the intelligent routing module in the interface data read and write system to select the data transmission interface of the interface read and write request according to the request characteristics and interface load to improve the performance and efficiency of the data read and write system. Further, the present invention uses the load balancing algorithm and data transmission interface in the interface data read and write system to construct an aggregate interface of the interface read and write request to merge multiple read and write requests, thereby reducing the number of calls to the back-end system, thereby reducing network delay and system overhead, and improving the processing performance of the overall system. Finally, the present invention migrates the read and write data corresponding to the interface read and write request to the aggregate interface according to the request read and write mode, and obtains the interface read and write data. It can effectively migrate the data to the aggregate interface according to different request read and write modes, and complete the interface read and write request, thereby improving the efficiency of data processing and the overall performance of the system. Therefore, the present invention can improve the data read and write efficiency of the SATA and PCIe hybrid interface. BRIEF DESCRIPTION OF THE DRAWINGS

[0079] Figure 1 A flow chart of a data reading and writing method based on a SATA and PCIe mixed plug-in interface provided by an embodiment of the present invention;

[0080] Figure 2 A functional module diagram of a data reading and writing system based on a SATA and PCIe mixed plug-in interface provided by an embodiment of the present invention;

[0081] Figure 3 A schematic diagram of the structure of an electronic device of a data reading and writing system based on a SATA and PCIe mixed plug-in interface provided by an embodiment of the present invention;

[0082] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0083] It should be understood that the specific embodiments described herein are only used to explain the present invention, and are not used to limit the present invention.

[0084] The embodiment of the present application provides a data reading and writing method based on a SATA and PCIe mixed plug-in interface. The execution subject of the data reading and writing method based on the SATA and PCIe mixed plug-in interface includes but is not limited to at least one of the electronic devices that can be configured to execute the method provided by the embodiment of the present application, such as a server, a terminal, etc. In other words, the data reading and writing method based on the SATA and PCIe mixed plug-in interface can be executed by software or hardware installed on a terminal device or a server device, and the software can be a blockchain platform. The server includes but is not limited to: a single server, a server cluster, a cloud server or a cloud server cluster, etc. The server can be an independent server, or it can be a cloud server that provides cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, content delivery networks (Content Delivery Network, CDN), and basic cloud computing services such as big data and artificial intelligence platforms.

[0085] Reference Figure 1 FIG. 1 is a flow chart of a data reading and writing method based on a SATA and PCIe mixed plug-in interface provided by an embodiment of the present invention. In this embodiment, the data reading and writing method based on a SATA and PCIe mixed plug-in interface includes:

[0086] S 1. Analyze the data read and write requirements of the SATA and PCIe mixed plug-in interface, determine the bridge chip of the SATA and PCIe mixed plug-in interface, and construct the PCB layout of the SATA and PCIe mixed plug-in interface according to the data read and write requirements and the bridge chip.

[0087] It should be explained that the SATA refers to the interface used to connect a hard disk drive (HDD) or a solid-state drive (SSD), the PCIe hybrid interface refers to the interface used to connect a higher-speed NVMe SSD or other high-performance storage device, the data read and write requirements refer to the basic requirements for data transmission and storage, including key parameters such as data transmission rate, response time, data volume, data access mode, system scalability, reliability, cost and compatibility, and the bridge chip refers to an integrated circuit used to connect different hardware interfaces and convert them into a unified integrated circuit.

[0088] The present invention constructs a PCB layout of the SATA and PCIe mixed plug-in interface according to the data reading and writing requirements and the bridge chip, which can provide guarantee for the performance and reliability of the system.

[0089] In detail, the PCB layout of the SATA and PCIe mixed plug-in interface is constructed according to the data reading and writing requirements and the bridge chip, including:

[0090] Based on the data reading and writing requirements, determining the chip specifications of the bridge chip;

[0091] Analyze the number of SATA interfaces and the number of PCIe interfaces of the SATA and PCIe mixed interface according to the chip specifications and data reading and writing requirements;

[0092] Based on the data reading and writing requirements, define the component architecture of the SATA and PCIe mixed plug-in interface;

[0093] Constructing a multi-layer PCB layout plan for the SATA and PCIe mixed interfaces based on the number of SATA interfaces, the number of PCIe interfaces, and the component architecture;

[0094] According to the multi-layer PCB layout plan, construct a wiring diagram of the SATA and PCIe mixed plug-in interface;

[0095] Based on the multi-layer PCB layout plan and wiring diagram, a PCB layout of the SATA and PCIe mixed plug-in interface is constructed.

[0096] Among them, the chip specifications refer to the technical parameters of the bridge chip used for the SATA and PCIe mixed plug-in interface, including the supported interface types, interface quantity, maximum transmission rate, cache size, power consumption, size, etc. The number of SATA interfaces refers to the number of SATA interfaces that need to be connected in the system, and the number of PCIe interfaces refers to the number of PCIe interfaces that need to be connected in the system. The component architecture refers to the layout and connection method of each component in the system, including bridge chips, interfaces, caches, power management, cooling systems, etc. The multi-layer PCB layout planning refers to the layout planning of components on a multi-layer PCB, including the functional division of each layer, wiring channels, stacking design, etc. The wiring diagram refers to a detailed display of the routing paths of power lines, data lines, signal lines, etc. based on the multi-layer PCB layout planning. The PCB layout refers to the final constructed PCB layout, including the positions of all components, the specific layout of wiring, the stacking structure, etc.

[0097] Optionally, constructing the wiring diagram of the SATA and PCIe mixed plug-in interface according to the multi-layer PCB layout plan can be implemented by a layout editor.

[0098] S2. Calculate the signal integrity and electromagnetic compatibility of the PCB layout. When the signal integrity and electromagnetic compatibility meet the preset signal integrity threshold and electromagnetic compatibility threshold, construct an interface data reading and writing system of the SATA and PCIe mixed interface according to the PCB layout.

[0099] The present invention guides the optimization of PCB layout and wiring design by calculating the signal integrity and electromagnetic compatibility of the PCB layout, thereby improving the reliability of the subsequent reading and writing system.

[0100] In detail, the calculation of the signal integrity and electromagnetic compatibility of the PCB layout includes:

[0101] Establishing a PCB circuit model of the PCB layout and defining analog signal characteristics of the PCB circuit model;

[0102] Based on the analog signal characteristics, construct an analog signal of the PCB circuit model;

[0103] Using the PCB circuit model to perform transient simulation on the analog signal to obtain a transient simulation result;

[0104] Calculating the distortion state of the analog signal according to the transient simulation result;

[0105] Analyzing the signal integrity of the PCB layout through the distortion state;

[0106] Establishing an electromagnetic field simulation model of the PCB layout;

[0107] Constructing electromagnetic interference of the electromagnetic field simulation model;

[0108] Analyzing the sensitivity and emission characteristic index of the electromagnetic field simulation model under electromagnetic interference;

[0109] The electromagnetic compatibility of the PCB layout is analyzed based on the sensitivity and emission characteristic index.

[0110] Among them, the PCB circuit model refers to the electronic model of the circuit diagram created in the PCB design software, which includes actual electronic components, wiring, power supply, grounding and connection relationships. The analog signal characteristics refer to the characteristics of the analog signal in the PCB circuit model, such as the frequency, amplitude, rise / fall time, noise level, etc. of the signal. The analog signal refers to the signal created in the PCB circuit model, which is used to simulate the transmission and behavior of electronic signals in the real world. The transient simulation result refers to the result obtained after the simulation software performs transient simulation on the analog signal in the PCB circuit model, including the signal waveform, distortion state, transmission delay, etc. The distortion state refers to the waveform of the signal in the transient simulation. The distortion that may occur, such as overshoot, ringing, hysteresis, etc., the signal integrity refers to the ability of the signal to maintain its original characteristics during transmission, including the amplitude, frequency, shape, etc. of the signal, the electromagnetic field simulation model refers to the electromagnetic field model of the PCB circuit created using the electromagnetic field simulation software, the electromagnetic interference refers to the interference source simulated in the electromagnetic field simulation model, such as radio frequency signals, power supply noise, etc., the sensitivity refers to the sensitivity of the PCB circuit to electromagnetic interference, the emission characteristic index refers to the electromagnetic energy emitted by the PCB circuit to the external environment under normal working conditions, including radiation and conducted emissions, and the electromagnetic compatibility refers to the ability of the PCB circuit to coexist with other devices or systems in an electromagnetic environment.

[0111] Further, the analyzing the sensitivity and emission characteristic index of the electromagnetic field simulation model under electromagnetic interference includes:

[0112] Recording electromagnetic interference data of the electromagnetic field simulation model under electromagnetic interference;

[0113] Analyzing the sensitivity parameters and emission characteristic index parameters of the electromagnetic field simulation model according to the electromagnetic interference data;

[0114] Analyzing the conduction coefficient, conduction path length, electromagnetic interference source strength, and PCB power impedance of the electromagnetic field simulation model according to the sensitivity parameters;

[0115] Based on the conduction coefficient, conduction path length, electromagnetic interference source strength and PCB power impedance, the sensitivity of the electromagnetic field simulation model under electromagnetic interference is calculated using the following formula:

[0116] ;

[0117] in, Indicates the sensitivity of the electromagnetic field simulation model under electromagnetic interference, represents the conductivity of the electromagnetic field simulation model, represents the conduction path length of the electromagnetic field simulation model, Represents the electromagnetic interference source strength of the electromagnetic field simulation model, Represents the PCB electrical impedance of the electromagnetic field simulation model;

[0118] Analyzing the receiving sky gain, electromagnetic field radiation power and electromagnetic field distance of the electromagnetic field simulation model through the emission characteristic index parameter;

[0119] Based on the receiving sky gain, electromagnetic field radiation power and electromagnetic field distance, the emission characteristic index of the electromagnetic field simulation model under electromagnetic interference is calculated using the following formula:

[0120] ;

[0121] in, Represents the emission characteristic index of the electromagnetic field simulation model under electromagnetic interference, represents the receiving antenna gain of the electromagnetic field simulation model, represents the electromagnetic field radiation power of the electromagnetic field simulation model, represents the electromagnetic field distance of the electromagnetic field simulation model, Represents pi.

[0122] Among them, the electromagnetic interference data refers to the electromagnetic interference (EMI) related data collected in the electromagnetic field simulation model, the sensitivity parameter refers to the parameter of the circuit's sensitivity to electromagnetic interference, the emission characteristic index parameter is the parameter of the circuit emitting electromagnetic energy to the external environment, the conduction coefficient refers to the circuit's conduction ability to electromagnetic interference, the conduction path length refers to the path length of electromagnetic interference conducted in the circuit, the electromagnetic interference source strength refers to the strength of the electromagnetic interference source, the PCB power impedance refers to the impedance characteristics of the PCB circuit to electromagnetic interference, the lower the impedance, the more sensitive the response to electromagnetic interference may be, the receiving antenna gain refers to the receiving antenna's ability to enhance electromagnetic signals, the electromagnetic field radiation power refers to the power of the electromagnetic energy emitted by the circuit to the external environment, the higher the power, the greater the impact on the surrounding environment may be, and the electromagnetic field distance refers to the distance between the circuit and the electromagnetic interference source.

[0123] The present invention can ensure that the data reading and writing method of the SATA and PCIe mixed interface can efficiently process data transmission and storage, meet the needs of high-performance data processing, and provide a stable operating environment and a good user experience by constructing the interface data reading and writing system of the SATA and PCIe mixed interface according to the PCB layout when the signal integrity and electromagnetic compatibility simultaneously meet the preset signal integrity threshold and electromagnetic compatibility threshold.

[0124] In detail, the interface data reading and writing system of the SATA and PCIe mixed plug-in interface is constructed according to the PCB layout, including:

[0125] Identifying hardware components of the PCB layout;

[0126] analyzing performance indicators of the hardware components;

[0127] Based on the performance indicators, construct functional software for the PCB layout;

[0128] Analyzing control coefficients of said functional software and hardware components;

[0129] When the control coefficient meets a preset control threshold, the functional software and hardware components are integrated to obtain an integrated data reading and writing system;

[0130] Debugging system parameters of the integrated data reading and writing system, and analyzing the software and hardware coordination coefficient of the integrated data reading and writing system based on the system parameters;

[0131] When the software-hardware synergy coefficient meets a preset synergy threshold, the integrated data reading and writing system is used as an interface data reading and writing system.

[0132] Among them, the hardware components refer to the physical entities that constitute the electronic system, including chips, resistors, capacitors, interfaces, connectors, etc., the performance indicators refer to the key performance parameters of the hardware components, such as transmission rate, delay, power consumption, temperature range, etc., the functional software refers to the software code written to realize the functions of the hardware components, including drivers, operating systems, applications, etc., the control coefficient refers to the control relationship between the software and hardware components, including control logic, timing relationship, data transmission protocol, etc., the control threshold refers to the allowable range of control parameters preset when the software and hardware components are integrated, the integrated data reading and writing system refers to the overall system after the functional software and hardware components are integrated, the system parameters refer to the various settings and variables of the integrated data reading and writing system performance and the collaborative work of software and hardware, the software and hardware collaborative coefficient refers to the degree of collaborative work between software and hardware during the operation of the system after the software and hardware components are integrated, the collaborative threshold refers to the preset threshold of the collaborative work of software and hardware of the integrated data reading and writing system to ensure system performance, and the interface data reading and writing system refers to a data reading and writing system that meets the performance requirements and is integrated according to the PCB layout.

[0133] Optionally, the functional software for constructing the PCB layout based on the performance index can be implemented by Java code.

[0134] Optionally, the software and hardware synergy coefficient of the integrated data reading and writing system based on the system parameter analysis can be monitored and analyzed by a performance analysis tool (such as a CPU profiler, a memory analyzer, a network analyzer, etc.).

[0135] S3. Obtain an interface read / write request of the interface data read / write system, analyze the request characteristics of the interface read / write request, calculate the interface load of the interface corresponding to the interface of the interface data read / write system, and select the data transmission interface of the interface read / write request by using the intelligent routing module in the interface data read / write system according to the request characteristics and the interface load.

[0136] It should be explained that the interface read and write request refers to the request received by the system from an application or other device, requesting a data read or write operation. These requests may include reading a specific file, writing data to a storage device, performing a database query, etc. The request characteristics refer to the specific attributes or parameters of the interface read and write request, which help the system identify and process the request. Request characteristics may include parameters such as request type (read or write), requested data size, request priority, request frequency, and request source (such as an application identifier).

[0137] The interface load of the interface corresponding to the interface data reading and writing system calculated by the present invention can be used as a basis for later interface selection.

[0138] In detail, the calculating the interface load of the interface corresponding to the interface of the interface data reading and writing system includes:

[0139] Determine the load impact factor of the interface corresponding to the interface data reading and writing system;

[0140] Collecting interface load data of the interface corresponding to the interface of the interface data reading and writing system through the load influence factor;

[0141] Calculating the load index of the interface corresponding to the interface of the interface data reading and writing system according to the interface load data;

[0142] Calculating a load indicator weight of the load indicator;

[0143] Based on the load index and the load index weight, an interface load of the interface corresponding to the interface data reading and writing system is determined.

[0144] Among them, the load influencing factor refers to various factors that affect the interface load, such as interface bandwidth, processing power, data transmission rate, number of interfaces, etc. The interface load data refers to the interface load related data collected by the system, such as interface bandwidth utilization, data transmission rate, waiting queue length, etc. The load index refers to various indicators for measuring the interface load, such as interface utilization, waiting time, response time, etc. The load index weight refers to the importance of the load index in the comprehensive evaluation of the interface load. The interface load refers to the comprehensive performance of the port in a certain period of time, such as data transmission volume, response time, waiting queue length, etc.

[0145] The present invention uses the intelligent routing module in the interface data reading and writing system to select the data transmission interface of the interface reading and writing request according to the request characteristics and the interface load to improve the performance and efficiency of the data reading and writing system.

[0146] In detail, the method of selecting the data transmission interface of the interface read / write request by the intelligent routing module in the interface data read / write system according to the request characteristics and the interface load includes:

[0147] Analyzing interface performance parameters of the interface data reading and writing system;

[0148] Determining an interface selection rule of the interface data reading and writing system;

[0149] Calculate the interface matching degree of the interface read and write request using the intelligent routing module according to the interface performance parameters, interface load, interface selection rules and request characteristics;

[0150] Analyze the interface quantity requirement of the interface read and write request based on the interface performance parameters and request characteristics;

[0151] The data transmission interface of the interface read / write request is determined according to the interface matching degree and the interface quantity requirement.

[0152] Among them, the interface performance parameters refer to the key performance indicators of the interface, such as processing power, delay, reliability and other parameters; the interface selection rules refer to the strategies and standards followed when selecting interfaces, such as giving priority to interfaces with higher bandwidth; the interface matching degree refers to the degree of matching between interface performance parameters and request characteristics; the interface quantity requirement refers to the number of interfaces required by the system when processing interface read and write requests; the data transmission interface refers to the interface determined for actual data transmission based on the above analysis; the intelligent routing module refers to a component integrated in the data reading and writing system, which is responsible for determining the best path or interface for data transmission based on a series of rules and algorithms.

[0153] S 4. Utilize the load balancing algorithm and data transmission interface in the interface data reading and writing system to construct an aggregation interface for the interface reading and writing requests.

[0154] The present invention utilizes the load balancing algorithm and data transmission interface in the interface data read and write system to construct an aggregation interface of the interface read and write requests to merge multiple read and write requests, thereby reducing the number of calls to the back-end system, thereby reducing network delay and system overhead, and improving the processing performance of the overall system.

[0155] In detail, the use of the load balancing algorithm and the data transmission interface in the interface data reading and writing system to construct the aggregation interface of the interface reading and writing request includes:

[0156] Calculate the resources required for the task of the interface read / write request based on the request characteristics corresponding to the interface read / write request;

[0157] Marking currently available resources of the data transmission interface;

[0158] Based on the resources required for the task and the currently available resources, the target data transmission interface of the interface read / write request is marked using the load balancing algorithm;

[0159] Constructing a virtual interface for the interface read and write request;

[0160] The target data transmission interface is integrated into the virtual interface to obtain an aggregate interface for the interface read and write requests.

[0161] Among them, the resources required for the task refer to the amount of resources that the system needs to provide in order to complete a specific interface read and write request, the currently available resources refer to the amount of resources that the data transmission interface can provide at the current moment, the load balancing algorithm refers to the rules or strategies used to distribute requests among multiple data transmission interfaces, with the purpose of optimizing resource utilization and improving system performance and reliability, the target data transmission interface refers to the physical interface selected according to the load balancing algorithm for processing specific interface read and write requests, the virtual interface refers to a logical interface that does not represent any physical hardware, but is defined through software to aggregate the capabilities of multiple physical interfaces and provide a unified interface to the outside world, and the aggregated interface refers to the interface implemented through a virtual interface that merges the data transmission capabilities of multiple physical interfaces into a single interface.

[0162] S5. According to the request characteristics, the data migration model in the interface data read and write system is used to identify the request read and write mode of the interface read and write request, and according to the request read and write mode, the read and write data corresponding to the interface read and write request is migrated to the aggregation interface to obtain the interface read and write data, and the data reading and writing of the SATA and PCIe mixed plug-in interface is performed according to the interface read and write data.

[0163] According to the request characteristics, the present invention uses the data migration model in the interface data read and write system to identify the request read and write mode of the interface read and write request, and can determine the storage location and migration strategy of the data according to the read and write mode. The request read and write mode refers to a specific data access mode identified by the data migration model according to the characteristics of the interface read and write request, such as a sequential read and write mode, a random read and write mode, a small data block read and write mode, and the like.

[0164] The present invention migrates the read and write data corresponding to the interface read and write request to the aggregate interface according to the request read and write mode, and obtains the interface read and write data. It can effectively migrate the data to the aggregate interface according to different request read and write modes, and complete the interface read and write request, thereby improving the efficiency of data processing and the overall performance of the system.

[0165] In detail, the step of migrating the read / write data corresponding to the interface read / write request to the aggregation interface according to the request read / write mode to obtain the interface read / write data includes:

[0166] Analyze the total amount of read and write data corresponding to the interface read and write request;

[0167] Based on the requested read / write mode and the total data volume, construct a migration strategy for the read / write data;

[0168] Configure migration parameters of the migration strategy;

[0169] Based on the migration parameters, the migration rate of the read and write data is calculated using the following formula:

[0170] ;

[0171] in, Indicates the migration rate of read and write data. Indicates the concurrency corresponding to the migration parameters. Indicates the number of single migrations corresponding to the migration parameters. Indicates the single migration time corresponding to the migration parameters. Indicates the total amount of read and write data. represents the minimum function;

[0172] When the migration rate meets the preset migration rate standard, the read and write data corresponding to the interface read and write request are migrated to the aggregation interface to obtain the interface read and write data.

[0173] Among them, the read and write data refers to the data set that needs to be processed for the interface read and write requests, including data for read operations and data for write operations, the total data volume refers to the total amount of read and write data, the migration strategy refers to the rules used to guide how to migrate read and write data from the source interface to the aggregate interface, the migration parameters refer to the variables used to configure the migration strategy, including concurrency, single migration quantity, single migration time, etc., the migration rate refers to the amount of data migrated per unit time, the single migration quantity refers to the number of data migration tasks performed simultaneously, the single migration time refers to the time required to complete a migration operation, and the interface read and write data refers to the read and write data available on the aggregate interface after migration.

[0174] Optionally, constructing the migration strategy of the read and write data based on the requested read and write mode and the total data volume may be implemented through a batch migration strategy.

[0175] Finally, the data reading and writing of the SATA and PCIe mixed plug-in interface is performed according to the interface reading and writing data.

[0176] The present invention constructs the PCB layout of the SATA and PCIe mixed interface according to the data reading and writing requirements and the bridge chip, which can provide guarantee for the performance and reliability of the system; the present invention guides the optimization of the PCB layout and wiring design by calculating the signal integrity and electromagnetic compatibility of the PCB layout, thereby improving the reliability of the subsequent reading and writing system; further, the present invention constructs the interface data reading and writing system of the SATA and PCIe mixed interface according to the PCB layout when the signal integrity and electromagnetic compatibility simultaneously meet the preset signal integrity threshold and electromagnetic compatibility threshold, which can ensure that the data reading and writing method of the SATA and PCIe mixed interface can efficiently process data transmission and storage, meet the needs of high-performance data processing, and provide a stable operating environment and a good user experience, and further The present invention uses the intelligent routing module in the interface data read and write system to select the data transmission interface of the interface read and write request according to the request characteristics and interface load to improve the performance and efficiency of the data read and write system. Further, the present invention uses the load balancing algorithm and data transmission interface in the interface data read and write system to construct an aggregate interface of the interface read and write request to merge multiple read and write requests, thereby reducing the number of calls to the back-end system, thereby reducing network delay and system overhead, and improving the processing performance of the overall system. Finally, the present invention migrates the read and write data corresponding to the interface read and write request to the aggregate interface according to the request read and write mode, and obtains the interface read and write data. It can effectively migrate the data to the aggregate interface according to different request read and write modes, and complete the interface read and write request, thereby improving the efficiency of data processing and the overall performance of the system. Therefore, the present invention can improve the data read and write efficiency of the SATA and PCIe hybrid interface.

[0177] like Figure 2 , which is a functional module diagram of a data reading and writing system based on a SATA and PCIe mixed plug-in interface provided by an embodiment of the present invention.

[0178] The data reading and writing system 200 based on the SATA and PCIe mixed plug-in interface of the present invention can be installed in an electronic device. According to the functions to be implemented, the data reading and writing system 200 based on the SATA and PCIe mixed plug-in interface can include a PCB layout construction module 201, a reading and writing system construction module 202, a transmission interface determination module 203, an aggregation interface construction module 204 and an interface data reading and writing module 205. The module of the present invention can also be referred to as a unit, which refers to a series of computer program segments that can be executed by an electronic device processor and can complete fixed functions, which are stored in the memory of the electronic device.

[0179] In this embodiment, the functions of each module / unit are as follows:

[0180] The PCB layout construction module 201 is used to analyze the data read and write requirements of the SATA and PCIe mixed plug-in interface, determine the bridge chip of the SATA and PCIe mixed plug-in interface, and construct the PCB layout of the SATA and PCIe mixed plug-in interface according to the data read and write requirements and the bridge chip;

[0181] The read / write system construction module 202 is used to calculate the signal integrity and electromagnetic compatibility of the PCB layout, and when the signal integrity and electromagnetic compatibility meet the preset signal integrity threshold and electromagnetic compatibility threshold, the interface data read / write system of the SATA and PCIe mixed interface is constructed according to the PCB layout;

[0182] The transmission interface determination module 203 is used to obtain the interface read / write request of the interface data read / write system, analyze the request characteristics of the interface read / write request, calculate the interface load of the corresponding interface of the interface data read / write system, and select the data transmission interface of the interface read / write request by the intelligent routing module in the interface data read / write system according to the request characteristics and the interface load;

[0183] The aggregate interface construction module 204 is used to construct the aggregate interface of the interface read and write request by using the load balancing algorithm and the data transmission interface in the interface data read and write system;

[0184] The interface data read and write module 205 is used to identify the request read and write mode of the interface read and write request according to the request characteristics and using the data migration model in the interface data read and write system, and according to the request read and write mode, migrate the read and write data corresponding to the interface read and write request to the aggregation interface to obtain interface read and write data, and perform data reading and writing of the SATA and PCIe mixed plug-in interfaces according to the interface read and write data.

[0185] In detail, the modules described in the data reading and writing system 200 based on the SATA and PCIe mixed interface described in the embodiment of the present invention adopt the same technical means as the data reading and writing method based on the SATA and PCIe mixed interface described in the accompanying drawings when used, and can produce the same technical effects, which will not be repeated here.

[0186] An embodiment of the present invention provides an electronic device for implementing a data reading and writing method based on a SATA and PCIe mixed plug-in interface.

[0187] See also Figure 3 As shown, the electronic device may include a processor 30, a memory 31, a communication bus 32 and a communication interface 33, and may also include a computer program stored in the memory 31 and executable on the processor 30, such as a data reading and writing method program based on a SATA and PCIe hybrid interface.

[0188] In some embodiments, the processor may be composed of an integrated circuit, for example, a single packaged integrated circuit, or a plurality of packaged integrated circuits with the same or different functions, including one or more central processing units (CPUs), microprocessors, digital processing chips, graphics processors, and a combination of various control chips. The processor is the control core (Control Unit) of the electronic device, and uses various interfaces and lines to connect the various components of the entire electronic device. It runs or executes programs or modules stored in the memory (for example, executing data read and write programs based on SATA and PCIe hybrid interfaces, etc.), and calls data stored in the memory to execute various functions of the electronic device and process data.

[0189] The memory includes at least one type of readable storage medium, and the readable storage medium includes a flash memory, a mobile hard disk, a multimedia card, a card-type memory (for example, SD or DX memory, etc.), a magnetic memory, a disk, an optical disk, etc. In some embodiments, the memory may be an internal storage unit of an electronic device, such as a mobile hard disk of the electronic device. In other embodiments, the memory may also be an external storage device of an electronic device, such as a plug-in mobile hard disk, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (Flash Card), etc. equipped on the electronic device. Further, the memory may also include both an internal storage unit of the electronic device and an external storage device. The memory can be used not only to store application software and various types of data installed in the electronic device, such as the code of a data reading and writing program based on a SATA and PCIe mixed plug-in interface, but also to temporarily store data that has been output or is to be output.

[0190] The communication bus may be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The bus may be divided into an address bus, a data bus, a control bus, etc. The bus is configured to realize connection and communication between the memory and at least one processor, etc.

[0191] The communication interface is used for communication between the above-mentioned electronic device and other devices, including a network interface and a user interface. Optionally, the network interface may include a wired interface and / or a wireless interface (such as a WI-FI interface, a Bluetooth interface, etc.), which is generally used to establish a communication connection between the electronic device and other electronic devices. The user interface may be a display (Display), an input unit (such as a keyboard (Keyboard)), and optionally, the user interface may also be a standard wired interface, a wireless interface. Optionally, in some embodiments, the display may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, and an OLED (Organic Light-Emitting Diode, organic light-emitting diode) touch device, etc. Among them, the display may also be appropriately referred to as a display screen or a display unit, which is used to display information processed in the electronic device and to display a visual user interface.

[0192] For example, although not shown, the electronic device may also include a power source (such as a battery) for supplying power to various components. Preferably, the power source may be logically connected to the at least one processor through a power management system, so that the power management system can realize functions such as charging management, discharging management, and power consumption management. The power source may also include any components such as one or more DC or AC power sources, recharging systems, power failure detection circuits, power converters or inverters, and power status indicators. The electronic device may also include a variety of sensors, Bluetooth modules, Wi-Fi modules, etc., which will not be repeated here.

[0193] It should be understood that the embodiment is for illustration only and the scope of the patent application is not limited to this structure.

[0194] The data reading and writing program based on the SATA and PCIe mixed plug-in interface stored in the memory of the electronic device is a combination of multiple instructions. When running in the processor, it can achieve:

[0195] Analyze the data read and write requirements of the SATA and PCIe mixed plug-in interface, determine the bridge chip of the SATA and PCIe mixed plug-in interface, and construct the PCB layout of the SATA and PCIe mixed plug-in interface according to the data read and write requirements and the bridge chip;

[0196] Calculating the signal integrity and electromagnetic compatibility of the PCB layout, and when the signal integrity and electromagnetic compatibility both meet the preset signal integrity threshold and electromagnetic compatibility threshold, constructing the interface data reading and writing system of the SATA and PCIe mixed plug-in interface according to the PCB layout;

[0197] Obtaining an interface read / write request of the interface data read / write system, analyzing request characteristics of the interface read / write request, calculating an interface load of an interface corresponding to the interface of the interface data read / write system, and selecting a data transmission interface of the interface read / write request by using an intelligent routing module in the interface data read / write system according to the request characteristics and the interface load;

[0198] Using the load balancing algorithm and data transmission interface in the interface data reading and writing system, an aggregation interface for the interface reading and writing request is constructed;

[0199] According to the request characteristics, the data migration model in the interface data read and write system is used to identify the request read and write mode of the interface read and write request, and according to the request read and write mode, the read and write data corresponding to the interface read and write request is migrated to the aggregation interface to obtain the interface read and write data, and the data reading and writing of the SATA and PCIe mixed plug-in interface are performed according to the interface read and write data.

[0200] Specifically, the specific implementation method of the processor for the above instructions can refer to the description of the relevant steps in the corresponding embodiment of the accompanying drawings, which will not be repeated here.

[0201] Furthermore, if the module / unit integrated in the electronic device is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. The computer-readable storage medium can be volatile or non-volatile. For example, the computer-readable medium can include: any entity or system that can carry the computer program code, a recording medium, a USB flash drive, a mobile hard disk, a magnetic disk, an optical disk, a computer memory, and a read-only memory (ROM).

[0202] The present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor of an electronic device, the computer program can implement:

[0203] Analyze the data read and write requirements of the SATA and PCIe mixed plug-in interface, determine the bridge chip of the SATA and PCIe mixed plug-in interface, and construct the PCB layout of the SATA and PCIe mixed plug-in interface according to the data read and write requirements and the bridge chip;

[0204] Calculating the signal integrity and electromagnetic compatibility of the PCB layout, and when the signal integrity and electromagnetic compatibility both meet the preset signal integrity threshold and electromagnetic compatibility threshold, constructing the interface data reading and writing system of the SATA and PCIe mixed plug-in interface according to the PCB layout;

[0205] Obtaining an interface read / write request of the interface data read / write system, analyzing request characteristics of the interface read / write request, calculating an interface load of an interface corresponding to the interface of the interface data read / write system, and selecting a data transmission interface of the interface read / write request by using an intelligent routing module in the interface data read / write system according to the request characteristics and the interface load;

[0206] Using the load balancing algorithm and data transmission interface in the interface data reading and writing system, an aggregation interface for the interface reading and writing request is constructed;

[0207] According to the request characteristics, the data migration model in the interface data read and write system is used to identify the request read and write mode of the interface read and write request, and according to the request read and write mode, the read and write data corresponding to the interface read and write request is migrated to the aggregation interface to obtain the interface read and write data, and the data reading and writing of the SATA and PCIe mixed plug-in interface are performed according to the interface read and write data.

[0208] In the several embodiments provided by the present invention, it should be understood that the disclosed devices, systems and methods can be implemented in other ways. For example, the system embodiments described above are only schematic, for example, the division of the modules is only a logical function division, and there may be other division methods in actual implementation.

[0209] The modules described as separate components may or may not be physically separated, and the components shown as modules may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0210] In addition, each functional module in each embodiment of the present invention may be integrated into one processing unit, each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of hardware plus software functional modules.

[0211] It is obvious to those skilled in the art that the present invention is not limited to the details of the above exemplary embodiments, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention.

[0212] Therefore, no matter from which point of view, the embodiments should be regarded as illustrative and non-restrictive, and the scope of the present invention is limited by the appended claims rather than the above description, so it is intended that all changes falling within the meaning and scope of the equivalent elements of the claims are included in the present invention. Any attached figure mark in the claims should not be regarded as limiting the claims involved.

[0213] The embodiments of the present application can acquire and process relevant data based on artificial intelligence technology. Artificial Intelligence (AI) is the theory, method, technology and application system that uses digital computers or machines controlled by digital computers to simulate, extend and expand human intelligence, perceive the environment, acquire knowledge and use knowledge to obtain the best results.

[0214] In addition, it is clear that the word "comprising" does not exclude other units or steps, and the singular does not exclude the plural. Multiple units or systems stated in a system claim can also be implemented by one unit or system through software or hardware. The words first, second, etc. are used to indicate names, and do not indicate any particular order.

[0215] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the spirit and scope of the technical solution of the present invention.

Claims

1. A data reading and writing method based on a SATA and PCIe mixed plug-in interface, characterized in that: The method comprises: Analyze the data read and write requirements of the SATA and PCIe mixed plug-in interface, determine the bridge chip of the SATA and PCIe mixed plug-in interface, and construct the PCB layout of the SATA and PCIe mixed plug-in interface according to the data read and write requirements and the bridge chip; A PCB circuit model of the PCB layout is established, and analog signal characteristics of the PCB circuit model are defined; based on the analog signal characteristics, an analog signal of the PCB circuit model is constructed; transient simulation of the analog signal is performed using the PCB circuit model to obtain a transient simulation result; based on the transient simulation result, a distortion state of the analog signal is calculated; through the distortion state, the signal integrity of the PCB layout is analyzed; an electromagnetic field simulation model of the PCB layout is established; electromagnetic interference of the electromagnetic field simulation model is constructed; electromagnetic interference data of the electromagnetic field simulation model under electromagnetic interference is recorded; based on the electromagnetic interference data, sensitivity parameters and emission characteristic index parameters of the electromagnetic field simulation model are analyzed; based on the sensitivity parameters, a conduction coefficient, a conduction path length, an electromagnetic interference source strength, and a PCB power impedance of the electromagnetic field simulation model are analyzed; based on the conduction coefficient, the conduction path length, the electromagnetic interference source strength, and the PCB power impedance, the sensitivity of the electromagnetic field simulation model under electromagnetic interference is calculated using the following formula: ； in, Indicates the sensitivity of the electromagnetic field simulation model under electromagnetic interference, represents the conductivity of the electromagnetic field simulation model, represents the conduction path length of the electromagnetic field simulation model, Represents the electromagnetic interference source strength of the electromagnetic field simulation model, The PCB power impedance of the electromagnetic field simulation model is represented. The receiving day gain, electromagnetic field radiation power and electromagnetic field distance of the electromagnetic field simulation model are analyzed through the emission characteristic index parameter. Based on the receiving day gain, electromagnetic field radiation power and electromagnetic field distance, the emission characteristic index of the electromagnetic field simulation model under electromagnetic interference is calculated using the following formula: ； in, Represents the emission characteristic index of the electromagnetic field simulation model under electromagnetic interference, represents the receiving antenna gain of the electromagnetic field simulation model, represents the electromagnetic field radiation power of the electromagnetic field simulation model, represents the electromagnetic field distance of the electromagnetic field simulation model, represents pi, and according to the sensitivity and emission characteristic index, the electromagnetic compatibility of the PCB layout is analyzed, wherein the receiving antenna gain refers to the enhancement capability of the receiving antenna to the electromagnetic signal, and when the signal integrity and electromagnetic compatibility meet the preset signal integrity threshold and electromagnetic compatibility threshold at the same time, according to the PCB layout, the interface data reading and writing system of the SATA and PCIe mixed plug-in interface is constructed; Obtaining an interface read / write request of the interface data read / write system, analyzing request characteristics of the interface read / write request, calculating an interface load of an interface corresponding to the interface of the interface data read / write system, and selecting a data transmission interface of the interface read / write request by using an intelligent routing module in the interface data read / write system according to the request characteristics and the interface load; Using the load balancing algorithm and data transmission interface in the interface data reading and writing system, an aggregation interface for the interface reading and writing request is constructed; According to the request characteristics, the data migration model in the interface data read and write system is used to identify the request read and write mode of the interface read and write request, and according to the request read and write mode, the read and write data corresponding to the interface read and write request is migrated to the aggregation interface to obtain the interface read and write data, and the data reading and writing of the SATA and PCIe mixed plug-in interface are performed according to the interface read and write data.

2. The data reading and writing method based on the SATA and PCIe mixed plug-in interface according to claim 1, characterized in that: The PCB layout of the SATA and PCIe mixed plug-in interface is constructed according to the data reading and writing requirements and the bridge chip, including: Based on the data reading and writing requirements, determining the chip specifications of the bridge chip; Analyze the number of SATA interfaces and the number of PCIe interfaces of the SATA and PCIe mixed interface according to the chip specifications and data reading and writing requirements; Based on the data reading and writing requirements, define the component architecture of the SATA and PCIe mixed plug-in interface; Constructing a multi-layer PCB layout plan for the SATA and PCIe mixed interfaces based on the number of SATA interfaces, the number of PCIe interfaces, and the component architecture; According to the multi-layer PCB layout plan, construct a wiring diagram of the SATA and PCIe mixed plug-in interface; Based on the multi-layer PCB layout plan and wiring diagram, a PCB layout of the SATA and PCIe mixed plug-in interface is constructed.

3. The data reading and writing method based on the SATA and PCIe mixed plug-in interface according to claim 2, characterized in that: The interface data reading and writing system of the SATA and PCIe mixed plug-in interface is constructed according to the PCB layout, including: Identifying hardware components of the PCB layout; analyzing performance indicators of the hardware components; Based on the performance indicators, construct functional software for the PCB layout; Analyzing control coefficients of said functional software and hardware components; When the control coefficient meets a preset control threshold, the functional software and hardware components are integrated to obtain an integrated data reading and writing system; Debugging system parameters of the integrated data reading and writing system, and analyzing the software and hardware coordination coefficient of the integrated data reading and writing system based on the system parameters; When the software-hardware synergy coefficient meets a preset synergy threshold, the integrated data reading and writing system is used as an interface data reading and writing system.

4. The data reading and writing method based on the SATA and PCIe mixed plug-in interface as claimed in claim 3, characterized in that: The calculating the interface load of the interface corresponding to the interface data reading and writing system includes: Determine the load impact factor of the interface corresponding to the interface data reading and writing system; Collecting interface load data of the interface corresponding to the interface of the interface data reading and writing system through the load influence factor; Calculating the load index of the interface corresponding to the interface of the interface data reading and writing system according to the interface load data; Calculating a load indicator weight of the load indicator; Based on the load index and the load index weight, an interface load of the interface corresponding to the interface data reading and writing system is determined.

5. The data reading and writing method based on the SATA and PCIe mixed plug-in interface according to claim 4, characterized in that: The method of selecting the data transmission interface of the interface read / write request by the intelligent routing module in the interface data read / write system according to the request characteristics and the interface load comprises: Analyzing interface performance parameters of the interface data reading and writing system; Determining an interface selection rule of the interface data reading and writing system; Calculate the interface matching degree of the interface read and write request using the intelligent routing module according to the interface performance parameters, interface load, interface selection rules and request characteristics; Analyze the interface quantity requirement of the interface read and write request based on the interface performance parameters and request characteristics; The data transmission interface of the interface read / write request is determined according to the interface matching degree and the interface quantity requirement.

6. The data reading and writing method based on the SATA and PCIe mixed plug-in interface according to claim 5, characterized in that: The use of the load balancing algorithm and the data transmission interface in the interface data reading and writing system to construct the aggregation interface of the interface reading and writing request includes: Calculate the resources required for the task of the interface read / write request based on the request characteristics corresponding to the interface read / write request; Marking currently available resources of the data transmission interface; Based on the resources required for the task and the currently available resources, the target data transmission interface of the interface read / write request is marked using the load balancing algorithm; Constructing a virtual interface for the interface read and write request; The target data transmission interface is integrated into the virtual interface to obtain an aggregate interface for the interface read and write requests.

7. The data reading and writing method based on the SATA and PCIe mixed plug-in interface according to claim 6, characterized in that: The step of migrating the read / write data corresponding to the interface read / write request to the aggregation interface according to the request read / write mode to obtain the interface read / write data includes: Analyze the total amount of read and write data corresponding to the interface read and write request; Based on the requested read / write mode and the total data volume, construct a migration strategy for the read / write data; Configure migration parameters of the migration strategy; Based on the migration parameters, the migration rate of the read and write data is calculated using the following formula: ； in, Indicates the migration rate of read and write data. Indicates the concurrency corresponding to the migration parameters. Indicates the number of single migrations corresponding to the migration parameters. Indicates the single migration time corresponding to the migration parameters. Indicates the total amount of read and write data. represents the minimum function; When the migration rate meets the preset migration rate standard, the read and write data corresponding to the interface read and write request are migrated to the aggregation interface to obtain the interface read and write data.

8. A data reading and writing system based on a SATA and PCIe mixed plug-in interface, characterized in that: The system is used to execute the data reading and writing method based on the SATA and PCIe mixed plug-in interface according to any one of claims 1 to 7, and comprises: A PCB layout construction module is used to analyze the data read and write requirements of the SATA and PCIe mixed plug-in interface, determine the bridge chip of the SATA and PCIe mixed plug-in interface, and construct the PCB layout of the SATA and PCIe mixed plug-in interface according to the data read and write requirements and the bridge chip; The read-write system construction module is used to establish a PCB circuit model of the PCB layout, define the analog signal characteristics of the PCB circuit model, construct the analog signal of the PCB circuit model based on the analog signal characteristics, use the PCB circuit model to perform transient simulation on the analog signal, obtain a transient simulation result, calculate the distortion state of the analog signal according to the transient simulation result, analyze the signal integrity of the PCB layout through the distortion state, establish an electromagnetic field simulation model of the PCB layout, construct the electromagnetic interference of the electromagnetic field simulation model, record the electromagnetic interference data of the electromagnetic field simulation model under electromagnetic interference, analyze the sensitivity parameters and emission characteristic index parameters of the electromagnetic field simulation model according to the electromagnetic interference data, analyze the conduction coefficient, conduction path length, electromagnetic interference source strength and PCB power impedance of the electromagnetic field simulation model according to the sensitivity parameters, and calculate the sensitivity of the electromagnetic field simulation model under electromagnetic interference based on the conduction coefficient, conduction path length, electromagnetic interference source strength and PCB power impedance using the following formula: ； in, Indicates the sensitivity of the electromagnetic field simulation model under electromagnetic interference, represents the conductivity of the electromagnetic field simulation model, represents the conduction path length of the electromagnetic field simulation model, Represents the electromagnetic interference source strength of the electromagnetic field simulation model, The PCB power impedance of the electromagnetic field simulation model is represented. The receiving day gain, electromagnetic field radiation power and electromagnetic field distance of the electromagnetic field simulation model are analyzed through the emission characteristic index parameter. Based on the receiving day gain, electromagnetic field radiation power and electromagnetic field distance, the emission characteristic index of the electromagnetic field simulation model under electromagnetic interference is calculated using the following formula: ； in, Represents the emission characteristic index of the electromagnetic field simulation model under electromagnetic interference, represents the receiving antenna gain of the electromagnetic field simulation model, represents the electromagnetic field radiation power of the electromagnetic field simulation model, represents the electromagnetic field distance of the electromagnetic field simulation model, represents pi, and according to the sensitivity and emission characteristic index, the electromagnetic compatibility of the PCB layout is analyzed, wherein the receiving antenna gain refers to the enhancement capability of the receiving antenna to the electromagnetic signal, and when the signal integrity and electromagnetic compatibility meet the preset signal integrity threshold and electromagnetic compatibility threshold at the same time, according to the PCB layout, the interface data reading and writing system of the SATA and PCIe mixed plug-in interface is constructed; A transmission interface determination module, used for obtaining an interface read / write request of the interface data read / write system, analyzing the request characteristics of the interface read / write request, calculating the interface load of the interface corresponding to the interface of the interface data read / write system, and selecting the data transmission interface of the interface read / write request by using the intelligent routing module in the interface data read / write system according to the request characteristics and the interface load; An aggregate interface construction module, used to construct an aggregate interface for the interface read and write request by utilizing a load balancing algorithm and a data transmission interface in the interface data read and write system; The interface data read and write module is used to identify the request read and write mode of the interface read and write request according to the request characteristics and the data migration model in the interface data read and write system, and according to the request read and write mode, migrate the read and write data corresponding to the interface read and write request to the aggregation interface to obtain the interface read and write data, and perform data reading and writing of the SATA and PCIe mixed plug-in interface according to the interface read and write data.

Images