A CP wave control circuit

Abstract

The present invention relates to a CP wave control circuit, comprising a comparator, wherein two input terminals of the comparator receive a control voltage and a reference voltage respectively, and when the control voltage is higher than the reference voltage, the comparator outputs a high level, and when the control voltage is lower than the reference voltage, the comparator outputs a low level, and a high level voltage pull-up circuit is provided on the high level output side of the comparator; the high level voltage pull-up circuit comprises a PNP transistor, wherein the emitter of the PNP transistor is connected to the high level input terminal, the collector of the PNP transistor is connected to the output terminal of the comparator, and the base of the PNP transistor is connected to the drain of the MOS tube through a resistor. In the CP wave control circuit of the present invention, when the output terminal of the comparator has a high input impedance to an external circuit, the output of the comparator is pulled down to a logic low level, and almost no current is consumed at this time, and no influence is generated on the external circuit, and the CP signal carrying capacity is enhanced by combining the comparator with a push-pull circuit, and no additional influence is generated on the signal when the CP signal is received.

Description

Technical Field

[0001] The present invention relates to the technical field of new energy vehicles, and in particular to a CP wave generation control circuit. Background Art

[0002] New energy vehicles can already be used as part of the energy storage system. While meeting the basic function of charging, they can also add the function of discharging. The discharge function refers to allowing the battery of an electric vehicle to release stored energy when necessary to meet the power needs of other equipment. Generally, the discharge function will be equipped with a dedicated discharge gun to handshake and pair with the charging and distribution system to correctly output electrical energy to external devices. The handshake pairing signals here refer to CC and CP signals. The existing charger CP signal sending circuit and CP signal receiving circuit share the same pin. To prevent mutual interference, a relay is added between the two circuits to achieve physical isolation (MOS tubes are also added to complete the same function). They are used for charging, i.e. CP signal reception, and discharging, i.e. CP signal sending. The two circuit modules work independently and do not interfere with each other. Relays are large in size and have relatively high power consumption, which makes miniaturization more difficult. A corresponding relay control circuit is required, which increases the size and complexity of the actual circuit. The mechanical parts of the relay will cause wear, which may affect long-term stability and reliability. Appendix Figure 1 The figure is a schematic diagram of the relay physically isolating the sending and receiving of CP signals. When receiving is required, the relay K1 is disconnected and the sending circuit is isolated; when sending is required, the relay K2 is disconnected and the receiving circuit is disconnected. Summary of the invention

[0003] The embodiment of the present invention provides a CP wave control circuit to solve the problem of large circuit volume caused by using relays in the prior art.

[0004] In order to achieve the above purpose, the embodiment of the present invention provides the following technical solutions:

[0005] A CP wave control circuit comprises a comparator, wherein two input terminals of the comparator receive a control voltage and a reference voltage respectively, when the control voltage is higher than the reference voltage, the comparator outputs a high level, and when the control voltage is lower than the reference voltage, the comparator outputs a low level, and a high level voltage pull-up circuit is provided on the output side of the comparator; the high level voltage pull-up circuit comprises a PNP transistor Qa, wherein the emitter of the PNP transistor Qa is connected to the positive input terminal of the comparator, the collector of the PNP transistor Qa is connected to the output terminal of the comparator, and the base of the PNP transistor Qa is connected to a MOS tube via a resistor.

[0006] Furthermore, the output end of the comparator is connected to a push-pull circuit.

[0007] Furthermore, the push-pull circuit includes a main circuit, and the main circuit is respectively connected in parallel with an NPN transistor and a PNP transistor, wherein the base and emitter of the NPN transistor and the PNP transistor are both connected to the main circuit, the collector of the NPN transistor is connected to a high level, and the collector of the PNP transistor is connected to a low level.

[0008] The embodiments of the present invention have the following advantages:

[0009] A CP wave control circuit of the present invention uses a comparator. When the voltage of the non-inverting input ("+" end) of the comparator is higher than the voltage of the inverting input ("-" end), the output is pulled down to a logic high level. At this time, the output of the comparator reaches a high impedance state, that is, the output end has a high input impedance to the external circuit, and almost no current is consumed at this time, and no influence is produced on the external circuit.

[0010] The comparator output uses a push-pull circuit to enhance the driving capability of the CP signal when sending the CP signal. The upper tube of the push-pull circuit is an NPN transistor, and the lower tube is a PNP transistor. When the input signal is high, the NPN transistor is turned on, so that the output is grounded and the load is connected to the ground. When the input signal is low, the PNP transistor is turned on, so that the output is connected to the power supply and the load is activated. The CP signal carrying capacity is enhanced by combining the comparator and the push-pull circuit, and no additional impact is generated on the signal when the CP signal is received. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the implementation methods of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for the implementation methods or the description of the prior art. Obviously, the drawings in the following description are only exemplary, and for ordinary technicians in this field, other implementation drawings can be derived from the provided drawings without creative work.

[0012] The structures, proportions, sizes, etc. illustrated in this specification are only used to match the contents disclosed in the specification so as to facilitate understanding and reading by persons familiar with the technology. They are not used to limit the conditions under which the present invention can be implemented, and therefore have no substantial technical significance. Any structural modification, change in proportion or adjustment of size shall still fall within the scope of the technical contents disclosed in the present invention without affecting the effects and purposes that can be achieved by the present invention.

[0013] Figure 1 The circuit diagram of the existing CP wave generating circuit controlled by a relay is shown below;

[0014] Figure 2 A circuit diagram of a CP wave control circuit provided by an embodiment of the present invention;

[0015] Figure 3 A circuit diagram of a CP wave control circuit provided in another embodiment of the present invention.

[0016] In the figure:

[0017] Comparator; 2. Control voltage; 3. Reference voltage; 4. High level; 5. Low level; 6. PNP transistor Qa; 7. MOS tube; 8. Push-pull circuit; 9. Main circuit; 10. Transistor Qb; 11. Transistor Qc. DETAILED DESCRIPTION

[0018] The following is a description of the implementation of the present invention by specific embodiments. People familiar with the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0019] like Figure 2 As shown, a CP wave control circuit includes a comparator 1. In this embodiment, the LM2903 comparator 1 is used. The two input ends of the comparator 1 receive the control voltage 2 and the reference voltage 3 respectively. The comparator is also connected to the high level end and the low level end. The control voltage 2 and the reference voltage 3 are both analog signals. When the control voltage 2 is higher than the reference voltage 3, the comparator 1 outputs a high level. When the control voltage 2 is lower than the reference voltage 3, the comparator 1 outputs a low level. A specific embodiment, Figure 2 The non-inverting input terminal (+) of comparator 1 is connected to the CP_PWM issued by the MCU, the inverting input terminal (-) is connected to the 2.5V level, the GND terminal is connected to -12V, and the VCC terminal is connected to +12V. When the input voltage of CP_PWM is higher than 2.5V, comparator 1 outputs +12V. Conversely, when the input voltage of CP_PWM is lower than 2.5V, comparator 1 outputs -12V.

[0020] The high-level end of the comparator 1 is provided with a high-level voltage pull-up circuit, which can provide a stable high-level output. Specifically, the high-level voltage pull-up circuit includes a PNP transistor Qa6, the emitter of the PNP transistor Qa6 is connected to the high-level end of the comparator, the collector of the PNP transistor Qa6 is connected to the output end of the comparator 1, and the base of the PNP transistor Qa6 is connected to the MOS transistor 7. The MOS transistor 7 is used to control the on and off of the PNP transistor Qa, and plays the role of controlling the switch. The gate of the MOS transistor 7 receives the high-level signal of the MCU, the source of the MOS transistor 7 is grounded, and the drain of the MOS transistor 7 is connected to the base of the PNP transistor Qa6, wherein the source and base of the MOS transistor 7 are both configured with resistors. Specifically, the high level output by the comparator 1 is isolated by the transistor Qa6. In this embodiment, the PNP transistor Qa6 is a PNP transistor. The MCU sends a high level signal to turn on the MOS tube 7. A voltage difference is generated between the base and the emitter of the PNP transistor Qa6. The PNP transistor Qa6 is turned on, and the high level pull-up is led to the output end of the comparator 1.

[0021] like Figure 3 As shown, the output end of the comparator 1 is connected to the push-pull circuit 8. When the fixed frequency CP_PWM is sent from the MCU to the comparator 1, such as a square wave PWM with an amplitude of 0~5V, if the amplitude of PWM is higher than the reference voltage 3, the comparator 1 outputs a high level; if the amplitude of PWM is lower than the reference voltage 3, the comparator 1 outputs a low level (the internal transistor of the LM2903 comparator 1 is pulled down to the GND end, and the GND end is connected to -12V at this time), that is, the output end outputs a square wave of -12V~+12V, and the square wave output from the output end is used to drive the push-pull circuit 8, and the push-pull circuit 8 is used to enhance the carrying capacity of the CP signal.

[0022] The push-pull circuit 8 includes a main circuit 9, wherein the main circuit 9 is connected in parallel with an NPN transistor and a PNP transistor, wherein the base and emitter of the NPN transistor and the PNP transistor are both connected to the main circuit 9, the collector of the NPN transistor is connected to a high level, such as +12V; the collector of the PNP transistor is connected to a low level, such as -12V. The input voltage at one end of the push-pull circuit 8 is the same as the high level voltage, and the input voltage at the other end is the same as the low level voltage. Combining the previous example with the attached example, Figure 2 The upper terminal of the push-pull circuit 8 is connected to +12V, and the lower terminal is connected to -12V, so that the push-pull circuit 8 can output -12V~+12V. When the input signal jumps from -12V to +12V, the NPN transistor Qc11 is turned on; when it jumps from +12V to -12V, the PNP transistor Qb10 is turned on.

[0023] Working principle: The non-inverting input ("+" end) of comparator 1 is connected to the CP_PWM issued by the MCU, the reverse input ("-" end) is connected to the 2.5V level, the GND end is connected to -12V, and the VCC end is connected to +12V. At this time, the CP_PWM is a 5V high level issued by the single-chip microcomputer. The pull-up at the output end is due to the low level of 12V_EN issued by the MCU, the MOS tube 7 is not turned on, and the base and emitter of the PNP transistor Qa6 cannot produce a voltage difference, so the PNP transistor Qa6 cannot be turned on, and the 12V pull-up voltage cannot be given to the output end. At this time, the non-inverting input ("+" end) is greater than the reverse input ("-" end), and the output is pulled to a logic high level. At this time, the LM2903 comparator 1 is in a high-impedance state, and has no driving capability for the external push-pull circuit 8 after the output. The push-pull circuit 8 no longer works. At this time, if the external CP signal is received, it will no longer be affected.

[0024] Although the present invention has been described in detail above by general description and specific embodiments, it is obvious to those skilled in the art that some modifications or improvements can be made to the present invention. Therefore, these modifications or improvements made without departing from the spirit of the present invention all belong to the scope of protection claimed by the present invention.

Claims

1. A CP wave control circuit, characterized in that: A comparator is included, wherein two input terminals of the comparator receive a control voltage and a reference voltage respectively, and the comparator is also connected to a high level terminal and a low level terminal. When the control voltage is higher than the reference voltage, the comparator outputs a high level, and when the control voltage is lower than the reference voltage, the comparator outputs a low level. The high level terminal of the comparator is provided with a high level voltage pull-up circuit; The high-level voltage pull-up circuit comprises a PNP transistor Qa, the emitter of the PNP transistor Qa is connected to the high-level end of the comparator, the collector of the PNP transistor Qa is connected to the output end of the comparator, the base of the PNP transistor Qa is connected to the MOS transistor through a resistor, the source of the MOS transistor is grounded, and the drain of the MOS transistor is connected to the base of the PNP transistor Qa; The MCU sends a high-level signal to turn on the MOS tube, and a voltage difference is generated between the base and emitter of the PNP transistor Qa. The PNP transistor Qa is turned on, and the high-level pull-up is led to the output end of the comparator. The pull-up of the output end is because the signal sent by the MCU is low level, the MOS tube is not turned on, and the base and emitter of the PNP transistor Qa cannot generate a voltage difference, so the PNP transistor Qa cannot be turned on, and the comparator is in a high-impedance state; The output end of the comparator is connected to a push-pull circuit, which includes a main circuit. The main circuit is respectively connected in parallel with an NPN transistor and a PNP transistor, wherein the base and emitter of the NPN transistor and the PNP transistor are both connected to the comparator output, the collector of the NPN transistor is connected to a high level, and the collector of the PNP transistor is connected to a low level.

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