Transceiver hybrid circuit, communication method and communication system applied to Ethernet

Abstract

The present application provides a hybrid transceiver circuit, communication method and communication system for Ethernet, the circuit comprising: a differential transmission module, connected to the differential twisted pair port of Ethernet, configured to transmit the signal to be transmitted in a differential form; a transmission elimination module, configured to eliminate the interference signal from the transmitting end in the signal, and amplify the signal for subsequent reception; a load module, including a circuit load, the input and output impedance of the differential twisted pair port is matched with the circuit load. The differential transmission circuit structure of the present application is simple, and the transmission elimination can not only eliminate the linear part in the transmission signal, but also the nonlinear part, and at the same time, it also has a 2-fold amplification effect on the received signal.

Description

Technical Field

[0001] The present application belongs to the technical field of Ethernet communication, and relates to a hybrid transceiver circuit, and in particular to a hybrid transceiver circuit, a communication method and a communication system applied to Ethernet. Background Art

[0002] Ethernet communication is a wired communication. The medium for signal transmission is a differential twisted pair made of copper wire. The data rates for signal transmission are 10Mbps, 100Mbps, 1000Mbps, 2.5Gbps, 5Gbps and 10Gbps. Ethernet communication application scenarios mainly include industrial applications and vehicle applications. Ethernet communication transmission mode supports half-duplex and full-duplex.

[0003] The full-duplex transmission mode requires that the signal must be sent and received at the same time. In addition, in order to reduce the weight of the twisted pair, 1000M industrial or automotive Ethernet requires that the signal must be sent and received using the same pair of differential twisted pairs. These two characteristics determine that the sending signal and the receiving signal will appear on the same pair of differential lines at the same time, and the sending signal will inevitably interfere with the receiving signal. In order to communicate normally, it is necessary to eliminate the interference signal from the sending signal in the receiving signal.

[0004] In the existing solution, an interference signal elimination circuit is designed. In the circuit, since the input of the transconductance unit is high impedance, the received signal current will not flow through the resistor, so the received voltage signal at the output of the transconductance unit will also appear at the input of the transconductance unit and the middle node of the feedback resistor. For the output signal, the amplitude of the transmitted signal at the input and output of the transconductance unit is opposite, so the output signal size of the middle node of the feedback resistor is 0. However, although this circuit eliminates the interference of the transmitted signal on the received signal, it does not process the received signal. Summary of the invention

[0005] The present application provides a hybrid transceiver circuit, a communication method and a communication system applied to Ethernet, which are used to solve the problem of how to eliminate the interference of a transmitted signal on a received signal while improving the quality of the received signal.

[0006] In a first aspect, the present application provides a hybrid transceiver circuit for Ethernet, the circuit comprising: a differential transmission module, connected to a differential twisted pair port of Ethernet, and configured to transmit a signal to be transmitted in a differential form; a transmission elimination module, configured to eliminate interference signals originating from a transmitting end in the signal, and amplify the signal for subsequent reception; a load module, comprising a circuit load, the input and output impedances of the differential twisted pair port being matched with the circuit load.

[0007] In an implementation manner of the first aspect, the differential transmitting module includes a first transmitting unit; the first transmitting unit includes a zeroth MOS tube, a second MOS tube and a first resistor; the source of the zeroth MOS tube and the source of the second MOS tube are both connected to the ground, the gate of the zeroth MOS tube, the drain of the zeroth MOS tube, and the gate of the second MOS tube are all connected to one end of the first resistor, the other end of the first resistor is connected to the drain of the second MOS tube, and the gate of the zeroth MOS tube serves as a transmitting input end of the first transmitting unit.

[0008] In an implementation of the first aspect, in response to a single-ended transmission signal being a positive output, a path of the transmission signal is: an input signal at the transmission input end of the first transmitting unit is directed to the outside by the gate of the zeroth MOS tube; in response to a single-ended reception signal being a positive output, a path of the reception signal is: a reception signal is transmitted from one end of the first circuit load to the other end of the first circuit load.

[0009] In an implementation manner of the first aspect, the differential transmitting module further includes a second transmitting unit; the second transmitting unit includes a first MOS tube, a third MOS tube, and a second resistor; the source of the first MOS tube and the source of the third MOS tube are both connected to the ground, the gate of the first MOS tube, the drain of the first MOS tube, and the gate of the third MOS tube are all connected to one end of the second resistor, the other end of the second resistor is connected to the drain of the third MOS tube, and the gate of the first MOS tube serves as a transmitting input end of the second transmitting unit.

[0010] In an implementation of the first aspect, in response to the single-ended transmission signal being a negative output, the path of the transmission signal is: the input signal at the transmission input end of the second transmitting unit is directed from the outside to the gate of the first MOS tube; in response to the single-ended receiving signal being a negative output, the path of the receiving signal is: the receiving signal is transmitted from one end of the second circuit load to the other end of the second circuit load.

[0011] In an implementation manner of the first aspect, the transmission elimination module includes: a fourth MOS transistor, a fifth MOS transistor, a first differential resistor, and a second differential resistor; the fourth MOS transistor has the same signal direction as the second MOS transistor, and the fifth MOS transistor uses a transmission elimination signal with opposite polarity of a differential pair to eliminate an interference signal originating from a transmitting end in the signal.

[0012] In an implementation of the first aspect, the load module includes a first circuit load and a second circuit load; one end of the first circuit load is connected to the drain of the second MOS tube, one end of the second circuit load is connected to the drain of the third MOS tube, and the other end of the first circuit load and the other end of the second circuit load are both connected to ground; in response to a single-ended transmission signal output, the transmission current on the first circuit load and the second circuit load is half of the input signal at the transmitting end multiplied by a preset amplification factor; in response to a single-ended receiving signal output, the receiving current on the first circuit load and the second circuit load is twice the input signal at the receiving end.

[0013] In a second aspect, the present application provides a communication method, which is applied to the hybrid transceiver circuit; the communication method includes: transmitting the signal to be transmitted in a differential form; wherein, when transmitting in a differential form, the input and output impedances of the differential twisted pair port are matched with the circuit load; eliminating the interference signal in the signal originating from the transmitting end; and amplifying the signal for subsequent reception.

[0014] In a third aspect, the present application provides a communication system, the communication system comprising: the above-mentioned transceiver hybrid circuit.

[0015] In an implementation manner of the third aspect, the communication system further includes: a receiving module configured to receive the signal after the transmission elimination module eliminates an interference signal originating from the transmitting end in the signal and amplifies the signal.

[0016] As described above, the hybrid transceiver circuit, communication method and communication system applied to Ethernet described in the present application have the following beneficial effects:

[0017] Traditional hybrid transmit-receive circuits rely on high-performance transmitters or require complex transmit elimination paths, and are unable to achieve simultaneous transmit elimination and amplification of received signals. The transmit circuit structure in the hybrid transmit-receive circuit of the present application is simple, and transmit elimination can not only eliminate the linear part of the transmit signal, but also the nonlinear part. In addition, the same circuit is used to achieve a 2-fold amplification of the received signal, which is of great benefit to the noise performance suppression of the subsequent circuit of the receiving channel, thereby improving the system performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 Shown is a structural schematic diagram of the transceiver hybrid circuit described in an embodiment of the present application.

[0019] Figure 2 Shown is a first circuit structure diagram of the transceiver hybrid circuit described in an embodiment of the present application.

[0020] Figure 3Shown is a second circuit structure diagram of the transceiver hybrid circuit described in an embodiment of the present application.

[0021] Figure 4 Shown is a transmission path diagram of the first transmitting unit of the transceiver hybrid circuit described in an embodiment of the present application.

[0022] Figure 5 Shown is a receiving path diagram of a first transmitting unit of a transceiver hybrid circuit according to an embodiment of the present application.

[0023] Figure 6 Shown is a transmission path diagram of the second transmitting unit of the transceiver hybrid circuit described in an embodiment of the present application.

[0024] Figure 7 Shown is a receiving path diagram of a second transmitting unit of the transceiver hybrid circuit described in an embodiment of the present application.

[0025] Figure 8 Shown is a schematic diagram of a transmission cancellation circuit of a transceiver hybrid circuit described in an embodiment of the present application.

[0026] Fig. 9 Shown is a principle flow chart of the communication method described in an embodiment of the present application.

[0027] Fig.10 Shown is a structural schematic diagram of the communication system described in an embodiment of the present application.

[0028] Fig.11 Shown is a schematic diagram of the structural connection of the communication system described in an embodiment of the present application.

[0029] Component number description

[0030] 1 Transceiver hybrid circuit for Ethernet

[0031] 11 Differential Transmitter Module

[0032] 111 First Transmitter Unit

[0033] 112 Second Transmitter Unit

[0034] 12. Emission cancellation module

[0035] 13 Load Module

[0036] 2 Receiver Module

[0037] Steps S91 to S92 DETAILED DESCRIPTION

[0038] The following describes the embodiments of the present application through specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. The present application can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0039] It should be noted that the illustrations provided in the following embodiments are only used to illustrate the basic concept of the present application in a schematic manner, and therefore the illustrations only show components related to the present application rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0040] The present application proposes a novel hybrid transceiver circuit, which has the characteristics of eliminating the interference of the transmission signal on the reception and amplifying the reception signal. The hybrid transceiver circuit of the present application can be used for traditional Ethernet or vehicle-mounted Ethernet, because both vehicle-mounted Ethernet and traditional Ethernet send and receive signals simultaneously on the same pair of twisted pairs. The difference is that 1000M traditional Ethernet has 4 pairs of wires, and the maximum transmission rate of each pair of wires is 250Mbps, while 1000M vehicle-mounted Ethernet has 1 pair of wires and a transmission rate of 1000Mbps. The technical solution in the embodiment of the present application will be described in detail below in conjunction with the drawings in the embodiment of the present application.

[0041] See also Figure 1 , which is a schematic diagram of the structure of the transmitting and receiving hybrid circuit described in the embodiment of the present application. Figure 1 As shown, an embodiment of the present application provides a hybrid transceiver circuit 1 applied to Ethernet, specifically comprising: a differential transmission module 11 , a transmission elimination module 12 and a load module 13 .

[0042] The differential transmission module 11 is connected to the differential twisted pair port of the Ethernet and is configured to transmit the signal to be transmitted in a differential form.

[0043] The transmission elimination module 12 is configured to eliminate interference signals from the signal originating from the transmitting end, and amplify the signal for subsequent reception.

[0044] The load module 13 includes a circuit load, and the input and output impedances of the differential twisted pair port are matched with the circuit load.

[0045] See also Figure 2, showing the first circuit structure diagram of the transceiver hybrid circuit described in the embodiment of the present application and the second circuit structure diagram of the transceiver hybrid circuit described in the embodiment of the present application. The transceiver hybrid circuit of the present application can be implemented using an NMOS (N-Metal-Oxide-Semiconductor) structure, and other variant circuits may use a PMOS (P-Metal-Oxide-Semiconductor) or use both NMOS and PMOS. Figure 2 As shown, a hybrid transceiver circuit with only NMOS tubes is shown; Figure 3 As shown, a hybrid transceiver circuit (NMOS and PMOS are used simultaneously) including a complete push-pull differential circuit is shown, wherein M0 and M0' form a push-pull structure, M1 and M1' form a push-pull structure, M2 and M2' form a push-pull structure, M3 and M3' form a push-pull structure, M4 and M4' form a push-pull structure, and M5 and M5' form a push-pull structure. In practical applications, for the transmitter (differential transmission module), a current mirror negative feedback structure is adopted, M0 and M2 form a current mirror, and a cross-stage feedback resistor Rfb is provided between MO and M2 to perform output impedance matching.

[0046] like Figure 2 and Figure 3 As shown, MDIP / MDIN is the port of the differential twisted pair of Ethernet, that is, the output of the transmitting circuit, and also the input of the transmitting and receiving mixed circuit; RXP / RXN is the output of the transmitting and receiving mixed circuit, and also the input of the receiving circuit. The differential transmitting module 11 is respectively composed of M0 / M1, M2 / M3, Rfb1, and Rfb2 in its differential form, and the transmitting elimination module 12 is composed of M4 / M and Rff in its differential form. The load module 13 includes RL1 and RL2, and RL1 and RL2 are the circuit loads of the differential twisted pair. In order to save the power consumption of the previous stage circuit, M0 / M1:M2 / M3=1:m, where M0 involved in the calculation is represented by the channel width of transistor M0, M1 is represented by the channel width of transistor M1, M2 is represented by the channel width of transistor M2, and M3 is represented by the channel width of transistor M3. For the integrity of the signal, the output / input impedance of MDIP / MDIN must match RL, so Rfb=(1+m)RL.

[0047] In one embodiment, the differential transmitting module includes a first transmitting unit.

[0048] The first transmitting unit includes a zeroth MOS tube, a second MOS tube and a first resistor; the source of the zeroth MOS tube and the source of the second MOS tube are both connected to the ground, the gate of the zeroth MOS tube, the drain of the zeroth MOS tube and the gate of the second MOS tube are all connected to one end of the first resistor, the other end of the first resistor is connected to the drain of the second MOS tube, and the gate of the zeroth MOS tube serves as the transmitting input end of the first transmitting unit.

[0049] like Figure 2 and Figure 3 As shown, the differential transmitting module 11 includes a first transmitting unit 111. The first transmitting unit 111 includes a zeroth MOS transistor M0, a second MOS transistor M2 and a first resistor Rfb1.

[0050] The source of the zeroth MOS tube M0 and the source of the second MOS tube M2 are both connected to the ground, the gate of the zeroth MOS tube M0, the drain of the zeroth MOS tube M0, and the gate of the second MOS tube M2 are all connected to one end of the first resistor Rfb1, the other end of the first resistor Rfb1 is connected to the drain of the second MOS tube M2, and the gate of the zeroth MOS tube M0 serves as the transmission input end of the first transmitting unit 111.

[0051] In one embodiment, in response to the single-ended transmission signal being a positive output, the path of the transmission signal is: the input signal of the transmission input end of the first transmitting unit 111 is directed to the outside by the gate of the zeroth MOS tube M0; in response to the single-ended receiving signal being a positive output, the path of the receiving signal is: the receiving signal is transmitted from one end of the first circuit load to the other end of the first circuit load.

[0052] See also Figure 4 , which shows a transmission path diagram of the first transmitting unit of the transmitting-receiving hybrid circuit according to an embodiment of the present application. Figure 4 As shown, in response to the single-ended transmission signal MDIP being a positive output, the path of the transmission signal is: the input signal itx of the transmission input end of the first transmitting unit 111 is directed from the gate of the zeroth MOS transistor M0 to the outside.

[0053] See also Figure 5 , which shows a receiving path diagram of the first transmitting unit of the transceiver hybrid circuit according to an embodiment of the present application. Figure 5 As shown, in response to the single-ended receiving signal RXP being a positive output, the path of the receiving signal is: the receiving signal irx is transmitted from the left end of the first circuit load RL1 to the right end of the first circuit load RL1.

[0054] In one embodiment, the differential transmitting module further includes a second transmitting unit.

[0055] The second transmitting unit includes a first MOS tube, a third MOS tube and a second resistor; the source of the first MOS tube and the source of the third MOS tube are both connected to the ground, the gate of the first MOS tube, the drain of the first MOS tube and the gate of the third MOS tube are all connected to one end of the second resistor, the other end of the second resistor is connected to the drain of the third MOS tube, and the gate of the first MOS tube serves as the transmitting input end of the second transmitting unit.

[0056] like Figure 2 and Figure 3 As shown, the differential transmitting module further includes a second transmitting unit 112. The second transmitting unit 112 includes a first MOS transistor M1, a third MOS transistor M3 and a second resistor Rfb2.

[0057] The source of the first MOS tube M1 and the source of the third MOS tube M3 are both connected to the ground, the gate of the first MOS tube M1, the drain of the first MOS tube M1, and the gate of the third MOS tube M3 are all connected to one end of the second resistor Rfb2, the other end of the second resistor Rfb2 is connected to the drain of the third MOS tube M3, and the gate of the first MOS tube M1 serves as the transmission input end of the second transmitting unit 112.

[0058] In one embodiment, in response to the single-ended transmission signal being a negative output, the path of the transmission signal is: the input signal of the transmission input end of the second transmitting unit is directed from the outside to the gate of the first MOS tube; in response to the single-ended receiving signal being a negative output, the path of the receiving signal is: the receiving signal is transmitted from one end of the second circuit load to the other end of the second circuit load.

[0059] See also Figure 6 , which shows a transmission path diagram of the second transmitting unit of the transmitting and receiving hybrid circuit according to an embodiment of the present application. Figure 6 As shown, in response to the single-ended transmission signal MDIN being a negative output, the path of the transmission signal is: the input signal itx of the transmission input end of the second transmission unit 112 is directed from the outside to the gate of the first MOS tube M1.

[0060] See also Figure 7 , which shows a receiving path diagram of the second transmitting unit of the transceiver hybrid circuit according to an embodiment of the present application. Figure 7 As shown, in response to the single-ended receiving signal RXN being a negative output, the path of the receiving signal is: the receiving signal irx is transmitted from the right end of the second circuit load RL2 to the left end of the second circuit load RL2.

[0061] Combination Figures 4 to 7 , the signal path analysis of the hybrid transceiver circuit is as follows:

[0062] First, analyze the path of the transmitted signal, such as Figure 4 As shown, itx is the input signal of the transmitter, Vtx is the voltage corresponding to itx, Irl is the output signal of the transmitter, I4 is the transmission elimination signal, and I0, I2, Ifb are the currents flowing through the corresponding components in the transmission circuit. According to Kirchhoff's equation, the following formula can be listed:

[0063] I2=Vtx / RL1+Vtx / Rfb1 (1)

[0064] I0=itx-Vtx / Rfb 1 (2)

[0065] I2=I0*m (3)

[0066] From the above formulas (1) to (3), we can get

[0067] Irl=itx*m / 2,

[0068] I2=itx*(m+2)*m / (m+1) / 2,

[0069] I4=itx*(m+2)*n / (m+1) / 2.

[0070] That is, the emission current on the load is half of itx multiplied by the first preset amplification factor m. When m>>1, I4, that is, the emission elimination signal is half of itx multiplied by the second preset amplification factor n. Among them, the amplification factors m and n are the ratio of the channel widths of the transistors referred to above, such as Figures 2 to 7 The ratio of the channel widths marked. When the bias voltage of the transistor is constant, the ratio of the widths of the transistors is the ratio of the current sizes, which can also be said to be the current amplification factor. At this time, the signal directions of M2 and M4 are the same. If you want to eliminate the transmit signal at the receiving end, you must use the other end of the differential pair with opposite polarity to transmit the cancellation signal, that is, M5. At the receiving end, the size of the transmit signal is Vtx_cancel=Vtx+I5*Rff=itx*m / 2*RL-itx*n / 2*Rff=itx(m*RL-n*Rff) / 2. So when RL:Rff=n:m, Vtx_cancel=0, that is, the transmit signal will not appear at the receiving end to interfere with the reception.

[0071] Then analyze the received signal, such as Figure 5 As shown in the figure, at the same MDIP end, the direction of the received signal current of M0, M2, and M4 is opposite to that of the transmitted signal. According to Kirchhoff's equation, the following formula can be listed:

[0072] I2=2irx-Vrx / Rfb-Vrx / RL (4)

[0073] I0=Vrx / Rfb (5)

[0074] I2=m*I0 (6)

[0075] From the above formulas (4) to (6), we can get

[0076] Irl=irx,

[0077] I2=irx*m / (m+1),

[0078] I4=irx*n / (m+1),

[0079] Since the receiving signal in the transmitting signal elimination circuit has the opposite polarity to the transmitting signal, and the transmitting signal and the receiving signal on the MDI port have the same polarity, when the transmitting signal at the receiving end is eliminated, the receiving signal is not eliminated at the same time, but amplified instead. Figure 2 It can be calculated that Vrx_cancel=Vrx+I5*Rff=Vrx-I4*Rff=irx*RL+irx*n*Rff / (m+1)=irx*(RL+Rff*n / (m+1)). Since RL:Rff=n:m in order to eliminate the transmission signal, Vrx_cancel=irx*RL*(2m+1) / (m+1). When m>>1, it can be approximated as Vrx_cancel=2*irx*RL=2*Vrx. That is, the amplification factor of the new hybrid transmit-receive circuit for the input signal is 2.

[0080] In one embodiment, the emission elimination module includes: a fourth MOS transistor, a fifth MOS transistor, a first differential resistor and a second differential resistor.

[0081] The signal direction of the fourth MOS tube is the same as that of the second MOS tube, and the fifth MOS tube eliminates the interference signal from the transmitting end in the signal by using the transmission elimination signal with opposite polarity of the differential pair.

[0082] like Figure 2 and Figure 3 As shown, the emission elimination module 12 includes: a fourth MOS transistor M4, a fifth MOS transistor M5, a first differential resistor Rff1 and a second differential resistor Rff2. The fourth MOS transistor M4 has the same signal direction as the second MOS transistor M2, and the fifth MOS transistor M5 uses the emission elimination signal with opposite polarity of the differential pair to eliminate the interference signal from the transmitting end in the signal.

[0083] See also Figure 8 , which is a schematic diagram of a transmission elimination circuit of a transmitting and receiving hybrid circuit according to an embodiment of the present application. Figure 8As shown, the specific circuit implementation of the transmission elimination module in the transceiver hybrid circuit is shown. The current mirror M5 / M4 can adopt a common source and common gate structure to improve the output impedance; the resistance part Rff can be programmably adjusted to overcome the process deviation in the actual mass production process.

[0084] In one embodiment, the load module includes a first circuit load and a second circuit load.

[0085] One end of the first circuit load is connected to the drain of the second MOS tube, one end of the second circuit load is connected to the drain of the third MOS tube, and the other end of the first circuit load and the other end of the second circuit load are both connected to the ground.

[0086] like Figure 2 and Figure 3 As shown, the load module 13 includes a first circuit load RL1 and a second circuit load RL2. One end of the first circuit load RL1 is connected to the drain of the second MOS transistor M2, one end of the second circuit load RL2 is connected to the drain of the third MOS transistor M3, and the other end of the first circuit load RL1 and the other end of the second circuit load RL2 are both connected to the ground.

[0087] In response to the single-ended transmission signal output, the transmission current on the first circuit load and the second circuit load is half of the input signal at the transmission end multiplied by a preset amplification factor.

[0088] In response to the single-ended receiving signal output, the receiving current on the first circuit load and the second circuit load is twice the input signal of the receiving end.

[0089] See also Fig. 9 , which is a flow chart showing the principle of the communication method described in the embodiment of the present application. Fig. 9 As shown, an embodiment of the present application provides a communication method, which is applied to the transceiver hybrid circuit. The transceiver hybrid circuit includes: a differential transmission module, connected to the differential twisted pair port of Ethernet, and configured to transmit the signal to be transmitted in a differential form; a transmission elimination module, configured to eliminate the interference signal from the transmitting end in the signal, and amplify the signal for subsequent reception; a load module, including a circuit load, and the input and output impedance of the differential twisted pair port is matched with the circuit load.

[0090] The communication method specifically comprises the following steps:

[0091] S91, transmitting the signal to be transmitted in a differential form; wherein, when transmitting in the differential form, the input and output impedances of the differential twisted pair port are matched with the circuit load.

[0092] S92, eliminating interference signals from the signal originating from the transmitting end.

[0093] S93, amplify the signal for subsequent reception.

[0094] See also Fig.10 , which is a schematic diagram of the structure of the communication system described in the embodiment of the present application. Fig.10 As shown, an embodiment of the present application provides a communication system, and the communication system includes: the transceiver hybrid circuit 1. The transceiver hybrid circuit 1 includes: a differential transmission module, connected to the differential twisted pair port of the Ethernet, and configured to transmit the signal to be transmitted in a differential form; a transmission elimination module, configured to eliminate the interference signal from the transmitting end in the signal, and amplify the signal for subsequent reception; a load module, including a circuit load, and the input and output impedance of the differential twisted pair port is matched with the circuit load.

[0095] See also Fig.11 , which is a schematic diagram showing the structural connection of the communication system described in the embodiment of the present application. Fig.11 As shown, the communication system further includes: a receiving module 2.

[0096] The receiving module 2 is configured to receive the signal after the transmission elimination module eliminates the interference signal from the transmitting end and amplifies the signal.

[0097] The protection scope of the communication method described in the embodiment of the present application is not limited to the execution order of the steps listed in the present embodiment. All solutions implemented by adding, reducing or replacing steps in the prior art based on the principles of the present application are included in the protection scope of the present application.

[0098] The transceiver hybrid circuit described in the embodiment of the present application can implement the communication method described in the present application, but the implementation device of the communication method described in the present application includes but is not limited to the structure of the transceiver hybrid circuit listed in the present embodiment. All structural deformations and replacements of the prior art made according to the principles of the present application are included in the protection scope of the present application.

[0099] In the several embodiments provided in the present application, it should be understood that the disclosed system, circuit or method can be implemented in other ways. For example, the circuit embodiments described above are only schematic. For example, the division of modules / units is only a logical function division. There may be other division methods in actual implementation, such as multiple modules or units can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or modules or units, which can be electrical, mechanical or other forms.

[0100] The modules / units described as separate components may or may not be physically separated, and the components displayed as modules / units may or may not be physical modules, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules / units may be selected according to actual needs to achieve the purpose of the embodiments of the present application. For example, the functional modules / units in the various embodiments of the present application may be integrated into one processing module, or each module / unit may exist physically separately, or two or more modules / units may be integrated into one module / unit.

[0101] Those of ordinary skill in the art should further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0102] The descriptions of the processes or structures corresponding to the above-mentioned figures have different emphases. For parts that are not described in detail in a certain process or structure, please refer to the relevant descriptions of other processes or structures.

[0103] The above embodiments are merely illustrative of the principles and effects of the present application and are not intended to limit the present application. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed in the present application shall still be covered by the claims of the present application.

Claims

1. A hybrid transceiver circuit applied to Ethernet, characterized in that: The circuit comprises: The differential transmission module is connected to the differential twisted pair port of the Ethernet and is configured to transmit the signal to be transmitted in a differential form; A transmission elimination module, configured to eliminate interference signals from the signal originating from the transmitting end, and amplify the signal for subsequent reception; A load module, including a circuit load, wherein the input and output impedances of the differential twisted pair port are matched with the circuit load; The differential transmitting module includes a first transmitting unit; the first transmitting unit includes a zeroth MOS tube, a second MOS tube and a first resistor; the source of the zeroth MOS tube and the source of the second MOS tube are both connected to the ground, the gate of the zeroth MOS tube, the drain of the zeroth MOS tube and the gate of the second MOS tube are all connected to one end of the first resistor, the other end of the first resistor is connected to the drain of the second MOS tube, and the gate of the zeroth MOS tube serves as the transmitting input end of the first transmitting unit; In response to the single-ended transmission signal being a positive output, the path of the transmission signal is: the input signal of the transmission input end of the first transmission unit is directed to the outside by the gate of the zeroth MOS tube; in response to the single-ended reception signal being a positive output, the path of the reception signal is: the reception signal is transmitted from one end of the first circuit load to the other end of the first circuit load; The differential transmitting module also includes a second transmitting unit; the second transmitting unit includes a first MOS tube, a third MOS tube and a second resistor; the source of the first MOS tube and the source of the third MOS tube are both connected to the ground, the gate of the first MOS tube, the drain of the first MOS tube and the gate of the third MOS tube are all connected to one end of the second resistor, the other end of the second resistor is connected to the drain of the third MOS tube, and the gate of the first MOS tube serves as the transmitting input end of the second transmitting unit; In response to the single-ended transmission signal being a negative output, the path of the transmission signal is: the input signal of the transmission input end of the second transmission unit is directed from the outside to the gate of the first MOS tube; in response to the single-ended receiving signal being a negative output, the path of the receiving signal is: the receiving signal is transmitted from one end of the second circuit load to the other end of the second circuit load; The emission elimination module includes: a fourth MOS transistor, a fifth MOS transistor, a first differential resistor and a second differential resistor; the fourth MOS transistor has the same signal direction as the second MOS transistor, and the fifth MOS transistor eliminates the interference signal from the transmitting end in the signal by using the emission elimination signal with opposite polarity of the differential pair; The load module includes a first circuit load and a second circuit load; one end of the first circuit load is connected to the drain of the second MOS tube, one end of the second circuit load is connected to the drain of the third MOS tube, and the other end of the first circuit load and the other end of the second circuit load are both connected to the ground; in response to a single-ended transmission signal output, the transmission current on the first circuit load and the second circuit load is half of the input signal at the transmission end multiplied by a preset amplification factor; in response to a single-ended reception signal output, the reception current on the first circuit load and the second circuit load is twice the input signal at the reception end.

2. A communication method, characterized in that: Applicable to the transceiver hybrid circuit of claim 1; the communication method comprises: The signal to be transmitted is transmitted in a differential form; wherein the input and output impedances of the differential twisted pair port are matched with the circuit load during the differential transmission; Eliminating interference signals from the transmitting end in the signal; The signal is amplified for subsequent reception.

3. A communication system, characterized in that: The communication system comprises: the transceiver hybrid circuit according to claim 1.

4. The communication system according to claim 3, characterized in that: The communication system further comprises: The receiving module is configured to receive the signal after the transmission elimination module eliminates the interference signal from the transmitting end in the signal and amplifies the signal.

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