A method for testing temperature calibration in the CP mass production stage of an integrated circuit

Abstract

The present invention discloses a method for temperature calibration in CP mass production testing of integrated circuits, which includes arbitrarily selecting two wafers from the same batch of wafers to be subjected to CP mass production testing as the first wafer and the second wafer, dividing a number of test areas on the first wafer and the second wafer at the mass production environment temperature to be corrected and performing temperature testing, and recording and calculating the temperature ADC values of each test area; packaging and verifying the chips corresponding to each test area of the first wafer, so as to obtain the temperature difference to be compensated and the ADC change difference of the verification chips when the temperature changes; calculating the calculated ADC value of the second wafer based on the ADC change difference; and performing temperature compensation on the probe station based on the compensated temperature difference and the calculated ADC value. By means of the wafer temperature measurement function of the same product and accurately simulating the environmental temperature state during product mass production, the temperature of the probe station is roughly adjusted and finely adjusted, so as to ensure the accuracy of the wafer test environment temperature.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit testing, and particularly to a method for calibrating the test temperature during the CP mass production stage of an integrated circuit. Background Art

[0002] Currently, many MCU and SOC chips integrate temperature sensors inside and have temperature measurement functions. Due to industrial differences, there are often certain discreteness in the temperature measurement functions of these chips. Therefore, it is necessary to calibrate the temperature sensors during the testing process to enable the chips to have more accurate temperature measurement performance. In addition, some chip parameters are sensitive to temperature and need to be tested at a specific and relatively accurate temperature.

[0003] Currently, for the integrated circuit testing stage, there is CP testing (chip probe), that is, wafer-level testing. During the CP testing stage, the wafer is placed on the Chuck plate in the Probe (probe station) for testing. The environment is a relatively enclosed cavity. The existing temperature calibration method in this testing stage is to take the average of 5 points (up, down, left, right, middle) on the Chuck plate during mass production using a thermometer as the reference temperature to calibrate the temperature sensor of the Probe. Then, during the mass production process, the temperature sensor of the Probe is used as the reference temperature to calibrate the temperature sensor inside the chip. The disadvantages of the current temperature calibration method are as follows: the thermometers used by each test factory vary in variety, and the accuracy can only reach 0.5 - 1 °C at most. Moreover, when measuring, the Probe card will be removed and the surface temperature of the Chuck plate will be directly measured. At this time, the Chuck plate is exposed to the air, so only the temperature of the Chuck plate can be approximately measured, not the actual temperature in the Wafer mass production environment, and there will be a large error compared with the environmental temperature during Wafer mass production testing.

[0004] As described above, there are errors in the temperature calibration of the IC to be tested during the CP stage, which results in a not-so-good calibration result for the final temperature sensor of the IC and problems such as inaccurate testing of some temperature-sensitive parameters. Summary of the Invention

[0005] In order to overcome the above deficiencies in technology, the present invention provides a method for calibrating the test temperature during the CP mass production stage of an integrated circuit. By using the temperature measurement function of the same product wafer, the environmental temperature for wafer testing of this product is corrected, accurately simulating the environmental temperature state during product mass production.

[0006] The technical solution adopted by the present invention to overcome its technical problems is:

[0007] An integrated circuit CP mass production test temperature calibration method proposed by the present invention includes: S1, arbitrarily selecting two wafers from the same batch of wafers to be subjected to CP mass production test as the first wafer and the second wafer, dividing a plurality of test areas on the first wafer and the second wafer under the mass production environment temperature to be corrected for testing, and recording and calculating the ADC value of each test area; S2, packaging and temperature verification are performed on the chips corresponding to each test area of the first wafer, so as to obtain the temperature difference to be compensated and the ADC change difference of the verification chip when the temperature changes; S3, calculating the calculated ADC value of the second wafer based on the ADC change difference; S4, performing temperature compensation on the probe station based on the compensated temperature difference and the calculated ADC value to ensure the accuracy of the wafer test environment temperature.

[0008] Wafers of the same batch are produced on the same production line and in the same time period, so the difference between wafers of the same batch is the smallest.

[0009] Further, in S2, packaging and verification are performed on the chips corresponding to each test area of the first wafer, so as to obtain the temperature difference to be compensated and the ADC change difference of the verification chip when the temperature changes. Specifically, it includes: S21, packaging the chips corresponding to each test area of the first wafer, and arbitrarily selecting one chip as the verification chip for temperature verification for each test area respectively; S22, performing a temperature verification experiment on the temperature measuring element and the verification chip at the same time, and adjusting the verification temperature to be the same as the mass production environment temperature to be corrected; S23, adjusting the verification temperature so that the ADC value of each verification chip is equal to the ADC value under the mass production environment temperature to be corrected, and recording the temperature of the temperature measuring element; S24, based on the recorded temperature of the temperature measuring element and the ADC value of the verification chip, obtaining the temperature difference to be compensated and the ADC change difference of the verification chip when the temperature changes.

[0010] By adjusting the temperature of the test chamber, the ADC value of the IC is made consistent with the mass production environment temperature to be corrected at the beginning, so as to inversely deduce the mass production environment temperature to be corrected at the beginning, the temperature Tpt_cp measured by the internal sensor of the chip, and thus calculate the temperature value that the probe station probe needs to adjust according to this temperature, that is, realize the rough adjustment of temperature compensation.

[0011] Further, in S4, performing temperature compensation on the probe station based on the compensated temperature difference and the calculated ADC value of the second wafer specifically includes: performing rough adjustment of temperature compensation on the probe station according to the compensated temperature difference; performing fine adjustment of temperature compensation on the probe station according to the calculated ADC value of the second wafer.

[0012] Further, perform fine adjustment of temperature compensation on the probe station according to the calculated ADC value of the second wafer, so that the ADC value of the second wafer under the mass production environment temperature is equal to the calculated ADC value.

[0013] Further, in step S3, the calculated ADC value of the second wafer is obtained based on the ADC change difference, which specifically includes: the calculated ADC value of the mass production environment temperature of the second wafer is equal to the sum of the ADC change difference and the ADC value of the second wafer tested at the mass production environment temperature to be corrected.

[0014] Further, it also includes step S5, where temperature compensation is performed on the mass production environment temperature detected by the probe station based on the reference chip of the second wafer, and then CP mass production testing is carried out.

[0015] Further, in step S5, temperature compensation is performed on the mass production environment temperature detected by the probe station based on the reference chip of the second wafer, and then CP mass production testing is carried out, which specifically includes: S51, recording the ADC values of several test areas of the second wafer after temperature correction and saving them as recorded ADC values, and taking the chips in the corresponding several test areas as reference chips; S52, under the mass production temperature detected by the probe station before mass production, performing temperature tests on the reference chips in the second wafer respectively, and recording the mass production test ADC values of each reference chip obtained from the tests; S53, adjusting the temperature compensation of the probe station so that the mass production test ADC value of each reference chip is consistent with the recorded ADC value, thereby obtaining the compensated mass production temperature detected by the probe station.

[0016] That is, the compensation for the mass production environment temperature of CP mass production testing is achieved through the second wafer.

[0017] The beneficial effects of the present invention are as follows:

[0018] 1. Through the temperature measurement function of the same product wafer, the environmental temperature for wafer testing of this product is corrected, accurately simulating the environmental temperature state during product mass production;

[0019] 2. Considering the influence of IC working heat generation, etc., accurately simulating the environmental temperature state during product mass production;

[0020] 3. Reducing calibration errors, enabling the wafer test environmental temperature to be controlled within ±0.5°C. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a schematic flowchart of a method for testing temperature calibration in the CP mass production stage of an integrated circuit according to the present invention;

[0022] Figure 2 It is an implementation flowchart of an embodiment of the present invention;

[0023] Figure 3 It is a five-point test schematic diagram of an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0024] First, some abbreviations and key terms mentioned in the present invention are explained.

[0025] chip probe: Wafer probe testing, which verifies the electrical characteristics and functionality of each individual Die (i.e., the uncut and unpackaged chip unit) at the wafer level.

[0026] Probe: The probe station is a platform used to hold the wafer, enabling each die and each bond pad within the wafer to be connected to the probes of the Probe card while allowing for precise positioning.

[0027] Chuck: The chuck is used to adsorb the wafer to be processed on its surface to maintain the flatness and stability of the wafer.

[0028] Probe card: The test probe card. Different chip test probe cards are different types of needle cards, mainly used for testing the wafer.

[0029] To facilitate a better understanding of the present invention by those skilled in the art, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The following is merely exemplary and does not limit the scope of protection of the present invention.

[0030] As Figure 1 shown, the flowchart of a method for calibrating the test temperature in the CP mass production stage of an integrated circuit according to this embodiment includes the following steps:

[0031] S1, arbitrarily select one wafer from the wafers of the same batch to be subjected to CP mass production testing as the first wafer and the second wafer. Divide several temperature measurement regions on the first wafer and the second wafer and conduct temperature tests at the mass production environment temperature to be corrected, and record and calculate the ADC value of each temperature measurement region.

[0032] As Figure 2 shown, it is the implementation flowchart of an embodiment of the present invention. Arbitrarily select two wafers from the same batch. At the mass production environment temperature, that is, the Probe environment temperature during mass production, select several test regions on each wafer for temperature testing, and record and calculate the ADC value of each point.

[0033] In an embodiment of the present invention, take 2 pcs of wafers of the same batch and the same process, numbered 1# wafer and 2# wafer respectively. The 1# wafer is the first wafer, and the 2# wafer is the second wafer. When the mass production Probe environment temperature is 85°C, the temperature is recorded as T cp85(校正前) .

[0034] It should be noted that 85°C in this embodiment, that is, T cp85(校正前) is the relative temperature, only the temperature detected by the Probe of the probe station, and there is an error in this temperature.

[0035] Perform five-point tests on the 1# wafer and the 2# wafer. The five positions correspond to the upper, lower, left, right, and middle positions of the wafer, as Figure 3 shown. Each test needs to record the ADC value of the IC temperature measurement sensor (such as T ADC1 ), and the IC temperature measurement sensor is the temperature detection function of the chip itself.

[0036] In an embodiment of the present invention, each point needs to be point-tested 20 times, and the average of the 20 ADC values is taken (T A =(T ADC1 +T ADC2 +...+T ADC20 ) / 20) to obtain a stable temperature ADC value. After the five-point position tests are completed, the ADC value T _ADC_A of the upper region point of the corresponding wafer, the ADC value T _ADC_B of the right region point, the ADC value T _ADC_C of the lower region point, the ADC value T _ADC_D of the left region point, and the ADC value T _ADC_E of the center region point can be obtained. Taking the 1# wafer as an example, the ADC value of its upper region point is denoted as T _ADC_A_1# , and so on. The ADC value of the center region point of the 2# wafer is denoted as T _ADC_E_2# .

[0037] S2. Package and verify the chips corresponding to each test area of the first wafer, so as to obtain the temperature difference to be compensated and the ADC change difference of the verification chip when the temperature changes.

[0038] S21. Package the chips corresponding to each test area of the first wafer, and select any one chip as a verification chip for each test area to conduct a temperature test for temperature verification;

[0039] In this embodiment, the ICs in the five test areas of the 1# wafer are packaged, and one packaged chip is taken from each of the five test areas to conduct a temperature verification experiment through a laboratory high and low temperature chamber.

[0040] S22. Conduct a temperature verification experiment on the temperature measurement element and the verification chip at the same time, and adjust the test temperature to be the same as the mass production environment temperature.

[0041] In this embodiment, in the high and low temperature chamber, the 5 ICs corresponding to the five test areas are placed in a sealed metal box, and another high-precision PT100 temperature measurement thermocouple is also placed in the middle position of the sealed metal box, close to the 5 ICs. Adjust the high and low temperature chamber so that the temperature of the PT100 temperature measurement thermocouple is stable and close to T cp85(校正前)85 °C, that is, within the range of plus or minus 0.1 of 85 degrees Celsius, record the ADC values of 5 IC temperature measurement sensors. That is, when the thermocouple PT100 reaches the mass production environment temperature to be calibrated, that is, at 85 °C detected by the probe station in this embodiment, record the ADC values of the temperature measurement sensors of the five verification chips of the 1# wafer as T _ADC_A_85 、T _ADC_B_85 、T _ADC_C_85 、T _ADC_D_85 and T _ADC_E_85 。

[0042] S23, adjust the test temperature so that the ADC value of each verification chip is the ADC value of each point at the mass production environment temperature to be calibrated, and record the temperature of the temperature measurement element.

[0043] In an embodiment of the present invention, adjust the temperature of the high and low temperature test chamber so that the ADC values of the 5 IC temperature measurement sensors are as close as possible to the ADC values recorded in the CP stage, and record the temperature of PT100 as T pt_cp 。And record the ADC values of the verification chips in the five test areas corresponding to the 1# wafer at this time as T A_1#’ 、T B_1#’ 、T C_1#’ 、T D_1#’ and T E_1#’ 。

[0044] It should be noted that since the expected mass production environment temperature was 85 °C at the beginning, in fact, during the chip test process, the temperature measured by the internal temperature sensor of the chip may deviate from 85 °C. The internal temperature sensor of the chip reflects the temperature through the ADC value. By adjusting the temperature of the test chamber, the ADC value of the IC is made consistent with that in the initial mass production test, so as to inversely deduce the initial mass production environment temperature, the temperature Tpt_cp measured by the internal sensor of the chip, and then calculate the temperature adjustment amount required for the probe based on this temperature.

[0045] S24, based on the recorded temperature of the temperature measurement element and the ADC value of the verification chip, obtain the compensated temperature difference and the ADC change difference of the verification chip when the temperature changes.

[0046] The actual self-temperature of the wafer during CP test can be determined to be close to T pt_cp through the recorded temperature measurement element. The compensated temperature difference of CP Probe check can be calculated as shown in formula (1).

[0047] T Probe_offset =T cp85(校正前) -T pt_cp (1)

[0048] According to the data of the two experiments, it can be calculated that the IC changes from T pt_cpThe temperature reaches T cp85(校正前) The ADC change difference of is shown in Table 1 below.

[0049] Table 1

[0050]

[0051] S3. Calculate the calculated ADC value of the second wafer based on the ADC change difference.

[0052] That is, the calculated ADC value of the production environment temperature of the second wafer is equal to the sum of the ADC change difference and the ADC value of the second wafer tested at the production environment temperature to be corrected, as shown in Table 2. Thus, the calculated ADC values of the production environment temperature of the second wafer are respectively denoted as T ADC_A_85calc_2# 、T ADC_B_85calc_2# 、T ADC_C_85calc_2# 、T ADC_D_85calc_2# and T ADC_E_85calc_2# .

[0053] Table 2

[0054]

[0055]

[0056] S4. Perform temperature compensation on the probe station based on the compensation temperature difference and the calculated ADC value of the second wafer to obtain the production environment temperature. Specifically, it includes:

[0057] Perform rough temperature compensation adjustment on the probe station according to the compensation temperature difference, that is, perform rough temperature compensation adjustment on the probe station through T Probe_offset calculated by formula (1).

[0058] After the rough temperature compensation adjustment, perform five-point testing on the second wafer. Perform fine temperature compensation adjustment on the probe station according to the calculated ADC value of the second wafer, so that the actual measured ADC value of the 2#Wafer is consistent with the calculated ADC value. In an embodiment of the present invention, if the error of converting the ADC value into a temperature value is within ±0.3°C, it is considered that the actual measured ADC value of the 2#Wafer is consistent with the calculated ADC value.

[0059] As shown in Table 3, calculate the ADC difference by calculating the ADC value and the ADC value tested after precise calibration, and obtain the average value of the ADC difference according to the ADC difference obtained in each test area, and convert the average value of the ADC difference into a temperature difference, so as to determine the wafer test environment temperature, that is, the corrected production environment temperature meets the accuracy index.

[0060] Table 3

[0061]

[0062] By adjusting the Probe temperature compensation value, the temperature difference T obtained through the calculation process in Table 3 _offset can be controlled within ±0.1°C, thereby controlling the temperature difference fluctuation within the 5 regions within ±0.3°C.

[0063] Thereby meeting the requirement that the temperature of the Wafer test environment, i.e., the mass production environment temperature, can be controlled within ±0.5°C.

[0064] S5. Before subsequent mass production, based on the reference chips of the second wafer, temperature compensation is performed on the mass production environment temperature detected by the probe station, and then CP mass production testing is carried out.

[0065] That is, the mass production environment temperature is accurately calibrated through the corresponding golden IC in the 2# wafer, and then mass production testing is carried out.

[0066] S51. Record the ADC values of several test regions of the second wafer after temperature calibration and save them as the recorded ADC values, and use the chips in the corresponding several test regions as reference chips.

[0067] Record the actual ADC values measured after calibration of the 2# wafer in step S4 above and save them. Among them, use the chips in the regions where the 2# wafer is tested at five points as the golden IC corresponding to the reference test regions.

[0068] S52. Under the mass production environment temperature before mass production, perform temperature tests on the reference chips in the second wafer respectively, and record the mass production test ADC values of each reference chip obtained from the tests.

[0069] Under the temperature detected by the probe station before mass production, perform five-point temperature tests on the golden ICs, i.e., the reference chips, in 5 regions of the 2# wafer respectively, and record the mass production test ADC values of each reference chip in the 5 regions obtained from the tests.

[0070] S53. By adjusting the temperature compensation of the probe station, make the mass production test ADC value of each reference chip consistent with the recorded ADC value, thereby obtaining the compensated mass production temperature detected by the probe station.

[0071] By adjusting the temperature compensation of the probe station, make the actual test ADC value of the 2# Wafer golden IC consistent with the recorded ADC value, thereby obtaining the compensated mass production temperature detected by the probe station, i.e., a relatively accurate reference temperature.

[0072] It should be noted that: in other embodiments, the steps of the corresponding method are not necessarily executed in the order shown and described in this specification. In some other embodiments, the steps included in the method may be more or less than those described in this specification. In addition, a single step described in this specification may be decomposed into multiple steps for description in other embodiments; and multiple steps described in this specification may also be combined into a single step for description in other embodiments.

Claims

1. A temperature calibration method for mass production test of integrated circuit CP, characterized in that: include: S1, randomly selecting two wafers from the same batch of wafers to be subjected to CP mass production test as the first wafer and the second wafer, dividing the first wafer and the second wafer into a plurality of test areas and conducting tests under the mass production environment temperature to be calibrated, and recording and calculating the ADC value of each test area; S2, packaging and temperature verification are performed on the chip corresponding to each test area of ​​the first wafer, so as to obtain the temperature difference to be compensated and the ADC change difference of the verification chip when the temperature changes; S3, obtaining a calculated ADC value of the second wafer based on the ADC change difference; S4, performing temperature compensation on the probe station based on the compensated temperature difference and the calculated ADC value to ensure the accuracy of the wafer test environment temperature; The step S2, packaging and verifying the chip corresponding to each test area of ​​the first wafer, so as to obtain the temperature difference to be compensated and the ADC change difference of the verification chip when the temperature changes, includes: S21, packaging the chips corresponding to each test area of ​​the first wafer, and arbitrarily selecting a chip from each test area as a verification chip for temperature verification; S22, performing a temperature verification experiment on the temperature measuring element and the verification chip at the same time, and adjusting the verification temperature to be the same as the mass production environment temperature to be calibrated; S23, adjusting the verification temperature so that the ADC value of each verification chip is equal to the ADC value at the mass production environment temperature to be calibrated, and recording the temperature of the temperature measuring element; S24, based on the recorded temperature of the temperature measuring element and the ADC value of the verification chip, obtaining the temperature difference to be compensated and the ADC change difference of the verification chip when the temperature changes; In S4, temperature compensation is performed on the probe station based on the compensated temperature difference and the calculated ADC value of the second wafer, including: Perform rough temperature compensation adjustment on the probe station according to the compensated temperature difference; The probe station is finely adjusted for temperature compensation according to the calculated ADC value of the second wafer so that the ADC value of the second wafer at the mass production environment temperature is equal to the calculated ADC value.

2. The integrated circuit CP mass production test temperature calibration method according to claim 1, characterized in that: The step S3, obtaining the calculated ADC value of the second wafer based on the ADC variation difference, specifically includes: the calculated ADC value of the mass production ambient temperature of the second wafer is equal to the sum of the ADC variation difference and the ADC value of the second wafer tested at the mass production ambient temperature to be corrected.

3. The integrated circuit CP mass production test temperature calibration method according to claim 1, characterized in that: It also includes S5, which performs temperature compensation on the mass production environment temperature detected by the probe station based on the reference chip of the second wafer, and then performs CP mass production test.

4. The integrated circuit CP mass production test temperature calibration method according to claim 3, characterized in that: The S5, based on the reference chip of the second wafer, performs temperature compensation on the mass production environment temperature detected by the probe station, and then performs CP mass production test, specifically includes: S51, recording ADC values ​​of several test areas of the second wafer after temperature correction and saving them as recorded ADC values, and using chips of the corresponding several test areas as reference chips; S52, performing temperature tests on the reference chips in the second wafer at the mass production temperature detected by the probe station before mass production, and recording the mass production test ADC value of each reference chip obtained by the test; S53, adjusting the temperature compensation of the probe station so that the mass production test ADC value of each reference chip is consistent with the recorded ADC value, thereby obtaining the mass production environment temperature detected by the compensated probe station.

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