A side information signal processing method based on GPU acceleration

Abstract

The present application is applicable to the field of chip testing technology, and in particular, relates to a side information signal processing method based on GPU acceleration, the method comprising: determining the side information curve transposed data to be analyzed and the assumed power consumption value; receiving input information, determining the parallel computing platform according to the input information and allocating the side information curve transposed data to the parallel computing platform; determining the necessary component values ​​of the correlation coefficient based on the assumed power consumption value and the side information curve transposed data allocated to the parallel computing platform; calculating the local maximum value and its index of the correlation coefficient on each parallel computing platform according to the necessary component values ​​of the correlation coefficient between the assumed power consumption value and the side information curve transposed data; determining the global maximum value and its index of the correlation coefficient based on the local maximum values ​​and their indexes of all correlation coefficients, and determining the side information signal processing result according to the global maximum value and its index of the correlation coefficient, so as to improve the chip testing efficiency.

Description

Technical Field

[0001] The present application belongs to the field of chip testing technology, and in particular, relates to a side information signal processing method based on GPU acceleration. Background Art

[0002] In the field of chip security, the detection of side information leakage is regarded as an important method for detecting chip security. Side channel analysis is to monitor the side information (such as power consumption, electromagnetic radiation, time delay, etc.) generated by cryptographic devices when performing encryption operations, and mine the correlation of sensitive information from a large amount of leaked data to infer key information, so as to evaluate chip security. Among them, CPA is a powerful method for performing side channel analysis using power consumption curves, and with the progress of related research, the research on CPA has gradually transitioned from calculation accuracy to calculation efficiency.

[0003] At present, a complete side information security detection process often requires the analysis of tens of thousands or millions of power consumption curves, and the analysis process also requires exhaustive enumeration of keys, involving a large number of repetitive attack tests. The lack of efficient auxiliary tools limits the calculation speed of CPA and reduces the efficiency of chip testing. Summary of the invention

[0004] The embodiment of the present application provides a side information signal processing method based on GPU acceleration, which can solve the problem in the prior art that the calculation speed of CPA is limited and the efficiency of chip testing is reduced due to the lack of efficient auxiliary tools.

[0005] In a first aspect, an embodiment of the present application provides a side information signal processing method based on GPU acceleration, comprising:

[0006] Determine the side information curve transposed data and the assumed power consumption value to be analyzed;

[0007] receiving input information, determining a parallel computing platform according to the input information and allocating the side information curve transposed data to the parallel computing platform; wherein the parallel computing platform includes a GPU computing platform;

[0008] Based on the assumed power consumption value and the side information curve transposed data allocated to the parallel computing platform, determining necessary component values ​​of a correlation coefficient between the assumed power consumption value and the side information curve transposed data; wherein the correlation coefficient is used to reflect the correlation between the assumed power consumption value and the side information curve transposed data;

[0009] According to the necessary component values ​​of the correlation coefficient between the assumed power consumption value and the transposed data of the side information curve, respectively calculating the local maximum value and the index of the correlation coefficient on each of the parallel computing platforms;

[0010] The global maximum value of the correlation coefficient and its index are determined based on the local maximum values ​​of all the correlation coefficients and their indexes, and the side information signal processing result is determined according to the global maximum value of the correlation coefficient and its index.

[0011] The above technical solutions in the embodiments of the present application have at least the following technical effects:

[0012] The GPU-accelerated side information signal processing method provided in the embodiment of the present application provides a data basis by determining the side information curve transposition data to be analyzed and the assumed power consumption value. Receive input information, determine the parallel computing platform based on the input information, and allocate the side information curve transposition data to the parallel computing platform, so as to provide dependence and support for subsequent analysis. Based on the assumed power consumption value and the side information curve transposition data allocated to the parallel computing platform, determine the necessary component values ​​of the correlation coefficient between the assumed power consumption value and the side information curve transposition data, which is conducive to efficient calculation. According to the necessary component values ​​of the correlation coefficient between the assumed power consumption value and the side information curve transposition data, the local maximum value and its index of the correlation coefficient are calculated on each parallel computing platform respectively, so as to improve the efficiency of calculation. Based on the local maximum value and its index of all correlation coefficients, the global maximum value and its index of the correlation coefficient are determined, and according to the global maximum value and its index of the correlation coefficient, the side information signal processing result is determined, so as to realize efficient data calculation and improve the chip testing efficiency.

[0013] In a second aspect, an embodiment of the present application provides a side information signal processing system based on GPU acceleration, including:

[0014] A determination unit, used to determine the side information curve transposed data and the assumed power consumption value to be analyzed;

[0015] A receiving unit, configured to receive input information, determine a parallel computing platform according to the input information, and allocate the side information curve transposed data to the parallel computing platform; wherein the parallel computing platform includes a GPU computing platform;

[0016] A component unit, configured to determine a necessary component value of a correlation coefficient between the assumed power consumption value and the side information curve transposed data allocated to the parallel computing platform based on the assumed power consumption value and the side information curve transposed data; wherein the correlation coefficient is used to reflect the correlation between the assumed power consumption value and the side information curve transposed data;

[0017] A calculation unit, configured to calculate a local maximum value and an index thereof of the correlation coefficient on each of the parallel computing platforms according to necessary component values ​​of the correlation coefficient between the assumed power consumption value and the transposed data of the side information curve;

[0018] A result unit is used to determine the global maximum value of the correlation coefficient and its index based on the local maximum values ​​of all the correlation coefficients and their indexes, and determine the side information signal processing result according to the global maximum value of the correlation coefficient and its index.

[0019] In the third aspect, an embodiment of the present application provides a side information signal processing device based on GPU acceleration, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the method described in any one of the above aspects when executing the computer program.

[0020] In a fourth aspect, an embodiment of the present application provides a computer program product, which, when executed on a terminal device, enables the terminal device to execute the method of any one of the above aspects.

[0021] It can be understood that the beneficial effects of the second to fourth aspects mentioned above can be found in the relevant descriptions in the above aspects and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0023] Figure 1 It is a flowchart of a side information signal processing method based on GPU acceleration provided by an embodiment of the present application;

[0024] Figure 2 It is a schematic diagram of the operation flow of a side information signal processing method based on GPU acceleration provided in one embodiment of the present application;

[0025] Figure 3 It is a schematic diagram of the execution flow of a side information signal processing method based on GPU acceleration provided in an embodiment of the present application;

[0026] Figure 4 This is a diagram showing the steps of the GPU-accelerated side information signal processing method provided in an embodiment of the present application;

[0027] Figure 5 This is a diagram showing the steps of a side information signal processing method based on GPU acceleration provided in an embodiment of the present application;

[0028] Figure 6 It is a structural diagram of a side information signal processing system based on GPU acceleration provided by an embodiment of the present application;

[0029] Figure 7 It is a structural diagram of a side information signal processing device based on GPU acceleration provided in one embodiment of the present application. DETAILED DESCRIPTION

[0030] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0031] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.

[0032] It should also be understood that the term “and / or” used in the specification and appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0033] As used in the specification of this application and the appended claims, the term "if" can be interpreted as "when" or "uponce" or "in response to determining" or "in response to detecting" depending on the context. Similarly, the phrase "if it is determined" or "if the described condition or event is detected" can be interpreted as meaning "uponce it is determined" or "in response to determining" or "uponce the described condition or event is detected" or "in response to detecting the described condition or event" depending on the context.

[0034] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0035] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0036] In the prior art, due to the lack of a personalized processing mechanism for positioning requests, all devices are allocated the same level of positioning resources and services regardless of their specific needs. This ignores the fact that different IoT terminals have different requirements for positioning accuracy and frequency, resulting in the inability of positioning services to accurately match actual needs and low positioning flexibility.

[0037] To solve the above problems, an embodiment of the present application provides a side information signal processing method based on GPU acceleration. In this method, by receiving a positioning request from an IoT terminal, information such as the terminal identification, request accuracy, and request frequency is obtained. According to the terminal identification, the preset terminal configuration database is queried to determine the positioning policy template corresponding to the IoT terminal, providing a basis for customized IoT positioning. According to the positioning policy template, the positioning algorithm and parameter configuration are determined to achieve customized positioning of the IoT terminal and improve flexibility and practicality. Based on the request accuracy, request frequency, and the selected positioning algorithm and parameter configuration, customized positioning is performed for the IoT terminal, improving the ability to adjust according to the specific application scenarios of different IoT terminals, enhancing the flexibility and overall performance of positioning services, and promoting the effective use of resources.

[0038] The side information signal processing method based on GPU acceleration provided in the embodiment of the present application can be applied to a terminal device. In this case, the terminal device is the executor of the side information signal processing method based on GPU acceleration provided in the embodiment of the present application. The embodiment of the present application does not impose any restrictions on the specific type of the terminal device.

[0039] For example, the terminal device may be an ultra-mobile personal computer (UMPC), a netbook, a personal digital assistant (PDA), a desktop computer, a computer, a laptop computer, a communication device, a computing device, a satellite wireless device, etc.

[0040] In order to better understand the side information signal processing method based on GPU acceleration provided in the embodiment of the present application, the specific implementation process of the side information signal processing method based on GPU acceleration provided in the embodiment of the present application is exemplarily introduced below.

[0041] Figure 1 A schematic flow chart of a side information signal processing method based on GPU acceleration provided in an embodiment of the present application is shown. The side information signal processing method based on GPU acceleration includes:

[0042] S100, determining the side information curve transposed data and the assumed power consumption value to be analyzed.

[0043] It can be understood that the side information curve transposed data refers to the transposed data of the data obtained by the side channel (such as power consumption, time delay, etc.), and the side information curve transposed data can reveal the privacy information or key information in the processing process. The side information curve can be extracted from the relevant data source uploaded through input or through the API. The side information curve can be a power consumption signal recorded by the real-time monitoring system. After the side information curve is obtained, it can be transposed to determine the side information curve transposed data. Assume that the power consumption value P is the power consumption estimate calculated based on the intermediate value function during the execution of a specific calculation process (such as AES encryption).

[0044] In a possible implementation, in step S110, determining the side information curve transposed data to be analyzed includes:

[0045] S111, obtaining and storing the side information curve to be analyzed in blocks.

[0046] It can be understood that the side information curve can be a real-time monitoring device or a recorded data file. Side information can be obtained through devices such as oscilloscopes and logic analyzers, which can accurately capture the power consumption waveform or time delay of the encryption algorithm during execution and store it in blocks. The purpose of block storage is to improve the efficiency and flexibility of data processing. In this process, the side information curve will be cut according to a certain time window or signal feature. Each block represents the signal change in a specific time period, thus forming a set of discrete data sets. The side information curves stored in different blocks can be obtained by manual upload or API, which can effectively reduce memory usage and increase calculation speed.

[0047] S112, transposing each side information curve to be analyzed, and determining an intermediate transposed matrix corresponding to the side information curve.

[0048] It can be understood that before processing the side information curve, the power consumption curve can be quickly transposed and preprocessed to convert the data of each sampling point from a column stored in blocks to a row stored in a centralized manner. When implementing formal analysis, only one access to the storage device is required to obtain all the power consumption data of the sampling point. Then, the process of exhaustively guessing different keys is parallelized, attacking one sampling point at a time. The purpose of transposing the side information curve is to obtain all the power consumption data of a certain sampling point by reading the file once in a real attack.

[0049] Exemplarily, transposition refers to swapping the rows and columns of a matrix so that the original rows become columns and the columns become rows. You can use a programming language such as the NumPy library in Python to perform a transposition operation. For example, by calling the numpy.transpose() function, each power consumption curve is read into the memory for a transposition operation. Since the size of each power consumption curve is set according to hardware resources, the matrix transposition operation can be performed directly in this hardware resource environment, and the transposed power consumption curve is stored in blocks. The upper limit of the running memory that can be provided during the attack is calculated based on the hardware memory of the attacked device. Then, based on the number of data blocks N, the number of regroupings M of each block of appropriate size is determined, that is, the principle of not exceeding the upper limit of hardware resources, and multiple intermediate transposed matrices are obtained.

[0050] S113, determining the side information curve transposed data corresponding to the side information curve according to the intermediate transposed matrix corresponding to the side information curve.

[0051] It can be understood that the complete transposed matrix containing the entire column of the original power consumption curve can be formed by splicing the intermediate transposed matrices of different block orders by column, that is, the transposed data of the side information curve corresponding to the side information curve is obtained. The transposed data of the side information curve makes each row of the correlation coefficient matrix correspond to a specific sampling point in the original power consumption curve, which is convenient for subsequent analysis and calculation, and improves the calculation performance of subsequent CPA.

[0052] In a possible implementation, in step S110, determining an assumed power consumption value includes:

[0053] S121, obtaining a Hamming weight table corresponding to the plaintext data and the pre-calculated intermediate value.

[0054] It can be understood that the Hamming weight table of plaintext data and the corresponding pre-calculated intermediate values ​​is obtained. The plaintext data can be the plaintext obtained through actual attack, or the plaintext generated by a known encryption algorithm and specific input. The Hamming weight table records the Hamming weights of different intermediate values ​​(i.e., the number of 1s in a bit), which is an important approximation of power consumption. By analyzing the characteristics of the plaintext data and the corresponding intermediate values, the Hamming weight can be generated for each possible intermediate value, so that it can be efficiently matched in the subsequent steps.

[0055] S122, matching the plaintext data with the Hamming weight table corresponding to the pre-calculated intermediate value to determine the assumed power consumption value.

[0056] It can be understood that the plaintext data can be matched with the previously obtained Hamming weight table. By inputting the value of the plaintext data into the weight table, the corresponding Hamming weight can be quickly obtained, and then the assumed power consumption value can be determined. This matching process will help quantify the power consumption in order to analyze the key information that may be leaked during the encryption process.

[0057] S200, receiving input information, determining a parallel computing platform according to the input information, and allocating side information curve transposition data to the parallel computing platform; wherein the parallel computing platform includes a GPU computing platform.

[0058] It is understood that input information can be received from users or external systems. The input information can include the nature of the task, computing requirements, data characteristics, and limitations of the hardware environment. For example, the input information can be the range of curves to be analyzed and the range of sampling points, the number of GPUs involved in the calculation, that is, the number of parallel computing platforms, and the number of guessed keys for the analysis results. The input information will directly affect the selection of parallel computing platforms and the data allocation strategy. After receiving the input information, it can be analyzed to determine the best computing resource configuration. The input information can be parsed to extract key parameters, such as the amount of data to be processed, the complexity of the algorithm, the expected processing time, and the calculation accuracy. Then, based on these parameters, the available computing resources are evaluated and the number of parallel computing platforms required is determined. This decision is based on a comprehensive consideration of the understanding of the current hardware environment and the requirements of the task.

[0059] In one possible implementation, see Figure 4 , S200, receiving input information, determining a parallel computing platform according to the input information and allocating side information curve transposition data to the parallel computing platform, including:

[0060] S210, receiving input information, and determining the number of parallel computing platforms according to the input information.

[0061] It is understood that input information from a user or an external system can be received, and the GPUs to be called, that is, the number of parallel computing platforms, can be determined based on the number of GPUs involved in the calculation in the input information. The input information can be transmitted and received in the form of a data structure (such as JSON, XML, etc.).

[0062] S220, determining a corresponding number of parallel computing platforms according to the number of parallel computing platforms, and allocating side information curve transposition data to each parallel computing platform.

[0063] It can be understood that, according to the number of parallel computing platforms required, a computing platform that meets the requirements can be selected from the available resources and data can be allocated. Suitable computing resources can be screened out according to the number of parallel computing platforms that have been determined. When selecting, the calculation of each platform can be calculated to allocate side information curve transposition data for each selected platform. In order to achieve efficient parallel computing, the amount of data that matches its processing capacity can be matched for each platform. For example, a platform with stronger performance can receive more data blocks, while a platform with weaker performance should be allocated less data to ensure that all platforms can maintain high computing efficiency during processing. The process of transposing data on the side information curve can be completed automatically through an algorithm, and the transposed data can be reasonably divided according to the processing capacity ratio of each platform. In this way, the load between different platforms will be effectively balanced, thereby maximizing the effect of parallel processing, improving the efficiency of task execution, and reducing the performance bottleneck caused by improper allocation of computing resources.

[0064] Exemplarily, in step S220, determining a corresponding number of parallel computing platforms according to the number of parallel computing platforms includes:

[0065] S2211, obtaining processing capability data of each parallel computing platform; wherein the processing capability data is used to reflect the data processing capability of the parallel computing platform.

[0066] It can be understood that processing power data includes the number of GPU cores, main frequency, memory size, storage speed, etc. The processing power data can be used to determine the performance indicators of each parallel computing platform and provide a basis for subsequent data allocation. The methods for obtaining processing power data can include directly reading hardware information, obtaining real-time data through monitoring tools, or performing static analysis based on the platform specification. Through these methods, a detailed computing resource library can be built to support the selection of appropriate platforms.

[0067] S2212, determining the relative strength queues among all parallel computing platforms based on the processing capability data of each parallel computing platform; wherein the relative strength queues reflect the size relationship of the processing capability data of the parallel computing platforms.

[0068] It can be understood that the relative strength queue is a performance ranking queue of parallel computing platforms, reflecting the size relationship of the processing power data of parallel computing platforms. The establishment of a relative strength queue can be achieved by comparing the key performance indicators of each platform (such as computing power, memory speed, etc.). The processing power of each platform can be standardized, and then a ranking can be established based on these standardized values, which helps to clarify the relative advantages of each platform in processing specific tasks and ensure that the most appropriate platform can be selected when allocating resources.

[0069] For example, the key performance indicators (KPIs) of each parallel computing platform can be read, such as computing power (e.g., FLOPS), memory bandwidth, latency, energy consumption, etc. These KPIs are standardized to eliminate the dimensional differences between different indicators. Standardization can be achieved by subtracting the mean of each indicator and dividing it by the standard deviation, and the relative performance of each platform on each indicator can be obtained. For example, assuming that the computing power of platform A is 300 GFLOPS, platform B is 150 GFLOPS, the average computing power of all platforms is 200 GFLOPS, and the standard deviation is 50 GFLOPS. After standardization, the value of platform A is 2 and the value of platform B is -1. All standardized indicators are weighted, and the weights can be set according to the specific needs of the task. For example, computing power may be more important in some computing-intensive tasks, while memory bandwidth may be more important in memory-intensive tasks. The comprehensive score of each platform is calculated by weighted summation. The comprehensive scores of all platforms are sorted and a relative strength queue is established from high to low. This relative strength queue can clearly show the performance ranking of each platform and provide a basis for subsequent task allocation. For example, if the comprehensive score of platform A is 9, platform B is 7, and platform C is 5, then the relative strength queue is A>B>C. The relative strength queue can effectively reflect the relative advantages of each parallel computing platform and ensure that the most appropriate computing platform is selected during resource allocation to improve overall computing efficiency and performance.

[0070] S2213, screening is performed according to the number of parallel computing platforms and the relative strength queues to determine a number of parallel computing platforms corresponding to the number of parallel computing platforms.

[0071] It can be understood that the best computing resources can be screened out from all candidate platforms by comparing the relative strength queues and the number of parallel computing platforms required. Some thresholds or conditions can be set to ensure that the final selected platform can meet the basic requirements of the task. For example, a minimum processing power requirement can be set to ensure that each platform will not become a bottleneck in actual operation. For example, a computing platform with low latency can be given priority to ensure response speed.

[0072] Optionally, S2213, screening is performed according to the number of parallel computing platforms and the relative strength queue to determine the number of parallel computing platforms corresponding to the number of parallel computing platforms, including:

[0073] S22131, screening is performed based on the number of parallel computing platforms and the relative strength queues to determine the parallel computing platform with the largest processing capability data corresponding to the number of parallel computing platforms.

[0074] It can be understood that all parallel computing platforms can be arranged in order from high to low based on the established relative strength queue. The relative strength queue reflects the comparison results of each platform in terms of processing power, and can quickly identify which platforms have stronger processing power. The number of parallel computing platforms required can be determined based on the input information, and the parallel computing platforms can be screened through the relative strength queue to clarify the resource basis and optimize the overall computing efficiency.

[0075] For example, assuming that the number of computing platforms required is N, the computing platforms with the largest processing power data can be selected from the relative strength queue. The processing power of each platform can be compared to ensure that the selected platform performs well in its respective performance indicators. For example, if the first N computing platforms in the relative strength queue are platforms A, B, and C, and their processing power data are 500 GFLOPS, 400 GFLOPS, and 300 GFLOPS, respectively, these three platforms will be selected for subsequent computing tasks.

[0076] Exemplarily, in step S220, allocating side information curve transposition data to each parallel computing platform includes:

[0077] S2221, based on each determined parallel computing platform and the relative strength queue, obtain the processing capacity ratio between all the determined parallel computing platforms.

[0078] It can be understood that the processing capacity ratio between each determined parallel computing platform can be calculated according to the relative strength queue. The processing capacity ratio can reflect the relative performance of each platform and provide a basis for the subsequent data allocation. The processing capacity ratio can be obtained by comparing the processing capacity of each parallel computing platform with the sum of the processing capacities of all determined parallel computing platforms through a comparison algorithm or a sorting algorithm.

[0079] For example, if the processing power of platform A is 4 and the processing power of platform B is 2, the processing power ratio of platform A is 4 / 6 and the processing power ratio of platform B is 2 / 6.

[0080] S2222, based on the determined processing capacity ratio between all parallel computing platforms, divide the side information curve transposed data into a plurality of sub-transposed data; wherein the data amount of each sub-transposed data is the same.

[0081] It can be understood that the side information curve transposed data can be divided into a plurality of sub-transposed data according to the calculated processing capacity ratio, and the data volume of each sub-transposed data is made the same, which is helpful to achieve load balancing in subsequent steps. The total side information curve transposed data can be calculated first, and then the data is allocated to each platform according to the processing capacity ratio of each platform.

[0082] For example, assuming that the total data volume is 60,000, and the processing capacity ratios of platforms A and B are 2 / 3 and 1 / 3 respectively, the matrix corresponding to the transposed data of the side information curve can be divided into three small matrices of equal size to obtain three sub-transposed data.

[0083] S2223, allocating the plurality of sub-transposed data to each parallel computing platform according to the determined processing capacity ratio among all parallel computing platforms.

[0084] It can be understood that multiple sub-transposed data can be allocated to each parallel computing platform according to the processing power ratio calculated previously, so that each platform can obtain the amount of data that matches its capacity when processing tasks, thereby avoiding performance bottlenecks caused by uneven data.

[0085] For example, assuming that the total data volume is 6000, and the processing capacity ratios of platforms A and B are 2 / 3 and 1 / 3 respectively, the matrix corresponding to the transposed data of the side information curve can be divided into three small matrices of equal size to obtain three sub-transposed data. Two small matrices are allocated to platform A, i.e., two sub-transposed data, 4000 data points, and one small matrix is ​​allocated to platform B, i.e., one sub-transposed data, 2000 data points.

[0086] S300, based on the assumed power consumption value and the side information curve transposed data allocated to the parallel computing platform, determine the necessary component values ​​of the correlation coefficient between the assumed power consumption value and the side information curve transposed data; wherein the correlation coefficient is used to reflect the correlation between the assumed power consumption value and the side information curve transposed data.

[0087] It can be understood that in order to improve the calculation performance of CPA, the correlation coefficient formula can be split into multiple independent calculation formulas. These independent calculation formulas are the necessary components of the correlation coefficient, and each calculation component corresponds to a specific part of the correlation coefficient calculation process. After the correlation coefficient formula is split to obtain multiple necessary components, the value of each component can be calculated separately on each parallel computing platform to obtain the necessary component value of each necessary component, and a large amount of data in the CPA calculation process can be processed in parallel, thereby significantly reducing the calculation time, greatly improving the calculation efficiency of the correlation coefficient, and thus improving the calculation performance of CPA.

[0088] In a possible implementation manner, before determining the necessary component values ​​of the correlation coefficient between the assumed power consumption value and the transposed data of the side information curve, the method further includes:

[0089] S600, splitting the correlation coefficient formula into multiple computing components, determining each computing component as a necessary component and assigning the necessary component to each parallel computing platform; wherein the correlation coefficient formula is used to calculate the correlation between the assumed power consumption value and the transposed data of the side information curve.

[0090] It can be understood that the correlation coefficient formula can be split into multiple calculation components. Each calculation component corresponds to a specific part of the correlation coefficient calculation process, such as calculating the average value of the assumed power consumption value, calculating the average value of the transposed data, calculating the covariance, etc. The correlation coefficient is as follows:

[0091]

[0092] By breaking down the formula, the necessary components to calculate the correlation coefficient include:

[0093]

[0094] After these computing components are made clear, each necessary component can be assigned to each parallel computing platform to ensure load balancing and fully utilize the advantages of parallel computing. The splitting of the correlation coefficient formula not only improves the computing efficiency, but also makes the subsequent analysis clearer and easier to manage.

[0095] S300, based on the assumed power consumption value and the side information curve transposed data allocated to the parallel computing platform, determining necessary component values ​​of a correlation coefficient between the assumed power consumption value and the side information curve transposed data, including:

[0096] S310 , determining necessary component values ​​of a correlation coefficient between the assumed power consumption value and the side information curve transposed data allocated to the parallel computing platform based on the assumed power consumption value and the side information curve transposed data.

[0097] It can be understood that the assumed power consumption value and the transposed data of the side information curve allocated to the parallel computing platform can be traversed on each parallel computing platform, and the values ​​of the necessary components of the correlation coefficient can be calculated on each parallel computing platform during the traversal. The necessary components for calculating the correlation coefficient include:

[0098]

[0099] S400 , calculating the local maximum value of the correlation coefficient and its index on each parallel computing platform according to the necessary component values ​​of the correlation coefficient between the assumed power consumption value and the transposed data of the side information curve.

[0100] It can be understood that the values ​​​​can be extracted using the necessary component values ​​​​defined previously, and the variance and covariance of each group of data can be calculated using the formula. The covariance and variance are independently substituted into the correlation coefficient formula in each parallel computing platform, and a large amount of data in the CPA calculation process is processed in parallel, thereby significantly reducing the calculation time, improving the calculation efficiency, and obtaining the final correlation coefficient. After the calculation is completed, the local maximum value in the obtained correlation coefficient can be found on each platform, thereby optimizing the overall calculation efficiency.

[0101] In a possible implementation, S400, based on the necessary component values ​​of the correlation coefficient between the assumed power consumption value and the transposed data of the side information curve, respectively calculating the local maximum value of the correlation coefficient and its index on each parallel computing platform includes:

[0102] S410 , calculating a correlation coefficient between the assumed power consumption value and the allocated side information curve transposed data on each parallel computing platform according to a necessary component value of the correlation coefficient between the assumed power consumption value and the side information curve transposed data.

[0103] It can be understood that the assumed power consumption value is an expected power consumption pattern generated based on a specific key guess. In CPA, the assumed power consumption value is usually predicted based on the intermediate value during the execution of the cryptographic algorithm. Side information curve This is a real power consumption curve collected from the actual hardware, reflecting the actual power consumption changes of the device when performing cryptographic operations. It usually refers to rearranging or processing the side information curve in a certain way for better statistical analysis. For example, the power consumption values ​​at different time points can be organized into a matrix form, with each row representing a power consumption sample and each column representing the power consumption value of all samples at the same time. The correlation coefficient is a statistical indicator used to measure the strength of the linear relationship between two variables, such as the Pearson correlation coefficient. On the parallel computing platform, the values ​​can be extracted using the previously defined necessary component values, and the variance and covariance of each group of data can be calculated using the formula. The covariance and variance are independently substituted into the correlation coefficient formula in each parallel computing platform to obtain the final correlation coefficient.

[0104] S420 , based on the correlation coefficient between the assumed power consumption value on each parallel computing platform and the allocated side information curve transposed data, obtain the local maximum value of the correlation coefficient on each parallel computing platform and its index.

[0105] It can be understood that after obtaining the correlation coefficient between the assumed power consumption value on each parallel computing platform and the assigned side information curve transposed data, all correlation coefficients on each parallel computing platform can be compared, which can be achieved through a sorting algorithm or direct difference to determine the local maximum value and index of the correlation coefficient on each parallel computing platform.

[0106] S500, determining a global maximum value of the correlation coefficient and its index based on the local maximum values ​​of all correlation coefficients and their indexes, and determining a side information signal processing result according to the global maximum value of the correlation coefficient and its index.

[0107] It can be understood that after each parallel computing platform obtains the local maximum value and index of the corresponding correlation coefficient, the local maximum values ​​and indexes of all correlation coefficients can be copied to the CPU, and the local maximum values ​​and indexes on multiple parallel computing platforms can be summarized, and the global maximum value and index can be determined by comparison. The maximum value of the correlation coefficient is corresponded to the guessed key and the time index of the leakage point in the sampling data, that is, the leakage moment, and the side information signal processing result is obtained.

[0108] In one possible implementation, see Figure 5 , S500, determining the global maximum value of the correlation coefficient and its index based on the local maximum values ​​of all correlation coefficients and their indexes, and determining the side information signal processing result according to the global maximum value of the correlation coefficient and its index, including:

[0109] S510, copying the local maximum values ​​of all correlation coefficients and their indexes to the CPU for aggregation, and obtaining aggregated data of the correlation coefficients and their indexes.

[0110] It can be understood that on each parallel computing platform, the local maximum value of the correlation coefficient is obtained by parallel computing. For example, a specific algorithm (such as a sliding window method) is used to calculate the correlation of the signal, and the local maximum value and its index are stored. The local maximum value and its index can be sent to a central processing unit (CPU) using a data transmission protocol (such as MPI or CUDA). The received local maximum value and index can be integrated into a unified data structure (such as an array or a dictionary) in the CPU to prepare data for subsequent global comparison.

[0111] S520, calculating and determining the global maximum value of the correlation coefficient and its index according to the summary data of the correlation coefficient and its index.

[0112] It can be understood that the summary data in the CPU can be traversed, and each local maximum value can be compared to find the global maximum value of the correlation coefficient and its index. After obtaining the global maximum value of the correlation coefficient, its index in the summary data is recorded. This index corresponds to the signal of the initial calculation of the local maximum value. To improve efficiency, a quick selection algorithm (Quickselect) or a heap sort algorithm can be used to reduce the calculation time.

[0113] S530, determining a side information signal processing result according to a global maximum value of the correlation coefficient and its index.

[0114] It can be understood that the guessed key and the corresponding time index can be mapped according to the index of the global maximum value. The global maximum value can be associated with the key through a predefined mapping table or model. The physical meaning of the maximum value of the correlation coefficient can be analyzed to understand the corresponding leakage point and its performance in time. It can be a timing analysis and feature extraction of the signal. Finally, the side information signal processing results are generated, including the decoded key and leakage time point, to achieve efficient CPA data calculation parallel acceleration and improve the efficiency of CPA analysis and chip testing.

[0115] Corresponding to the side information signal processing method based on GPU acceleration in the above embodiment, the embodiment of the present application also provides a side information signal processing system based on GPU acceleration, and each unit of the system can implement each step of the side information signal processing method based on GPU acceleration. Figure 6 A structural block diagram of a side information signal processing system based on GPU acceleration provided in an embodiment of the present application is shown. For ease of explanation, only the parts related to the embodiment of the present application are shown.

[0116] Reference Figure 6 , the GPU-accelerated side information signal processing system includes:

[0117] A determination unit, used to determine the side information curve transposed data and the assumed power consumption value to be analyzed;

[0118] A receiving unit, configured to receive input information, determine a parallel computing platform according to the input information, and allocate the side information curve transposed data to the parallel computing platform; wherein the parallel computing platform includes a GPU computing platform;

[0119] A component unit, configured to determine a necessary component value of a correlation coefficient between the assumed power consumption value and the side information curve transposed data allocated to the parallel computing platform based on the assumed power consumption value and the side information curve transposed data; wherein the correlation coefficient is used to reflect the correlation between the assumed power consumption value and the side information curve transposed data;

[0120] A calculation unit, configured to calculate a local maximum value and an index thereof of the correlation coefficient on each of the parallel computing platforms according to necessary component values ​​of the correlation coefficient between the assumed power consumption value and the transposed data of the side information curve;

[0121] A result unit is used to determine the global maximum value of the correlation coefficient and its index based on the local maximum values ​​of all the correlation coefficients and their indexes, and determine the side information signal processing result according to the global maximum value of the correlation coefficient and its index.

[0122] It should be noted that the information interaction, execution process, etc. between the above-mentioned systems / units are based on the same concept as the method embodiment of the present application. Their specific functions and technical effects can be found in the method embodiment part and will not be repeated here.

[0123] The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the system can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated in a processing unit, or each unit module can exist physically separately, or two or more unit modules can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0124] The embodiment of the present application also provides a side information signal processing device based on GPU acceleration, Figure 7 This is a schematic diagram of the structure of a side information signal processing device based on GPU acceleration provided in one embodiment of the present application. Figure 7 As shown, the GPU-accelerated side information signal processing device 6 of this embodiment includes: at least one processor 60 ( Figure 7 Only one is shown), at least one memory 61 ( Figure 7 Only one is shown in the figure) and a computer program 62 stored in the at least one memory 61 and executable on the at least one processor 60. When the processor 60 executes the computer program 62, the side information signal processing device 6 based on GPU acceleration implements the steps in any of the above-mentioned side information signal processing method embodiments based on GPU acceleration, or implements the functions of each unit in the above-mentioned system embodiments.

[0125] Exemplarily, the computer program 62 may be divided into one or more units, which are stored in the memory 61 and executed by the processor 60 to complete the present application. The one or more units may be a series of computer program instruction segments capable of completing specific functions, which are used to describe the execution process of the computer program 62 in the GPU-accelerated side information signal processing 6.

[0126] The GPU-accelerated side information signal processing device 6 can be a computing device or terminal device such as a desktop computer, a notebook, a PDA, and a cloud server. The GPU-accelerated side information signal processing device can include, but is not limited to, a processor 60 and a memory 61. Those skilled in the art can understand that Figure 7 It is only an example of the side information signal processing device 6 based on GPU acceleration and does not constitute a limitation on the side information signal processing device 6 based on GPU acceleration. It may include more or fewer components than shown in the figure, or a combination of certain components, or different components, for example, it may also include input and output devices, network access devices, buses, etc.

[0127] The processor 60 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc.

[0128] In some embodiments, the memory 61 may be an internal storage unit of the GPU-accelerated side information signal processing device 6, such as a hard disk or memory of the GPU-accelerated side information signal processing device 6. In other embodiments, the memory 61 may also be an external storage device of the GPU-accelerated side information signal processing device 6, such as a plug-in hard disk, a smart memory card (SmartMedia Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (Flash Card), etc. equipped on the GPU-accelerated side information signal processing device 6. Further, the memory 61 may also include both the internal storage unit of the GPU-accelerated side information signal processing device 6 and an external storage device. The memory 61 is used to store an operating system, an application program, a boot loader (BootLoader), data, and other programs, such as the program code of the computer program, etc. The memory 61 may also be used to temporarily store data that has been output or is to be output.

[0129] An embodiment of the present application further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above method embodiments are implemented.

[0130] An embodiment of the present application provides a computer program product. When the computer program product runs on a side information signal processing device based on GPU acceleration, the side information signal processing device based on GPU acceleration implements the steps in any of the above-mentioned method embodiments.

[0131] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present application implements all or part of the processes in the above-mentioned embodiment method, which can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a computer-readable storage medium. When the computer program is executed by the processor, the steps of the above-mentioned various method embodiments can be implemented. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may at least include: any entity or device capable of carrying the computer program code to a GPU-accelerated side information signal processing device, a recording medium, a computer memory, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), an electric carrier signal, a telecommunication signal, and a software distribution medium. For example, a USB flash drive, a mobile hard disk, a magnetic disk or an optical disk. In some jurisdictions, according to legislation and patent practice, computer-readable media cannot be electric carrier signals and telecommunication signals.

[0132] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0133] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0134] In the embodiments provided in the present application, it should be understood that the disclosed GPU-accelerated side information signal processing system / GPU-accelerated side information signal processing device and method can be implemented in other ways. For example, the above-described GPU-accelerated side information signal processing system / GPU-accelerated side information signal processing device embodiments are merely schematic. For example, the division of the units is merely a logical function division. There may be other division methods in actual implementation, such as multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interfaces, devices or units, which may be electrical, mechanical or other forms.

[0135] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0136] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A side information signal processing method based on GPU acceleration, characterized in that: include: Determine the side information curve transposed data and the assumed power consumption value to be analyzed; receiving input information, determining a parallel computing platform according to the input information and allocating the side information curve transposed data to the parallel computing platform; wherein the parallel computing platform includes a GPU computing platform; Based on the assumed power consumption value and the side information curve transposed data allocated to the parallel computing platform, determining necessary component values ​​of a correlation coefficient between the assumed power consumption value and the side information curve transposed data; wherein the correlation coefficient is used to reflect the correlation between the assumed power consumption value and the side information curve transposed data; According to the necessary component values ​​of the correlation coefficient between the assumed power consumption value and the transposed data of the side information curve, respectively calculating the local maximum value and the index of the correlation coefficient on each of the parallel computing platforms; Determining a global maximum value of the correlation coefficient and its index based on the local maximum values ​​of all the correlation coefficients and their indexes, and determining a side information signal processing result according to the global maximum value of the correlation coefficient and its index; The receiving of input information, determining a parallel computing platform according to the input information and allocating the side information curve transposed data to the parallel computing platform includes: Receive input information, and determine the number of parallel computing platforms according to the input information; wherein the number of parallel computing platforms is the number of calls of different GPU devices; Determine a corresponding number of parallel computing platforms according to the number of the parallel computing platforms, and allocate the side information curve transposition data to each of the parallel computing platforms; Determining a corresponding number of parallel computing platforms according to the number of parallel computing platforms includes: Acquire processing capability data of each of the parallel computing platforms; wherein the processing capability data is used to reflect the data processing capability of the parallel computing platform; Determine a relative strength queue between all the parallel computing platforms according to the processing capability data of each of the parallel computing platforms; wherein the relative strength queue reflects the size relationship of the processing capability data of the parallel computing platforms; Screening is performed according to the number of parallel computing platforms and the relative strength queues to determine a number of parallel computing platforms corresponding to the number of parallel computing platforms; The screening according to the number of parallel computing platforms and the relative strength queues to determine a number of parallel computing platforms corresponding to the number of parallel computing platforms includes: Screening is performed according to the number of parallel computing platforms and the relative strength queues to determine the parallel computing platform with the largest number of processing capability data corresponding to the number of parallel computing platforms; Allocating the side information curve transposition data to each of the parallel computing platforms includes: According to each of the determined parallel computing platforms and the relative strength queues, a processing capacity ratio between all the determined parallel computing platforms is obtained; Based on the determined processing capacity ratio among all the parallel computing platforms, the side information curve transposed data is divided into a plurality of sub-transposed data; wherein the data volume of each sub-transposed data is the same; The plurality of sub-transposed data are allocated to each of the parallel computing platforms according to the determined processing capacity ratio among all the parallel computing platforms.

2. The method for processing side information signals based on GPU acceleration according to claim 1, characterized in that: Determine the transposed data of the side information curve to be analyzed, including: Obtaining the side information curve to be analyzed and stored in blocks; Transpose each side information curve to be analyzed to determine an intermediate transposed matrix corresponding to the side information curve; According to the intermediate transposed matrix corresponding to the side information curve, the side information curve transposed data corresponding to the side information curve is determined.

3. The GPU-accelerated side information signal processing method according to claim 2, characterized in that: Determine the power consumption assumptions, including: Get the Hamming weight table corresponding to the plaintext data and the pre-computed intermediate values; The plaintext data is matched with the Hamming weight table corresponding to the pre-calculated intermediate value to determine the assumed power consumption value.

4. The side information signal processing method based on GPU acceleration according to claim 1, characterized in that: Before determining the necessary component values ​​of the correlation coefficient between the assumed power consumption value and the side information curve transposed data, the method further includes: Splitting the correlation coefficient formula into multiple computing components, determining each computing component as a necessary component and allocating all the necessary components to each parallel computing platform; wherein the correlation coefficient formula is used to calculate the correlation between the assumed power consumption value and the transposed data of the side information curve; The determining, based on the assumed power consumption value and the side information curve transposed data allocated to the parallel computing platform, necessary component values ​​of a correlation coefficient between the assumed power consumption value and the side information curve transposed data comprises: Based on the assumed power consumption value and the side information curve transposed data allocated to the parallel computing platform, necessary component values ​​of a correlation coefficient between the assumed power consumption value and the side information curve transposed data are determined.

5. The side information signal processing method based on GPU acceleration according to claim 4, characterized in that: The necessary component values ​​of the correlation coefficient between the assumed power consumption value and the transposed data of the side information curve are calculated on each of the parallel computing platforms respectively as follows: Calculating, on each of the parallel computing platforms, a correlation coefficient between the assumed power consumption value and the allocated side information curve transposed data according to a necessary component value of the correlation coefficient between the assumed power consumption value and the side information curve transposed data; Based on the correlation coefficient between the assumed power consumption value and the allocated side information curve transposed data on each of the parallel computing platforms, a local maximum value and an index of the correlation coefficient on each of the parallel computing platforms are obtained.

6. The method for processing side information signals based on GPU acceleration according to claim 1, characterized in that: The determining the global maximum value and the index of the correlation coefficient based on the local maximum values ​​and the indexes of all the correlation coefficients, and determining the side information signal processing result according to the global maximum value and the index of the correlation coefficient, comprises: Copying the local maximum values ​​and indexes of all the correlation coefficients to the CPU for aggregation to obtain aggregated data of the correlation coefficients and indexes thereof; According to the summary data of the correlation coefficient and its index, calculate and determine the global maximum value of the correlation coefficient and its index; The side information signal processing result is determined according to the global maximum value of the correlation coefficient and its index.

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