SBD device and preparation method thereof

Abstract

The invention relates to the technical field of power radio frequency discrete devices, in particular to an SBD device and a preparation method thereof. The method comprises the following steps: providing a first substrate; forming a bonding middle layer with a corundum type crystal structure on the upper surface of the first substrate; providing a beta-Ga2O3 layer, wherein the beta-Ga2O3 layer is provided with a first surface and a second surface; carrying out ion implantation on the second surface of the beta-Ga2O3 layer; a beta-Ga2O3 layer is transferred to the bonding intermediate layer, so that the second surface of the beta-Ga2O3 layer is in contact with the upper surface of the bonding intermediate layer, and a heterogeneous integrated substrate is formed; forming an epitaxial layer on the upper surface of the heterogeneous integrated substrate; a partially-covered field plate passivation layer is formed on the upper surface of the epitaxial layer, the field plate passivation layer sequentially comprises a buffer layer and a passivation layer from bottom to top, and the field plate structure can effectively suppress a strong electric field at the edge of a device electrode. The SBD device provided by the invention has relatively high device performance and reliability.

Description

Technical Field

[0001] The present invention relates to the technical field of power radio frequency discrete devices, and in particular to an SBD device and a preparation method thereof. Background Art

[0002] β-Ga 2 O 3 As an emerging ultra-wide bandgap semiconductor material, it has the characteristics of ultra-wide bandgap width of 4.8eV, high theoretical breakdown electric field strength of 8MV / cm, and high saturation drift rate. The theoretical breakdown field strength is three times that of SiC and GaN materials. It not only has physical properties such as high temperature resistance, high pressure resistance, and strong radiation resistance that are superior to SiC and GaN, but also has other unique material properties, such as photoelectric detection characteristics in the deep ultraviolet band and highly sensitive gas-sensitive characteristics, with the transparency of sapphire and the conductivity of SiC. At the same time, the low-cost and low-energy melt (Melt-Growth) preparation process of large-inch gallium oxide substrates has become increasingly mature, and high-quality N-type Ga can be obtained through molecular beam epitaxy (MBE), chemical vapor deposition (CVD), pulsed laser deposition (PLD) and other methods. 2 O 3 Epitaxial layer, so it has a large application space in high-frequency, high-power devices, ultraviolet photodetectors, transparent conductive films, etc. It has broad application prospects in aerospace, military, and nuclear energy, and has become an emerging research direction that has attracted attention from industry and academia.

[0003] Ga 2 O 3 The Baliga figure of merit (BFOM = 3444) is very high and is an indicator of the performance of semiconductor materials, which is defined as ε·μ·E c 3 , where ε, μ and E c They are dielectric constant, carrier mobility and critical breakdown field strength, Ga 2 O 3 The BFOM of β-GaN is 4 times that of GaN materials and more than 10 times that of SiC materials. Therefore, it is considered suitable for the preparation of next-generation power devices including PN junction diodes (PNDs), Schottky diodes (SBDs) and field effect transistors (FETs). How to achieve high-performance and high-reliability gallium oxide power devices has attracted more and more attention. However, on the one hand, due to the 2 O 3 When used in high-power or high-frequency applications, there are problems such as insufficient electron transfer rate and serious self-heating effect caused by low thermal conductivity, which greatly affects the β-Ga 2 O 3 SBD device performance; on the other hand, due to β-Ga 2 O 3It is difficult to achieve P-type doping of materials, which makes it impossible for SBD devices to use terminal withstand voltage protection structures based on P-type semiconductors, greatly affecting β-Ga 2 O 3 The withstand voltage performance and switching loss of SBD devices. Summary of the invention

[0004] In order to solve the above-mentioned deficiencies in the prior art, the present invention provides a SBD device, aiming to improve the β-Ga 2 O 3 SBD forward conduction current, reverse breakdown voltage and terminal withstand voltage efficiency improve the high temperature reliability of the device, and further improve the power switching performance of the device and reduce the switching loss of the device.

[0005] In this regard, one of the technical solutions provided by the present invention is as follows:

[0006] A method for preparing a SBD device comprises the following steps:

[0007] providing a first substrate;

[0008] forming a bonding intermediate layer having a corundum type crystal structure on the upper surface of the first substrate;

[0009] Provide β-Ga 2 O 3 layer, the β-Ga 2 O 3 The layer has a first surface and a second surface;

[0010] For the β-Ga 2 O 3 ion implantation on the second surface of the layer;

[0011] Change β-Ga 2 O 3 layer is transferred to the bonding intermediate layer, so that the β-Ga 2 O 3 The second surface of the layer contacts the upper surface of the bonding intermediate layer to form a heterogeneous integrated substrate;

[0012] forming an epitaxial layer on the upper surface of the heterogeneous integrated substrate;

[0013] forming a partially covered field plate passivation layer on the upper surface of the epitaxial layer, wherein the field plate passivation layer comprises a buffer layer and a passivation layer in sequence from bottom to top;

[0014] forming a metal anode on the upper surface of the field plate passivation layer and the upper surface of the epitaxial layer not covered with the field plate passivation layer;

[0015] Optionally, after forming the heterogeneous integrated substrate, a metal cathode is formed on the lower surface of the heterogeneous integrated substrate.

[0016] In one embodiment, the passivation layer is selected from a ferroelectric material having a perovskite crystal structure and a dielectric constant>100, and the buffer layer is selected from a dielectric material having a dielectric constant in the range of 10-50. Preferably, the difference in K value between the passivation layer and the buffer layer is between 70-90;

[0017] Preferably, the material of the buffer layer is selected from Al 2 O 3 , HfO 2 、ZrO 2 、TiO 2 ,La 2 O 3 , Hf x Al 1-x O、Hf y Si 1-y O、Al z Si 1-z O、Hf m Ti 1-m O、Hf n Zr 1-n Any one or a combination of at least two of O, wherein x=0.2-0.3, y=0.3-0.4, z=0.4-0.6, m=0.3-0.4, n=0.5-0.7;

[0018] The material of the passivation layer is selected from BaTiO 3 、SrTiO 3 、LaMnO 3 , KTaO 3 、BiFeO 3 Any one or a combination of at least two of the following:

[0019] Preferably, the thickness of the passivation layer is 300-500 nm, and the thickness of the buffer layer is 10-30 nm.

[0020] In one embodiment, forming the buffer layer includes: PEALD (plasma enhanced ALD) deposition; forming the passivation layer includes: radio frequency magnetron sputtering deposition.

[0021] In one embodiment, the material of the first substrate is selected from any one of Si, SiC, diamond, and sapphire, or a combination of at least two of them, wherein SiC as the substrate material has three crystal structures of 4H-SiC, 6H-SiC, and 3C-SiC as preferred choices;

[0022] Preferably, the thickness of the first substrate is 200 μm-600 μm, and the β-Ga 2 O 3 The thickness of the layer is 60-100 nm;

[0023] Preferably, in the β-Ga 2 O 3 The ion types of ions implanted into the second surface of the layer include hydrogen, iron or magnesium, and the implantation angle is 7°;

[0024] Preferably, the method further comprises, after completing the ion implantation of the second surface, bombarding the surface of the ion implantation layer with Ar ions. The Ar ion bombardment can, on the one hand, remove pollutants and oxide layers on the surface of the gallium oxide, improve the surface cleanliness, and thus improve the performance and reliability of the device. On the other hand, during the ion implantation process, the implanted ions may only stay in the lattice gap of the gallium oxide and are not fully activated. The Ar ion bombardment can further promote the activation process of these ions, so that they can participate more effectively in the conduction process, and may also promote the diffusion and reaction of the implanted ions in the gallium oxide with the surrounding atoms. Such diffusion and reaction help to form a more stable compound or structure, thereby further improving the performance and stability of the gallium oxide.

[0025] In one embodiment, forming the bonding intermediate layer comprises: PEALD (plasma enhanced ALD) deposition;

[0026] Preferably, the PEALD (plasma enhanced ALD) deposition includes using trimethylaluminum and ozone as reaction precursors at a certain temperature to form the bonding intermediate layer, and using the PEALD process combined with a specific precursor combination to generate a corundum-type Al 2 O 3 Bonding the intermediate layer is beneficial to relieve the stress between heterogeneous interfaces (crystal structure corundum effect) and reduce interface defects (using O 3 Precursor effect), thereby enhancing β-Ga 2 O 3 The effect of layer transfer and bonding;

[0027] It should be noted that in the precursor combination of PEALD deposition, O 3 You can also use O 2 , H 2 O, H 2 O 2 , O plasma replacement, only O 3 The effect is best.

[0028] Preferably, the PEALD temperature is 300-400°C, so as to form Al2O3 with a corundum crystal structure. 2 O 3 The bonding intermediate layer is preferably formed at a temperature of 350°C. It should be noted that the growth temperature will affect the crystal structure and film quality of ALD growth. The inventors have found that the Al2O3-type structure has a high growth temperature.2 O 3 The bonding intermediate layer can greatly improve the bonding effect and transfer effect, thereby achieving a heterogeneous integrated substrate with better performance.

[0029] In one embodiment, the material of the epitaxial layer is undoped β-Ga 2 O 3 , or β-Ga doped with any one or at least two of Sn, Si, Ge 2 O 3 ;

[0030] Preferably, the thickness of the epitaxial layer is 1.5-4 μm. The preferred range of this thickness is used to adapt to the thickness, process and material of the field plate passivation layer in the aforementioned preferred embodiment and the optimized design of the SBD device structure. If the thickness of the epitaxial layer is too large or too small, it is difficult to adapt to the aforementioned field plate passivation layer, making it difficult for the entire SBD device to achieve the optimal effect.

[0031] In addition, based on the epitaxial layer growth process parameters and methods used in this patent, the quality of the epitaxial layer film can be better ensured at this thickness. Too thick will lead to too many defects and uniformity problems in the epitaxial layer, thus affecting the film quality; more preferably, the thickness of the epitaxial layer is 2 μm;

[0032] The carrier concentration of the epitaxial layer is 1×10 14 cm -3 -1×10 16 cm -3 .

[0033] Preferably, the method further comprises performing ultraviolet ozone passivation treatment on the heterogeneous integrated substrate. The ultraviolet ozone passivation treatment can reduce the generation of oxygen vacancies and defect dislocations in gallium oxide, thereby improving the quality of the epitaxial layer film and the reliability of the diode device.

[0034] In one embodiment, after forming the epitaxial layer, the epitaxial layer is annealed;

[0035] Preferably, the annealing temperature of the annealing treatment is 500-700° C., the annealing time is 20-60 min, and the annealing atmosphere is selected from any one of ozone, oxygen, nitrogen, and argon, or a combination of at least two of them.

[0036] In one embodiment, after the annealing treatment is completed, ultraviolet ozone treatment is performed;

[0037] Preferably, the wavelength of the ultraviolet lamp source for the ultraviolet ozone treatment is 185nm or 254nm, the ultraviolet ozone treatment time is 15-30min, and the ultraviolet ozone treatment temperature is 25-200°C.

[0038] In one embodiment, the thickness of the metal cathode is 200-300 nm;

[0039] The material of the metal cathode is selected from Au, Al, Ti, Sn, Ge, In, Ni, Co, Pt, W, Mo, Cr, Cu, Pb or any combination of alloys thereof or any combination of laminates or conductive compounds thereof; and / or

[0040] The thickness of the metal anode is 200-300nm;

[0041] The material of the metal anode is selected from Au, Al, Ti, Sn, Ge, In, Ni, Co, Pt, W, Mo, Cr, Cu, Pb, or an alloy of any combination thereof, or a stack of any combination thereof, or a conductive compound.

[0042] The second technical solution provided by the present invention is as follows:

[0043] An SBD device, comprising from bottom to top a metal cathode, a heterogeneous integrated substrate, an epitaxial layer, a field plate passivation layer, and a metal anode, wherein the field plate passivation layer partially covers the epitaxial layer, and the upper surface of the field plate passivation layer and the upper surface of the epitaxial layer not covered with the field plate passivation layer are covered with a metal anode;

[0044] The field plate passivation layer includes a buffer layer and a passivation layer in order from bottom to top; the passivation layer is selected from a ferroelectric material having a perovskite crystal structure and a dielectric constant>100, and the buffer layer is selected from a dielectric material having a dielectric constant in the range of 10-50;

[0045] The heterogeneous integrated substrate comprises, from bottom to top, a first substrate, an ion implantation layer, a bonding intermediate layer having a corundum crystal structure, and a β-Ga 2 O 3 layer.

[0046] Based on the above, compared with the prior art, the SBD device provided by the present invention adopts β-Ga 2 O 3 The composite field plate terminal structure of the composite passivation layer can effectively improve the surface passivation effect and electric field distribution, alleviate the electric field concentration effect, improve the device on-current, greatly increase the breakdown voltage, and effectively improve the reliability of the device;

[0047] Furthermore, Smart-Cut TM process combined with wet etching or dry etching to achieve β-Ga 2 O 3 Heterogeneous integration with 4H-SiC, 6H-SiC, 3C-SiC, Si, Diamond and other substrates can improve device thermal dissipation, operating temperature and preparation cost.

[0048] Other features and beneficial effects of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other beneficial effects of the present invention can be realized and obtained by the structures particularly pointed out in the description, claims and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. The positional relationships described in the drawings in the following description are based on the directions in which the components are drawn in the diagrams, unless otherwise specified.

[0050] Figure 1 A top view (top) and a cross-sectional view (bottom) of the SBD device provided in Example 1 of the present invention;

[0051] Figures 2 to 12 Schematic diagram of the process flow of the SBD device according to Example 1 of the present invention;

[0052] Fig.13 A top view (top) and a cross-sectional view (bottom) of an SBD device provided in Example 2 of the present invention;

[0053] Figures 14 to 23 Schematic diagram of the process flow of the SBD device according to Embodiment 2 of the present invention;

[0054] Fig.24 The passivation layer thickness (h) of different samples prepared by the method of Example 1 is E ) performance data diagram of the forward conduction current density (left figure) and reverse withstand voltage characteristics (right figure) of the SBD device under .

[0055] Reference numerals:

[0056] 10. Metal cathode; 20. Heterogeneous integrated substrate; 21. First substrate; 22. Bonding intermediate layer; 23. β-Ga 2 O 3 Layer; 24, ion implantation layer; 30, epitaxial layer; 31, groove; 40, field plate passivation layer; 41, passivation layer; 42, buffer layer; 43, uncovered area; 50, metal anode; 60, photolithography mask I; 70, physical mask I; 80, physical mask II. DETAILED DESCRIPTION

[0057] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all the embodiments; the technical features designed in different implementation modes of the present invention described below can be combined with each other as long as they do not conflict with each other; based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0058] In the description of the present invention, it should be noted that all terms used in the present invention (including technical terms and scientific terms) have the same meanings as those generally understood by ordinary technicians in the field to which the present invention belongs, and cannot be understood as limiting the present invention; it should be further understood that the terms used in the present invention should be understood to have the same meanings as these terms in the context of this specification and in the relevant fields, and should not be understood in an idealized or overly formal sense, unless explicitly defined in the present invention.

[0059] Example 1

[0060] refer to Figure 1 The embodiment of the present invention provides an SBD device, which includes, from bottom to top, a metal cathode 10, a heterogeneous integrated substrate 20, an epitaxial layer 30, a field plate passivation layer 40, and a metal anode 50, wherein the field plate passivation layer 40 partially covers the epitaxial layer 30, and the upper surface of the field plate passivation layer 40 and the upper surface of the epitaxial layer 30 not covered with the field plate passivation layer 40 are covered with the metal anode 50;

[0061] The field plate passivation layer 40 includes a buffer layer 42 and a passivation layer 41 from bottom to top;

[0062] The heterogeneous integrated substrate 20 includes, from bottom to top, a first substrate 21, a bonding intermediate layer 22 having a corundum crystal structure, an ion implantation layer 24 and a β-Ga 2 O 3 Layer 23.

[0063] This embodiment provides a method for preparing the above-mentioned SBD device, comprising the following steps:

[0064] Step 1: Reference Figure 2 , prepare β-Ga 2 O 3 Layer 23 has a thickness of 200 μm-600 μm and a size of 1-6 inches. 2 O 3 The layer 23 has a first surface 23a and a second surface 23b. 2 O3 Layer 23 is pre-treated and cleaned.

[0065] β-Ga 2 O 3 As an emerging wide bandgap semiconductor material, it is used as one of the semiconductor substrate materials of the heterogeneous integrated substrate 20 because of its bandgap width far exceeding that of SiC and GaN (4.7-4.9 eV), theoretical breakdown electric field (8 MV / cm) and low price relative to SiC and GaN substrates, which effectively improves the device performance of the dual-gate device.

[0066] For the β-Ga 2 O 3 Layer 23 is sequentially subjected to organic cleaning and inorganic cleaning;

[0067] The steps of the organic cleaning are as follows:

[0068] The first step is to use ethanol ultrasonic cleaning for 3 minutes; the second step is to use acetone ultrasonic cleaning for 3 minutes; the third step is to use ethanol ultrasonic cleaning for 3 minutes; the fourth step is to use deionized water or ultrapure water to rinse for 3 minutes; the fifth step is to use running deionized water to rinse for 5 minutes;

[0069] The inorganic cleaning steps are as follows:

[0070] The first step is to soak in deionized water or ultrapure water and heat to 90°C; the second step is to prepare SPM solution according to the volume ratio of deionized water: 30% hydrogen peroxide: 96% concentrated sulfuric acid = 1:1:4, and soak in SPM solution for 5 minutes;

[0071] Optionally, in the second step, a Piranha solution is prepared according to a volume ratio of 30% hydrogen peroxide: 98% concentrated sulfuric acid = 1:3, and the Piranha solution is used for soaking for 1 minute; in the third step, deionized water or ultrapure water is used for soaking and heated to 90° C., and then cooled to room temperature.

[0072] Step 2: Reference Figure 3 , for the β-Ga prepared in step 1 2 O 3 Ion implantation is performed on the second surface 23b of the layer 23 to form an ion implantation layer 24. The implanted ions may be H, Fe, or Mg. The implantation angle is 7° to facilitate subsequent heterogeneous substrate bonding.

[0073] Optionally, after the ion implantation of the second surface 23 b is completed, the surface of the ion implantation layer 24 is bombarded with Ar ions.

[0074] Step 3: Reference Figure 4, provide a first substrate 21, which can be Si, SiC, diamond, sapphire, etc. Selecting low-priced Si or c-sapphire as the first substrate 21 can reduce the device preparation cost; selecting sapphire as the first substrate can also reduce the film damage caused by peeling and improve the device stability; selecting SiC or Diamond as the first substrate 21 can improve the device heat dissipation capacity, inhibit the self-heating effect, and improve the device operating temperature and high-temperature reliability. For high-power applications, excessive internal junction temperature of the device will significantly affect the overall electrical performance (on-resistance, on-current, etc.) and temperature reliability (service life) of the device. Therefore, SiC is used as the first substrate 21 in this embodiment.

[0075] refer to Figure 5 The bonding intermediate layer 23 is grown on the surface of the first substrate 21 by using a plasma enhanced PEALD process. The PEALD process specifically controls the growth temperature at 350° C. and uses trimethylaluminum (Me 3 Al, TMA) and ozone O 3 As a reaction precursor, 10-40nm α-Al is grown 2 O 3 The α-Al2O3 layer (corundum crystal structure) is used as the bonding intermediate layer 23, and nitrogen high temperature annealing is performed to activate the implanted ions to facilitate subsequent transfer. 2 O 3 The layer is beneficial to improving the transfer effect of the film, improving the film quality and bonding effect.

[0076] Step 4: Reference Figure 6 After completing step 3, the β-Ga with a thickness of about 300-800nm ​​is removed by using the "universal ion knife" intelligent stripping and transfer technology. 2 O 3 Transfer to the upper surface of the bonding intermediate layer to form the following wafers similar to SOI structures:

[0077] β-Ga 2 O 3 / Al 2 O 3 / Si,β-Ga 2 O 3 / Al 2 O 3 / 4H-SiC,β-Ga 2 O 3 / Al 2 O 3 / 6H-SiC,β-Ga 2 O 3 / Al 2O 3 / 3C-SiC, β-Ga 2 O 3 / Al 2 O 3 / Diamond, β-Ga 2 O 3 / Al 2 O 3 / c-Sapphire.

[0078] Step 5: Reference Figure 7 , the β-Ga of the heterogeneous integrated substrate 20 prepared in step 4 2 O 3 The layer 24 is thinned by ICP etching, RIE etching, CMP polishing or wet etching to control the β-Ga 2 O 3 The film thickness is less than or equal to 100nm. Preferably, the β-Ga 2 O 3 The film thickness is between 60-100nm, and the thickness can be tested by ellipsometry or step analyzer. 2 O 3 The method of thinning the layer in the subsequent steps can reduce the 2 O 3 The difficulty of layer transfer is that the original β-Ga 2 O 3 The surface defects that may exist or be generated on the surface of the layer can be used to improve the surface quality and flatness of the material, and this process can also be applied to different β-Ga 2 O 3 Layer thickness requirements.

[0079] Then, magnetron sputtering metal combined with high temperature annealing is used to achieve ohmic contact on the lower surface 20b of the heterogeneous integrated substrate 20 to form a metal cathode 10. The specific metal and annealing method used are related to the substrate material selected in step 4. For example, using SiC as the first substrate 21, metal tungsten (W) or metal nickel (Ni) can be used to prepare the metal cathode 10 and anneal at 1000°C and nitrogen (N 2 ) atmosphere for high temperature annealing for 3-5 minutes; the material of the metal cathode 10 is selected from Au, Al, Ti, Sn, Ge, In, Ni, Co, Pt, W, Mo, Cr, Cu, Pb or any combination of alloys thereof or any combination of stacked layers or conductive compounds thereof.

[0080] The ICP etching or RIE etching can be carried out with Cl with a purity of 99.999% by mass. 2 , BCl 3 , Ar, Cl 2 / BCl 3 , Cl 2 / Ar / BCl 3 Different mixed gas atmospheres, the mixing ratio can be 35:5 or 30:5, the ICP power is 300-900W, the RF power is 15-100W, and the etching temperature can be selected from room temperature to 80℃. Under this working condition, β-Ga can be etched stably and uniformly. 2 O 3 . For wet etching process, 10%-50% HF (room temperature), 40%-70% HNO 3 (60℃), 80%-85%H 3 PO 4 β-Ga can be etched stably and uniformly under different solution conditions such as 2-nitrogen ... 2 O 3 .

[0081] Step 6: The surface of the heterogeneous integrated substrate 20 obtained after the treatment in step 5 is subjected to ion bombardment for 5-20 minutes under the action of O plasma using a plasma glue machine to clean surface impurities. The plasma bombardment power range may be 200-400W.

[0082] Optionally, the cleaning process used in step 6 can be a combination of organic cleaning and inorganic cleaning. More preferably, the cleaning process uses organic cleaning first and then inorganic cleaning. The cleaning process can refer to the operating steps of organic cleaning and inorganic cleaning of the first substrate 21 in step 1, and will not be elaborated here.

[0083] Optionally, the heterogeneous integrated substrate 20 obtained in step 6 is subjected to ultraviolet ozone passivation treatment, in which a high-intensity ultraviolet light source with a wavelength of 185 nm or 254 nm is used in combination with an ultraviolet ozone passivation treatment. 3 atmosphere, the treatment time can be selected to be 15-30 minutes, and the treatment temperature can be 25-200°C; in some preferred embodiments, the treatment temperature is 100-150°C, which can better suppress oxygen vacancies, regulate the quality of the film to be better and the crystal structure to be more orderly;

[0084] It should be noted that the step 6 adopts organic cleaning first and then inorganic cleaning, combined with ultraviolet ozone passivation treatment of the cleaned heterogeneous integrated substrate 20, can better remove OH-, H+ and organic matter attached by inorganic cleaning, while inhibiting oxygen vacancies, so as to better improve the quality of gallium oxide film.

[0085] Step 7: Reference Figure 8 The heterogeneous integrated substrate 20 obtained by cleaning in step 6 is placed in a PECVD (plasma enhanced chemical vapor deposition) device to grow an epitaxial layer 30, which is a non-intentionally doped UIDβ-Ga with a thickness of 2 μm. 2 O 3 layer, and control the carrier concentration to 1×10 14 cm -3 -1×10 16 cm -3 The growth temperature of PECVD can be selected from 600-800℃, and high-purity metal gallium (≥99.9999%) is used as the Ga precursor source, and high-purity oxygen O 2 (≥99.999%) is the O precursor source, high purity argon Ar (≥99.999%) or nitrogen N 2 (≥99.999%) as an inert carrier gas.

[0086] The growth process of step 7 can also be selected from HVPE, MOCVD, PLD and other processes, all of which use O 2 and Ar mixed gas atmosphere, wherein the HVPE process can choose a growth temperature of 650-1000°C, the MOCVD process can choose a growth temperature of 700-800°C and use metal gallium as the gallium source, and the PLD process can choose 500-800°C.

[0087] Step 8: After completing step 7, 2 O 3 After the growth of the epitaxial layer 30, the sample is subjected to high temperature slow annealing to improve the epitaxial film and adjust the oxygen vacancy concentration of the film. The annealing temperature can be selected in the range of 500-700°C, the duration is 20min-60min, and the annealing atmosphere can be ozone (O 3 ) or oxygen (O 2 ) gas, or nitrogen (N 2 ) / argon (Ar), where O 3 The optimal gas atmosphere condition.

[0088] In a preferred embodiment, the annealing treatment in step 8 may also be performed by ultraviolet ozone treatment (UV / O 3 ) process to further improve the epitaxial quality and control the oxygen vacancy concentration. This process uses a high-intensity ultraviolet light source with a wavelength of 185nm or 254nm, combined with O 3 atmosphere, the treatment time can be selected to be 15-30 minutes, and the treatment temperature can be 25-200°C; in some preferred embodiments, the treatment temperature is 100-150°C.

[0089] Step 9: Reference Fig. 9After the annealing treatment of the epitaxial layer 30 in step 8 is completed, a photolithography mask I 60 is used on the upper surface of the epitaxial layer 30, and a positive photoresist is used as a mask for photolithography, and then the required groove 31 is etched by dry etching ICP or RIE technology. Preferably, the groove 31 adopts a shallow groove design, and the groove depth of the groove 31 is less than 0.4μm. The ICP or RIE process can adopt BCl 3 The mixed gas of Ar / Ar is used as the etching atmosphere, and the etching process used in step 9 can be replaced by the aforementioned dry etching. After the etching is completed, acetone ultrasonic cleaning or the aforementioned organic cleaning can be used to remove the photoresist mask.

[0090] Step 10: Reference Fig.10 After forming the groove 31 in step 9, a 10-20 nm Al layer is grown on the epitaxial layer 30 using a physical mask I70 and a plasma enhanced atomic layer deposition (PEALD) process. 2 O 3 As the buffer layer 42, a growth temperature of 175-250° C. is used, and trimethyl aluminum (TMA) and O 3 As the reaction precursor, N 2 Or Ar is an inert carrier gas.

[0091] Optionally, the step 10 may also use a thermal ALD process, the growth temperature of which is 200-250° C., and the material of the buffer layer 42 may be replaced by HfO 2 , Hf x Al 1-x O(x=0.2-0.3), Hf x Si 1-x O(x=0.3-0.4), Hf x Zr 1-x O(x=0.5-0.7),Al x Si 1-x O(x=0.4-0.6), Hf x Ti 1-x O(x=0.3-0.4), La 2 O 3 , ZrO 2 High-K materials, with a thickness of 20-60nm, can improve Ga 2 O 3 / passivation layer interface characteristics, improve passivation effect and reduce leakage.

[0092] Step 11: Reference Fig.11 After the buffer layer 42 is grown in step 10, a 300-500 nm thick BaTiO 3As the passivation layer 41, the material of the passivation layer 41 can be selected from SrTiO 3 , LaMnO 3 , KTaO 3 ,BiFeO 3 It is replaced by perovskite ferroelectric materials with extremely high dielectric constant (dielectric constant > 100), with a sputtering growth temperature of 650-750°C and a RF power of 50-100W.

[0093] The sputtering target material is BaTiO with a purity of >99.9% 3 , Ar with a purity of 99.999% by mass is introduced into the sputtering chamber as the sputtering gas. Before sputtering, the magnetron sputtering equipment chamber is pre-cleaned with high-purity argon for 5-10 minutes, and then evacuated. -4 -2×10 -3 Pa, argon flow rate is 20-30cm 3 The passivation layer was prepared under the conditions of 100 W / s, target substrate distance of 20 cm and working RF power of 50 W-100 W.

[0094] Step 12: Reference Fig.12 Using physical mask II 80, a metal anode 50 is grown on the field plate passivation layer 40 by magnetron sputtering and covers the uncovered area 43 of the field plate passivation layer 40, which is used to expose the epitaxial layer 30 for the metal anode 50 to be electrically connected thereto. Specifically, the grown metal is Ni.

[0095] The magnetron sputtering process is used to use the physical mask II 80 on the passivation layer 40 obtained in step 11 to grow the anode Ni by magnetron sputtering, and the metal field plate length (L FP ) is 3-5μm is the optimal size. The sputtering target material is nickel with a mass purity of >99.99%, and Ar with a mass purity of 99.999% is used as the sputtering carrier gas to pass into the sputtering chamber. Before sputtering, the magnetron sputtering equipment cavity is cleaned with high-purity Ar for 5-10 minutes and then evacuated. At a vacuum degree of 6×10 -4 -1.3×10 -3 Pa, argon flow rate is 20-30cm 3 Anode nickel is prepared under the conditions of 100 nm / s, a target substrate distance of 10 cm and a working power of 20 W-100 W, and the thickness of the metal anode is 200-300 nm.

[0096] The material of the metal anode can be Au, Al, Ti, Ni, Pt, Cr and other elements and any combination of alloys thereof, or any combination of stacked layers thereof, and the stacked layer is preferably a 2-4 layer structure, wherein the first layer uses 2-4nm Ti or Cr to improve metal adhesion, and the remaining layers use elements such as Au, Pt, Ni with high metal work function to increase the device turn-on voltage, or use transparent conductive materials (TCO) such as ITO\FTO\AZO to reduce contact resistance. Among them, Au\Ag\Pt has stable chemical properties; Al\Ti\Ni has low cost.

[0097] Example 2

[0098] refer to Fig.13 The embodiment of the present invention provides an SBD device, which includes, from bottom to top, a metal cathode 10, a heterogeneous integrated substrate 20, an epitaxial layer 30, a field plate passivation layer 40, and a metal anode 50, wherein the field plate passivation layer 40 partially covers the epitaxial layer 30, and the upper surface of the field plate passivation layer 40 and the upper surface of the epitaxial layer 30 not covered with the field plate passivation layer 40 are covered with the metal anode 50;

[0099] The field plate passivation layer 40 includes a buffer layer 42 and a passivation layer 41 from bottom to top;

[0100] The heterogeneous integrated substrate 20 includes, from bottom to top, a first substrate 21, a bonding intermediate layer 22 having a corundum crystal structure, an ion implantation layer 24 and a β-Ga 2 O 3 Layer 23.

[0101] This embodiment provides a method for preparing the above-mentioned SBD device, comprising the following steps:

[0102] Step 1: Reference Fig.14 , prepare β-Ga 2 O 3 Layer 23 has a thickness of 200 μm-600 μm and a size of 1-6 inches. 2 O 3 The layer 23 has a first surface 23a and a second surface 23b. 2 O 3 Layer 23 is pre-treated and cleaned.

[0103] β-Ga 2 O 3As an emerging wide bandgap semiconductor material, it is used as one of the semiconductor substrate materials of the heterogeneous integrated substrate 20 because of its bandgap width far exceeding that of SiC and GaN (4.7-4.9 eV), theoretical breakdown electric field (8 MV / cm) and low price relative to SiC and GaN substrates, which effectively improves the device performance of the dual-gate device.

[0104] For the β-Ga 2 O 3 Layer 23 is sequentially subjected to organic cleaning and inorganic cleaning;

[0105] The steps of the organic cleaning are as follows:

[0106] The first step is to use ethanol ultrasonic cleaning for 3 minutes; the second step is to use acetone ultrasonic cleaning for 3 minutes; the third step is to use ethanol ultrasonic cleaning for 3 minutes; the fourth step is to use deionized water or ultrapure water to rinse for 3 minutes; the fifth step is to use running deionized water to rinse for 5 minutes;

[0107] The inorganic cleaning steps are as follows:

[0108] The first step is to soak in deionized water or ultrapure water and heat to 90°C; the second step is to prepare an SPM solution according to the volume ratio of deionized water: 30% hydrogen peroxide: 96% concentrated sulfuric acid = 1:1:4, and soak in the SPM solution for 5 minutes; optionally, the second step can also prepare a Piranha solution according to the volume ratio of 30% hydrogen peroxide: 98% concentrated sulfuric acid = 1:3, and soak in the Piranha solution for 1 minute; the third step is to soak in deionized water or ultrapure water and heat to 90°C, and then cool to room temperature.

[0109] Step 2: Reference Fig.15 , for the β-Ga prepared in step 1 2 O 3 Ion implantation is performed on the second surface 23b of the layer 23 to form an ion implantation layer 24. The implanted ions may be H, Fe, or Mg. The implantation angle is 7° to facilitate subsequent heterogeneous substrate bonding.

[0110] Optionally, after the ion implantation of the second surface 23 b is completed, the surface of the ion implantation layer 24 is bombarded with Ar ions.

[0111] Step 3: Reference Fig.16, provide a first substrate 21, which can be Si, SiC, diamond, sapphire, etc. Selecting low-priced Si or c-sapphire as the first substrate 21 can reduce the device preparation cost; selecting sapphire as the first substrate can also reduce the film damage caused by peeling and improve the device stability; selecting SiC or Diamond as the first substrate 21 can improve the device heat dissipation capacity, inhibit the self-heating effect, and improve the device operating temperature and high-temperature reliability. For high-power applications, excessive internal junction temperature of the device will significantly affect the overall electrical performance (on-resistance, on-current, etc.) and temperature reliability (service life) of the device. Therefore, SiC is used as the first substrate 21 in this embodiment.

[0112] refer to Fig.17 The bonding intermediate layer 23 is grown on the surface of the first substrate 21 by using a plasma enhanced PEALD process. The PEALD process specifically controls the growth temperature at 350° C. and uses trimethylaluminum (Me 3 Al, TMA) and ozone O 3 As a reaction precursor, 10-40nm α-Al is grown 2 O 3 The α-Al2O3 layer (corundum crystal structure) is used as the bonding intermediate layer 23, and nitrogen high temperature annealing is performed to activate the implanted ions to facilitate subsequent transfer. 2 O 3 The layer is beneficial to improving the transfer effect of the film, improving the film quality and bonding effect.

[0113] Step 4: Reference Fig.18 After completing step 3, the β-Ga layer with a thickness of about 300-800nm ​​is removed by using the "universal ion knife" intelligent stripping and transfer technology. 2 O 3 Transfer to a foreign substrate to form the following SOI-like wafers:

[0114] β-Ga 2 O 3 / Al 2 O 3 / Si,β-Ga 2 O 3 / Al 2 O 3 / 4H-SiC,β-Ga 2 O 3 / Al 2 O 3 / 6H-SiC,β-Ga 2 O 3 / Al 2 O3 / 3C-SiC, β-Ga 2 O 3 / Al 2 O 3 / Diamond, β-Ga 2 O 3 / Al 2 O 3 / c-Sapphire.

[0115] Step 5: Reference Fig.19 , the β-Ga of the heterogeneous integrated substrate 20 prepared in step 4 2 O 3 The layer 24 is thinned by ICP etching, RIE etching, CMP polishing or wet etching to control the β-Ga 2 O 3 The film thickness is <<100nm, and the thickness can be tested by ellipsometry or step analyzer. 2 O 3 The method of thinning the layer in the subsequent steps can reduce the 2 O 3 The difficulty of layer transfer operation, on the other hand, can be removed by post-thinning 2 O 3 The surface defects that may exist or be generated on the surface of the layer can be used to improve the surface quality and flatness of the material, and this process can also be applied to different β-Ga 2 O 3 Layer thickness requirements.

[0116] Then, magnetron sputtering metal combined with high temperature annealing is used to achieve ohmic contact on the lower surface 20b of the heterogeneous integrated substrate 20 to form a metal cathode 10. The specific metal and annealing method used are related to the substrate material selected in step 4. For example, using SiC as the first substrate 21, metal tungsten (W) or metal nickel (Ni) can be used to prepare the metal cathode 10 and anneal at 1000°C and nitrogen (N 2 ) atmosphere for high temperature annealing for 3-5 minutes; the material of the metal cathode 10 is selected from Au, Al, Ti, Sn, Ge, In, Ni, Co, Pt, W, Mo, Cr, Cu, Pb or any combination of alloys thereof or any combination of stacked layers or conductive compounds thereof.

[0117] The ICP etching or RIE etching can be carried out with Cl with a purity of 99.999% by mass. 2 , BCl 3 , Ar, Cl 2 / BCl3 , Cl 2 / Ar / BCl 3 Different mixed gas atmospheres, the mixing ratio can be 35:5 or 30:5, the ICP power is 300-900W, the RF power is 15-100W, and the etching temperature can be selected from room temperature to 80℃. Under this working condition, β-Ga can be etched stably and uniformly. 2 O 3 . For wet etching process, 10%-50% HF (room temperature), 40%-70% HNO 3 (60℃), 80%-85%H 3 PO 4 β-Ga can be etched stably and uniformly under different solution conditions such as 2-nitrogen ... 2 O 3 .

[0118] Step 6: The surface of the heterogeneous integrated substrate 20 obtained after the treatment in step 5 is subjected to ion bombardment for 5-20 minutes under the action of O plasma using a plasma glue machine to clean surface impurities. The plasma bombardment power range may be 200-400W.

[0119] Optionally, the cleaning process used in step 6 can be a combination of organic cleaning and inorganic cleaning. More preferably, the cleaning process uses organic cleaning first and then inorganic cleaning. The cleaning process can refer to the operating steps of organic cleaning and inorganic cleaning of the first substrate 21 in step 1, and will not be elaborated here.

[0120] Optionally, the heterogeneous integrated substrate 20 obtained in step 6 is subjected to ultraviolet ozone passivation treatment, in which a high-intensity ultraviolet light source with a wavelength of 185 nm or 254 nm is used in combination with an ultraviolet ozone passivation treatment. 3 atmosphere, the treatment time can be selected to be 15-30 minutes, and the treatment temperature can be 25-200°C; in some preferred embodiments, the treatment temperature is 100-150°C;

[0121] It should be noted that the organic cleaning and inorganic cleaning in step 6 are combined with the ultraviolet ozone passivation treatment of the cleaned heterogeneous integrated substrate 20 to better remove the OH attached by the inorganic cleaning. - , H + and organic matter, while suppressing oxygen vacancies to better improve the quality of gallium oxide films.

[0122] Step 7: Reference Fig. 20The heterogeneous integrated substrate 20 prepared by cleaning in step 6 is placed in a PECVD (plasma enhanced chemical vapor deposition) device to grow an epitaxial layer 30, which is a non-intentionally doped UIDβ-Ga with a thickness of 2 μm. 2 O 3 layer, and control the carrier concentration to 1×10 14 cm -3 -1×10 16 cm -3 The growth temperature of PECVD can be selected from 600-800℃, and high-purity metal gallium (≥99.9999%) is used as the Ga precursor source, and high-purity oxygen O 2 (≥99.999%) is the O precursor source, high purity argon Ar (≥99.999%) or nitrogen N 2 (≥99.999%) as an inert carrier gas.

[0123] The growth process of step 7 can also be selected from HVPE, MOCVD, PLD and other processes, all of which use O 2 and Ar mixed gas atmosphere, wherein the HVPE process can choose a growth temperature of 650-1000°C, the MOCVD process can choose a growth temperature of 700-800°C and use metal gallium as the gallium source, and the PLD process can choose 500-800°C.

[0124] Step 8: After completing step 7, 2 O 3 After the growth of the epitaxial layer 30, the sample is subjected to high temperature slow annealing to improve the epitaxial film and adjust the oxygen vacancy concentration of the film. The annealing temperature can be selected in the range of 500-700°C, the duration is 20min-60min, and the annealing atmosphere can be ozone (O 3 ) or oxygen (O 2 ) gas, or nitrogen (N 2 ) / argon (Ar), where O 3 The optimal gas atmosphere condition.

[0125] In a preferred embodiment, the annealing treatment in step 8 may also be performed by ultraviolet ozone treatment (UV / O 3 ) process to further improve the epitaxial quality and control the oxygen vacancy concentration. This process uses a high-intensity ultraviolet light source with a wavelength of 185nm or 254nm, combined with O 3 atmosphere, the treatment time can be selected to be 15-30 minutes, and the treatment temperature can be 25-200°C; in some preferred embodiments, the treatment temperature is 100-150°C.

[0126] Step 9: Reference Fig.21After the annealing treatment of the epitaxial layer 30 in step 8 is completed, a 10-20 nm Al layer is grown on the upper surface of the epitaxial layer 30 using a physical mask I 70 and a plasma enhanced atomic layer deposition (PEALD) process. 2 O 3 As the buffer layer 42, a growth temperature of 175-250°C is used, with trimethylaluminum and O 3 As the reaction precursor, N 2 Or Ar is an inert carrier gas.

[0127] Optionally, the step 9 may also use an ALD process, the growth temperature of which is 200-250° C., and the material of the buffer layer 42 may be replaced by HfO 2 , Hf x Al 1-x O(x=0.2-0.3), Hf x Si 1-x O(x=0.3-0.4), Hf x Zr 1-x O(x=0.5-0.7),Al x Si 1-x O(x=0.4-0.6), Hf x Ti 1-x O(x=0.3-0.4), La 2 O 3 , ZrO 2 High-K materials, with a thickness of 20-60nm, can improve Ga 2 O 3 / passivation layer interface characteristics, improve passivation effect and reduce leakage.

[0128] Step 10: Reference Fig. 22 After the buffer layer 42 is grown in step 9, a 300-500 nm thick BaTiO 3 As the passivation layer 41, the material of the passivation layer 41 can be SrTiO 3 , LaMnO 3 , KTaO 3 ,BiFeO 3 It is replaced by perovskite ferroelectric materials with extremely high dielectric constant (dielectric constant > 100), with a sputtering growth temperature of 650-750°C and a RF power of 50-100W.

[0129] The sputtering target material is BaTiO with a purity of >99.9% 3, Ar with a purity of 99.999% by mass is introduced into the sputtering chamber as the sputtering gas. Before sputtering, the magnetron sputtering equipment chamber is pre-cleaned with high-purity argon for 5-10 minutes, and then evacuated. -4 -2×10 -3 Pa, argon flow rate is 20-30cm 3 The passivation layer is prepared under the conditions of 0.05 % / sec, target substrate distance of 20 cm and working RF power of 50 W-100 W. In a preferred embodiment, the growth method can be replaced by high-power pulsed magnetron sputtering, which can effectively improve the quality of the film.

[0130] Step 11: Reference Fig.23 , using physical mask II 80, magnetron sputtering is used to grow a metal anode 50 on the field plate passivation layer 40 and cover the uncovered area 43 of the field plate passivation layer 40, which is used to expose the epitaxial layer 30 for the metal anode 50 to be electrically connected thereto, and the specific metal grown is Ni. Specifically, metal Ni is grown.

[0131] The magnetron sputtering process is used to use a physical mask II 80 on the passivation layer 40 obtained in step 10 to grow the anode Ni by magnetron sputtering, and the metal field plate length (L FP ) is 3μm-5μm is the optimal size. The sputtering target material is nickel with a mass purity of >99.99%, and Ar with a mass purity of 99.999% is used as the sputtering carrier gas to pass into the sputtering chamber. Before sputtering, the magnetron sputtering equipment cavity is cleaned with high-purity Ar for 5-10 minutes and then evacuated. At a vacuum degree of 6×10 -4 -1.3×10 -3 Pa, argon flow rate is 20-30cm 3 Anode nickel is prepared under the conditions of 100-2000 nm in thickness, 0.1 W of anode, and 0.1 W of target substrate distance.

[0132] The material of the metal anode can be Au, Al, Ti, Ni, Pt, Cr and other elements and any combination of alloys thereof, or any combination of stacked layers thereof, and the stacked layer is preferably a 2-4 layer structure, wherein the first layer uses 2-4nm Ti or Cr to improve metal adhesion, and the remaining layers use elements such as Au, Pt, Ni with high metal work function to increase the device turn-on voltage, or use transparent conductive materials (TCO) such as ITO\FTO\AZO to reduce contact resistance. Among them, Au\Ag\Pt has stable chemical properties; Al\Ti\Ni has low cost.

[0133] refer to Fig.24 , different passivation layer thicknesses (h E) performance data diagram of the forward conduction current density (left figure) and reverse withstand voltage characteristics (right figure) of the SBD device under 200 nm; through testing, it was found that the optimal thickness of the passivation layer is 400 nm.

[0134] Furthermore, it was found through testing that the SBD device prepared by the method of Example 2 has an on-resistance (R on,sp ) is 3.2%-20.3% higher than that of NFP SBD (SBD device without field plate passivation layer). The on-resistance (R on,sp ) in 1.26–1.53 mΩcm 2 .

[0135] Compared with different β-Ga 2 O 3 SBD BFOM (V2 br / R on,sp ), BaTiO 3 The BFOM of the FP SBD is 1.62 GW / cm 2 , about 11 times that of NFP SBD (0.15GW / cm 2 ), with Al 2 O 3 7 times that of the FP SBD of the passivation layer (0.23GW / cm 2 ).

[0136] Furthermore, by comparing the SBD device prepared by the method of Example 1 with the SBD device prepared by the method of Example 2, it was found that:

[0137] Combined with BaTiO 3 The overall performance of the shallow trench SBD device of Example 1 of the passivation layer is lower than that of the SBD device of Example 2 which does not adopt the shallow trench structure. The BFOM is reduced by 27.8%-44.3%, and V br 36.4%–40.2% reduction.

[0138] In addition, those skilled in the art should understand that, although there are many problems in the prior art, each embodiment or technical solution of the present invention can be improved in only one or several aspects, without having to solve all the technical problems listed in the prior art or background technology at the same time. Those skilled in the art should understand that the content not mentioned in a claim should not be used as a limitation on the claim.

[0139] Although this article uses more metal cathodes, heterogeneous integrated substrates, first substrates, bonding intermediate layers, β-Ga 2 O 3The terms "layer", "ion implantation layer", "epitaxial layer", "groove", "field plate passivation layer", "passivation layer", "buffer layer", "uncovered area", "metal anode", "photolithography mask", "physical mask", "physical mask" and the like are used herein, but the possibility of using other terms is not excluded. The use of these terms is only for the purpose of more conveniently describing and explaining the essence of the present invention; interpreting them as any additional limitation is contrary to the spirit of the present invention; the terms "first", "second", etc. (if any) in the description and claims of the embodiments of the present invention and the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0140] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for preparing a SBD device, characterized in that: The following steps are involved: providing a first substrate; forming a bonding intermediate layer having a corundum type crystal structure on the upper surface of the first substrate; Providing a β-Ga2O3 layer, the β-Ga2O3 layer having a first surface and a second surface; Performing ion implantation on the second surface of the β-Ga2O3 layer; Transferring the β-Ga2O3 layer to the bonding intermediate layer so that the second surface of the β-Ga2O3 layer contacts the upper surface of the bonding intermediate layer to form a heterogeneous integrated substrate; forming an epitaxial layer on the upper surface of the heterogeneous integrated substrate; forming a partially covered field plate passivation layer on the upper surface of the epitaxial layer, wherein the field plate passivation layer comprises a buffer layer and a passivation layer in sequence from bottom to top; forming a metal anode on the upper surface of the field plate passivation layer and the upper surface of the epitaxial layer not covered with the field plate passivation layer; Optionally, after forming the heterogeneous integrated substrate, a metal cathode is formed on the lower surface of the heterogeneous integrated substrate.

2. The method for preparing a SBD device according to claim 1, characterized in that: The passivation layer is selected from a ferroelectric material having a perovskite crystal structure and a dielectric constant>100, and the buffer layer is selected from a dielectric material having a dielectric constant in the range of 10-50; Preferably, the material of the buffer layer is selected from Al2O3, HfO2, ZrO2, TiO2, La2O3, Hf x Al 1-x O、Hf y Si 1-y O、Al z Si 1-z O、Hf m Ti 1-m O、Hf n Zr 1-n Any one or a combination of at least two of O, wherein x=0.2-0.3, y=0.3-0.4, z=0.4-0.6, m=0.3-0.4, n=0.5-0.7; The material of the passivation layer is selected from any one of BaTiO3, SrTiO3, LaMnO3, KTaO3, and BiFeO3, or a combination of at least two thereof; Preferably, the thickness of the passivation layer is 300-500 nm, and the thickness of the buffer layer is 10-30 nm.

3. The method for preparing the SBD device according to claim 1, characterized in that: The method for forming the buffer layer includes: PEALD deposition; the method for forming the passivation layer includes: radio frequency magnetron sputtering deposition.

4. The method for preparing the SBD device according to claim 1, characterized in that: The material of the first substrate is selected from any one of Si, SiC, diamond, and sapphire, or a combination of at least two thereof; Preferably, the thickness of the first substrate is 200 μm-600 μm, and the thickness of the β-Ga2O3 layer is 60-100 nm; Preferably, the ion types implanted on the second surface of the β-Ga2O3 layer include hydrogen, iron or magnesium, and the implantation angle is 7°; Preferably, the method further comprises, after completing the ion implantation of the second surface, bombarding the surface of the ion implantation layer with Ar ions.

5. The method for preparing a SBD device according to claim 1, characterized in that: Forming the bonding intermediate layer includes: PEALD deposition; Preferably, the PEALD deposition includes forming the bonding intermediate layer at a certain temperature using trimethylaluminum and ozone as reaction precursors.

6. The method for preparing a SBD device according to claim 1, characterized in that: The material of the epitaxial layer is undoped β-Ga2O3, or β-Ga2O3 doped with any one or at least two of Sn, Si, and Ge; Preferably, the thickness of the epitaxial layer is 1.5-4 μm, and the carrier concentration of the epitaxial layer is 1×10 14 cm -3 -1×10 16 cm -3 ; Preferably, the method further comprises performing ultraviolet ozone passivation treatment on the heterogeneous integrated substrate.

7. The method for preparing a SBD device according to claim 1, characterized in that: After forming the epitaxial layer, annealing the epitaxial layer; Preferably, the annealing temperature of the annealing treatment is 500-700° C., the annealing time is 20-60 min, and the annealing atmosphere is selected from any one of ozone, oxygen, nitrogen, and argon, or a combination of at least two of them.

8. The method for preparing a SBD device according to claim 7, characterized in that: After the annealing treatment is completed, ultraviolet ozone treatment is performed; Preferably, the wavelength of the ultraviolet lamp source for the ultraviolet ozone treatment is 185nm or 254nm, the ultraviolet ozone treatment time is 15-30min, and the ultraviolet ozone treatment temperature is 25-200°C.

9. The method for preparing a SBD device according to claim 1, characterized in that: The thickness of the metal cathode is 200-300nm; The material of the metal cathode is selected from Au, Al, Ti, Sn, Ge, In, Ni, Co, Pt, W, Mo, Cr, Cu, Pb or any combination of alloys thereof or any combination of laminates or conductive compounds thereof; and / or The thickness of the metal anode is 200-300nm; The material of the metal anode is selected from Au, Al, Ti, Sn, Ge, In, Ni, Co, Pt, W, Mo, Cr, Cu, Pb, or an alloy of any combination thereof, or a stack of any combination thereof, or a conductive compound.

10. An SBD device, characterized in that: The SBD device comprises, from bottom to top, a metal cathode, a heterogeneous integrated substrate, an epitaxial layer, a field plate passivation layer, and a metal anode, wherein the field plate passivation layer partially covers the epitaxial layer, and the upper surface of the field plate passivation layer and the upper surface of the epitaxial layer not covered with the field plate passivation layer are covered with a metal anode; The field plate passivation layer includes a buffer layer and a passivation layer in order from bottom to top; the passivation layer is selected from a ferroelectric material having a perovskite crystal structure and a dielectric constant>100, and the buffer layer is selected from a dielectric material having a dielectric constant in the range of 10-50; The heterogeneous integrated substrate comprises, from bottom to top, a first substrate, an ion implantation layer, a bonding intermediate layer having a corundum type crystal structure and a β-Ga2O3 layer.

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