HBC solar cell wet process

Abstract

According to the HBC solar cell wet process provided by the invention, the sequence of a silicon wafer texturing process and a rounding process is optimized, i.e., in the texturing process, the silicon wafer is not subjected to rounding treatment, but is subjected to rounding treatment after etching, so that extra pollution possibly caused by cleaning of a SiNx dielectric film can be removed through rounding treatment; and the texture appearance is ensured. The texturing step is further optimized, a distributed etching process combining texturing etching and polishing alkali etching is adopted to replace a traditional alkali etching process, protection of the front texturing film layer is achieved, relative balance of the front texturing reflectivity and the passivation effect is kept, and the conversion efficiency and manufacturing convenience of the solar cell are improved.

Description

Technical Field

[0001] The invention belongs to the technical field of solar cell preparation, and in particular relates to a HBC solar cell wet process. Background Art

[0002] Interdigitated Back Contact Silicon Heterojunction Solar Cell (HBC solar cell) has the advantages of both interdigitated back contact solar cell (IBC solar cell) and heterojunction solar cell with thin intrinsic layer (HJT solar cell). It removes the metal electrode on the front surface, reduces shading loss and obtains a larger short-circuit current, and inserts a high-quality intrinsic amorphous silicon passivation layer between heavily doped amorphous silicon and crystalline silicon, which greatly reduces the interface state, reduces surface recombination and increases the open circuit voltage. It is currently the single crystal silicon solar cell with the highest photoelectric conversion efficiency in the world.

[0003] The process steps for preparing HTJ solar cells are mainly divided into pre-cleaning, texturing and structuring, rounding, post-cleaning, surface state adjustment and other steps. The purpose of pre-cleaning is to clean the silicon wafer and remove the surface loss layer, and the purpose of texturing and structuring is to form a pyramid structure on the surface of the silicon wafer, thereby effectively reducing the surface reflectivity of the silicon wafer to achieve light trapping. In addition, since the textured surface increases interface defects and the pyramid tip is not conducive to the passivation of the amorphous silicon film, it will cause the minority carrier lifetime to decrease. Therefore, it is necessary to smooth the pyramid velvet surface, but smoothing after texturing will increase the light reflectivity of the cell. In addition, the polishing of the back side and the interdigital etching of the P and N regions will cause further etching of the front velvet surface, affecting the anti-reflection effect of the front velvet surface of the HBC cell, and ultimately reducing the conversion efficiency of the cell.

[0004] At present, the first conventional method for preparing HBC batteries is: after the double-sided velvet is completed, the front side is plated with SiNx film (silicon nitride film) dielectric film for protection, and after the subsequent back side amorphous silicon is etched to form the P area and N area, HF (hydrofluoric acid) is used to remove the front side velvet protective dielectric film layer. However, due to the reaction between HF and SiNx film layer, there is additional contamination on the front side, which cannot meet the subsequent CVD deposition surface quality requirements, and it is necessary to use alkali or acid to remove the contamination. In addition, the morphology of the velvet surface is additionally affected during the cleaning process, which reduces the conversion efficiency. Conventional solution 2 is: after the double-sided velvet is performed on the silicon wafer, the front side is thermally oxygen deposited with silicon dioxide film for protection, and the back side is polished. After the subsequent back side amorphous silicon is etched to form the P area and N area, HF is used to remove the front side velvet protective silicon dioxide layer. However, silicon dioxide itself is difficult to deposit, and its selectivity in alkali is relatively small. After the back polishing is completed, the subsequent wet etching cannot play an effective protective role. The subsequent wet etching further etches the velvet surface, and the rounding effect is destroyed, affecting the battery efficiency. Summary of the invention

[0005] The present invention provides a wet process for HBC solar cells, which protects a front suede protection film layer from damage and avoids possible pollution caused by removing the suede protection film layer, thereby protecting the suede morphology on the surface of the cell and improving the cell conversion efficiency.

[0006] The present invention discloses a HBC solar cell wet process, which comprises the following steps:

[0007] A silicon wafer is provided.

[0008] Performing texturing on a first surface and a second surface of the silicon wafer, wherein the first surface and the second surface are two opposite surfaces on the silicon wafer;

[0009] After forming a dielectric protection film on the second surface of the silicon wafer after texturing, polishing the first surface of the silicon wafer;

[0010] An etching area is defined on the first surface of the polished silicon wafer, and the etching area is sequentially subjected to texturing etching and polishing alkali etching;

[0011] The second surface of the silicon wafer after polishing and alkali etching is cleaned of the dielectric protection film and rounded.

[0012] Furthermore, when texturing etching is performed on the etched area, the silicon wafer is immersed in an alkaline solution, and a texturing additive is added to the alkaline solution.

[0013] Furthermore, the alkaline solution is a potassium hydroxide solution or a sodium hydroxide solution.

[0014] Furthermore, the volume concentration of the alkaline solution is 1%-5%.

[0015] Furthermore, the volume concentration of the texturing additive is 1%-5%.

[0016] Furthermore, the process time of the texturing etching is 0-500s.

[0017] Furthermore, when the etched area is subjected to polishing alkali etching, the silicon wafer is immersed in an alkali solution and the alkali solution is heated.

[0018] Furthermore, the alkaline solution is a potassium hydroxide solution or a sodium hydroxide solution.

[0019] Furthermore, the volume concentration of the alkaline solution is 2%-8%.

[0020] Further, the alkaline solution is heated to 30°C-90°C.

[0021] Furthermore, the process time of the polishing alkali etching is 10-100s.

[0022] Furthermore, the etching depth of the texturing etching is greater than or equal to 70% of the total etching depth.

[0023] Furthermore, after polishing the first surface of the silicon wafer after texturing, a post-cleaning operation is performed on the silicon wafer.

[0024] Furthermore, after the silicon wafer is cleaned with a mixed solution of hydrochloric acid and hydrogen peroxide, the silicon wafer is chain cleaned with DHF.

[0025] Furthermore, after a dielectric protection film is formed on the second surface of the silicon wafer by a thermal oxidation process, the first surface of the silicon wafer is polished.

[0026] Furthermore, a mixed solution of hydrochloric acid, hydrofluoric acid and ozone is used to perform rounding treatment on the second surface of the silicon wafer.

[0027] Compared with the prior art, the present invention provides at least the following technical effects:

[0028] The present invention optimizes the sequence of the silicon wafer texturing process and the rounding process, that is, in the texturing process, the silicon wafer is not rounded, and the rounding is performed after etching, thereby eliminating the additional pollution that may be caused by cleaning the silicon dioxide dielectric film and ensuring the texture morphology. The present invention also optimizes the texturing step and adopts a distributed etching process combining texturing etching and polishing alkaline etching to replace the traditional alkaline etching process, thereby protecting the front texture protective film layer, thereby improving the conversion efficiency of the solar cell and the convenience of manufacturing. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1The present invention is a schematic diagram of the HBC solar cell wet process according to an embodiment of the present invention;

[0030] Figure 2 This is a surface morphology diagram of a silicon wafer after a double-sided texturing process in one embodiment of the present invention;

[0031] Figure 3 This is a surface morphology image of a silicon wafer formed after a single-side polishing process in one embodiment of the present invention;

[0032] Figure 4 Surface morphology of a silicon wafer after dielectric protection film cleaning and rounding process in one embodiment of the present invention. DETAILED DESCRIPTION

[0033] The following is a description of a HBC solar cell wet process of the present invention in conjunction with a schematic diagram, wherein a preferred embodiment of the present invention is shown. It should be understood that those skilled in the art can modify the present invention described herein while still achieving the beneficial effects of the present invention. Therefore, the following description should be understood as being widely known to those skilled in the art and not as a limitation of the present invention.

[0034] The present invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the accompanying drawings are in very simplified form and are not in exact proportions, and are only used to facilitate and clearly assist in illustrating the purpose of the embodiments of the present invention.

[0035] Please refer to Figure 1 This embodiment provides a HBC solar cell wet process. Specifically, the wet process includes at least the following steps:

[0036] S1. Providing a silicon wafer 2;

[0037] S2. Performing texturing on the first surface and the second surface of the silicon wafer 2, wherein the first surface and the second surface are two opposite surfaces on the silicon wafer 2;

[0038] S3. After forming a dielectric protective film on the second surface of the silicon wafer 2 after texturing, polishing the first surface of the silicon wafer 2;

[0039] S4. An etching region is defined on the first surface of the polished silicon wafer 2, and the etching region is sequentially subjected to texturing etching and polishing alkali etching;

[0040] S5. Cleaning the dielectric protective film and performing rounding treatment on the second surface of the silicon wafer 2 after polishing and alkali etching.

[0041] The present invention optimizes the sequence of the texturing process and the rounding process of the silicon wafer 2, that is, in the texturing process, the silicon wafer 2 is not rounded, and the rounding process is performed after etching, thereby ensuring the suede morphology and eliminating the cleaning SiN x The process of texturing is optimized, and the distributed etching process combining texturing etching and polishing alkali etching is used to replace the traditional alkali etching process, so as to protect the front velvet film layer, thereby improving the conversion efficiency of solar cells and the convenience of manufacturing.

[0042] In this embodiment, the first surface is the back side of the silicon wafer 2 , that is, the non-illuminated side of the silicon wafer 2 , and the second surface is the front side of the silicon wafer 2 , that is, the illuminated side of the silicon wafer 2 .

[0043] In this embodiment, the silicon wafer 2 is selected from N-type single crystal silicon, and the prepared cell is an HBC solar cell.

[0044] Specifically, in step S1, after selecting the N-type single crystal silicon wafer 2, the silicon wafer 2 needs to be pre-cleaned. The purpose of pre-cleaning is to remove organic matter, particles, metal ions and other impurities on the surface of the silicon wafer 2, providing a good foundation for subsequent process steps such as texturing, deposition, patterning and doping.

[0045] In a specific embodiment, a cleaning solution of NaOH (sodium hydroxide) + H2O2 (hydrogen peroxide) is used to perform front cleaning on the front and back sides of the silicon wafer 2 to remove surface contamination and damage layers, so that the silicon wafer 2 can be free of lint normally.

[0046] In step S2, the cleaned silicon wafer 2 is subjected to double-sided texturing. The purpose of double-sided texturing is to reduce light reflection and increase light absorption, thereby improving the overall conversion efficiency of the battery.

[0047] In the process of double-sided texturing, acidic or alkaline solutions, such as a mixed solution of hydrofluoric acid (HF) and nitric acid, or sodium hydroxide (NaOH) solution, can be used as the texturing solution. Texturing additives can also be added to the texturing solution to optimize the texturing process and enhance the final light absorption effect. The solution formula and concentration will be adjusted according to the desired texturing effect.

[0048] In this embodiment, KOH alkaline solution and texturing additives are used to perform double-sided alkaline texturing on the silicon wafer 2 .

[0049] The texturing additives may be isopropyl alcohol, potassium iodide, phosphate, etc. Those skilled in the art may select different texturing solutions and texturing additives according to the desired texturing effect, texturing process conditions (such as temperature and concentration), and manufacturing process cost considerations.

[0050] In this embodiment, the specific process of double-sided velveting is as follows:

[0051] At a certain texturing temperature, one side of the silicon wafer 2 is immersed in the texturing solution for a period of time, and a tiny pyramid or inverted pyramid structure is formed on one surface of the silicon wafer 2. After the texturing surface is formed on one surface, the silicon wafer 2 is turned over so that the untextured surface is immersed in the texturing solution, and the above texturing process is repeated to complete the double-sided texturing of the silicon wafer 2.

[0052] Please refer to Figure 2 By using the above double-sided texturing method, evenly distributed pyramid texturing surfaces 1 are formed on the front and back sides of the silicon wafer 2 respectively.

[0053] In a specific embodiment, the texturing solution includes a KOH alkaline solution and a texturing additive.

[0054] In a specific embodiment, the texturing temperature may be 40°C-90°C.

[0055] In step S3, the back side of the textured silicon wafer 2 is single-sided polished. The purpose of single-sided polishing is to reduce back side defects, increase mechanical stress, and remove possible impurities and damaged layers, thereby improving the electrical properties, thermal conductivity and mechanical strength of the device, and avoiding corrosion problems caused by irregularities on the back side.

[0056] In this embodiment, the specific process of single-side polishing is as follows:

[0057] The cleaned silicon wafer 2 is placed in a high-temperature furnace and heated in an oxygen environment. The heating temperature can be selected according to the actual type of silicon wafer 2, the required thickness of the silicon dioxide film, and the oxidation rate. After silicon reacts with oxygen, a silicon dioxide film is generated on the front of the silicon wafer 2. The silicon dioxide film mainly serves as a dielectric protective film to protect the surface of the silicon wafer 2 from the external environment and improve the stability and reliability of the device. After thermal oxidation, the silicon wafer 2 needs to be slowly cooled to room temperature in the furnace to prevent stress and cracks caused by temperature gradients. When the silicon wafer 2 is cooled to room temperature, a layer of adhesive can be applied to the back of the silicon wafer 2 and adhered to a flat fixture to ensure the stability of the silicon wafer 2 during the polishing process. The silicon wafer 2 coated with adhesive and fixed on the fixture is placed on the polishing machine and the polishing machine is started. During the polishing process, an abrasive is used to form a grinding layer between the back of the silicon wafer 2 and the polishing pad to remove most of the excess silicon dioxide film and irregularities on the back of the silicon wafer 2.

[0058] In a specific embodiment, the heating temperature can be selected between 900°C and 1200°C.

[0059] In another specific embodiment, the abrasive can be selected from diamond abrasive, aluminum oxide abrasive, chemical mechanical polishing slurry, etc.

[0060] Please refer to Figure 3 , is the surface morphology of the silicon wafer 2 after single-side polishing. A dielectric protection film 4 is formed on the pyramid velvet surface 1 on the front side of the silicon wafer 2, while the back side of the silicon wafer 2 is a smooth polished surface.

[0061] Before performing step S4, the polished silicon wafer 2 needs to be post-cleaned.

[0062] Specifically, in the present embodiment, the silicon wafer 2 is immersed in HCl (hydrochloric acid) + H2O2 (hydrogen peroxide) solution to perform post-cleaning treatment on the silicon wafer 2, thereby removing organic pollution and other metal ions on the surface of the silicon wafer 2, cleaning additive residues, etc. It is understandable that HCl is a strong acid that can dissolve metal ions and organic matter, and H2O2, as an oxidant, can enhance the cleaning effect and help remove more stubborn organic pollution. In addition, the silicon wafer 2 can also be exposed to an ozone atmosphere to perform post-cleaning treatment on the silicon wafer 2, and ozone is a strong oxidant that can effectively decompose organic matter and can remove the natural oxide layer on the surface of the silicon wafer 2. Then, by DHF (diluted hydrofluoric acid) chain cleaning, the oxide layer of the polished surface (back of the silicon wafer 2) is removed, and the surface of the silicon wafer 2 is hydrogenated, so that the front and back of the silicon wafer 2 are both clean without organic pollution, metal ions and oxide layer, and show hydrophobicity.

[0063] In step S4, thin film deposition and patterning are sequentially performed on the silicon wafer 2 after the post-cleaning treatment.

[0064] In this embodiment, intrinsic amorphous silicon and doped amorphous silicon layers are sequentially deposited on the back side of the silicon wafer 2 by PECVD (Plasma Enhanced Chemical Vapor Deposition). Specifically, the intrinsic amorphous silicon layer is a passivation layer, which scatters light by increasing the roughness of the back side of the silicon wafer 2, thereby reducing light reflection loss and improving light capture efficiency. The doped amorphous silicon layer is made by adding n-type or p-type dopants to intrinsic amorphous silicon. For example, adding phosphorus (P) can form n-type doped amorphous silicon, while adding boron (B) can form p-type doped amorphous silicon. Therefore, an etching area can be defined on the doped amorphous silicon layer (doped with n-type or p-type dopants at the same time) by a patterning process such as exposure, development or laser, and the etching area is subsequently formed by an etching process to form the positions of the p-type doped area (P area) and the n-type doped area (N area). It is understandable that those skilled in the art can select different types of deposited films to achieve the same functions of the above films according to actual conditions, for example, select microcrystalline silicon or polycrystalline silicon as a passivation layer or a doping layer.

[0065] Furthermore, after the patterning process, the etched area is sequentially subjected to texturing etching and polishing alkali etching, so as to improve the light absorption efficiency of the solar cell device on the basis of removing the doped amorphous silicon, microcrystalline silicon or intrinsic amorphous silicon on the etched area.

[0066] Specifically, the first etching step is texturing etching, the purpose of which is to form tiny pits or texturing in the etched area of ​​the silicon wafer 2, which helps to reduce reflection and improve the light absorption efficiency of the solar cell device.

[0067] In this embodiment, the specific steps of texturing and etching are as follows:

[0068] The silicon wafer 2 is immersed in a KOH or NaOH solution of a certain volume concentration, and a texturing additive is added to the alkaline solution, and heated to a certain temperature to remove the damaged layer and pollutants, and initially form the P region and the N region. In addition, in the etching solution, KOH (potassium hydroxide) or NaOH (sodium hydroxide) reacts with silicon to produce sodium silicate (or potassium silicate), and forms tiny pits or pyramid structures in the etched area. In addition, adding a texturing additive to the alkaline solution can improve and control the microstructure of the surface of the silicon wafer 2, making the battery cell more suitable for absorbing light, thereby significantly reducing the reflection of light and increasing the absorption of light on the surface of the silicon wafer 2, thereby further improving the conversion efficiency of the battery.

[0069] In a specific embodiment, the volume concentration of the KOH or NaOH solution is 1%-5%, for example, 2%, 3% or 5%, preferably 3%.

[0070] In another specific embodiment, the KOH or NaOH solution is heated to 30°C-90°C, such as 40°C, 60°C or 80°C, preferably 80°C.

[0071] In another specific embodiment, the polishing alkali etching process time is 30s-500s, for example, 30s, 50s or 70s, preferably 150s.

[0072] In another specific embodiment, the texturing additive may be selected from surfactants, oxidants, organic acids, and the like.

[0073] Furthermore, the second etching step is polishing alkali etching, and the polishing alkali etching process is used to remove the roughness generated in the texturing process and remove surface defects to obtain a smoother surface.

[0074] In this embodiment, the polishing alkali etching step is: immersing the silicon wafer 2 in a KOH or NaOH solution with a certain volume concentration, and heating the KOH or NaOH solution to a certain temperature.

[0075] In another specific embodiment, the volume concentration of the KOH or NaOH solution is 2%-8%, for example, 3%, 6% or 7%, preferably 5%.

[0076] In another specific embodiment, the KOH or NaOH solution is heated to 30°C-90°C, such as 40°C, 60°C or 80°C, preferably 65°C.

[0077] In another specific embodiment, the polishing alkali etching process time is 10s-100s, for example, 20s, 40s or 60s, preferably 50s.

[0078] Compared with the existing technology of etching using only alkaline etching process, the two-step etching can more accurately control the etching process, and while deeply etching the back side, reduce the damage to the front velvet film layer and maintain its structure and function. In addition, compared with completing all etching at one time, step-by-step etching can simplify the process flow, so that each step can be independently controlled and optimized.

[0079] In a specific embodiment, the etching depth of the texture etching is greater than or equal to 70% of the total etching depth. The purpose is to effectively improve the surface texture quality of the device, thereby reducing light reflection, increasing light absorption, and further improving the efficiency of the device. At the same time, this method of accurately controlling the etching process can protect the front texture, avoid unnecessary damage, and ensure the performance and life of the device.

[0080] In step S5, after completing the above-mentioned etching process, under the premise of avoiding damaging the silicon wafer 2, an acid solution such as HF (hydrochloric acid) of appropriate concentration is used to remove the protective layer (silicon dioxide film) on the front side of the silicon wafer 2, and then a rounding treatment is performed. The rounding treatment step may include at least one or more of chemical corrosion (alkaline etching), mechanical polishing, chemical mechanical polishing (CMP), texturing, and coating with an anti-reflective coating.

[0081] In this embodiment, the rounding treatment is arranged after the etching step, which can not only reduce surface reflection, improve surface flatness, and remove surface defects, but also remove the additional pollution that may be caused by cleaning the silicon dioxide dielectric film through the rounding treatment, and improve the damage caused by the chemical etchant to the front velvet structure, thereby improving the front characteristics of the silicon wafer 2 to form a pyramid morphology similar to the front of a conventional heterojunction cell. This morphology can significantly reduce the reflection of light on the surface of the silicon wafer 2 and improve the light absorption rate.

[0082] In a specific embodiment, after removing the protective layer at room temperature using 2% HF, the silicon wafer 2 is rounded and smoothed by a chemical solution of HCl+HF+O3. After the rounding treatment, the balance between reflectivity and passivation effect is high.

[0083] Preferably, after the rounding lubrication treatment, further surface treatment is performed using 0.5% HF to remove any residue that may be generated during the rounding lubrication process, so as to adjust the surface state of the silicon wafer 2 .

[0084] Please refer to Figure 4 After the above-mentioned dielectric protective film cleaning and rounding process, the following is obtained: Figure 4 The front morphology of the silicon wafer 2 is shown, which is the front pyramid morphology 5 of a conventional heterojunction battery.

[0085] After obtaining the above-mentioned battery, an amorphous silicon passivation layer and an anti-reflection layer are deposited on the front side of the silicon wafer 2, TCO is deposited and patterned and etched on the back side, the P region and the N region are isolated, and finally metallization treatment is performed to form an HBC battery.

[0086] Embodiment 2

[0087] This embodiment provides a specific embodiment of preparing an HBC solar cell by the HBC solar cell wet process disclosed in the first embodiment. The specific preparation steps include:

[0088] An N-type single crystal silicon wafer 2 is selected, and the front and back sides of the silicon wafer 2 are pre-treated and cleaned. The surface contamination, damage layer and organic residue on the surface of the silicon wafer 2 are removed by using a NaOH+H2O2 etching system, so that the silicon wafer 2 can be normally free of lint.

[0089] The obtained silicon wafer 2 is subjected to double-sided alkali texturing using a KOH alkaline solution with a texturing additive. The morphology of the silicon wafer 2 after texturing is as follows: Figure 2 shown.

[0090] The silicon wafer 2 is single-sided polished by using a thermal oxygen mask protection process. The front side of the silicon wafer 2 is a standard pyramid structure, and the back side is a polished surface. Figure 3 shown.

[0091] The obtained silicon wafer 2 is post-cleaned with a mixed solution of HCl+O3 to remove organic contamination and other metal ions.

[0092] The etched area is etched by distributed alkali etching to obtain the P region and N region:

[0093] Specifically, the first step adopts texturing etching, and KOH alkaline solution with texturing additives is selected as the etching solution, wherein the concentration of KOH alkaline solution is 2%, the concentration of texturing additive is 3%, the temperature of KOH alkaline solution is 80°C, and the process time of texturing etching is 150s. The second step adopts polishing alkaline etching, and KOH solution is selected as the etching solution, wherein the concentration of KOH alkaline solution is 5%, the temperature of KOH alkaline solution is 65°C, and the process time of texturing etching is 50s.

[0094] HF with a concentration of 2% is selected as a cleaning solution, and the front dielectric protection layer is removed by the cleaning solution at room temperature. After that, the silicon wafer 2 is rounded by a mixed solution of HCl+HF+O3.

[0095] After the above steps, a silicon wafer 2 with a reflectivity lower than 11% can be obtained.

[0096] Subsequent processing:

[0097] An amorphous silicon passivation layer and an anti-reflection layer are deposited on the front of the silicon wafer 2. Through testing, it can be found that the front passivation J0 of the battery is less than 1.5fA / cm 2 .

[0098] Furthermore, TCO is deposited and patterned on the back of the silicon wafer 2 to isolate the P region and the N region, and finally metallization is performed to form an HBC cell. Through testing, it can be obtained that the conversion efficiency of the cell is greater than 26.2%.

[0099] It can be seen that the passivation effect and the reflection effect of the HBC solar cell prepared by the above HBC solar cell wet process are relatively balanced, and the cell conversion efficiency is relatively high.

[0100] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A HBC solar cell wet process, characterized in that: The following steps are involved: Providing a silicon wafer; Performing texturing on a first surface and a second surface of the silicon wafer, wherein the first surface and the second surface are two opposite surfaces of the silicon wafer; After forming a dielectric protection film on the second surface of the silicon wafer after texturing, polishing the first surface of the silicon wafer; An etching area is defined on the first surface of the polished silicon wafer, and the etching area is sequentially subjected to texturing etching and polishing alkali etching; The second surface of the silicon wafer after polishing and alkali etching is cleaned of the dielectric protection film and rounded.

2. The HBC solar cell wet process according to claim 1, characterized in that: When the etching area is subjected to texturing etching, the silicon wafer is immersed in an alkaline solution added with a texturing additive, and the alkaline solution is heated.

3. The HBC solar cell wet process according to claim 2, characterized in that: The alkaline solution is a potassium hydroxide solution or a sodium hydroxide solution.

4. The HBC solar cell wet process according to claim 2, characterized in that: The volume concentration of the alkaline solution is 1%-5%.

5. The HBC solar cell wet process according to claim 2, characterized in that: The volume concentration of the texturing additive is 1%-5%.

6. The HBC solar cell wet process according to claim 2, characterized in that: The process time of the texturing etching is less than or equal to 500s.

7. The HBC solar cell wet process according to claim 1, characterized in that: When the etched area is subjected to polishing alkali etching, the silicon wafer is immersed in an alkali solution and the alkali solution is heated.

8. The HBC solar cell wet process according to claim 7, characterized in that: The alkaline solution is a potassium hydroxide solution or a sodium hydroxide solution.

9. The HBC solar cell wet process according to claim 7, characterized in that: The volume concentration of the alkaline solution is 2%-8%.

10. The HBC solar cell wet process according to claim 7, characterized in that: The alkaline solution is heated to 30°C-90°C.

11. The HBC solar cell wet process according to claim 7, characterized in that: The process time of the polishing alkali etching is 10-100s.

12. The HBC solar cell wet process according to claim 1, characterized in that: The etching depth of the texturing etching is greater than or equal to 70% of the total etching depth.

13. The HBC solar cell wet process according to claim 1, characterized in that: After polishing the first surface of the silicon wafer after texturing, the silicon wafer is post-cleaned.

14. The HBC solar cell wet process according to claim 13, characterized in that: After the silicon wafer is cleaned with a mixed solution of hydrochloric acid and hydrogen peroxide, the silicon wafer is chain cleaned with DHF.

15. The HBC solar cell wet process according to claim 1, characterized in that: After a protective film layer is formed on the second surface of the silicon wafer by using a thermal oxidation process, the first surface of the silicon wafer is polished.

16. The HBC solar cell wet process according to claim 1, characterized in that: The second surface of the silicon wafer is rounded by using a mixed solution of hydrochloric acid, hydrofluoric acid and ozone.

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