Parallel pulse power decoupling system control device and control method

Abstract

The invention belongs to the field of power electronic control, and relates to a parallel pulse power decoupling system control device and method, and the device comprises a second-order low-pass filter, a sampling module, an outer-loop nonlinear ADRC controller, an inner-loop nonlinear ADRC controller, a current feedforward module, a comparator, and a dual-inductor bidirectional Buck / Boost converter. All the devices are connected in sequence to form the parallel pulse power decoupling system control device; according to the invention, the dual-inductor bidirectional Buck / Boost converter is adopted as a pulse power compensation unit and is connected in parallel with the output port of the pre-stage power supply system, so that the transient process of inductor current commutation can be eliminated, and the bus current peak generated during pulse load state switching can be effectively reduced.

Description

Technical Field

[0001] The invention belongs to the field of power electronic control, and in particular relates to a parallel pulse power decoupling system control device and a control method. Background Art

[0002] With the rapid development of science and technology, pulse loads with high peak power, low average power, and periodic power changes, such as phased array radars and synthetic aperture radars, have been widely used in airborne defense equipment. The power of the pulse load pulsates periodically, and the airborne power supply system is often limited by capacity, space, and weight. Its power supply power needs to remain constant. The existence of instantaneous power difference will cause the power supply power to not match the pulse load power, which in turn causes a greater impact on the airborne power supply system, resulting in serious fluctuations in the voltage and current of the power supply system, and other accidents such as the inability of other equipment to operate normally, affecting the safe and reliable operation of the airborne power supply system. In order to solve the problem of mismatch between the power supply power and the pulse load power and reduce the impact of pulse load characteristics on the power supply system, it is an indispensable measure to study effective and reliable pulse load power decoupling methods. The commonly used pulse load power decoupling method is to connect a bidirectional Buck / Boost converter in parallel to the output port of the previous power supply system to form a parallel pulse power decoupling system, such as Figure 1 At the same time, the bidirectional Buck / Boost converter is controlled by the PI control strategy to provide the pulsating component in the pulse power, while the front-stage power supply system only needs to provide the average power of the load, eliminating the influence of the pulsating power on the front-stage power supply system.

[0003] Ideally, when the pulse load switches between high power and low power states, the compensation current direction switching provided by the traditional bidirectional Buck / Boost converter can be regarded as instantaneous. However, since the inductor current cannot change suddenly, the inductor current commutation transient process makes the compensation current unable to follow the pulsating component in the pulse current in time, and the output voltage of the front-stage power supply system will drop, and the bus current will have a large current spike. p , the compensation current i provided by the bidirectional Buck / Boost converter b , bus current i o , decoupling capacitor voltage v Cs Waveform Figure 2 shown.

[0004] To solve the above problems, a dual-inductor bidirectional Buck / Boost converter can be used as a power decoupling unit. By providing independent paths for the compensation currents in the positive and negative directions, the compensation current can follow the pulse current AC component in time when the pulse load power is switched, eliminating the transient process of the inductor current reversal and improving the dynamic performance of the converter. Figure 3 As shown. Pulse load current i p, the two-branch inductor current i of the dual-inductor bidirectional Buck / Boost converter L1 and i L2 , compensation current i b , bus current i o , decoupling capacitor voltage v Cs Waveform Figure 4 shown.

[0005] In order to ensure the normal operation of the dual-inductor bidirectional Buck / Boost converter, it is necessary to control the decoupling capacitor voltage to be greater than the output voltage of the front-stage power supply system, and control the dual-inductor bidirectional Buck / Boost converter to compensate for the pulse current. However, if the voltage and current dual-loop control method based on the traditional PI controller is used, when the pulse load current suddenly changes, due to the limited loop gain of the low-frequency band of the current inner loop, the tracking accuracy and speed of the current reference are insufficient, the dynamic response performance of the dual-inductor bidirectional Buck / Boost converter is poor, and the bus current at the output end of the front-stage power supply system will still have current spikes. Summary of the invention

[0006] In order to solve the problems existing in the above prior art, the present invention proposes a parallel pulse power decoupling system control device, which includes: a second-order low-pass filter, a sampling module, an outer-loop nonlinear ADRC controller, an inner-loop nonlinear ADRC controller, a current feedforward module, a comparator and a dual-inductor bidirectional Buck / Boost converter; the output end of the dual-inductor bidirectional Buck / Boost converter is respectively connected to the input end of the second-order low-pass filter and the first input end of the inner-loop nonlinear ADRC controller; the sampling module is used to collect capacitance voltage, and its output end is connected to the input end of the outer-loop nonlinear ADRC controller; the output end of the outer-loop nonlinear ADRC controller and the output end of the second-order low-pass filter are both connected to the input end of the inner-loop nonlinear ADRC controller; the output end of the inner-loop nonlinear ADRC controller is connected to the input end of the current feedforward module; the output end of the current feedforward module is connected to the positive input end of the comparator, the negative input end of the comparator is connected to the reference voltage, and the output end of the comparator is connected to the input end of the dual-inductor bidirectional Buck / Boost converter.

[0007] A parallel pulse power decoupling system control method, the method comprising:

[0008] S1, collect the bus current i in the dual-inductor bidirectional Buck / Boost converter o , pulse load current i p , decoupling capacitor valley voltage v Cs_min ;

[0009] S2, set the current threshold and voltage threshold, if the current i o is greater than the current threshold, and the voltage v Cs_minIf the voltage is greater than the voltage threshold, the switches S1 and S2 are turned off; otherwise, step S3 is executed;

[0010] S3. Judgment i p Is it greater than 0? If so, the dual-inductor bidirectional Buck / Boost converter is in Buck mode and executes step S5; if not, executes step S4;

[0011] S4. Judgment i p Is it equal to 0? If not, return to step S3. If so, the dual-inductor bidirectional Buck / Boost converter is in Boost mode and execute step S5.

[0012] S5, using a feedforward nonlinear ADRC control algorithm to calculate the duty cycle d1 of the switch tube S1 and the duty cycle d2 of the switch tube S2;

[0013] S6. Input the calculated duty cycle d1 of the switch tube S1 and the calculated duty cycle d2 of the switch tube S2 into the EPWM module to generate PWM signals of the switch tubes S1 and S2.

[0014] Beneficial effects of the present invention:

[0015] The present invention adopts a dual-inductor bidirectional Buck / Boost converter as a pulse power compensation unit connected in parallel to the output port of the front-stage power supply system, which can eliminate the transient process of the inductor current commutation and effectively reduce the bus current spike generated when the pulse load state is switched; the feedforward nonlinear ADRC control method proposed by the present invention effectively reduces the tracking error of the current inner loop by introducing the compensation current reference into the control loop and adopting a nonlinear ADRC controller to replace the traditional PI controller. The compensation current can completely follow the pulse current AC component, effectively suppressing the bus current spike, and can improve the dynamic response speed of the dual-inductor bidirectional Buck / Boost converter while taking into account the system stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 The circuit diagram of the parallel pulse power decoupler based on the bidirectional Buck / Boost converter is shown in FIG.

[0017] Figure 2 It is the working waveform of bidirectional Buck / Boost converter;

[0018] Figure 3 The circuit diagram of the parallel pulse power decoupler based on the dual-inductor bidirectional Buck / Boost converter is shown in FIG.

[0019] Figure 4 This is the working waveform of the dual-inductor bidirectional Buck / Boost converter;

[0020] Figure 5 It is a circuit structure diagram of the parallel pulse power decoupling system control device of the present invention;

[0021] Figure 6 It is the structural diagram of the nonlinear ADRC controller of the present invention;

[0022] Figure 7 It is a flow chart of the control method of the parallel pulse power decoupling system of the present invention;

[0023] Figure 8 It is a simulation waveform diagram of using different bidirectional converters as pulsating power compensation units of the present invention;

[0024] Fig. 9 It is the simulation waveform diagram of the traditional PI control method under different pulse frequencies;

[0025] Fig.10 It is the simulation waveform of the feedforward nonlinear ADRC control method under different pulse frequencies of the present invention;

[0026] Fig.11 It is the simulation waveform diagram of the traditional PI control method under the condition of variable pulse current amplitude;

[0027] Fig.12 It is a simulation waveform diagram of the feedforward nonlinear ADRC control method under the variable pulse current amplitude of the present invention. DETAILED DESCRIPTION

[0028] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0029] A parallel pulse power decoupling system control device, such as Figure 5As shown, the method includes: a second-order low-pass filter, a sampling module, an outer-loop nonlinear ADRC controller, an inner-loop nonlinear ADRC controller, a current feedforward module, a comparator, and a dual-inductor bidirectional Buck / Boost converter; the output end of the dual-inductor bidirectional Buck / Boost converter is respectively connected to the input end of the second-order low-pass filter and the first input end of the inner-loop nonlinear ADRC controller; the sampling module is used to collect the capacitance voltage, and the output end of the sampling module is connected to the input end of the outer-loop nonlinear ADRC controller; the output end of the outer-loop nonlinear ADRC controller and the output end of the second-order low-pass filter are both connected to the input end of the inner-loop nonlinear ADRC controller; the output end of the inner-loop nonlinear ADRC controller is connected to the input end of the current feedforward module; the output end of the current feedforward module is connected to the positive input end of the comparator, the negative input end of the comparator is connected to the reference voltage, and the output end of the comparator is connected to the input end of the dual-inductor bidirectional Buck / Boost converter.

[0030] Specifically, the parallel pulse power decoupling system control device based on feedforward nonlinear ADRC control of the present invention includes a second-order low-pass filter module, a sampling module, a nonlinear ADRC controller, a current feedforward module, a duty cycle generation module and a dual-inductor bidirectional Buck / Boost converter. p The pulse load average current reference value i is obtained through the second-order low-pass filter module ave_f , decoupling capacitor voltage V Cs The valley voltage sampling value V is obtained through the sampling module Cs_min ; The voltage outer loop nonlinear ADRC controller uses the decoupling capacitor valley voltage sampling value V Cs min f And its given reference value V Cs min ref As input, the outer loop nonlinear ADRC controller outputs u i and the pulse load average current reference value i ave_f After superposition, the bus current reference value i is obtained o_ref and the bus current sampling value i o_f Together they serve as the input of the current inner loop nonlinear ADRC controller; after the output of the inner loop nonlinear ADRC controller is combined with the output of the current feedforward module, its output is compared with the sawtooth carrier signal to generate a control quantity duty cycle signal, which is used as the control signal of the main power switch tube S1. At the same time, the duty cycle control signal d1 is inverted to obtain the control signal d2 of the main power switch tube S2. The expression of the duty cycle d1 is:

[0031]

[0032] make The duty cycle signal d1(t) can be further expressed as:

[0033]

[0034] Among them, V o is the output voltage of the front-stage power supply system, V saw is the sawtooth carrier amplitude, C s is the decoupling capacitor, i b (t) is the compensation current.

[0035] In this embodiment, if Figure 6 As shown in the figure, the outer loop nonlinear ADRC controller consists of an extended state observer ESO and a nonlinear state error feedback control rate NLSEF. The inner loop nonlinear ADRC controller consists of a tracking differentiator TD, an extended state observer ESO, and a nonlinear state error feedback control rate NLSEF. The tracking differentiator TD is used to differentiate the input signal and output a differential signal. The extended state observer ESO is used to estimate the decoupling capacitor voltage and input current. The nonlinear state error feedback control rate NLSEF is used to compensate for the estimated value of the extended state observer ESO.

[0036] Specifically, the inner loop nonlinear ADRC controller consists of three parts: tracking differentiator TD, extended state observer ESO, and nonlinear state error feedback control rate NLSEF. In the outer loop nonlinear ADRC controller, since the valley voltage reference value is constant, the tracking differentiator TD is omitted, and the rest of the parts are similar to the inner loop. The tracking differentiator TD tracks the bus current reference signal in real time through a suitable transition process and outputs its differential signal; the extended state observer ESO monitors the decoupling capacitor voltage V Cs_min_f , bus current i o_f The two state variables are observed and estimated in real time and aggregated into disturbances y2 and z3; the decoupling capacitor valley voltage reference and the output of the inner loop tracking differentiator TD are respectively subjected to difference operations with the decoupling capacitor valley voltage, bus current signal and its differential signal fed back by the extended state observer ESO, and a state error signal is obtained; the nonlinear state error feedback control rate NLSEF performs a nonlinear combination operation on the state error, and at the same time, the output of the nonlinear state error feedback control rate NLSEF is compensated for by the total system disturbance fed back by the extended state observer ESO, and finally the compensated control signal d1 is obtained.

[0037] The discrete expression of the current inner loop tracking differentiator TD is:

[0038]

[0039] fst=-rsat(f(z),δ)

[0040]

[0041] z=v1(k)-v(k)+hv2(k)

[0042]

[0043] Among them, h is the integration step size, which is also the filtering parameter; r is the tracking speed factor, which determines the tracking speed; fst is the optimal control function of the discrete time system; δ = rh, δ0 = δh; v1(k) is the tracking signal of the bus current reference value, v2(k) is the differential signal of v1(k), i o_ref (k) is the discrete value of the bus current reference value, sat is the linear saturation function, sign is the sign function, δ and z are two parameters in the linear saturation function sat, and a0 and δ0 are two parameters in the tracking differentiator TD corresponding to the called function.

[0044] The discrete expressions of the extended state observer ESO for the voltage outer loop and the current inner loop are:

[0045]

[0046]

[0047] Where y1 is the valley voltage sampling value of the decoupling capacitor V Cs_min_f y2 is the estimated total internal and external disturbance of the system, z1 and z2 are the bus current sampling values ​​i o_f The estimated value, z3 is the sum of the real-time effects of the internal and external disturbances of the converter; V Cs_min_f (k) is the discrete value of the valley voltage sampling value of the decoupling capacitor, is the output of the extended state observer ESO, T1 and T2 are both step sizes, e0(k) is the valley voltage error, u i (k) is the output of the outer loop nonlinear ADRC controller, fal is the nonlinear function, d1(k) is the output of the inner loop nonlinear ADRC controller, that is, the control signal of the main power switch tube S1, α0, α1, α2 are all parameters used to adjust the nonlinearity of the nonlinear function fal, δ0, δ1, δ2 are all parameters used to adjust the nonlinear interval size of the nonlinear function fal, b0, b1 are control quantity amplification coefficients, β1, β2, β3, β4 and β5 are all gain coefficients.

[0048] The discrete expressions of the nonlinear state error feedback control rate NLSEF of the voltage outer loop and the current inner loop are:

[0049]

[0050] Among them, v1(k), v2(k) are the output and its differential of the transition process arranged by the tracking differentiator TD; y1(k), y2(k), z1(k), z2(k), z3(k) are the state variables of the control object output by the extended state observer ESO; y2(k) / b0, z3(k) / b1 are compensations for disturbances; e is the error; α is the nonlinear factor of the fal function; δ is a parameter related to the size of the nonlinear interval of the fal function, and δ>0.

[0051] A control method for a parallel pulse power decoupling system, such as Figure 7 As shown, the method includes:

[0052] S1, collect the bus current i in the dual-inductor bidirectional Buck / Boost converter o , pulse load current i p , decoupling capacitor valley voltage v Cs_min ;

[0053] S2, set the current threshold and voltage threshold, if the current i o is greater than the current threshold, and the voltage v Cs_min If the voltage is greater than the voltage threshold, the switches S1 and S2 are turned off; otherwise, step S3 is executed;

[0054] S3. Judgment i p Is it greater than 0? If so, the dual-inductor bidirectional Buck / Boost converter is in Buck mode and executes step S5; if not, executes step S4;

[0055] S4. Judgment i p Is it equal to 0? If not, return to step S3. If so, the dual-inductor bidirectional Buck / Boost converter is in Boost mode and execute step S5.

[0056] S5, using a feedforward nonlinear ADRC control algorithm to calculate the duty cycle d1 of the switch tube S1 and the duty cycle d2 of the switch tube S2;

[0057] S6. Input the calculated duty cycle d1 of the switch tube S1 and the calculated duty cycle d2 of the switch tube S2 into the EPWM module to generate PWM signals of the switch tubes S1 and S2.

[0058] Specifically, the system first samples the bus current i o , pulse load current i p , decoupling capacitor valley voltage V Cs_min And perform overvoltage and overcurrent judgment. When the voltage and current sampling values ​​exceed the set protection value, the overvoltage and overcurrent protection algorithm is started, and the digital controller controls the main power switch tubes S1 and S2 to turn off. Then according to the pulse load current i pThe sampling value is large, the system identifies the load state and selects the converter working mode. When it is identified that the load is working in a high power state (i p >0), the gating and freewheeling switches S4 and S5 are turned on, the gating and freewheeling switches S3 and S6 are turned off, the inductor L2 is connected to the output end of the front-stage power supply system, the inductor L1 is freewheeling through the diode D2 and the switch tube S5, the main power switch tubes S1 and S2 are turned on and off for power transmission, and the dual-inductor bidirectional Buck / Boost converter is in the Buck working mode; when it is recognized that the load is working in a low power state (i p ≤0), the gating and freewheeling switches S3 and S6 are turned on, the gating and freewheeling switches S4 and S5 are turned off, the inductor L1 is connected to the output end of the front-stage power supply system, the inductor L2 is freewheeling through the diode D4 and the switch tube S6, the main power switch tubes S1 and S2 are turned on and off for power transmission, and the dual-inductor bidirectional Buck / Boost converter is in the Boost working mode. At the same time, the duty cycle d1 of the main power switch tube S1 is calculated through the feedforward nonlinear ADRC control algorithm, and the calculation result is stored in the EPWM module to generate the PWM control signal of the main power switch tubes S1 and S2.

[0059] Matlab / Simulink is used to perform time domain simulation on the control method and device of the present invention. The simulation conditions are: the output voltage V o =28V, decoupling capacitor valley voltage V Cs_min =60V, main power switch frequency f s =100KHz, inductor L = 600μH, inductor L1 = 600μH, inductor L2 = 600μH, decoupling capacitor C s =330μF. The simulation results are as follows:

[0060] Figure 8 is the pulse frequency f p =500Hz, pulse duty cycle D p =0.5, the pulse current amplitude I p =6A, both adopt PI control strategy, and use bidirectional Buck / Boost converter and dual-inductor bidirectional Buck / Boost converter as pulsating power compensation units respectively, showing the time domain simulation waveforms of system decoupling capacitor voltage, bus current, compensation current and pulse load current.

[0061] contrast Figure 8 (a) and Figure 8 (b) It can be seen that compared with the traditional bidirectional Buck / Boost converter, when the dual-inductor bidirectional Buck / Boost converter is used as the pulsation power compensation unit, the bus current peak drops from 5.8A to 0.7A, and the bus current peak is reduced by about 87.9%.

[0062] Fig. 9 and Fig.10 They are, respectively, pulse duty cycle D p =0.5, the pulse current amplitude I p =6A, using traditional PI control and feedforward nonlinear ADRC control at different pulse frequencies, with dual-inductor bidirectional Buck / Boost converter as the pulsating power compensation unit, the time domain simulation waveform of the system decoupling capacitor voltage, bus current, compensation current, and pulse load current. Fig. 9 (a) is the pulse frequency f p1 =300Hz, time domain simulation waveform of decoupling capacitor voltage, bus current, compensation current and pulse load current of traditional PI control method; Fig. 9 (b) is f p2 =700Hz, time domain simulation waveform of decoupling capacitor voltage, bus current, compensation current and pulse load current of traditional PI control method. Fig.10 (a) is the pulse frequency f p1 =Time domain simulation waveform of decoupling capacitor voltage, bus current, compensation current and pulse load current using feedforward nonlinear ADRC control method at 300Hz; Fig.10 (b) is the pulse frequency f p2 = Time domain simulation waveform of decoupling capacitor voltage, bus current, compensation current and pulse load current using feedforward nonlinear ADRC control method when 700Hz.

[0063] When PI control is used, the bus current io has a steady-state tracking error of 0.15 to 0.20 A under different pulse frequencies, and the bus current peak is between 0.5 and 1.0 A. Compared with PI control, after adopting feedforward nonlinear ADRC control, the bus current steady-state tracking error and bus current spike under different pulse frequencies are basically non-existent.

[0064] Fig.11 and Fig.12 The pulse frequency f p =500Hz, pulse duty cycle D p =0.5, the pulse current amplitude I p When the current changes from 6A to 12A, the time domain simulation waveforms of the system decoupling capacitor voltage, bus current, compensation current, and pulse load current are shown using the traditional PI control method and feedforward nonlinear ADRC control and a dual-inductor bidirectional Buck / Boost converter as the pulsating power compensation unit.

[0065] When PI control is used, when the pulse current amplitude I pThe bus current peak is about 7A, and the transient response time of the dual-inductor bidirectional Buck / Boost converter is 0.16s. When the feedforward nonlinear ADRC control is adopted, when the pulse current amplitude I p The bus current spike is about 4A when the load jumps from 6A to 12A, and the transient response time of the dual-inductor bidirectional Buck / Boost converter is about 0.05s. Compared with PI control, after adopting feedforward nonlinear ADRC control under variable pulse current amplitude, the bus current spike generated when the load jumps is reduced, and the transient response speed of the dual-inductor bidirectional Buck / Boost converter is improved.

[0066] The above embodiments further illustrate the purpose, technical solutions and advantages of the present invention in detail. It should be understood that the above embodiments are only preferred implementation modes of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made to the present invention within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A parallel pulse power decoupling system control device, characterized in that: include: A second-order low-pass filter, a sampling module, an outer-loop nonlinear ADRC controller, an inner-loop nonlinear ADRC controller, a current feedforward module, a comparator and a dual-inductor bidirectional Buck / Boost converter; the output end of the dual-inductor bidirectional Buck / Boost converter is respectively connected to the input end of the second-order low-pass filter and the first input end of the inner-loop nonlinear ADRC controller; the sampling module is used to collect capacitance voltage, and its output end is connected to the input end of the outer-loop nonlinear ADRC controller; the output end of the outer-loop nonlinear ADRC controller and the output end of the second-order low-pass filter are both connected to the input end of the inner-loop nonlinear ADRC controller; the output end of the inner-loop nonlinear ADRC controller is connected to the input end of the current feedforward module; the output end of the current feedforward module is connected to the positive input end of the comparator, the negative input end of the comparator is connected to the reference voltage, and the output end of the comparator is connected to the input end of the dual-inductor bidirectional Buck / Boost converter.

2. According to claim 1, a parallel pulse power decoupling system control device is characterized in that: The second-order low-pass filter consists of two resistors R1-R2, two capacitors C1-C2 and an operational amplifier A1; one end of the resistor R1 is connected to the output end of the dual-inductor bidirectional Buck / Boost converter, and the other end of the resistor R1 is connected to the positive electrode of the capacitor C1 and one end of the resistor R2 respectively; the other end of the resistor R2 is connected to the positive electrode of the capacitor C2 and the positive input end of the operational amplifier A1 respectively; the negative electrode of the capacitor C2 is grounded; the negative electrode of the capacitor C1 and the negative electrode of the operational amplifier A1 are both connected to the output end of the operational amplifier A1.

3. According to claim 1, a parallel pulse power decoupling system control device is characterized in that: The outer loop nonlinear ADRC controller consists of an extended state observer ESO and a nonlinear state error feedback control rate NLSEF.

4. According to claim 1, a parallel pulse power decoupling system control device is characterized in that: The inner loop nonlinear ADRC controller consists of three parts: tracking differentiator TD, extended state observer ESO and nonlinear state error feedback control rate NLSEF; tracking differentiator TD is used to perform differential processing on the input signal and output differential signal; The extended state observer ESO is used to estimate the decoupling capacitor voltage and input current; The nonlinear state error feedback control rate NLSEF is used to compensate the estimated value of the extended state observer ESO.

5. A parallel pulse power decoupling system control device according to claim 4, characterized in that: The tracking differentiator TD is used to perform differentiation processing on the input signal including: fst=-rsat(f(z),δ) z=v1(k)-v(k)+hv2(k) Where, h is the integration step; r is the tracking speed factor; fst is the optimal control function of the discrete time system; v1(k) is the tracking signal of the bus current reference value, v2(k) is the differential signal of v1(k), i o_ref (k) is the discrete value of the bus current reference value, sat is the linear saturation function, sign is the sign function, δ and z are two parameters in the linear saturation function sat, where δ = rh, a0 and δ0 are two parameters in the tracking differentiator TD corresponding to the called function, where δ0 = δh.

6. A parallel pulse power decoupling system control device according to claim 4, characterized in that: The discrete expression of the extended state observer ESO is: Where y1 is the valley voltage sampling value of the decoupling capacitor V Cs_min_f y2 is the estimated total internal and external disturbance of the system, z1 and z2 are the bus current sampling values ​​i o_f The estimated value, z3 is the sum of the real-time effects of the internal and external disturbances of the converter; V Cs_min_f (k) is the discrete value of the valley voltage sampling value of the decoupling capacitor, is the output of the extended state observer ESO, T1 and T2 are both step sizes, e0(k) is the valley voltage error, u i (k) is the output of the outer loop nonlinear ADRC controller, fal is the nonlinear function, d1(k) is the output of the inner loop nonlinear ADRC controller, that is, the control signal of the main power switch tube S1, α0, α1, α2 are all parameters used to adjust the nonlinearity of the nonlinear function fal, δ0, δ1, δ2 are all parameters used to adjust the nonlinear interval size of the nonlinear function fal, b0, b1 are control quantity amplification coefficients, β1, β2, β3, β4 and β5 are all gain coefficients.

7. A parallel pulse power decoupling system control device according to claim 4, characterized in that: The discrete expression of the nonlinear state error feedback control rate NLSEF is: Among them, v1(k), v2(k) are the output and its differential of the transition process arranged by the tracking differentiator TD; y1(k), y2(k), z1(k), z2(k), z3(k) are the state variables of the controlled object output by the extended state observer ESO; y2(k) / b0, z3(k) / b1 are compensations for disturbances; e is the error; α is the nonlinear factor of the fal function; δ is a parameter related to the size of the nonlinear interval of the fal function.

8. A parallel pulse power decoupling system control method, the method adopts a parallel pulse power decoupling system control device according to any one of claims 1 to 7, characterized in that: include: S1, collect the bus current i in the dual-inductor bidirectional Buck / Boost converter o , pulse load current i p , decoupling capacitor valley voltage v Cs_min ; S2, set the current threshold and voltage threshold, if the current i o is greater than the current threshold, and the voltage v Cs_min If the voltage is greater than the voltage threshold, the switches S1 and S2 are turned off; Otherwise, execute step S3; S3. Judgment i p Is it greater than 0? If so, the dual-inductor bidirectional Buck / Boost converter is in Buck mode and executes step S5; if not, executes step S4; S4. Judgment i p Is it equal to 0? If not, return to step S3. If so, the dual-inductor bidirectional Buck / Boost converter is in Boost mode and execute step S5. S5, using a feedforward nonlinear ADRC control algorithm to calculate the duty cycle d1 of the switch tube S1 and the duty cycle d2 of the switch tube S2; S6. Input the calculated duty cycle d1 of the switch tube S1 and the calculated duty cycle d2 of the switch tube S2 into the EPWM module to generate PWM signals of the switch tubes S1 and S2.

9. A parallel pulse power decoupling system control method according to claim 8, characterized in that: The expression for calculating the duty cycle d1 of the switch tube S1 is: Among them, V o is the output voltage of the front-stage power supply system, V saw is the sawtooth carrier amplitude, C s is the decoupling capacitor, i b (t) is the compensation current.

10. A parallel pulse power decoupling system control method according to claim 8, characterized in that: The duty cycle d2 of the switch tube S2 is the inverse of the duty cycle d1 of the switch tube S1.

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