Short circuit detection method based on SiC MOSFET gate driving resistor charge detection

Abstract

The invention discloses a short-circuit detection method based on charge detection of a SiC MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) gate driving resistor, which is a method for detecting FUL by detecting the change trend of the quantity of charges flowing through the driving resistor. The charge quantity flowing through the SiC MOSFET driving resistor and the gate voltage of the SiC MOSFET during working are compared with reference charge Qref and reference voltage Vref of a set detection reference point, a comparison signal is output, and whether short circuit occurs or not is judged through logic processing. According to the method, the defect that the FUL cannot be detected by a traditional grid charge detection method can be overcome, the FUL can be detected at a relatively high speed while the HSF can be quickly responded, no monitoring blind area exists, and blanking time does not need to be set. And the monitoring device is arranged in the driving loop, so that the main power loop is not influenced.

Description

Technical Field

[0001] The present invention relates to a SiC MOSFET short-circuit protection method, and in particular to a SiC MOSFET short-circuit detection method. Background Art

[0002] With the development of wide bandgap semiconductors, SiC MOSFET is widely used in the industrial field. It has the characteristics of low switching loss, high switching frequency, high voltage resistance and excellent temperature characteristics, which greatly improves the conversion efficiency, power density and stability of power electronic devices using SiC MOSFET. However, short circuit failure is one of the important reasons for the failure of SiC MOSFET, which seriously hinders its application.

[0003] According to the switching state of SiC MOSFET in the short-circuit loop, the short-circuit type can be divided into hard switching fault (HSF) and load short-circuit fault (Fault Under Load, FUL). When SiC MOSFET is in the short-circuit loop, it is in the off state, that is, the SiC MOSFET is in the short-circuit state as soon as it is turned on, which is called HSF. When SiC MOSFET is in the short-circuit loop, it is in the on state, which is called FUL.

[0004] Due to the existence of the Miller platform during the SiC MOSFET's on-off process, when HSF occurs, the gate charge of the SiC MOSFET is much smaller than the gate charge during the normal on-time process. Therefore, the prior art proposes a method for identifying HSF by detecting the gate charge, which has an extremely fast response speed to HSF. However, since the detection of this method relies on the Miller platform during the SiC MOSFET's on-time process, it is unable to detect FUL. Summary of the invention

[0005] Purpose of the invention: In view of the above-mentioned prior art, a method for detecting HSF and FUL by detecting the changing trend of the amount of charge flowing through the driving resistor is proposed to make up for the shortcoming that the existing gate charge detection method cannot detect FUL.

[0006] Technical solution: A short-circuit detection method based on SiC MOSFET gate drive resistor charge detection, including: S1: Gate voltage for SiC MOSFET V GS and the charge flowing through the SiC MOSFET drive resistor Q RgL Take measurements; S2: Set the gate voltage V GS , Charge QRgL Respectively with the reference voltage V ref , reference charge Q ref Compare, if V GS > V ref The detection signal S 1 Output high level, otherwise output low level; if Q RgL > Q ref Then the detection signal S 2 Output high level, otherwise output low level; S 1 and S 2 Multiply and get the short circuit detection signal S 3 ,like S 3 If it is high level, it outputs a short-circuit signal, otherwise it works normally.

[0007] Furthermore, the charge of SiC MOSFET in normal operation, HSF and FUL was measured by experiments, and the Miller voltage and gate drive voltage were combined. V D , determine the reference voltage V ref With the reference charge Q ref The specific steps include: The first set of experiments: Make SiC MOSFET work under normal conditions and record the time when the gate voltage of SiC MOSFET reaches V miller1 , V miller2 , V D The moments are t 2 , t 4 and t 6 , and measured t 2 , t 4 and t 6 The charges driving the resistor at each moment are Q 1 , Q 4 and Q5 , and thus determine the three coordinates ( Q 1 , V miller1 )、( Q 4 , V miller2 )、( Q 5 , V D );in, V miller1 is the Miller voltage at the beginning of the Miller voltage platform, V miller2 is the Miller voltage at the end of the Miller voltage platform; The second set of experiments: Make SiC MOSFET work under HSF conditions and record the time when the gate voltage of SiC MOSFET reaches V D The time is t ' 3 , and measured t ' 3 The charge driving the resistor at that moment is Q 3 , and use this to determine the coordinates ( Q 3 , V D ); The third group of experiments: Make SiC MOSFET work under FUL conditions, and record the final value of the charge of the driving resistor after the SiC MOSFET FUL occurs Q 2 ; According to the three sets of experimental results, the range is: four coordinates ( Q 1 , V miller1 )、( Q 4 , V miller2 )、( Q 3 , V D )、( Q 5 , V D ) in the quadrilateral surrounded by the driving resistor, the charge is greater than Q 2 part.

[0008] Beneficial effect: The existing method of identifying hard switch short circuit fault (HSF) by detecting the gate charge depends on the Miller platform during the SiC MOSFET turn-on process. When the load short circuit fault (FUL) occurs, the SiC MOSFET is already fully turned on, so the FUL cannot be detected. This method is a method for detecting FUL by detecting the change trend of the charge flowing through the driving resistor. The charge flowing through the SiC MOSFET driving resistor during operation and the gate voltage of the SiC MOSFET are compared with the reference charge at the set detection reference point. Q ref With reference voltage V ref The comparison is performed, and a comparison signal is outputted. After logic processing, it is determined whether a short circuit occurs. The present invention can make up for the defect that the traditional gate charge detection method cannot detect FUL, and can ensure that FUL is detected at a faster speed while responding quickly to HSF, without monitoring blind areas, and without setting blanking time. And because the monitoring device of the present invention is arranged in the drive circuit, it will not affect the main power circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 This is the circuit diagram of the short-circuit test platform; Figure 2 is a flow chart of the detection method; Figure 3 The relationship between the charge flowing through the driving resistor and the gate voltage under normal operation (blue), HSF (red), and FUL (green); Figure 4 This is the timing diagram of each signal under normal working conditions; Figure 5 It is the timing diagram of each signal under HSF condition; Figure 6 It is the timing diagram of each signal under FUL working condition; Figure 7 This is the simulation waveform diagram of normal operation; Figure 8 It is the simulation waveform diagram when HSF occurs; Fig. 9 This is the simulation waveform when FUL occurs. DETAILED DESCRIPTION

[0010] The present invention will be further explained below in conjunction with the accompanying drawings.

[0011] Figure 1 Middle and lower tube M L Main test tube, upper tube M H To create a short circuit test tube, R gL Main test tube M L The driving resistance.

[0012] Figure 2 The flow chart of this detection method is as follows: the gate voltage V GS With the set reference voltage V ref , the charge flowing through the driving resistor Q RgL With the set reference charge Q ref Compare the sizes respectively. V GS > V ref Then the detection signal S 1 Output high level, otherwise output low level; if Q RgL > Q ref Then the detection signal S 2 Output high level, otherwise output low level. S 1 and S 2 Multiply and get the short circuit detection signal S 3 ,like S 3 If it is high level, it outputs a short-circuit signal, otherwise it works normally.

[0013] Combination Figure 3 The relationship between the charge flowing through the driving resistor and the gate voltage under normal working conditions (blue) and HSF (red) is shown in Figure 2. According to the existing technology, if this method is used to detect HSF, the reference point coordinates ( Q ref , V ref ) are set to four coordinates ( Q 1 , V miller1 )、( Q 4 , V miller2 )、( Q 3 , V D )、( Q 5 , V D ) is within the quadrilateral enclosed by .

[0014] Combination Figure 6 , M L exist t ''1 When FUL occurs, the drain-source voltage V DS The rapid rise of the Miller capacitance causes a displacement current to flow through the driving resistor R gL The stray inductance of the driving circuit flows into the driving power supply. After the driving resistor voltage and the stray inductance voltage are superimposed, the gate-source voltage V DS A voltage spike is generated. The displacement current flows through the driving resistor R gL When the current is opposite to the current when the SiC MOSFET is turned on, the charge flows in the opposite direction. Q RgL Reduce, when Q RgL exist t '' 2 Reduced to less than the reference charge Q ref When the short circuit signal is output, the reduced Q RgL = Q 2 In summary, when Q RgL > Q 2 When the reference point coordinates ( Q ref , V ref ) is located in Figure 2 Within the medium purple area.

[0015] Through three sets of experiments, the specific range of the purple area was determined.

[0016] The first set of experiments: Make SiC MOSFET work under normal conditions, such as Figure 4 As shown, the SiC MOSFET gate voltage reaches V miller1 , V miller2 , Gate drive voltage V D The moments are t 2 , t 4 and t 6 , and measured t 2 , t 4 and t 6 Moment QRgL They are Q 1 , Q 4 and Q 5 , and thus determine the three coordinates ( Q 1 , V miller1 )、( Q 4 , V miller2 )、( Q 5 , V D ).in, V miller1 is the Miller voltage at the beginning of the Miller voltage platform, V miller2 is the Miller voltage at the end of the Miller voltage plateau.

[0017] The second set of experiments: Make SiC MOSFET work under HSF conditions, such as Figure 5 As shown, the SiC MOSFET gate voltage reaches V D The time is t ' 3 , and measured t ' 3 Moment Q RgL for Q 3 , and use this to determine the coordinates ( Q 3 , V D ).

[0018] The third group of experiments: Make SiC MOSFET work under FUL conditions, such as Figure 6 As shown in the figure, after the SiC MOSFET has FUL, Q RgL Final value Q 2 .

[0019] The final purple area is: four coordinates ( Q 1 , V miller1 )、( Q 4 , V miller2 )、( Q 3 , VD )、( Q 5 , V D ), take Q RgL > Q 2 part.

[0020] Combination Figure 2 and Figures 4 to 6 Describe the testing process in detail: like Figure 4 The normal working condition shown is t 1 Before the moment, the driving signal is low level. t 1 At this moment, the driving signal becomes high level, and the driving power supply charges the gate source through the driving resistor. V GS and Q RgL Start to rise. t 1 ~ t 3 : V GS < V ref , S 1 Output low level; Q RgL < Q ref , S 2 Output high level; S 3 Output low level. t 3 ~ t 5 : V GS < V ref , S 1 Output low level; Q RgL > Q ref , S 2 Output low level; S 3 Output low level. t 5 ~ t 7 : V GS > Vref , S 1 Output high level; Q RgL > Q ref , S 2 Output low level; S 3 Output low level.

[0021] like Figure 5 HSF occurs as shown, t ' 1 Before this moment, the driving signal is at a low level and the SiC MOSFET is already in a short-circuit loop. t ' 1 At this moment, the driving signal becomes high level, and the driving power supply charges the gate source through the driving resistor. V GS and Q RgL Start to rise. t ' 1 ~ t ' 2 : V GS < V ref , S 1 Output low level; Q RgL < Q ref , S 2 Output high level; S 3 Output low level. t ' 2 ~ t ' 4 : V GS > V ref , S 1 Output high level; Q RgL < Q ref , S 2 Output high level; S 3 Output high level, output short-circuit signal, and turn off SiCMOSFET.

[0022] like Figure 6 As shown, FUL occurs. t '' 1The working status before the moment Figure 4 Same as normal operation, t '' 1 FUL happens all the time. Q RgL Start to descend. t '' 1 ~ t '' 2 : V GS > V ref , S 1 Output high level; Q RgL > Q ref , S 2 Output low level; S 3 Output low level. t '' 2 ~ t '' 4 : V GS > V ref , S 1 Output high level; Q RgL < Q ref , S 2 Output high level; S 3 Output high level, output short-circuit signal, and turn off SiC MOSFET.

[0023] Figure 7 , Figure 8 , Fig. 9 They are the simulation waveforms of normal operation, HSF, and FUL. In the simulation, the voltage value of the inverting integrator circuit is used to represent the charge flowing through the driving resistor. Q ref =0.9C, V ref =16V. Figure 7 In the example, HSF occurs at 1us, and a short-circuit signal is output at 1.045us, taking 45ns. Figure 8 In the example, FUL occurs at 3us, and a short-circuit signal is output at 3.329us, taking 329ns. Existing research shows that the SiC MOSFET can only effectively protect the device if the fault is detected and the pulse is blocked within 2-3µs after a short circuit occurs. The response time of the present invention to HSF and FUL is within the effective range.

[0024] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A short circuit detection method based on SiC MOSFET gate drive resistor charge detection, characterized in that: include: S1: Gate voltage for SiC MOSFET V GS and the charge flowing through the SiC MOSFET drive resistor Q RgL Take measurements; S2: Set the gate voltage V GS , Charge Q RgL Respectively with the reference voltage V ref , reference charge Q ref Compare, if V GS > V ref Then the detection signal S 1 outputs high level, otherwise it outputs low level; if Q RgL > Q ref Then the detection signal S 2 outputs high level, otherwise outputs low level; S 1 and S 2 to get the short circuit detection signal S 3. If S 3 is high level, a short circuit signal is output, otherwise it works normally.

2. The short circuit detection method according to claim 1, characterized in that: The charge of SiC MOSFET in normal operation, HSF and FUL is measured by experiments, combined with Miller voltage and gate drive voltage V D , determine the reference voltage V ref With the reference charge Q ref The specific steps include: The first set of experiments: Make SiC MOSFET work under normal conditions and record the time when the gate voltage of SiC MOSFET reaches V miller1 , V miller2 , V D The moments are t 2 , t 4 and t 6, and measured t 2. t 4 and t The charges of the driving resistor at time 6 are Q 1. Q 4 and Q 5, and determine the three coordinates ( Q 1, V miller1 )、( Q 4. V miller2 )、( Q 5. V D );in, V miller1 is the Miller voltage at the beginning of the Miller voltage platform, V miller2 is the Miller voltage at the end of the Miller voltage platform; The second set of experiments: Make SiC MOSFET work under HSF conditions and record the time when the gate voltage of SiC MOSFET reaches V D The time is t '3, and measured t At '3, the charge of the driving resistor is Q 3, and determine the coordinates ( Q 3. V D ); The third group of experiments: Make SiC MOSFET work under FUL conditions, and record the final value of the charge of the driving resistor after the SiC MOSFET FUL occurs Q 2; According to the three sets of experimental results, the range is: four coordinates ( Q 1, V miller1 )、( Q 4. V miller2 )、( Q 3. V D )、( Q 5. V D ) in the quadrilateral surrounded by the driving resistor, the charge is greater than Q 2 parts.

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