Display driving IC and packaging method thereof
By applying RDL technology and ACF materials to Fan-Out packaging on the glass substrate of the display driver IC, the problem that the existing technology cannot meet the requirements of high integrated packaging is solved, and high-density packaging and performance improvements are achieved.
Patent Information
- Application Number
- CN202411144069.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-20
- Publication Date
- 2024-12-10
AI Technical Summary
The existing COG and COF packaging technologies cannot meet the packaging requirements of highly integrated display driver ICs, especially under the needs of high-definition and larger display screens, the number of connection points increases, the size is reduced, the pin spacing is difficult to expand, and it is difficult to meet high density. Packaging requirements.
The glass substrate is combined with RDL technology and ACF material for Fan-Out packaging. By making through holes, RDL layers and connection points on the glass substrate, and combining transparent polymer connecting materials to achieve electrical interconnection between the glass substrate and the chip, expanding the pin spacing.
It realizes high-density IC packaging, improves display driver IC performance and packaging process optimization, is suitable for highly integrated application scenarios, while improving mechanical stability and electrical performance.
Smart Images

Figure CN119108282A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of chip packaging, and in particular to a display driver IC and a packaging method thereof. Background Art
[0002] In the prior art, the current packaging methods of DDIC (chip) include COG (Chip on Glass) and COF (Chip on Film). COG packaging directly binds DDIC to the back glass. Since space needs to be reserved for DDIC on the back glass, the distance between the screen and the frame is relatively large. With the vigorous development of the electronics and communications industries, display screens are developing towards higher definition and larger sizes, and the trend of DDIC is developing towards thinness and small size, which makes the number of connection points per unit area increase exponentially, the size of connection points is getting smaller and smaller, and the distance between connection points is getting smaller and smaller. The COG packaging process can no longer meet the current requirements, and the tape used for COF packaging, due to its manufacturing process, material characteristics, etc., the line width and line spacing will be difficult to meet the packaging requirements of highly integrated DDIC.
[0003] How to provide a chip that can solve the above problems is a technical problem that urgently needs to be solved in the technical field at this stage.
[0004] Related terms explanation:
[0005] 1: DDIC—chip;
[0006] 2: Connection point - the bump of the chip, which serves as the electrical connection between the inside and outside of the chip. The material can be but is not limited to metals such as gold;
[0007] 3: Passivation layer - insulating protective layer. Polyimide is a polymer of imide monomers containing two acyl groups bonded to nitrogen. It is an insulator and an insulating protective layer of inorganic or organic materials.
[0008] 4: RDL—Redistribution Layer;
[0009] 5.COG: chip on glass, a packaging technology that directly bonds DDIC to the display module glass
[0010] 6.COF: chip on film, a packaging technology that bonds DDIC to a flexible film (FPC) with conductive lines.
[0011] 7.Fan-Out: Fan-out packaging technology expands the original packaging area.
[0012] The information disclosed in this background technology section is only intended to deepen the understanding of the overall background technology of the present invention, and should not be regarded as acknowledging or suggesting in any form that the information constitutes the prior art already known to those skilled in the art. Summary of the invention
[0013] In order to solve the above technical problems, the present invention proposes a display driver IC and a packaging method thereof, so as to achieve the purpose of improving the performance of the display driver IC and optimizing the display driver IC packaging process.
[0014] To achieve the above object, the technical solution of the present invention is as follows:
[0015] A display driver IC packaging method comprises the following steps:
[0016] (1) Prepare glass substrate and chip;
[0017] (2) making a through hole on the glass substrate;
[0018] (3) making an RDL layer on the surface of the glass substrate, and connecting the lead-out end of the RDL layer to the through hole;
[0019] (4) making a plurality of upper connection points on the upper edge of the glass substrate, and making a plurality of lower edge connection points on the lower edge of the glass substrate;
[0020] (5) Setting bump connection points on the chip;
[0021] (6) The glass substrate and the chip are directly bonded together through ACF, and the display driver IC packaging is completed in a Fan-Out packaging manner.
[0022] Further preferably, the ACF is a transparent polymer connection material having three major properties of bonding, conductivity and insulation, and its notable feature is that it is conductive in the vertical direction and insulating in the horizontal direction.
[0023] Further preferably, the bump connection point is connected to an upper edge connection point provided on the glass substrate.
[0024] Further preferably, the upper connection points are isolated by a passivation layer.
[0025] Further preferably, the through hole is filled with metal, and the filled metal connects the RDL layer with the underlying connection point.
[0026] Further preferably, the upper edge connection point is connected to the lower edge connection point.
[0027] Further preferably, the RDL layer circuit is a metal layer deposited on the surface of a glass substrate, and the RDL layer cooperates with a passivation layer to complete the layout of the circuit layer.
[0028] Further preferably, the glass substrate is provided with the lower edge connection point at the PI window opening position.
[0029] A display driver IC includes a chip component and a substrate component that cooperate with each other;
[0030] The chip assembly includes a chip and a plurality of bump connection points arranged on the chip;
[0031] The basic components include a glass substrate, a plurality of through holes arranged on the glass substrate, a plurality of upper connection points arranged on the upper edge of the glass substrate, a passivation layer for isolating adjacent upper connection points, a lower connection point arranged at a window of the passivation layer, and an RDL layer arranged on the passivation layer at the upper connection point; the RDL layer and the lower connection point are connected by metal filled at the through hole.
[0032] The present invention has the following advantages:
[0033] 1. The present invention provides a display driver IC and a corresponding packaging method. A glass substrate is combined with RDL technology and applied to DDIC packaging, so that the pin spacing is expanded. The glass substrate is used as an intermediate layer, and the connection points are electrically interconnected with the glass substrate and DDIC through ACF binding. The packaging is performed in a Fan-Out packaging manner, so as to achieve the purpose of improving the performance of the display driver IC and optimizing the display driver IC packaging process. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art are briefly introduced below.
[0035] Figure 1 A schematic diagram of the structure of a display driver IC disclosed in an embodiment of the present invention;
[0036] The numbers and letters in the figure represent the corresponding component names:
[0037] 11. Display driver IC 12. Bump connection point 21. Glass substrate 22. Through hole 23. Upper connection point 24. Passivation layer
[0038] 25. Bottom edge connection point 26. RDL layer. DETAILED DESCRIPTION
[0039] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention.
[0040] The present invention provides a display driver IC and a packaging method thereof. The working principle is to apply a glass substrate in combination with RDL technology to DDIC packaging, so that the pin spacing is expanded. The glass substrate is used as an intermediate layer, and the connection points are electrically interconnected with the glass substrate and the DDIC through ACF binding, so as to achieve the purpose of improving the performance of the display driver IC and optimizing the display driver IC packaging process.
[0041] The present invention is further described in detail below with reference to examples and specific implementation modes.
[0042] like Figure 1 As shown, a display driver IC includes a chip component and a substrate component that cooperate with each other;
[0043] The chip assembly includes a chip 11 and a plurality of bump connection points 12 arranged on the chip;
[0044] The basic components include a substrate 21 [the substrate material can also be replaced by a glass substrate or a pure silicon substrate], a plurality of through holes 22 arranged on the glass substrate, a plurality of upper connection points 23 arranged on the upper edge of the glass substrate, a passivation layer 24 for isolating adjacent upper connection points [the protective layer material can be PI], a lower connection point 25 arranged at the window of the passivation layer, and an RDL layer 26 arranged on the passivation layer at the upper connection point; the RDL layer and the lower connection point are connected by metal filled in the through hole.
[0045] The packaging method is as follows:
[0046] (1) Prepare glass substrate and chip;
[0047] (2) making a through hole on the glass substrate, wherein the through hole is filled with metal;
[0048] (3) An RDL layer is fabricated on the surface of a glass substrate, and the lead-out end of the RDL layer is connected to a through hole; the RDL layer circuit is a metal layer deposited on the surface of the glass substrate, and the RDL layer cooperates with the passivation layer to complete the layout of the circuit layer.
[0049] (4) Making a plurality of upper connection points on the upper edge of the glass substrate and a plurality of lower connection points on the lower edge of the glass substrate, wherein the upper connection points are isolated by a passivation layer; the RDL layer is connected to the lower connection points by the filled metal; and the upper connection points are connected to the lower connection points by the filled metal.
[0050] (5) Setting a bump connection point on the chip, wherein the bump connection point is connected to an upper edge connection point set on the glass substrate;
[0051] (6) The glass substrate and the chip are directly bonded together through ACF to complete the display driver IC packaging in a fan-out packaging manner. The ACF is a transparent polymer connection material that has three major properties: bonding, conductivity, and insulation. Its notable feature is that it is conductive in the vertical direction and insulated in the horizontal direction.
[0052] The display driver IC produced by the above process combines the glass substrate with RDL technology, and the lead-out connection point spacing is wider, making high pin density IC packaging possible, which is suitable for application scenarios of highly integrated IC packaging; at the same time, the glass substrate itself has an excellent thermal expansion coefficient, which makes it difficult for the glass to deform and warp due to heat during the packaging process, and has high mechanical stability; it also has better thermal conductivity and electrical properties, which improves the stability of the product.
[0053] The RDL layer is arranged on the lower layer of the glass substrate; and the copper RDL circuit layer can also be replaced by other metal materials, and the connection points of the metal material can also be replaced by other metal materials.
[0054] The structures of the upper connection points, the lower edge connection points and the bump connection points can be in the form of μBump, ball planting, C4, etc.
[0055] Through the above manner, a display driver IC and a packaging method thereof provided by the present invention are applied to DDIC packaging by combining a glass substrate with RDL technology, so that the pin spacing is expanded, the glass substrate is used as an intermediate layer, and the connection points are electrically interconnected with the glass substrate and the DDIC through ACF binding, thereby achieving the purpose of improving the performance of the display driver IC and optimizing the display driver IC packaging process.
[0056] The above is only a preferred implementation of a display driver IC and a packaging method thereof disclosed in the present invention. It should be pointed out that, for ordinary technicians in this field, several modifications and improvements can be made without departing from the creative concept of the present invention, which all fall within the protection scope of the present invention.
Claims
1. A display driver IC packaging method, characterized in that: It includes the following steps: (1) Prepare glass substrate and chip; (2) making a through hole on the glass substrate; (3) making an RDL layer on the surface of the glass substrate, and connecting the lead-out end of the RDL layer to the through hole; (4) making a plurality of upper connection points on the upper edge of the glass substrate, and making a plurality of lower edge connection points on the lower edge of the glass substrate; (5) Setting bump connection points on the chip; (6) The glass substrate and the chip are directly bonded together through ACF, and the display driver IC packaging is completed in a Fan-Out packaging manner.
2. A display driver IC packaging method according to claim 1, characterized in that: The ACF is a transparent polymer connection material having three major properties: bonding, conductivity, and insulation. Its notable feature is that it is conductive in the vertical direction and insulating in the horizontal direction.
3. A display driver IC packaging method according to claim 1, characterized in that: The bump connection point is connected to an upper edge connection point arranged on the glass substrate.
4. A display driver IC packaging method according to claim 1, characterized in that: The upper layer connection points are isolated from each other by a passivation layer.
5. The display driver IC packaging method according to claim 1, characterized in that: The vias are filled with metal, and the filled metal connects the RDL layer to the underlying connection point.
6. The display driver IC packaging method according to claim 1, characterized in that: The upper edge connection point is connected to the lower edge connection point.
7. A display driver IC packaging method according to claim 1, characterized in that: The RDL layer circuit is a metal layer deposited on the surface of a glass substrate, and the RDL layer cooperates with the PI to complete the layout of the circuit layer.
8. The display driver IC packaging method according to claim 1, characterized in that: The glass substrate is used to form the bottom edge connection point at the PI window opening position.
9. The display driver IC packaging method according to claim 1, characterized in that: The through hole of the glass substrate is combined with the RDL technology and applied to DDIC packaging to expand the pin spacing.
10. A display driver IC, characterized in that: It includes a chip assembly and a substrate assembly that cooperate with each other; The chip assembly includes a chip and a plurality of bump connection points arranged on the chip; The basic components include a glass substrate, a plurality of through holes arranged on the glass substrate, a plurality of upper connection points arranged on the upper edge of the glass substrate, a passivation layer for isolating adjacent upper connection points, a lower connection point arranged at a window of the passivation layer, and an RDL layer arranged on the passivation layer at the upper connection point; the RDL layer and the lower connection point are connected by metal filled at the through hole.
