Particle separation apparatus and method for separing particles using the same

Abstract

A particle separation apparatus and a method of separating particles using the same are provided. The particle separation apparatus includes: a base portion; a microchannel provided in the base portion; an inlet portion provided at an end of the microchannel, in which the light emitting element, the Newtonian fluid, and the viscoelastic fluid are injected; an inlet flow path connecting the inlet portion and the microchannel; an outlet portion disposed at opposite ends of the microchannel, where the light emitting element, the Newtonian fluid, and the viscoelastic fluid are discharged from the outlet portion; an outlet flow path connecting the microchannel and the outlet portion; and a vortex generator disposed under the inlet portion to generate a surface acoustic wave.

Description

Technical Field

[0001] Embodiments relate to a particle separation apparatus and a method of separating particles using the particle separation apparatus. Background Art

[0002] As multimedia technology develops, display devices are becoming more and more important. Therefore, various types of display devices such as organic light emitting display (OLED) devices and liquid crystal display (LCD) devices are currently used.

[0003] The display device includes a display panel (such as an organic light emitting display panel and a liquid crystal display panel) for displaying an image. Among these display panels, the organic light emitting display panel may include a light emitting element. For example, a light emitting diode (LED) may include an organic light emitting diode (OLED) containing an organic material as a light emitting material and an inorganic light emitting diode containing an inorganic material as a light emitting material.

[0004] Among inorganic light emitting diodes included in a display device, light emitting elements may be dispersed on a wafer and formed on a substrate of the display device. In the case where the particle size of the light emitting element is not uniform or different, defects may occur in the display device. Therefore, efforts are being made to ensure the uniformity of the particle size of the light emitting element. Summary of the invention

[0005] The embodiment provides a particle separation apparatus for separating particles having different sizes.

[0006] The embodiment also provides a method of manufacturing a display device capable of reducing defects of the display device by selecting light emitting elements having a uniform size.

[0007] However, the embodiments of the disclosure are not limited to the embodiments set forth herein. The above and other embodiments will become more apparent to those skilled in the art to which the disclosure pertains by referring to the detailed description of the disclosure given below.

[0008] According to the disclosed aspects, a particle separation device may include: a base portion; a microchannel disposed in the base portion; an inlet portion disposed at an end of the microchannel, wherein a light-emitting element, a Newtonian fluid, and a viscoelastic fluid can be injected into the inlet portion; an inlet flow path connecting the inlet portion and the microchannel; an outlet portion disposed at an opposite end of the microchannel, wherein the light-emitting element, the Newtonian fluid, and the viscoelastic fluid can be discharged from the outlet portion; an outlet flow path connecting the microchannel and the outlet portion; and a vortex generator disposed under the inlet portion, wherein the vortex generator can generate surface acoustic waves.

[0009] In an embodiment, the vortex current generator may include: a piezoelectric substrate; and first element electrodes and second element electrodes provided on the piezoelectric substrate and arranged alternately with each other in a plan view.

[0010] In an embodiment, the electric signal applied to the first element electrode and the second element electrode may be an alternating current (AC) electric signal.

[0011] In an embodiment, the frequency of the surface acoustic waves may be in a range of about 10 MHz to about 300 MHz.

[0012] In an embodiment, the microchannel may have a height to width ratio in the range of about 2 to about 3.

[0013] In an embodiment, the width of the microchannel may be in a range of about 20 μm to about 30 μm.

[0014] In an embodiment, the length of the microchannel may be in the range of about 15 mm to about 25 mm.

[0015] In an embodiment, the inlet portion may include: a first inlet through which a Newtonian fluid in which the light emitting elements are dispersed is injected; and a second inlet through which a viscoelastic fluid is injected, and wherein the vortex generator may be disposed under the first inlet.

[0016] In an embodiment, the ratio of the flow rate of the Newtonian fluid to the flow rate of the viscoelastic fluid may be in the range of about 3 to about 7.

[0017] In an embodiment, the flow rate of the Newtonian fluid may be in a range of about 20 μL / min to about 30 μL / min.

[0018] In an embodiment, the inlet flow path may include: a first inlet path and a second inlet path connected to the first inlet, wherein the light emitting element and the Newtonian fluid can move through the first inlet path and the second inlet path; and a third inlet path connected to the second inlet, wherein the viscoelastic fluid can move through the third inlet path, and wherein the first inlet path and the second inlet path can surround the third inlet path.

[0019] In an embodiment, a diameter of each of the first inlet path and the second inlet path may be in a range of about 20 μm to about 40 μm.

[0020] In an embodiment, the outlet portion may include: a first outlet and a second outlet, wherein small light-emitting elements and Newtonian fluids among the light-emitting elements can be discharged from the first outlet and the second outlet; and a third outlet, wherein large light-emitting elements and viscoelastic fluids among the light-emitting elements can be discharged from the third outlet, and wherein the first outlet, the second outlet and the third outlet can be spaced apart from each other.

[0021] In an embodiment, the outlet flow path may include: a first outlet path connecting the microchannel and the first outlet; a second outlet path connecting the microchannel and the second outlet; and a third outlet path connecting the microchannel and the third outlet, and wherein the first outlet path, the second outlet path and the third outlet path may branch from opposite ends of the microchannel.

[0022] In an embodiment, the angle between the microchannel and the first outlet path may be in a range of about 150 degrees to about 165 degrees.

[0023] According to the disclosed aspects, a method for separating light-emitting elements having different sizes is provided, the method may include: providing a particle separation device, the particle separation device including: a microchannel, arranged in a base portion; an inlet portion, arranged at an end of the microchannel, and including a first inlet through which the light-emitting element and the Newtonian fluid are injected and a second inlet through which the viscoelastic fluid is injected; an inlet flow path, connecting the inlet portion and the microchannel; an outlet portion, arranged at opposite ends of the microchannel, wherein the light-emitting element, the Newtonian fluid and the viscoelastic fluid can be discharged from the outlet portion; an outlet flow path, connecting the microchannel and the outlet portion; and a vortex generator, arranged under the inlet portion; injecting a Newtonian fluid in which the light-emitting element is dispersed into the microchannel through the first inlet, and injecting a viscoelastic fluid into the microchannel through the second inlet; generating a surface acoustic wave by the vortex generator to propagate the surface acoustic wave to the first inlet; separating normal light-emitting elements from abnormal light-emitting elements in the microchannel; and discharging the normal light-emitting elements and the Newtonian fluid to the outlet portion through the outlet flow path, and discharging the abnormal light-emitting elements and the viscoelastic fluid separated from the normal light-emitting elements in the microchannel to the outlet portion through the outlet flow path.

[0024] In an embodiment, the surface acoustic waves may generate an acoustic stream that drives the flow of the Newtonian fluid moving in the first inlet, and wherein a vortex may be generated in the Newtonian fluid by the acoustic stream to disperse the light emitting element.

[0025] In an embodiment, the outlet flow path may include a first outlet path, a second outlet path, and a third outlet path branching from the microchannel, and wherein the outlet portion may include a first outlet connected to the first outlet path, a second outlet connected to the second outlet path, and a third outlet connected to the third outlet path.

[0026] In an embodiment, the normal light-emitting element and Newtonian fluid separated in the microchannel can be discharged to the first outlet through the first outlet path and to the second outlet through the second outlet path, and wherein the abnormal light-emitting element and viscoelastic fluid can be discharged to the third outlet through the third outlet path.

[0027] In an embodiment, the size of an abnormal light emitting element among the light emitting elements may be larger than that of a normal light emitting element.

[0028] According to an embodiment, the particle separation device can separate abnormal light emitting elements from normal light emitting elements using Newtonian fluid and viscoelastic fluid. For example, the particle separation device can eliminate sedimentation and aggregation of light emitting elements by providing a vortex generator in the inlet portion.

[0029] It should be noted that the effects of the disclosure are not limited to the above-mentioned effects, and other effects of the disclosure will be clear to those skilled in the art from the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The above and other aspects and features of the disclosure will become more apparent by describing the disclosed embodiments in detail with reference to the attached drawings.

[0031] Figure 1 is a schematic plan view of a display device according to an embodiment.

[0032] Figure 2 is a schematic plan view showing the arrangement of a plurality of lines included in the display device according to the embodiment.

[0033] Figure 3 is a schematic diagram of an equivalent circuit of a sub-pixel according to an embodiment.

[0034] Figure 4 is a schematic plan view showing a pixel of a display device according to the embodiment.

[0035] Figure 5 It is along Figure 4 A schematic cross-sectional view taken along line E1-E1'.

[0036] Figure 6 It is along Figure 4 A schematic cross-sectional view taken along line E2-E2'.

[0037] Figure 7 is a schematic diagram showing a light emitting element according to an embodiment.

[0038] Figure 8 is a schematic perspective view showing a particle separation apparatus according to an embodiment.

[0039] Fig. 9 It is shown Figure 8 A schematic perspective view of the structure of a particle separation device excluding the main body.

[0040] Fig.10 It is shown Fig. 9 Schematic plan view of a particle separation device.

[0041] Fig.11 It is shown Fig. 9 Schematic cross-sectional view of a microchannel of a particle separation device.

[0042] Fig.12 It is shown Fig. 9 Schematic perspective view of a vortex generator of a particle separation device.

[0043] Fig.13 It is shown in Fig. 9 Schematic diagram of a first inlet of a particle separation device without a vortex generator in operation.

[0044] Fig.14 It is shown in Fig. 9 Schematic diagram of a first inlet of a particle separation device with a vortex generator in operation.

[0045] Fig.15 is a schematic plan view showing a microchannel of a particle separation apparatus according to an embodiment.

[0046] Fig.16 It is shown Fig.15 Schematic plan view of area A.

[0047] Fig.17 It is shown Fig.15 Schematic plan view of area B.

[0048] Fig.18 It is shown Fig.15 Schematic plan view of area C.

[0049] Fig.19 is a schematic block diagram showing a large-scale particle separation apparatus according to an embodiment.

[0050] Fig. 20 is an image of an inlet portion of the particle separation apparatus according to Example 1 in a state where a vortex generator is not operated.

[0051] Fig.21 is an image of an inlet portion of the particle separation apparatus according to Example 1 with the vortex generator operating.

[0052] Fig. 22 is an image of the outlet flow path of the particle separation device according to Example 1.

[0053] Fig.23 is an image of the outlet flow path of the particle separation device according to Example 2. DETAILED DESCRIPTION

[0054] In the following description, for the purpose of explanation, many specific details are set forth to provide a thorough understanding of various embodiments or implementations of the invention. As used herein, "embodiment" and "implementation" are interchangeable words, which are non-limiting examples of the device or method disclosed herein. However, it is clear that various embodiments can be practiced without these specific details or with one or more equivalent arrangements. Here, various embodiments do not have to be exclusive, nor do they have to limit disclosure. For example, the specific shape, configuration and characteristics of the embodiment can be used or implemented in another embodiment.

[0055] Unless otherwise specified, the illustrated embodiments will be understood to provide features of the invention. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects, etc. (hereinafter, individually or collectively referred to as "elements") of the various embodiments may be further combined, separated, interchanged and / or rearranged without departing from the invention.

[0056] Cross hatching and / or shadows used in the drawings are usually provided to clarify the boundaries between adjacent elements. Thus, unless otherwise stated, the presence or absence of cross hatching or shadows does not convey or indicate any preference or requirement for the specific material, material properties, size, ratio, commonality between the shown elements and / or any other characteristics, attributes, properties, etc. of the element. In addition, in the drawings, the size and relative size of the elements may be exaggerated for the purpose of clarity and / or description. When the embodiments can be implemented differently, a specific process sequence may be performed differently from the described sequence. For example, two processes described in succession may be performed substantially simultaneously or in an order opposite to the described sequence. In addition, the same reference numerals indicate the same elements.

[0057] When an element or layer is referred to as being "on" another element or layer, "connected to" or "bonded to" another element or layer, it may be directly on, directly connected to or directly bonded to the other element or layer, or there may be intervening elements or intervening layers. However, when an element or layer is referred to as being "directly on" another element or layer, "directly connected to" or "directly bonded to" another element or layer, there are no intervening elements or intervening layers. For this reason, the term "connected" may refer to a physical connection, an electrical connection and / or a fluid connection with or without an intervening element. In addition, the directions DR1, DR2 and DR3 are not limited to the three axes of a rectangular coordinate system, such as the X-axis, the Y-axis and the Z-axis, and may be interpreted in a broader sense. For example, the directions DR1, DR2 and DR3 may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. In addition, the X-axis, the Y-axis and the Z-axis are not limited to the three axes of a rectangular coordinate system (such as the x-axis, the y-axis and the z-axis), and may be interpreted in a broader sense. For example, the X-axis, Y-axis, and Z-axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purpose of this disclosure, "at least one of A and B" may be understood to mean only A, only B, or any combination of A and B. In addition, "at least one of X, Y, and Z" and "at least one of the group consisting of X, Y, and Z" may be interpreted as any combination of only X, only Y, only Z, or two or more of X, Y, and Z. As used herein, the term "and / or" includes any combination and all combinations of one or more of the related listed items.

[0058] Although the terms "first", "second", etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, without departing from the disclosed teachings, the first element discussed below may be referred to as the second element.

[0059] For descriptive purposes, spatially relative terms such as "below," "beneath," "under," "lower," "above," "upper," "above," "higher," and "side" (e.g., as in "sidewall") may be used herein to describe the relationship of one element to another element(s) as shown in the accompanying drawings. In addition to the orientation depicted in the accompanying drawings, the spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture. For example, if the device in the accompanying drawings is turned over, an element described as "below" or "beneath" other elements or features would subsequently be oriented as "above" the other elements or features. Thus, the term "below" may encompass both above and below orientations. Furthermore, the device may be otherwise oriented (e.g., rotated 90 degrees or in other orientations), and as such, the spatially relative descriptors used herein are interpreted accordingly.

[0060] The terms used herein are for the purpose of describing specific embodiments, and are not intended to be limited. As used herein, unless the context clearly states otherwise, the singular forms "one", "one (kind / person)" and "the (described)" are also intended to include plural forms. In addition, when the terms "include" and / or "comprise" are used in this specification, the stated features, integral bodies, steps, operations, elements, components and / or its groups are specified to exist, but one or more other features, integral bodies, steps, operations, elements, components and / or its groups are not excluded from existence or addition. It is also noted that, as used herein, the terms "substantially", "about" and other similar terms are used as approximate terms rather than degree terms, so as to explain the inherent deviations of measured values, calculated values ​​and / or provided values ​​that will be recognized by those of ordinary skill in the art.

[0061] Various embodiments are described herein with reference to cross-sections and / or exploded illustrations as schematic illustrations of embodiments and / or intermediate structures. As such, variations in the illustrated shapes caused by, for example, manufacturing techniques and / or tolerances are expected. Therefore, the embodiments disclosed herein should not necessarily be interpreted as being limited to the specific illustrated regional shapes, but rather include shape deviations caused by, for example, manufacturing. In this way, the regions shown in the drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and as such, no limitation is necessarily intended.

[0062] According to the convention in the art, some embodiments are described and shown in the accompanying drawings according to functional blocks, units and / or modules. It will be understood by those skilled in the art that these blocks, units and / or modules are physically implemented by electronic (or optical) circuits such as logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, wiring connections, etc. that can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. In the case where blocks, units and / or modules are implemented by microprocessors or other similar hardware, they can be programmed and controlled using software (e.g., microcode) to perform the various functions discussed here, and can be optionally driven by firmware and / or software. It is also contemplated that each block, unit and / or module can be implemented by dedicated hardware, or implemented as a combination of dedicated hardware for performing some functions and processors (e.g., one or more programmed microprocessors and related circuits) for performing other functions. In addition, without departing from the scope of the invention, each block, unit and / or module of some embodiments can be physically divided into two or more interactive and discrete blocks, units and / or modules. Furthermore, the blocks, units and / or modules of some embodiments may be physically combined into more complex blocks, units and / or modules without departing from the scope of the invention.

[0063] Hereinafter, embodiments will be described with reference to the accompanying drawings.

[0064] Figure 1 is a schematic plan view of a display device according to an embodiment.

[0065] Reference Figure 1 The display device 10 may display a moving image or a still image. The display device 10 may refer to any electronic device that provides a display screen. For example, the display device 10 may include a television, a laptop computer, a monitor, an electronic billboard, an Internet of Things (IoT) device, a mobile phone, a smart phone, a tablet personal computer (PC), an electronic watch, a smart watch, a watch phone, a head-mounted display device, a mobile communication terminal, an electronic notebook, an electronic book, a portable multimedia player (PMP), a navigation device, a game console, a digital camera, a video camera, etc.

[0066] The display device 10 may include a display panel for providing a display screen. For example, the display panel may include an inorganic light emitting diode display panel, an organic light emitting display panel, a quantum dot light emitting display panel, a plasma display panel, a field emission display panel, etc. In the following description, an inorganic light emitting diode display panel may be implemented as an example of the display device 10, but the embodiment is not limited thereto. Any other display panel may be implemented as long as the disclosed technical concept can be equally applied.

[0067] The shape of the display device 10 may be modified in various ways. For example, the display device 10 may have a shape such as a rectangle with longer lateral sides, a rectangle with longer vertical sides, a square, a quadrilateral with rounded (rounded) corners (e.g., vertices), other polygons, a circle, etc. The shape of the display area DPA of the display device 10 may also be similar to the overall shape of the display device 10. Figure 1 In the example shown in , the display device 10 may have a rectangular shape having longer sides in the second direction DR2 .

[0068] The display device 10 may include a display area DPA and a non-display area NDA. In the display area DPA, an image may be displayed. In the non-display area NDA, no image may be displayed. The display area DPA may be referred to as an active area, and the non-display area NDA may be referred to as an inactive area. The display area DPA may substantially occupy a central portion of the display device 10.

[0069] The display area DPA may include pixels PX. The pixels PX may be arranged in a matrix form. When viewed from the top (or in a plan view), the shape of each pixel PX may be a rectangle or a square, but the embodiment is not limited thereto. Each pixel PX may have a rhombus shape having an edge inclined relative to a direction. The pixels PX may be arranged in a strip or in an island pattern. Each of the pixels PX may include one or more light-emitting elements that emit light of a specific wavelength band to express a color.

[0070] The non-display area NDA may be disposed around the display area DPA. The non-display area NDA may surround the display area DPA in whole or in part. The display area DPA may have a rectangular shape, and the non-display area NDA may be disposed adjacent to four sides of the display area DPA. The non-display area NDA may form a frame of the display device 10. A line or circuit driver included in the display device 10 may be disposed in each of the non-display areas NDA, or an external device may be installed in each of the non-display areas NDA.

[0071] Figure 2 is a schematic plan view showing the arrangement of a plurality of lines included in the display device according to the embodiment.

[0072] Reference Figure 2 , the display device 10 may include a plurality of lines. The display device 10 may include scan lines SL (e.g., SL1, SL2, and SL3), data lines DTL (e.g., DTL1, DTL2, and DTL3), initialization voltage lines VIL, and voltage lines VL (e.g., VL1, VL2, VL3, and VL4). For example, other lines may be further provided in the display device 10.

[0073] The first scan line SL1 and the second scan line SL2 may extend in the first direction DR1. The first scan line SL1 and the second scan line SL2 may be disposed adjacent to each other and may be spaced apart from other first scan lines SL1 and second scan lines SL2 in the second direction DR2. The first scan line SL1 and the second scan line SL2 may be connected to a scan wiring pad (also referred to as a "pad") WPD_SC connected to a scan driver. The first scan line SL1 and the second scan line SL2 may extend from a pad area PDA located in a non-display area NDA to a display area DPA.

[0074] The third scan line SL3 may extend in the second direction DR2 and may be spaced apart from another third scan line SL3 in the first direction DR1. One third scan line SL3 may be connected to one or more first scan lines SL1 or one or more second scan lines SL2. According to an embodiment, the first scan line SL1 and the second scan line SL2 may be formed as a conductive layer disposed at a different layer from the third scan line SL3. The scan line SL may have a mesh structure on the entire surface of the display area DPA, but the embodiment is not limited thereto.

[0075] As used herein, when an element is referred to as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or there may be intervening elements. For example, such an element may be understood to be a single, integral element with one portion connected to another portion. Additionally, when an element is referred to as being "connected" to another element, it may be in direct contact with the other element and also electrically connected to the other element.

[0076] The data line DTL may extend in a first direction DR1. The data line DTL may include a first data line DTL1, a second data line DTL2, and a third data line DTL3. The first data line DTL1, the second data line DTL2, and the third data line DTL3 may be disposed adjacent to each other as a group. The data lines DTL1, DTL2, and DTL3 may extend from a pad area PDA located in a non-display area NDA to a display area DPA. However, the embodiment is not limited thereto. The data lines DTL1, DTL2, and DTL3 may be substantially equally spaced from each other and may be disposed between a first voltage line VL1 and a second voltage line VL2 to be described later.

[0077] The initialization voltage line VIL may extend in the first direction DR1. The initialization voltage line VIL may be disposed between the data line DTL and the first and second scan lines SL1 and SL2. The initialization voltage line VIL may extend from the pad area PDA located in the non-display area NDA to the display area DPA.

[0078] The first voltage line VL1 and the second voltage line VL2 may extend in the first direction DR1, and the third voltage line VL3 and the fourth voltage line VL4 may extend in the second direction DR2. The first voltage line VL1 and the second voltage line VL2 may be alternately arranged in the second direction DR2, and the third voltage line VL3 and the fourth voltage line VL4 may be alternately arranged in the first direction DR1. The first voltage line VL1 and the second voltage line VL2 may extend in the first direction DR1 and may cross the display area DPA. Some of the third voltage line VL3 and the fourth voltage line VL4 may be arranged in the display area DPA, and the others may be arranged in the non-display area NDA located on the side (e.g., the opposite side) of the display area DPA in the first direction DR1. The first voltage line VL1 and the second voltage line VL2 may be formed as a conductive layer different from the third voltage line VL3 and the fourth voltage line VL4. For example, the first voltage line VL1 and the second voltage line VL2 may be formed in one layer, and the third voltage line VL3 and the fourth voltage line VL4 may be formed in another layer. The first voltage line VL1 may be connected to at least one third voltage line VL3 , and the second voltage line VL2 may be connected to at least one fourth voltage line VL4 , so that the voltage line VL may have a mesh structure throughout the display area DPA However, the embodiment is not limited thereto.

[0079] The first scan line SL1, the second scan line SL2, the data line DTL, the initialization voltage line VIL, the first voltage line VL1 and the second voltage line VL2 may be electrically connected to one or more wiring pads WPD. The wiring pad WPD may be disposed in the non-display area NDA. According to an embodiment, the wiring pad WPD may be disposed in the pad area PDA, which is located at the lower side of the display area DPA in the first direction DR1 opposite to the upper side of the display area DPA. The first scan line SL1 and the second scan line SL2 may be connected to the scan wiring pad WPD_SC disposed in the pad area PDA, and the data line DTL may be connected to different data wiring pads WPD_DT, respectively. The initialization voltage line VIL may be connected to the initialization wiring pad WPD_Vint, the first voltage line VL1 may be connected to the first voltage wiring pad WPD_VL1, and the second voltage line VL2 may be connected to the second voltage wiring pad WPD_VL2. An external device may be mounted on the wiring pad WPD. The external device may be mounted on the wiring pad WPD by an anisotropic conductive film, ultrasonic bonding, or the like. Although the wiring pads WPD are disposed in the pad area PDA located at the lower side of the display area DPA in the drawings, the embodiment is not limited thereto. In another example, some of the wiring pads WPD may be disposed at the upper side or one of the left and right sides of the display area DPA.

[0080] The pixel PX or sub-pixel SPXn (see FIG. Figure 3) may include a pixel driving circuit, wherein n is an integer from 1 to 3. The above-mentioned line may pass through each of the pixels PX or its periphery to apply a driving signal to the pixel driving circuit. The pixel driving circuit may include a transistor and a capacitor. The number of transistors and capacitors of each pixel driving circuit may be changed in various ways. According to an embodiment, each of the sub-pixels SPXn of the display device 10 may have a 3T-1C structure (that is, the pixel driving circuit may include three transistors and one capacitor). In the following description, a pixel driving circuit with a 3T-1C structure will be described as an example. However, the embodiment is not limited thereto. Various modified structures such as a 2T-1C structure, a 7T-1C structure, and a 6T-1C structure may be implemented.

[0081] Figure 3 is a schematic diagram of an equivalent circuit of a sub-pixel according to an embodiment.

[0082] Reference Figure 3 , each of the sub-pixels SPXn of the display device 10 according to the embodiment may include three transistors T1 , T2 , and T3 and one storage capacitor Cst, in addition to the light emitting diode EL.

[0083] The light emitting diode EL may emit light in proportion to the current supplied by the first transistor T1. The light emitting diode EL may include a first electrode, a second electrode, and at least one light emitting element disposed between the first electrode and the second electrode. The light emitting element may emit light in a specific wavelength range by an electrical signal transmitted from the first electrode and the second electrode.

[0084] A first end of the light emitting diode EL can be connected to the source electrode of the first transistor T1, and a second end of the light emitting diode EL can be connected to a second voltage line VL2, from which a low-level voltage (hereinafter referred to as a second power supply voltage) lower than a high-level voltage of the first voltage line VL1 (hereinafter referred to as a first power supply voltage) is applied.

[0085] The first transistor T1 may adjust or control the current flowing from the first voltage line VL1 according to the voltage difference between the gate electrode and the source electrode of the first transistor T1, and the first power supply voltage is supplied to the light emitting diode EL from the first voltage line VL1. For example, the first transistor T1 may be a driving transistor for driving the light emitting diode EL. The gate electrode of the first transistor T1 may be connected to the source electrode of the second transistor T2, the source electrode of the first transistor T1 may be connected to the first electrode of the light emitting diode EL, and the drain electrode of the first transistor T1 may be connected to the first voltage line VL1, and the first power supply voltage is applied from the first voltage line VL1.

[0086] The second transistor T2 may be turned on by the scan signal of the first scan line SL1 to connect the data line DTL and the gate electrode of the first transistor T1. The gate electrode of the second transistor T2 may be connected to the first scan line SL1, the source electrode of the second transistor T2 may be connected to the gate electrode of the first transistor T1, and the drain electrode of the second transistor T2 may be connected to the data line DTL.

[0087] The third transistor T3 can be turned on by the scan signal of the second scan line SL2 to connect the initialization voltage line VIL and the first end of the light emitting diode EL. The gate electrode of the third transistor T3 can be connected to the second scan line SL2, the drain electrode of the third transistor T3 can be connected to the initialization voltage line VIL, and the source electrode of the third transistor T3 can be connected to the end of the light emitting diode EL or the source electrode of the first transistor T1.

[0088] The source electrode and drain electrode of each of the transistors T1, T2, and T3 are not limited to the above-mentioned source electrode and drain electrode. In another example, the transistors T1, T2, and T3 may be connected in a different manner. For example, each of the transistors T1, T2, and T3 may be formed as a thin film transistor. For example, although in Figure 3 In the example shown in , each of the transistors T1, T2, and T3 is implemented as an n-type MOSFET (e.g., a metal oxide semiconductor field effect transistor), but the embodiment is not limited thereto. For example, each of the transistors T1, T2, and T3 may be implemented as a p-type MOSFET, or some of the transistors T1, T2, and T3 may be implemented as an n-type MOSFET, and the others may be implemented as a p-type MOSFET.

[0089] The storage capacitor Cst may be formed between the gate electrode and the source electrode of the first transistor T1. The storage capacitor Cst may store a difference voltage between the gate voltage and the source voltage of the first transistor T1.

[0090] Hereinafter, the structure of one pixel PX of the display device 10 according to the embodiment will be described in detail with reference to other drawings.

[0091] Figure 4 is a schematic plan view showing a pixel of a display device according to the embodiment. Figure 4 The layout of electrodes RME (e.g., RME1 and RME2), embankment pattern layers BP1 and BP2, embankment layer BNL, light emitting elements ED, and connection electrodes CNE (e.g., CNE1 and CNE2) provided in a pixel PX of the display device 10 when viewed from the top (or in a plan view) is shown.

[0092] Reference Figure 4 Each of the pixels PX of the display device 10 may include a sub-pixel SPXn (see Figure 3). For example, the pixel PX may include a first sub-pixel SPX1, a second sub-pixel SPX2, and a third sub-pixel SPX3. The first sub-pixel SPX1 may emit light of a first color, the second sub-pixel SPX2 may emit light of a second color, and the third sub-pixel SPX3 may emit light of a third color. For example, the first color may be blue, the second color may be green, and the third color may be red. However, the embodiment is not limited thereto. All sub-pixels SPXn may emit light of the same color. According to an embodiment, the sub-pixel SPXn may emit blue light. Although a single pixel PX includes three sub-pixels SPXn in the example shown in the drawings, the embodiment is not limited thereto. The pixel PX may include more than three sub-pixels SPXn.

[0093] Each of the sub-pixels SPXn of the display device 10 may include an emission area EMA and a non-emission area. In the emission area EMA, a light-emitting element ED may be provided to emit light of a specific wavelength band. In the non-emission area, no light-emitting element ED may be provided, and light emitted from the light-emitting element ED does not reach, so no light is emitted from the non-emission area.

[0094] The emission area EMA may include an area in which the light emitting element ED is disposed, and may include an area adjacent to the light emitting element ED where light emitted from the light emitting element ED exits. For example, the emission area EMA may also include an area in which light emitted from the light emitting element ED is reflected or refracted by other elements to exit. The light emitting element ED may be disposed in each of the sub-pixels SPXn, and the emission area EMA may include an area in which the light emitting element ED is disposed and an adjacent area.

[0095] Although the emission area EMA of the sub-pixel SPXn has a uniform area in the example shown in the drawings, the embodiment is not limited thereto. In some embodiments, the emission area EMA of the sub-pixel SPXn may have different areas according to the color or wavelength band of the light emitted from the light emitting element ED disposed in each sub-pixel SPXn.

[0096] Each of the sub-pixels SPXn may further include a sub-region SA disposed in a non-emission region. The sub-region SA of each sub-pixel SPXn may be disposed on a lower side of the emission region EMA in the first direction DR1 opposite to an upper side of the emission region EMA. The emission region EMA and the sub-region SA may be alternately arranged in the first direction DR1, and each sub-region SA may be disposed between emission regions EMA of different sub-pixels SPXn spaced apart from each other in the first direction DR1. For example, the emission region EMA and the sub-region SA may be alternately arranged in the first direction DR1, and the emission region EMA and the sub-region SA may be repeatedly arranged in the second direction DR2. However, the embodiment is not limited thereto. The emission region EMA and the sub-region SA of the pixel PX may have the same Figure 4 The arrangement of different arrangements.

[0097] Any light emitting element ED may not be disposed in the sub-region SA, and thus no light is emitted from the sub-region SA. The electrode RME disposed in the sub-pixel SPXn may be partially disposed in the sub-region SA. The electrodes RME disposed in different sub-pixels SPXn may be disposed separately from each other at the separation region ROP of the sub-region SA.

[0098] The line and circuit element of the circuit layer provided in each pixel PX and connected to the light emitting element ED may be connected to the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3. For example, the line and circuit element may not be provided in the region occupied by each sub-pixel SPXn or the emission area EMA, but may be provided regardless of the position of the emission area EMA in the pixel (or single pixel) PX.

[0099] The bank layer BNL may be disposed to surround the sub-pixel SPXn, the emission area EMA, and the sub-region SA. The bank layer BNL may be disposed at a boundary area between sub-pixels SPXn adjacent to each other along the first direction DR1 and the second direction DR2, and may also be disposed at a boundary area between the emission area EMA and the sub-region SA. The sub-pixels SPXn, the emission area EMA, and the sub-region SA of the display device 10 may be distinguished from each other by the bank layer BNL. The distances between the sub-pixels SPXn, the emission area EMA, and the sub-region SA may vary according to the width of the bank layer BNL.

[0100] The bank layer BNL may be disposed in a grid pattern on the front surface of the display area DPA including portions extending in the first direction DR1 and the second direction DR2 when viewed from the top (or in a plan view). The bank layer BNL may be disposed along a boundary region of each of the sub-pixels SPXn to distinguish between adjacent sub-pixels SPXn. For example, the bank layer BNL may be disposed to surround the emission region EMA and the sub-region SA disposed in each of the sub-pixels SPXn to distinguish between them.

[0101] Figure 5 It is along Figure 4 A cross-sectional view taken along line E1-E1'. Figure 6 It is along Figure 4 A schematic cross-sectional view taken along line E2-E2'. Figure 5 shows a cross section passing through end portions (eg, opposite ends) of the light emitting element ED disposed in the first sub-pixel SPX1 and the electrode contact holes CTD and CTS; Figure 6 A cross section passing through ends (eg, opposite ends) of the light emitting element ED disposed in the first sub-pixel SPX1 and the contacts CT1 and CT2 is shown.

[0102] Combination Figure 4 For reference Figure 5 and Figure 6 , the display device 10 may include a wiring substrate 101, the wiring substrate 101 includes a first substrate SUB and a semiconductor layer, a conductive layer, and an insulating layer disposed on the first substrate SUB. For example, the display device 10 may include electrodes RME (e.g., RME1 and RME2), light emitting elements ED, and connection electrodes CNE (e.g., CNE1 and CNE2) disposed on the wiring substrate 101. The semiconductor layer, the conductive layer, and the insulating layer on the wiring substrate 101 may form a circuit layer of the display device 10.

[0103] The first substrate SUB may be an insulating substrate. The first substrate SUB may be made of an insulating material such as glass, quartz, and polymer resin. The first substrate SUB may be a rigid substrate or a flexible substrate that is bendable, foldable, or rollable. The first substrate SUB may include a display area DPA and a non-display area NDA surrounding the display area DPA. The display area DPA may include an emission area EMA and a sub-area SA that is a part of the non-emission area.

[0104] The first conductive layer may be disposed on the first substrate SUB. The first conductive layer may include a bottom metal layer BML. The bottom metal layer BML may be disposed to overlap with the active layer ACT1 of the first transistor T1. The bottom metal layer BML may prevent light from being incident on the first active layer ACT1 of the first transistor, or may be electrically connected to the first active layer ACT1 to stabilize the electrical characteristics of the first transistor T1. In another example, the bottom metal layer BML may be omitted.

[0105] The buffer layer BL may be disposed on the bottom metal layer BML and the first substrate SUB. The buffer layer BL may be formed on the first substrate SUB to protect the transistor of the pixel PX from moisture penetrating through the first substrate SUB susceptible to moisture penetration and may also provide a flat surface.

[0106] The semiconductor layer may be disposed on the buffer layer BL. The semiconductor layer may include a first active layer ACT1 of the first transistor T1 and a second active layer ACT2 of the second transistor T2. The first active layer ACT1 and the second active layer ACT2 may be disposed to partially overlap the first gate electrode G1 and the second gate electrode G2 of the second conductive layer to be described later, respectively.

[0107] The semiconductor layer may include polycrystalline silicon, monocrystalline silicon, an oxide semiconductor, etc. In other embodiments, the semiconductor layer may include polycrystalline silicon. The oxide semiconductor may be an oxide semiconductor including indium (In). For example, the oxide semiconductor may be at least one of indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium oxide (IGO), indium zinc tin oxide (IZTO), indium gallium tin oxide (IGTO), indium gallium zinc oxide (IGZO), indium gallium zinc tin oxide (IGZTO), etc.

[0108] Although only one first transistor T1 is provided in the sub-pixel SPXn of the display device 10 in the drawing, the embodiment is not limited thereto. A greater number of transistors may be included in the display device 10.

[0109] The first gate insulating layer GI may be disposed on the semiconductor layer and the buffer layer BL in the display area DPA. The first gate insulating layer GI may not be disposed in the pad area PDA. The first gate insulating layer GI may be used as / as a gate insulating film for each of the transistors T1 and T2. Although the first gate insulating layer GI is disposed (e.g., entirely disposed) on the buffer layer BL in the example shown in the accompanying drawings, the embodiment is not limited thereto. In some embodiments, the first gate insulating layer GI may be patterned together with the gate electrodes G1 and G2 of the second conductive layer to be described later, and may be partially disposed between the second conductive layer and the active layers ACT1 and ACT2 of the semiconductor layer.

[0110] The second conductive layer may be disposed on the first gate insulating layer GI. The second conductive layer may include a first gate electrode G1 of the first transistor T1 and a second gate electrode G2 of the second transistor T2. The first gate electrode G1 may overlap with the channel region of the first active layer ACT1 in the third direction DR3 as the thickness direction. The second gate electrode G2 may overlap with the channel region of the second active layer ACT2 in the third direction DR3 as the thickness direction. For example, the second conductive layer may further include an electrode of a storage capacitor Cst.

[0111] The first interlayer dielectric layer IL1 may be disposed on the second conductive layer. The first interlayer dielectric layer IL1 may function as an insulating film between the second conductive layer and other layers disposed on the second conductive layer, and may protect the second conductive layer.

[0112] The third conductive layer may be disposed on the first interlayer dielectric layer IL1. The third conductive layer may include first and second voltage lines VL1 and VL2 disposed in the display area DPA, a first conductive pattern layer CDP1, and source electrodes S1 and S2 and drain electrodes D1 and D2 of transistors T1 and T2. For example, the third conductive layer may further include another electrode of the storage capacitor Cst.

[0113] A high level voltage (or a first power supply voltage) may be applied to the first voltage line VL1 to be transmitted to the first electrode RME1, and a low level voltage (or a second power supply voltage) may be applied to the second voltage line VL2 to be transmitted to the second electrode RME2. A portion of the first voltage line VL1 may contact the first active layer ACT1 of the first transistor T1 through a contact hole penetrating (or passing through) the first interlayer dielectric layer IL1 and the first gate insulating layer GI. The first voltage line VL1 may be used as / as the first drain electrode D1 of the first transistor T1. The second voltage line VL2 may be connected (e.g., directly connected) to the second electrode RME2 to be described later.

[0114] The first conductive pattern layer CDP1 may contact the first active layer ACT1 of the first transistor T1 through a contact hole penetrating (or passing through) the first interlayer dielectric layer IL1 and the first gate insulating layer GI. The first conductive pattern layer CDP1 may contact the bottom metal layer BML through another contact hole. The first conductive pattern layer CDP1 may be used as / as the first source electrode S1 of the first transistor T1. For example, the first conductive pattern layer CDP1 may be connected to the first electrode RME1 or the first connection electrode CNE1 to be described later. The first transistor T1 may transmit the first power supply voltage applied from the first voltage line VL1 to the first electrode RME1 or the first connection electrode CNE1.

[0115] The second source electrode S2 and the second drain electrode D2 may contact the second active layer ACT2 of the second transistor T2 through contact holes penetrating (or passing through) the first interlayer dielectric layer IL1 and the first gate insulating layer GI, respectively. The second transistor T2 may be Figure 3 The second transistor T2 can be switched from Figure 3 The signal applied by the data line DTL is transmitted to the first transistor T1, or the signal applied by the data line DTL can be transmitted to the first transistor T1. Figure 3 A signal applied to the initialization voltage line VIL is transmitted to the other electrode of the storage capacitor Cst.

[0116] The first passivation layer PV1 may be disposed throughout the third conductive layer. The first passivation layer PV1 may function as an insulating film between the third conductive layer and other layers, and may protect the third conductive layer.

[0117] The buffer layer BL, the first gate insulating layer GI, the first interlayer dielectric layer IL1, and the first passivation layer PV1 may be composed of a plurality of inorganic layers alternately stacked on each other. For example, the buffer layer BL, the first gate insulating layer GI, the first interlayer dielectric layer IL1, and the first passivation layer PV1 may be composed of a plurality of inorganic layers alternately stacked on each other. x ), Silicon Nitride (SiN x ) and silicon oxynitride (SiO x N y ) are stacked on top of each other or include silicon oxide (SiO x ), Silicon Nitride (SiN x ) and silicon oxynitride (SiO x N y ) are alternately stacked with each other. However, the embodiment is not limited thereto. The buffer layer BL, the first gate insulating layer GI, the first interlayer dielectric layer IL1, and the first passivation layer PV1 may be composed of a single inorganic layer including the above-mentioned insulating material. In some embodiments, the first interlayer dielectric layer IL1 may be made of an organic insulating material such as polyimide (PI).

[0118] The via layer VIA may be disposed on the third conductive layer in the display area DPA. The via layer VIA may include an organic insulating material (e.g., an organic insulating material such as polyimide (PI)) to provide a flat surface on the lower conductive layer having different heights. In another example, in some implementations, the via layer VIA may be omitted.

[0119] The display device 10 may include bank pattern layers BP1 and BP2, electrodes RME (e.g., RME1 and RME2), a bank layer BNL, a light emitting element ED, and connection electrodes CNE (e.g., CNE1 and CNE2) as display element layers disposed on the via layer VIA of the wiring substrate 101. For example, the display device 10 may include insulating layers PAS1, PAS2, and PAS3 disposed on the wiring substrate 101.

[0120] The bank pattern layers BP1 and BP2 may be disposed in the emission area EMA of each sub-pixel SPX. Each of the bank pattern layers BP1 and BP2 may have a shape having a constant width in the second direction DR2 and extending in the first direction DR1.

[0121] For example, the embankment pattern layers BP1 and BP2 may include a first embankment pattern layer BP1 and a second embankment pattern layer BP2 spaced apart from each other in the second direction DR2 in the emission area EMA of each sub-pixel SPXn. The first embankment pattern layer BP1 may be disposed on the left side of the central portion of the emission area EMA as one side in the second direction DR2, and the second embankment pattern layer BP2 may be spaced apart from the first embankment pattern layer BP1 and may be disposed on the right side of the central portion of the emission area EMA as the opposite side in the second direction DR2. The first embankment pattern layer BP1 and the second embankment pattern layer BP2 may be alternately arranged along the second direction DR2, and may be disposed in an island pattern in the display area DPA. The light emitting element ED may be disposed between the first embankment pattern layer BP1 and the second embankment pattern layer BP2.

[0122] The length of the first embankment pattern layer BP1 in the first direction DR1 may be substantially equal to the length of the second embankment pattern layer BP2 in the first direction DR1. The lengths of the first embankment pattern layer BP1 and the second embankment pattern layer BP2 in the first direction DR1 may be less than the length of the emission area EMA surrounded by the embankment layer BNL in the first direction DR1. The first embankment pattern layer BP1 and the second embankment pattern layer BP2 may be spaced apart from a portion of the embankment layer BNL extending in the second direction DR2. However, the embodiment is not limited thereto. The embankment pattern layers BP1 and BP2 may be integral with the embankment layer BNL, or may partially overlap with a portion of the embankment layer BNL extending in the second direction DR2. In another example, the lengths of the embankment pattern layers BP1 and BP2 in the first direction DR1 may be substantially equal to or greater than the length of the emission area EMA surrounded by the embankment layer BNL in the first direction DR1.

[0123] The first embankment pattern layer BP1 and the second embankment pattern layer BP2 may have the same width in the second direction DR2. However, the embodiment is not limited thereto. In another example, the first embankment pattern layer BP1 and the second embankment pattern layer BP2 may have different widths. For example, one of the embankment pattern layers may have a larger width than the other, and the larger embankment pattern layer may be arranged across the emission areas EMA of different sub-pixels SPXn adjacent to each other in the second direction DR2. In this case, in the case where the embankment pattern layer is arranged across the emission area EMA, the portion of the embankment layer BNL extending in the first direction DR1 may overlap with the second embankment pattern layer BP2 in the thickness direction. Although in the example shown in the drawings, two embankment pattern layers BP1 and BP2 are arranged in each sub-pixel SPXn and have the same width, the embodiment is not limited thereto. The number and shape of the embankment pattern layers BP1 and BP2 may vary according to the number or arrangement structure of the electrodes RME.

[0124] The embankment pattern layers BP1 and BP2 may be disposed on the via layer VIA. For example, the embankment pattern layers BP1 and BP2 may be disposed (e.g., directly disposed) on the via layer VIA, and may have a structure that at least partially protrudes from the upper surface of the via layer VIA. The protruding portions of the embankment pattern layers BP1 and BP2 may have inclined or curved side surfaces. Light emitted from the light emitting element ED may be reflected by the electrode RME disposed on the embankment pattern layers BP1 and BP2, so that the light may be emitted / emitted toward the upper side of the via layer VIA. For example, the embankment pattern layers BP1 and BP2 may have a semicircular or semi-elliptical shape having a curved outer surface in a cross-sectional view. The embankment pattern layers BP1 and BP2 may include an organic insulating material such as polyimide (PI), but the embodiment is not limited thereto.

[0125] The electrodes RME (e.g., RME1 and RME2) may have a shape extending in one direction and may be disposed in each of the sub-pixels SPXn. The electrodes RME1 and RME2 may extend in a first direction DR1 to be disposed in the emission region EMA and the sub-region SA of the sub-pixel SPXn, and the electrodes RME (e.g., RME1 and RME2) may be spaced apart from each other in a second direction DR2. The electrodes RME may be electrically connected to the light emitting element ED to be described later. However, the embodiment is not limited thereto. For example, the electrodes RME (e.g., RME1 and RME2) may not be electrically connected to the light emitting element ED.

[0126] The display device 10 may include a first electrode RME1 and a second electrode RME2 disposed in each of the sub-pixels SPXn. The first electrode RME1 may be disposed on the left side of the central portion of the emission area EMA, and the second electrode RME2 may be spaced apart from the first electrode RME1 in the second direction DR2 and may be disposed on the right side of the central portion of the emission area EMA. The first electrode RME1 may be disposed on the first embankment pattern layer BP1, and the second electrode RME2 may be disposed on the second embankment pattern layer BP2. The first electrode RME1 and the second electrode RME2 may extend beyond the embankment layer BNL and may be partially disposed in the sub-pixel SPXn and the sub-region SA. The first electrode RME1 and the second electrode RME2 of the sub-pixel SPXn may be spaced apart from the first electrode RME1 and the second electrode RME2 of another sub-pixel SPXn at a separation region ROP located in the sub-region SA of one of the sub-pixels SPXn.

[0127] Although two electrodes RME are disposed in each sub-pixel SPXn and have a shape extending in the first direction DR1 in the drawing, the embodiment is not limited thereto. The electrodes RME may be disposed or may be partially bent and have a shape having different widths at different positions.

[0128] The first electrode RME1 and the second electrode RME2 may be disposed on at least the inclined side surfaces of the embankment pattern layers BP1 and BP2. According to an embodiment, the width of the electrode RME measured in the second direction DR2 may be smaller than the width of the embankment pattern layers BP1 and BP2 measured in the second direction DR2. The distance between the first electrode RME1 and the second electrode RME2 spaced apart from each other in the second direction DR2 may be smaller than the distance between the embankment pattern layers BP1 and BP2. At least a portion of the first electrode RME1 and at least a portion of the second electrode RME2 may be disposed (e.g., directly disposed) on the via layer VIA (e.g., disposed on the same plane).

[0129] The light emitting element ED disposed between the bank pattern layers BP1 and BP2 may emit light through an end portion (e.g., an opposite end portion). The emitted light may be guided / transmitted to the electrode RME disposed on the bank pattern layers BP1 and BP2. A portion of each of the electrodes RME disposed on the bank pattern layers BP1 and BP2 may reflect light emitted from the light emitting element ED. The first electrode RME1 and the second electrode RME2 may be disposed to cover the side surfaces of the bank pattern layers BP1 and BP2 on at least one side to reflect light emitted from the light emitting element ED.

[0130] Each of the electrodes RME may contact (e.g., directly contact) the third conductive layer through the electrode contact holes CTD and CTS overlapping the bank layer BNL between the emission region EMA and the sub-region SA. The first electrode contact hole CTD may be formed at a position where the bank layer BNL and the first electrode RME1 overlap each other. The second electrode contact hole CTS may be formed at a position where the bank layer BNL and the second electrode RME2 overlap each other. The first electrode RME1 may contact the first conductive pattern layer CDP1 through the first electrode contact hole CTD penetrating (or passing through) the via layer VIA and the first passivation layer PV1. The second electrode RME2 may contact the second voltage line VL2 through the second electrode contact hole CTS penetrating (or passing through) the via layer VIA and the first passivation layer PV1. The first electrode RME1 may be electrically connected to the first transistor T1 through the first conductive pattern layer CDP1 to receive the first power supply voltage. The second electrode RME2 may be electrically connected to the second voltage line VL2 to receive the second power supply voltage. However, the embodiment is not limited thereto. According to another embodiment, each of the first and second electrodes RME1 and RME2 may not be electrically connected to the voltage lines VL1 and VL2 of the third conductive layer, and a connection electrode CNE to be described later may be connected (eg, directly connected) to the third conductive layer.

[0131] Each of the electrodes RME may include a conductive material having a high reflectivity. For example, the electrode RME may include a metal such as silver (Ag), copper (Cu), and aluminum (Al), or may include an alloy containing aluminum (Al), nickel (Ni), or lanthanum (La), or a stack of a metal layer such as titanium (Ti), molybdenum (Mo), and niobium (Nb) and the alloy. In some embodiments, the electrode RME may be composed of a double layer or multiple layers in which an alloy including aluminum (Al) and at least one metal layer composed of titanium (Ti), molybdenum (Mo), and niobium (Nb) are stacked on each other.

[0132] However, the embodiment is not limited thereto. The electrode RME may further include a transparent conductive material. For example, each of the electrodes RME may include materials such as ITO, IZO, and ITZO. In some embodiments, each of the first electrode RME1 and the second electrode RME2 may have a structure in which one or more layers of a transparent conductive material and one or more metal layers having a high reflectivity are stacked on each other or may be composed of a single layer including them. For example, each of the electrodes RME may have a stacking structure such as ITO / Ag / ITO / , ITO / Ag / IZO, or ITO / Ag / ITZO / IZO. The electrode RME may be electrically connected to the light emitting element ED, and may reflect some of the light emitted from the light emitting element ED toward the upper side of the first substrate SUB.

[0133] The first insulating layer PAS1 may be disposed on the front surface of the display area DPA and may be disposed on the via layer VIA and the electrode RME. The first insulating layer PAS1 may protect the electrode RME and may insulate different electrodes RME from each other. Since the first insulating layer PAS1 is disposed to cover the electrode RME before forming the bank layer BNL, the electrode RME may be prevented from being damaged during the process of forming the bank layer BNL. For example, the first insulating layer PAS1 may also prevent the light emitting element ED disposed thereon from contacting other elements and being damaged.

[0134] In an embodiment, the first insulating layer PAS1 may have a stepped portion such that a portion of the upper surface is recessed between the electrodes RME spaced apart from each other in the second direction DR2. The light emitting element ED may be disposed on the upper surface of the stepped portion of the first insulating layer PAS1, and a space may be formed between the light emitting element ED and the first insulating layer PAS1.

[0135] The bank layer BNL may be disposed on the first insulating layer PAS1. The bank layer BNL may include portions extending in the first direction DR1 and the second direction DR2, and may surround each of the sub-pixels SPXn. The bank layer BNL may surround the emission area EMA and the sub-area SA of each of the sub-pixels SPXn to distinguish between the emission area EMA and the sub-area SA, and may surround a boundary area of ​​the display area DPA to distinguish between the display area DPA and the non-display area NDA. The bank layer BNL may be disposed in the entire display area DPA to form a grid pattern. The area in the display area DPA opened by the bank layer BNL may be the emission area EMA and the sub-area SA.

[0136] The bank layer BNL may have a certain height similar to that of the bank pattern layers BP1 and BP2. In some embodiments, the top surface of the bank layer BNL may have a height higher than that of the bank pattern layers BP1 and BP2, and the thickness of the bank layer BNL may be substantially equal to or greater than that of the bank pattern layers BP1 and BP2. The bank layer BNL may prevent ink from overflowing into adjacent sub-pixels SPXn during an inkjet printing process for manufacturing the display device 10. Similar to the bank pattern layers BP1 and BP2, the bank layer BNL may include an organic insulating material such as polyimide.

[0137] The light emitting element ED may be disposed in the emission area EMA. The light emitting element ED may be disposed between the embankment pattern layers BP1 and BP2, and may be spaced apart from each other in the first direction DR1. According to an embodiment, the light emitting element ED may have a shape extending in one direction, and ends (e.g., opposite ends) of the light emitting element ED may be respectively disposed on different electrodes RME. The length of the light emitting element ED may be greater than the distance between the electrodes RME spaced apart from each other in the second direction DR2. The direction along which the light emitting element ED extends substantially may be perpendicular to the first direction DR1 along which the electrode RME extends. However, the embodiment is not limited thereto. The direction along which the light emitting element ED extends may face the second direction DR2 or a direction inclined relative to the second direction DR2.

[0138] The light emitting element ED may be disposed on the first insulating layer PAS1. The light emitting element ED may extend in a direction, and the direction may be parallel to the upper surface of the first substrate SUB. As will be described later, the light emitting element ED may include a semiconductor layer arranged in the extending direction. The semiconductor layers may be sequentially arranged along a direction parallel to the upper surface of the first substrate SUB. However, the embodiment is not limited thereto. In the case where the light emitting element ED has a different structure, the semiconductor layer may be disposed in a direction perpendicular to the first substrate SUB.

[0139] The light emitting element ED disposed in each of the sub-pixels SPXn may emit light of different wavelength bands according to the material of the semiconductor layer. However, the embodiment is not limited thereto. The light emitting element ED disposed in each of the sub-pixels SPXn may include a semiconductor layer made of the same material and may emit light of the same color.

[0140] The light emitting element ED may be electrically connected to the electrode RME and the conductive layer under the via layer VIA in contact with the connection electrodes CNE (eg, CNE1 and CNE2 ), and an electrical signal may be applied to the light emitting element ED so that light of a specific wavelength range may be emitted.

[0141] The second insulating layer PAS2 may be disposed on the light emitting element ED, the first insulating layer PAS1, and the embankment layer BNL. The second insulating layer PAS2 may extend in the first direction DR1 between the embankment pattern layers BP1 and BP2, and may include a pattern portion disposed on the light emitting element ED. The pattern portion may be disposed to partially surround the outer surface of the light emitting element ED, and may not cover the side (e.g., the opposite side) or end (e.g., the opposite end) of the light emitting element ED. When viewed from the top (or plan view), the pattern portion may form a linear pattern or an island pattern in each sub-pixel SPXn. The pattern portion of the second insulating layer PAS2 may protect the light emitting element ED, and may fix the light emitting element ED during the process of manufacturing the display device 10. For example, the second insulating layer PAS2 may be disposed to fill the space between the light emitting element ED and the second insulating layer PAS2 thereunder. For example, a portion of the second insulating layer PAS2 may be disposed on the embankment layer BNL and in the sub-region SA.

[0142] Connection electrodes CNE (eg, CNE1 and CNE2) may be disposed on the electrode RME and the bank pattern layers BP1 and BP2. The connection electrodes CNE may each have a shape extending in one direction and may be spaced apart from each other. The connection electrodes CNE may contact the light emitting element ED and may be electrically connected to the third conductive layer.

[0143] The connection electrode CNE may include a first connection electrode CNE1 and a second connection electrode CNE2 disposed in each sub-pixel SPXn. The first connection electrode CNE1 may have a shape extending in the first direction DR1 and may be disposed on the first electrode RME1 or the first bank pattern layer BP1. The first connection electrode CNE1 may partially overlap the first electrode RME1 and may be disposed from the emission area EMA to the sub-area SA beyond the bank layer BNL. The second connection electrode CNE2 may have a shape extending in the first direction DR1 and may be disposed on the second electrode RME2 or the second bank pattern layer BP2. The second connection electrode CNE2 may partially overlap the second electrode RME2 and may be disposed from the emission area EMA to the sub-area SA beyond the bank layer BNL. The first connection electrode CNE1 and the second connection electrode CNE2 may contact the light emitting element ED and may be electrically connected to the electrode RME or a conductive layer thereunder.

[0144] For example, the first connection electrode CNE1 and the second connection electrode CNE2 may be respectively disposed on the side surfaces of the second insulating layer PAS2 and may be in contact with the light emitting element ED. The first connection electrode CNE1 may partially overlap with the first electrode RME1 and may be in contact with the first end of the light emitting element ED. The second connection electrode CNE2 may partially overlap with the second electrode RME2 and may be in contact with the second end of the light emitting element ED. The connection electrodes CNE may be disposed across the emission area EMA and the sub-area SA. A portion of each of the connection electrodes CNE disposed in the emission area EMA may be in contact with the light emitting element ED, and a portion of each of the connection electrodes CNE disposed in the sub-area SA may be electrically connected to the third conductive layer.

[0145] In the display device 10 according to the embodiment, each of the connection electrodes CNE may contact the electrode RME through the contacts CT1 and CT2 located in the sub-region SA. The first connection electrode CNE1 may contact the first electrode RME1 through the first contact CT1 penetrating (or passing through) the first insulating layer PAS1, the second insulating layer PAS2, and the third insulating layer PAS3 in the sub-region SA. The second connection electrode CNE2 may contact the second electrode RME2 through the second contact CT2 penetrating (or passing through) the first insulating layer PAS1 and the second insulating layer PAS2 in the sub-region SA. The connection electrode CNE may be electrically connected to the third conductive layer through the corresponding electrode RME. The first connection electrode CNE1 may be electrically connected to the first transistor T1 to apply a first power supply voltage, and the second connection electrode CNE2 may be electrically connected to the second voltage line VL2 to apply a second power supply voltage. Each of the connection electrodes CNE may contact the light emitting element ED in the emission region EMA to transmit the power supply voltage to the light emitting element ED.

[0146] However, the embodiment is not limited thereto. In some embodiments, the connection electrode CNE may contact (eg, directly contact) the third conductive layer, or may be electrically connected to the third conductive layer through other pattern layers except the electrode RME.

[0147] The connection electrode CNE may include a conductive material. For example, the connection electrode CNE may include ITO, IZO, ITZO, aluminum (Al), etc. For example, the connection electrode CNE may include a transparent conductive material, and light emitted from the light emitting element ED may be transmitted through the connection electrode CNE to be emitted.

[0148] The third insulating layer PAS3 may be disposed on the second connection electrode CNE2 and the second insulating layer PAS2. The third insulating layer PAS3 may be disposed (e.g., entirely disposed) on the second insulating layer PAS2 to cover the second connection electrode CNE2. The first connection electrode CNE1 may be disposed on the third insulating layer PAS3. The third insulating layer PAS3 may be disposed (e.g., entirely disposed) on the via layer VIA except for the position where the first connection electrode CNE1 is disposed. The third insulating layer PAS3 may insulate the first connection electrode CNE1 and the second connection electrode CNE2 from each other so that they may not directly contact each other.

[0149] For example, another insulating layer may be further disposed on the third insulating layer PAS3 and the first connection electrode CNE1. The insulating layer may protect elements disposed on the first substrate SUB from external environments.

[0150] Each of the above-mentioned first insulating layer PAS1, second insulating layer PAS2 and third insulating layer PAS3 may include an inorganic insulating material or an organic insulating material. For example, each of the first insulating layer PAS1, second insulating layer PAS2 and third insulating layer PAS3 may include an inorganic insulating material. In another example, the first insulating layer PAS1 and the third insulating layer PAS3 may include an inorganic insulating material, and the second insulating layer PAS2 may include an organic insulating material. Each of the first insulating layer PAS1, second insulating layer PAS2 and third insulating layer PAS3 or at least one of the first insulating layer PAS1, second insulating layer PAS2 and third insulating layer PAS3 may be formed in a structure in which insulating layers are alternately or repeatedly stacked on each other. According to an embodiment, each of the first insulating layer PAS1, second insulating layer PAS2 and third insulating layer PAS3 may be made of silicon oxide (SiO x ), Silicon Nitride (SiN x ) and silicon oxynitride (SiO x N y ). The first insulating layer PAS1, the second insulating layer PAS2, and the third insulating layer PAS3 may be made of the same material. In another example, some of the first insulating layer PAS1, the second insulating layer PAS2, and the third insulating layer PAS3 may be made of the same material, and the others may be made of different materials, or the first insulating layer PAS1, the second insulating layer PAS2, and the third insulating layer PAS3 may be made of different materials.

[0151] Figure 7 is a schematic diagram showing a light emitting element according to an embodiment.

[0152] Reference Figure 7, the light emitting element ED may be a light emitting diode. For example, the light emitting element ED may have a size in the nanometer to micrometer range and may be an inorganic light emitting diode made of an inorganic material. When polarity is generated by forming an electric field in a specific direction between two electrodes, the light emitting element ED may be aligned between two electrodes facing each other.

[0153] The light emitting element ED according to the embodiment may have a shape extending in one direction. The light emitting element ED may have a shape of a cylinder, a rod, a wire, a tube, etc. It should be noted that the shape of the light emitting element ED is not limited thereto. The light emitting element ED may have various shapes, including a polygonal column shape such as a cube, a cuboid, and a hexagonal column, or a shape extending in one direction with a partially inclined outer surface.

[0154] The light emitting element ED may include a semiconductor layer doped with a dopant of a conductive type (e.g., p-type or n-type). The semiconductor layer may emit light of a specific wavelength band by transmitting an electrical signal applied from an external power source. The light emitting element ED may include a first semiconductor layer 31, a second semiconductor layer 32, an emission layer 36, an electrode layer 37, and an insulating film 38.

[0155] The first semiconductor layer 31 may be an n-type semiconductor. The first semiconductor layer 31 may include a semiconductor material having the following chemical formula: Al x Ga y In 1-x-y N(0≤x≤1, 0≤y≤1, 0≤x+y≤1). For example, the first semiconductor layer 31 may be one or more of AlGaInN, GaN, AlGaN, InGaN, AlN, and InN doped with an n-type dopant. The n-type dopant doped into the first semiconductor layer 31 may be Si, Ge, Se, Sn, or the like.

[0156] The second semiconductor layer 32 may be disposed above the first semiconductor layer 31, and the emission layer 36 may be between the second semiconductor layer 32 and the first semiconductor layer 31. The second semiconductor layer 32 may be a p-type semiconductor, and may include a semiconductor material having the following chemical formula: Al x Ga y In 1-x-y N(0≤x≤1, 0≤y≤1, 0≤x+y≤1). For example, the second semiconductor layer 32 may be one or more of AlGaInN, GaN, AlGaN, InGaN, AlN, and InN doped with a p-type dopant. The p-type dopant doped into the second semiconductor layer 32 may be Mg, Zn, Ca, Ba, or the like.

[0157] Although each of the first semiconductor layer 31 and the second semiconductor layer 32 is implemented as a signal layer in the drawings, the embodiment is not limited thereto. Depending on the material of the emission layer 36, the first semiconductor layer 31 and the second semiconductor layer 32 may also include a greater number of layers (e.g., a capping layer or a tensile strain barrier reduction (TSBR) layer). For example, the light emitting element ED may also include another semiconductor layer disposed between the first semiconductor layer 31 and the emission layer 36 or between the second semiconductor layer 32 and the emission layer 36. The semiconductor layer disposed between the first semiconductor layer 31 and the emission layer 36 may be one or more of AlGaInN, GaN, AlGaN, InGaN, AlN, InN, and SLs doped with an n-type dopant. The semiconductor layer disposed between the second semiconductor layer 32 and the emission layer 36 may be one or more of AlGaInN, GaN, AlGaN, InGaN, AlN, and InN doped with a p-type dopant.

[0158] The emission layer 36 may be disposed between the first semiconductor layer 31 and the second semiconductor layer 32. The emission layer 36 may include a material having a single quantum well structure or a multiple quantum well structure. In the case where the emission layer 36 includes a material having a multiple quantum well structure, the structure may include quantum layers and well layers stacked alternately with each other. The emission layer 36 may emit light when electron-hole pairs are recombined therein in response to an electrical signal applied through the first semiconductor layer 31 and the second semiconductor layer 32. The emission layer 36 may include materials such as AlGaN, AlGaInN, and InGaN. For example, in the case where the emission layer 36 has a multiple quantum well structure in which quantum layers and well layers are stacked alternately with each other, the quantum layers may include AlGaN or AlGaInN, and the well layers may include materials such as GaN and AlGaN.

[0159] The emission layer 36 may have a structure in which semiconductor materials having a large energy band gap and semiconductor materials having a small energy band gap are alternately stacked with each other, and may include other III-group to V-group semiconductor materials according to the wavelength range of the emitted light. Therefore, the light emitted from the emission layer 36 is not limited to the light in the blue band. In some implementations, the emission layer 36 may emit light in the red or green band.

[0160] The electrode layer 37 may be an ohmic connection electrode. However, the embodiment is not limited thereto. The electrode layer 37 may be a Schottky connection electrode. The light emitting element ED may include at least one electrode layer 37. The light emitting element ED may include one or more electrode layers 37. However, the embodiment is not limited thereto. The electrode layer 37 may be omitted.

[0161] In the case where the light emitting element ED is electrically connected to an electrode or a connection electrode in the display device 10, the electrode layer 37 can reduce the resistance between the light emitting element ED and the electrode or the connection electrode. The electrode layer 37 may include a metal having conductivity. For example, the electrode layer 37 may include at least one of aluminum (Al), titanium (Ti), indium (In), gold (Au), silver (Ag), ITO, IZO, and ITZO.

[0162] The insulating film 38 may be provided to surround the outer surfaces of the semiconductor layer and the electrode layer. For example, the insulating film 38 may be provided to surround at least the outer surface of the emission layer 36, and may expose the ends (e.g., opposite ends) of the light emitting element ED in the longitudinal direction. For example, a portion of the upper surface of the insulating film 38 adjacent to at least one of the ends of the light emitting element ED may be circular in cross section.

[0163] The insulating film 38 may include a material having insulating properties, for example, silicon oxide (SiO x ), Silicon Nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum nitride (AlN x ), aluminum oxide (AlO x )、ZrO x ), hafnium oxide (HfO x ) and titanium oxide (TiO x ). Although the insulating film 38 is formed as a single layer in the drawings, the embodiment is not limited thereto. In some embodiments, the insulating film 38 may be composed of a multilayer structure in which a plurality of layers are stacked on each other.

[0164] The insulating film 38 can protect the semiconductor layer and the electrode layer of the light emitting element ED. The insulating film 38 can prevent an electrical short circuit from occurring in the emission layer 36 when the emission layer 36 is in direct contact with an electrode through which an electrical signal is transmitted to the light emitting element ED. For example, the insulating film 38 can prevent a decrease in light emitting efficiency.

[0165] For example, the outer surface of the insulating film 38 may be surface treated. The light emitting elements ED may be dispersed in ink, and the ink may be sprayed onto the electrode. In doing so, the insulating film 38 may be surface treated so that the insulating film 38 may become hydrophobic or hydrophilic to prevent the light emitting elements ED dispersed in the ink from aggregating with each other.

[0166] The light emitting element ED may be manufactured by growing a semiconductor layer on a wafer to form an electrode layer 37 and an insulating film 38 and by separating the light emitting element ED from the wafer. In the case where the light emitting element ED is separated from the wafer, some of the light emitting elements ED may be long or short, and thus the particle size of the light emitting element ED may become uneven (or different). In the case where the particle size of the light emitting element ED is uneven (or different), a structural problem may occur (for example, the light emitting element ED may not be connected to the connection electrode CNE or may be improperly aligned on the first substrate SUB), which may cause defects. In order to solve this problem, the light emitting element ED may have a uniform particle size (or substantially the same specific size) by screening out the light emitting elements ED having different sizes (or uneven particle sizes) among the light emitting elements ED.

[0167] Hereinafter, a particle separation device for separating light emitting elements ED of different particle sizes is disclosed.

[0168] Figure 8 is a schematic perspective view showing a particle separation apparatus according to an embodiment. Fig. 9 It is shown Figure 8 A schematic perspective view of the structure of a particle separation device excluding the main body. Fig.10 It is shown Fig. 9 Schematic plan view of a particle separation device. Fig.11 It is shown Fig. 9 Schematic cross-sectional view of a microchannel of a particle separation device. Fig.12 It is shown Fig. 9 Schematic perspective view of a vortex generator of a particle separation device. Fig.13 It is shown in Fig. 9 Schematic diagram of a first inlet of a particle separation device without a vortex generator in operation. Fig.14 It is shown in Fig. 9 Schematic diagram of a first inlet of a particle separation device with a vortex generator in operation.

[0169] Reference Figures 8 to 14, the particle separation device 200 may be a microfluidic chip that separates the light emitting elements ED according to the size of the light emitting elements ED. The particle separation device 200 may include a base portion 190, a microchannel 280 disposed in the base portion 190, an inlet portion ILP (e.g., 210 and 220) disposed at the end of the microchannel 280, an inlet flow path IFP (e.g., 230, 240, and 250) connecting the inlet portion ILP and the microchannel 280, an outlet portion OUP (e.g., 330, 340, and 350) disposed at the other end of the microchannel 280, an outlet flow path OFP (e.g., 300, 310, and 320) connecting the outlet portion OUP and the microchannel 280, and a vortex generator 400 disposed under the inlet portion ILP.

[0170] The base part 190 may form the body of the particle separation device 200 and may be implemented in the form of a microfluidic chip. The microchannel 280, the inlet portion ILP, the inlet flow path IFP, the outlet portion OUP, and the outlet flow path OFP may be provided in the base part 190. For example, the vortex generator 400 may be provided at the lower side of the base part 190.

[0171] The base part 190 may be manufactured by a mold injection process, a 3D printing process, etc. For example, the base part 190 may be manufactured by a process of manufacturing a mold, injecting a paste mixed with polydimethylsiloxane (PDMS) and a curing agent into the mold, and then curing it.

[0172] The microchannel 280 may extend in one direction within the base portion 190. The microchannel 280 may be formed in a rectangular shape so that a lift force from a wall may play a major role to promote separation of particles.

[0173] The microchannel 280 may have a specific length, a specific width, and a specific height so that the light emitting element ED may be easily separated. The length d1 of the microchannel 280 may be about 15 mm to about 25 mm. When the length of the microchannel 280 is in the above range, the light emitting element ED in the microchannel 280 may easily reach an equilibrium position and provide sufficient length to overcome the elastic lift force. For example, the microchannel 280 may have a ratio of a height h1 to a width w1 in the range of about 2 to about 3. When the ratio of the height h1 to the width w1 of the microchannel 280 is in the above range, an interface between a viscoelastic fluid and a Newtonian fluid may be easily formed, and the light emitting element ED may be easily moved. The width w1 of the microchannel 280 may be in the range of about 20 μm to about 30 μm, and the height h1 may be in the range of about 50 μm to about 70 μm. According to an embodiment, the length d1 of the microchannel 280 may be about 15 mm, the width w1 may be about 20 μm, and the height h1 may be about 50 μm. However, the embodiment is not limited thereto. These values ​​may vary within the above range.

[0174] The inlet portion ILP may be disposed at the end of the microchannel 280. The inlet portion ILP may include a first inlet 210 and a second inlet 220 separated from each other. The first inlet 210 may be an injection port through which the light emitting element ED and the Newtonian fluid are injected. The first inlet 210 may be disposed farther away from the microchannel 280 than the second inlet 220, but the embodiment is not limited thereto. The second inlet 220 may be an injection port through which a viscoelastic fluid (or a non-Newtonian fluid) is injected. According to an embodiment, the density of the light emitting element ED may be about 4 g / cm 3 About 10g / cm 3 . The Newtonian fluid may be deionized (DI) water, and the viscoelastic fluid may be a polyethylene oxide (PEO) solution. The PEO solution may be a solution in which PEO is mixed with water, and the concentration of PEO may be about 50 ppm to about 300 ppm. The molecular weight of PEO may be in the range of about 500 kDa to about 700 kDa. However, embodiments are not limited thereto. The Newtonian fluid may be implemented as alcohol, etc., and the viscoelastic fluid may be implemented as any other substance.

[0175] The inlet flow path IFP may be disposed between the inlet portion ILP and the microchannel 280. The inlet flow path IFP may include a first inlet path (or first injection channel) 230, a second inlet path (or second injection channel) 240, and a third inlet path (or third injection channel) 250.

[0176] The first inlet path 230 and the second inlet path 240 may branch from the first inlet 210 and may extend to the microchannel 280. The first inlet path 230 and the second inlet path 240 may be flow channels through which the light emitting element ED and the Newtonian fluid move. For example, in a plan view, the first inlet path 230 and the second inlet path 240 may extend to surround the second inlet 220, and the second inlet 220 is between the first inlet path 230 and the second inlet path 240, and the first inlet path 230 and the second inlet path 240 may also surround the third inlet path 250.

[0177] The third inlet path 250 may extend from the second inlet 220 to the microchannel 280. The third inlet path 250 may be a flow channel through which the viscoelastic fluid moves. The first inlet path 230, the second inlet path 240, and the third inlet path 250 may be combined / joined at an end of the microchannel 280.

[0178] The first inlet path 230 and the second inlet path 240 may each have a diameter of about 20 μm to about 40 μm. When the diameter of each of the first inlet path 230 and the second inlet path 240 is within the above range, the light emitting element ED may be prevented from settling in the first inlet path 230 and the second inlet path 240. According to an embodiment, the first inlet path 230 and the second inlet path 240 may each have a diameter of about 20 μm.

[0179] The outlet flow path OFP may be provided between the outlet portion OUP and the microchannel 280. The outlet flow path OFP may include a first outlet path (or first exhaust channel) 300, a second outlet path (or second exhaust channel) 310, and a third outlet path (or third exhaust channel) 320.

[0180] The first outlet path 300 may extend from the other end of the microchannel 280 to the first outlet 330 of the outlet part OUP. The first outlet path 300 may be a flow channel through which the light emitting element ED and the Newtonian fluid separated in the microchannel 280 move. The first outlet path 300 may be disposed at one side (e.g., right side) of the microchannel 280 with respect to the fluid flow direction in the microchannel 280.

[0181] The second outlet path 310 may extend from the other end of the microchannel 280 to the second outlet 340 of the outlet part OUP. The second outlet path 310 may be a flow channel through which the light emitting element ED and the Newtonian fluid separated in the microchannel 280 move. The second outlet path 310 may be disposed at the other side (e.g., the left side) of the microchannel 280 with respect to the fluid flow direction within the microchannel 280.

[0182] The third outlet path 320 may extend from the other end of the microchannel 280 to the third outlet 350 of the outlet portion OUP. The third outlet path 320 may be a flow channel through which the light emitting element ED and the viscoelastic fluid separated in the microchannel 280 move. The third outlet path 320 may extend along the direction along which the microchannel 280 extends. The diameter of the third outlet path 320 may be larger than the diameters of the first outlet path 300 and the second outlet path 310. The diameter of the third outlet path 320 may be about 100 μm to about 300 μm. According to an embodiment, the diameter of the third outlet path 320 may be about 210 μm.

[0183] The angle θ formed by the microchannel 280 and the first outlet path 300 or the angle θ formed by the microchannel 280 and the second outlet path 310 may be in the range of about 150° to about 165°. In the case where the angle θ formed by the microchannel 280 and the first outlet path 300 or the angle θ formed by the microchannel 280 and the second outlet path 310 is within the above range, the normal light emitting element EDN (see Fig.15 ) and abnormal light emitting element EDB (see Fig.15 )Separation.

[0184] The outlet portion OUP may be provided at the other end of the microchannel 280. The outlet portion OUP may extend from the outlet flow path OFP connected to the other end of the microchannel 280. The outlet portion OUP may include a first outlet 330, a second outlet 340, and a third outlet 350 separated from each other.

[0185] The first outlet 330 may be a discharge port through which the light emitting element ED and the Newtonian fluid are discharged. The first outlet 330 may extend from the first outlet path 300. The second outlet 340 may be a discharge port through which the light emitting element ED and the Newtonian fluid are discharged. The second outlet 340 may extend from the second outlet path 310. The third outlet 350 may be a discharge port through which the light emitting element ED and the viscoelastic fluid are discharged. The third outlet 350 may extend from the third outlet path 320.

[0186] Reference Fig.12, the vortex generator 400 may be disposed at the lower side of the base portion 190. The vortex generator 400 may be disposed at the lower side of the base portion 190 to overlap with the first inlet 210 of the inlet portion ILP. The vortex generator 400 may generate a surface acoustic wave (SAW). A surface acoustic wave (SAW) may be an elastic wave that travels / transmits along the surface of a material exhibiting elasticity. A surface acoustic wave may be an elastic wave represented as the sum of a longitudinal wave propagating parallel to the vibration direction of a particle vibration and a transverse wave propagating in a direction perpendicular to the particle vibration direction. The vortex generator 400 may generate a surface acoustic wave by converting an input electrical signal into a mechanical wave propagating only on a solid surface. The vortex generator 400 may be an interdigital transducer (IDT). According to an embodiment, a surface acoustic wave may be generated into the first inlet 210 from the lower side of the base portion 190 overlapping with the first inlet 210.

[0187] The vortex current generator 400 may include a piezoelectric substrate 410 , and a first element electrode 430 and a second element electrode 460 disposed on the piezoelectric substrate 410 .

[0188] The piezoelectric substrate 410 may be made of, for example, lithium niobate (LiNbO 3 ), Quartz (SiO 2 ) and barium titanate (BaTiO 3 ) is made of piezoelectric material. Piezoelectric materials can generate electrical signals when pressure is applied, and can generate vibrations when electrical signals are applied.

[0189] The first element electrode 430 and the second element electrode 460 can generate a surface acoustic wave, which is transmitted to the piezoelectric substrate 410 and propagates along the surface. For example, the first element electrode 430 and the second element electrode 460 can be implemented as interdigital transducer (IDT) electrodes. When an electrical signal is applied to these electrodes, the piezoelectric substrate 410 can expand / contract due to the piezoelectric effect, thereby generating a surface acoustic wave.

[0190] The first element electrode 430 and the second element electrode 460 may have a comb pattern. The frequency of the excitation wave may be determined based on the pitch of the comb pattern. The first element electrode 430 may be disposed on one side of the piezoelectric substrate 410, and the second element electrode 460 may be disposed on the opposite side of the piezoelectric substrate 410. Each of the first element electrode 430 and the second element electrode 460 may have a branch shape, and when viewed from the top (or in a plan view), the branches of each electrode may be arranged alternately with each other.

[0191] The first element electrode 430 and the second element electrode 460 may include a conductive material. The conductive material may include, for example, aluminum or gold. For example, the first element electrode 430 and the second element electrode 460 may further include a metal layer such as chromium to increase the bonding strength with the piezoelectric substrate 410.

[0192] When an electrical signal is applied to the first element electrode 430 and the second element electrode 460, dynamic strain can be generated in the piezoelectric substrate 410, and these elastic waves can travel / propagate in a direction perpendicular to the first element electrode 430 and the second element electrode 460. The electrical signal can be converted into a surface acoustic wave by the piezoelectric effect. The electrical signal can be an alternating current (AC) electrical signal with a frequency in a radio frequency (RF) band. The speed of the surface acoustic wave can be determined by the density and elastic coefficient of the piezoelectric substrate 410. According to an embodiment, the frequency of the surface acoustic wave can be in the range of about 10 MHz to about 300 MHz.

[0193] Reference Fig.13 and Fig.14 , in the case where the light emitting element ED is injected into the first inlet 210 of the particle separation device 200 together with the Newtonian fluid, the light emitting element ED having a high density can settle on the lower side of the first inlet 210. In the case where an electrical signal is applied to the first element electrode 430 and the second element electrode 460 of the vortex generator 400, a surface acoustic wave can be generated in the piezoelectric substrate 410 and can travel to the lower side of the first inlet 210. In the case where the surface acoustic wave is transmitted to the Newtonian fluid, an acoustic flow that drives the Newtonian fluid to flow can be generated. For example, a vortex can be generated in the Newtonian fluid by the acoustic flow, so that the settled light emitting element ED can be dispersed. Therefore, the settlement and aggregation of the light emitting element ED on the lower side of the first inlet 210 can be prevented or the settlement and aggregation of the light emitting element ED on the lower side of the first inlet 210 can be minimized.

[0194] The particle separation device 200 can separate the light emitting element ED by using a crown micromachine. The light emitting element ED can be manufactured by growing on a wafer substrate and separating from the wafer substrate. In the case where the light emitting element ED is separated from the wafer substrate, an abnormal light emitting element EDB may be formed. For example, some of the light emitting elements ED may be longer, or several light emitting elements ED may adhere (or adhere) together. The abnormal light emitting element EDB causes a light emitting defect in the display device 10.

[0195] Fig.15 is a schematic plan view showing a microchannel of a particle separation apparatus according to an embodiment. Fig.16 It is shown Fig.15 Schematic plan view of area A. Fig.17 It is shown Fig.15 Schematic plan view of area B. Fig.18It is shown Fig.15 Schematic plan view of area C.

[0196] Combination Fig. 9 For reference Fig.15 , Fig.16 , Fig.17 and Fig.18 , a method of separating particles by using the particle separation apparatus 200 according to the embodiment will be described as follows.

[0197] The Newtonian fluid in which the light emitting elements ED are dispersed may be injected into the first inlet 210 of the inlet portion ILP. By injecting the Newtonian fluid in which the light emitting elements ED are dispersed at a flow rate in the range of about 20 μL / min to about 30 μL / min, the light emitting elements ED may be more effectively separated. The viscoelastic fluid may be injected into the second inlet 220 of the inlet portion ILP. The ratio of the flow rate of the Newtonian fluid in which the light emitting elements ED are dispersed to the flow rate of the viscoelastic fluid may be in the range of about 3 to about 7.

[0198] The Newtonian fluid injected through the first inlet 210 may be injected into the microchannel 280 through the first inlet path 230 and the second inlet path 240. The viscoelastic fluid injected through the second inlet 220 may be injected into the microchannel 280 through the third inlet path 250.

[0199] In the vortex generator 400, an alternating current (AC) electric signal may be applied to the first element electrode 430 and the second element electrode 460 to generate a surface acoustic wave. The surface acoustic wave may travel to the first inlet 210 to generate an acoustic flow vortex in the Newtonian fluid at the first inlet 210. Therefore, the light emitting element ED injected into the first inlet 210 may be easily injected into the microchannel 280 without settling or agglomerating.

[0200] In the microchannel 280 , the Reynolds number of the fluid may be in the range of about 1 to about 100.

[0201] The Reynolds number can be expressed by the following equation:

[0202]

[0203] Here, μ represents the viscosity of the fluid, ρ represents the density of the fluid, V represents the velocity of the fluid, and L represents the length of the microchannel 280 .

[0204] When the Reynolds number of the fluid is within the above range, the light emitting element ED can move nonlinearly and irreversibly due to the inertial force, so that the normal light emitting element EDN can be separated from the abnormal light emitting element EDB. Here, the abnormal light emitting element EDB refers to a light emitting element that is relatively larger than the normal light emitting element EDN. For example, the abnormal light emitting element EDB may refer to a longer light emitting element or several light emitting elements that are not separated but adhered together.

[0205] The manner in which the normal light emitting elements EDN and the abnormal light emitting elements EDB are separated from each other in the microchannel 280 will be described in more detail.

[0206] like Fig.16 As shown in FIG. 2 , the light emitting element ED can be aligned near the wall due to the viscoelastic fluid at the entrance of the microchannel 280. The light emitting element ED aligned near the wall is lifted by the wall-induced lift force F li Move toward the central part of microchannel 280. At this time, the wall lift force F li It can be proportional to the sixth power of the particle size, so the anomalous light-emitting element EDB with a larger size reaches the viscoelastic / Newtonian fluid interface earlier.

[0207] like Fig.17 As shown in FIG. , when the light emitting element ED approaches the viscoelastic / Newtonian fluid interface, an elastic lift force F due to the viscoelastic fluid can be generated. el Due to the elastic lift F el , the normal light emitting element EDN may not pass through the viscoelastic / Newtonian fluid interface. For example, due to the wall lift force F li Specific elastic lift F el The effect is much more dominant, so the abnormal light emitting element EDB can overcome the elastic lift F el , and thus crosses the viscoelastic / Newtonian fluid interface.

[0208] like Fig.18 As shown in el and wall lift F li When the direction of the anomalous light emitting element EDB passes through the viscoelastic / Newtonian fluid interface, the elastic lift F el The abnormal light emitting element EDB can generate an equilibrium position together with the shear gradient lift force and can move along the viscoelastic fluid. The normal light emitting element EDN remaining in the Newtonian fluid can be separated from the abnormal light emitting element EDB by forming a gap in the lateral displacement direction while moving in the direction of the viscoelastic fluid.

[0209] For example, the gap between the normal light emitting element EDN and the abnormal light emitting element EDB may be increased in the outlet flow path OFP branching into the first outlet 330 , the second outlet 340 , and the third outlet 350 , so that the normal light emitting element EDN may be separated from the abnormal light emitting element EDB.

[0210] For example, the normal light emitting element EDN and the Newtonian fluid may be discharged to the first outlet 330 through the first outlet path 300 and to the second outlet 340 through the second outlet path 310. The abnormal light emitting element EDB and the viscoelastic fluid may be discharged to the third outlet 350 through the third outlet path 320.

[0211] As described above, the particle separation device 200 can separate abnormal light emitting elements EDB from normal light emitting elements EDN by using Newtonian fluid and viscoelastic fluid. For example, the particle separation device 200 can eliminate sedimentation and aggregation of light emitting elements ED by arranging the vortex generator 400 at the inlet portion ILP.

[0212] By using the particle separation device 200, a large number of light emitting elements ED can be separated at high speed.

[0213] Fig.19 is a schematic block diagram showing a large-scale particle separation apparatus according to an embodiment.

[0214] Reference Fig.19 , the large-scale particle separation device 500 may include an ink supply unit 510 , a particle separation device 200 , and an ink recovery unit 550 .

[0215] The ink supply unit 510 may supply the light emitting element ED and the Newtonian fluid to the particle separation apparatus 200. Similar to a large tank, the ink supply unit 510 may store and supply a large amount of the light emitting element ED and the Newtonian fluid.

[0216] The particle separation device 200 may receive the light emitting elements ED and the Newtonian fluid from the ink supply unit 510. The light emitting elements ED and the Newtonian fluid supplied from the ink supply unit 510 may be distributed to each particle separation device 200 so that a large number of light emitting elements ED may be separated simultaneously.

[0217] The ink recovery unit 550 may obtain the Newtonian fluid including the separated normal light emitting elements EDN from the particle separation device 200. The ink recovery unit 550 may be connected to the particle separation device 200, and may store the Newtonian fluid including a large number of light emitting elements ED.

[0218] While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will be described in detail herein. However, it should be understood that the drawings and their detailed description are not intended to limit the invention to the particular forms disclosed, but on the contrary, the invention is intended to cover all modifications, equivalents and alternatives falling within the spirit and scope of the invention as defined by the appended claims.

[0219] < Example: Figure 8 Manufacturing of particle separation equipment>

[0220] Figure 8 The particle separation device 200 shown in can be manufactured by using a polydimethylsiloxane (PDMS) mold. The width of the microchannel 280 can be about 20 μm, the height can be about 50 μm, and the length can be about 15 mm. The diameter of the first inlet path 230 and the second inlet path 240 can be about 30 μm, and the diameter of the third inlet path 250 can be about 20 μm. The angle between the microchannel 280 and the first outlet path 300 and the angle between the microchannel 280 and the second outlet path 310 can be about 165°. The angle between the first outlet path 300 and the third outlet path 320 and the angle between the second outlet path 310 and the third outlet path 320 can be about 15°. The diameter of the first outlet path 300 and the second outlet path 310 can be about 50 μm, and the diameter of the third outlet path 320 can be about 210 μm. The vortex generator 400 can be arranged under the first inlet 210.

[0221] <Example 1>

[0222] The particles may be mixed with water (eg, a Newtonian fluid) and injected into the first inlet 210 at a flow rate of about 5 μL / min. Particles having diameters of about 2 μm and about 3 μm may be used, and 2×10 7 A polyethylene oxide (PEO) solution having a molecular weight of about 600 kDa may be injected into the second inlet 220 as a viscoelastic fluid at a concentration of about 100 ppm, and the particles may be separated by injecting it at a flow rate of about 20 μL / min.

[0223] <Example 2>

[0224] Particles may be separated under the same conditions as in Example 1, except that the viscoelastic fluid may be injected at a flow rate of about 30 μL / min.

[0225] <Experimental Example>

[0226] Evaluation of particle settling and separation

[0227] Separation of particles according to Example 1 and Example 2 can be observed, and settling of particles according to whether the vortex generator 400 can be operated can be observed in Example 1.

[0228] Fig. 20 is an image of the inlet portion ILP of the particle separation apparatus 200 according to Embodiment 1 in a case where the vortex generator 400 is not operated. Fig.21 : is an image of the inlet portion ILP of the particle separation apparatus 200 according to Embodiment 1 in a case where the vortex generator 400 operates. Fig. 22 is an image of the outlet flow path OFP of the particle separation device 200 according to Embodiment 1. Fig.23 is an image of an outlet flow path OFP of a particle separation device 200 according to Embodiment 2. Fig. 22 and Fig.23 Cumulative images captured every second are shown, wherein white images are particles having a diameter of about 3 μm and black images are particles having a diameter of about 2 μm.

[0229] exist Fig. 20 and Fig.21 It is shown in the figure that when the vortex generator 400 is not operating, particles will settle on the lower side of the first inlet 210 of the inlet part ILP, but when the vortex generator 400 is operating to generate surface acoustic waves, the particles settled at the lower side of the first inlet 210 of the inlet part ILP can be removed.

[0230] Based on the results, it is shown that the particle separation apparatus 200 equipped with the vortex generator 400 can prevent particles from settling and agglomerating at the inlet portion ILP.

[0231] For example, Fig. 22 and Fig.23 As shown in FIG. 1 , larger particles having a diameter of about 3 μm may move to the third outlet path 320 in the outlet flow path OFP of the particle separation device 200 , respectively, while smaller particles having a diameter of about 2 μm may move to the first outlet path 300 and the second outlet path 310 .

[0232] In summarizing the detailed description, it will be appreciated by those skilled in the art that many changes and modifications may be made to the embodiments without departing substantially from the principles of the invention. Therefore, the embodiments of the disclosed invention are used in a general and descriptive sense only and not for the purpose of limitation.

Claims

1. A particle separation device, the particle separation device include: basal part; A microchannel is disposed in the base portion; an inlet portion, disposed at an end of the microchannel, through which the light emitting element, the Newtonian fluid and the viscoelastic fluid are injected; an inlet flow path connecting the inlet portion and the microchannel; an outlet portion disposed at opposite ends of the microchannel, from which the light emitting element, the Newtonian fluid, and the viscoelastic fluid are discharged; an outlet flow path connecting the microchannel and the outlet portion; as well as A vortex generator is disposed under the inlet portion, the vortex generator generating a surface acoustic wave.

2. The particle separation device according to claim 1, in, The vortex generator comprises: a piezoelectric substrate; and The first element electrodes and the second element electrodes are provided on the piezoelectric substrate and are arranged alternately with each other in a plan view.

3. The particle separation device according to claim 2, in, The electric signal applied to the first element electrode and the second element electrode is an alternating current signal.

4. The particle separation device according to claim 1, in, The frequency of the surface acoustic waves is in the range of 10 MHz to 300 MHz.

5. The particle separation device according to claim 1, in, The microchannel has a height to width ratio in the range of 2 to 3.

6. The particle separation device according to claim 5, in, The width of the microchannel is in the range of 20 μm to 30 μm.

7. The particle separation device according to claim 1, in, The length of the microchannel is in the range of 15 mm to 25 mm.

8. The particle separation device according to claim 1, in, The inlet portion includes: a first inlet through which the Newtonian fluid in which the light emitting elements are dispersed is injected; and a second inlet through which the viscoelastic fluid is injected, and The vortex generator is disposed below the first inlet.

9. The particle separation device according to claim 8, in, A ratio of a flow rate of the Newtonian fluid to a flow rate of the viscoelastic fluid is in the range of 3 to 7.

10. The particle separation device according to claim 9, in, The flow rate of the Newtonian fluid is in the range of 20 μL / min to 30 μL / min.

11. The particle separation device according to claim 8, in, The inlet flow path includes: a first inlet path and a second inlet path connected to the first inlet, through which the light emitting element and the Newtonian fluid move; and a third inlet path connected to the second inlet, through which the viscoelastic fluid moves, and The first inlet path and the second inlet path surround the third inlet path.

12. The particle separation device according to claim 11, in, A diameter of each of the first inlet path and the second inlet path is in a range of 20 μm to 40 μm.

13. The particle separation device according to claim 1, in, The outlet portion includes: a first outlet and a second outlet, from which small light-emitting elements among the light-emitting elements and the Newtonian fluid are discharged; and a third outlet, from which large light-emitting elements among the light-emitting elements and the viscoelastic fluid are discharged, and The first outlet, the second outlet, and the third outlet are spaced apart from each other.

14. The particle separation device according to claim 13, in, The outlet flow path includes: a first outlet path connecting the microchannel and the first outlet; a second outlet path connecting the microchannel and the second outlet; and a third outlet path connecting the microchannel and the third outlet, and The first outlet path, the second outlet path, and the third outlet path branch from the opposite ends of the microchannel.

15. The particle separation device according to claim 14, in, An angle between the microchannel and the first outlet path is in the range of 150 degrees to 165 degrees.

16. A method for separating light emitting elements having different sizes, the method comprising: include: A particle separation device is provided, the particle separation device comprising: a microchannel disposed in a base portion; an inlet portion disposed at an end of the microchannel, the inlet portion comprising a first inlet through which the light emitting element and the Newtonian fluid are injected and a second inlet through which the viscoelastic fluid is injected; an inlet flow path connecting the inlet portion and the microchannel; an outlet portion disposed at opposite ends of the microchannel, from which the light emitting element, the Newtonian fluid and the viscoelastic fluid are discharged; an outlet flow path connecting the microchannel and the outlet portion; and a vortex generator disposed under the inlet portion; injecting the Newtonian fluid in which the light emitting elements are dispersed into the microchannel through the first inlet, and injecting the viscoelastic fluid into the microchannel through the second inlet; generating a surface acoustic wave by the vortex generator to propagate the surface acoustic wave to the first inlet; separating normal light-emitting elements from abnormal light-emitting elements in the microchannel; and The normal light emitting element and the Newtonian fluid are discharged to the outlet portion through the outlet flow path, and the abnormal light emitting element and the viscoelastic fluid separated from the normal light emitting element in the microchannel are discharged to the outlet portion through the outlet flow path.

17. The method according to claim 16, in, The surface acoustic waves generate an acoustic stream that drives the flow of the Newtonian fluid moving in the first inlet, and A vortex is generated in the Newtonian fluid by the acoustic stream to disperse the light emitting element.

18. The method according to claim 16, in, The outlet flow path includes a first outlet path, a second outlet path, and a third outlet path branching from the microchannel, and The outlet portion includes a first outlet connected to the first outlet path, a second outlet connected to the second outlet path, and a third outlet connected to the third outlet path.

19. The method according to claim 18, in, The normal light emitting element and the Newtonian fluid separated in the microchannel are discharged to the first outlet through the first outlet path, and are discharged to the second outlet through the second outlet path, and The abnormal light emitting element and the viscoelastic fluid are discharged to the third outlet through the third outlet path.

20. The method according to claim 16, in, The abnormal light emitting element among the light emitting elements has a size larger than that of the normal light emitting element.

Images