Groove type MOSFET structure and forming method thereof
By using high dielectric constant materials and metal materials in the trench type MOSFET structure, adjusting the thickness of the gate dielectric layer, the problem of high electric field of the gate dielectric layer is solved, the probability of breakdown is reduced, the manufacturing process is simplified and efficiency is improved and reliability.
Patent Information
- Application Number
- CN202411455661.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-17
- Publication Date
- 2024-12-10
AI Technical Summary
In the trench type MOSFET structure, the gate dielectric layer has a high working electric field located at the corner of the bottom of the gate trench, which is prone to breakdown, resulting in reduced manufacturing efficiency and increased manufacturing cost. The existing process is complex and difficult to simplify.
Using high dielectric constant material as the gate dielectric layer and metal material as the gate conductive layer, the electric field strength is reduced by adjusting the thickness of the dielectric layer, reducing the probability of breakdown, and simplifying the manufacturing process to avoid being under the gate trench. Add depletion layer.
It effectively reduces the working electric field of the gate dielectric layer, reduces the probability of breakdown, improves the reliability of the trench MOSFET structure, simplifies the manufacturing process, improves the manufacturing efficiency and reduces the manufacturing cost.
Smart Images
Figure CN119108420A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to a trench MOSFET structure and a forming method thereof. Background Art
[0002] In the current semiconductor industry, the gate dielectric layer in the trench MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) structure based on silicon carbide wafers is mostly formed of silicon dioxide material, and the gate conductive layer is mostly formed by filling the gate trench with polysilicon. In the trench MOSFET structure composed of silicon dioxide forming the gate dielectric layer and polysilicon forming the gate conductive layer, the gate dielectric layer is the weakest link. The gate dielectric layer located at the bottom corner of the gate trench has a high working electric field and is easily broken down. In order to prevent the gate dielectric layer at the bottom corner of the gate trench from being broken down, a complex process is required to add a doped region (e.g., a P-type doped region) below the gate trench to form a depletion layer (i.e., a space charge region), thereby transferring part of the electric field in the gate dielectric layer at the bottom of the gate trench to the depletion layer, and finally achieving the effect of reducing the electric field of the gate dielectric layer at the bottom of the gate trench, and reducing the probability of the gate dielectric layer at the bottom corner of the gate trench being broken down. However, the above process is complex, resulting in reduced manufacturing efficiency of the trench MOSFET structure and increased manufacturing cost.
[0003] Therefore, how to reduce the working electric field of the gate dielectric layer at the bottom of the gate trench while simplifying the manufacturing process, thereby improving the manufacturing yield and efficiency of the trench MOSFET structure and reducing the manufacturing cost, is a technical problem that needs to be solved urgently. Summary of the invention
[0004] The present invention provides a trench MOSFET structure and a method for forming the same, which are used to simplify the manufacturing process while reducing the operating electric field of the gate dielectric layer at the bottom of the gate trench, thereby improving the manufacturing yield and efficiency of the trench MOSFET structure and reducing the manufacturing cost.
[0005] According to some embodiments, the present invention provides a trench MOSFET structure, comprising:
[0006] A substrate, the substrate comprising a top surface and a bottom surface that are oppositely distributed;
[0007] A gate trench is located in the substrate, and the gate trench extends from the top surface of the substrate to the inside of the substrate along a first direction, and the first direction intersects the top surface of the substrate perpendicularly;
[0008] A gate structure is located in the gate groove, and the gate structure includes a gate dielectric layer covering the inner wall of the gate groove and a gate conductive layer covering the surface of the gate dielectric layer and filling the gate groove. The material of the gate dielectric layer is a high dielectric constant material, and the material of the gate conductive layer is a metal material.
[0009] In some embodiments, the substrate includes a silicon carbide substrate and a silicon carbide epitaxial layer covering the surface of the silicon carbide substrate along the first direction, and the surface of the silicon carbide epitaxial layer facing away from the silicon carbide substrate serves as the top surface of the substrate;
[0010] The bottom of the gate trench exposes the silicon carbide epitaxial layer.
[0011] In some embodiments, the gate dielectric layer is a single-layer structure; or,
[0012] The gate dielectric layer includes a plurality of gate sub-dielectric layers stacked in sequence along the radial direction of the gate trench.
[0013] In some embodiments, the high dielectric constant material is any one of hafnium oxide, titanium oxide and zirconium oxide, or a combination of two or more thereof.
[0014] In some embodiments, the thickness of the gate dielectric layer is
[0015] In some embodiments, the metal material is any one of nickel, nickel-manganese alloy and tungsten, or a combination of two or more thereof.
[0016] According to some other embodiments, the present invention further provides a method for forming a trench MOSFET structure, comprising the following steps:
[0017] forming a substrate, the substrate comprising a top surface and a bottom surface disposed opposite to each other;
[0018] Etching the substrate to form a gate trench extending from the top surface of the substrate to the inside of the substrate along a first direction, wherein the first direction intersects the top surface of the substrate perpendicularly;
[0019] A gate structure is formed in the gate trench, the gate structure comprising a gate dielectric layer covering the inner wall of the gate trench and a gate conductive layer covering the surface of the gate dielectric layer and filling the gate trench, the material of the gate dielectric layer is a high dielectric constant material, and the material of the gate conductive layer is a metal material.
[0020] In some embodiments, the substrate includes a silicon carbide substrate and a silicon carbide epitaxial layer covering the surface of the silicon carbide substrate along the first direction, the silicon carbide epitaxial layer has a first doping ion, and the surface of the silicon carbide epitaxial layer facing away from the silicon carbide substrate serves as the top surface of the substrate; before etching the substrate to form a gate trench extending from the top surface of the substrate to the inside of the substrate along the first direction, the following steps are also included:
[0021] Implanting second doping ions into the silicon carbide epitaxial layer to form a body region in the silicon carbide epitaxial layer, wherein the conductivity type of the second doping ions is opposite to the conductivity type of the first doping ions;
[0022] The first doping ions are implanted into the body region to form a source region in the body region.
[0023] In some embodiments, the specific steps of etching the substrate to form a gate trench extending from the top surface of the substrate to the inside of the substrate along a first direction include:
[0024] The silicon carbide epitaxial layer is etched from the top surface of the substrate along the first direction to form the gate trench penetrating the body region and extending to below the body region.
[0025] In some embodiments, the specific steps of forming a gate structure in the gate trench include:
[0026] Depositing the high dielectric constant material into the gate trench to form the gate dielectric layer covering the inner wall of the gate trench, and the thickness of the gate dielectric layer is
[0027] The metal material is deposited into the gate trench to form a gate conductive layer covering the surface of the gate dielectric layer and filling the gate trench.
[0028] In some embodiments, the high dielectric constant material is any one of hafnium oxide, titanium oxide and zirconium oxide, or a combination of two or more thereof.
[0029] In some embodiments, the metal material is any one of nickel, nickel-manganese alloy and tungsten, or a combination of two or more thereof.
[0030] The trench MOSFET structure and its formation method provided by the present invention, by only using high dielectric constant materials to form the gate dielectric layer, and using metal materials to form the gate conductive layer, can flexibly adjust the thickness of the gate dielectric layer while the gate capacitance in the trench MOSFET structure remains unchanged, for example, the thickness of the gate dielectric layer is increased, so that the gate dielectric layer with increased thickness can be used to solve the problem of high working electric field of the gate dielectric layer at the bottom of the gate trench, reduce the probability of breakdown of the gate dielectric layer at the bottom corner of the gate trench, and reduce the leakage problem of the gate structure. Moreover, due to the advantages of high conductivity, low resistance, fast electrical signal response, low operating voltage, low power consumption and high compatibility with the high dielectric constant material of the metal material, the reliability of the trench MOSFET structure can be further improved. Moreover, since the present invention does not need to add a depletion layer below the gate trench, the manufacturing process of the trench MOSFET structure is simplified, the manufacturing efficiency is improved and the manufacturing cost is reduced. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] Figure 1 is a schematic cross-sectional view of a trench MOSFET structure in a specific embodiment of the present invention;
[0032] Figure 2 is a flow chart of a method for forming a trench MOSFET structure in a specific embodiment of the present invention;
[0033] Figure 3 is a schematic diagram of the structure of a specific embodiment of the present invention after the body region and the source region are formed;
[0034] Figure 4 is a schematic structural diagram of a specific embodiment of the present invention after a gate trench is formed;
[0035] Figure 5 It is a schematic structural diagram of a specific embodiment of the present invention after forming a gate structure. DETAILED DESCRIPTION
[0036] The specific implementation of the trench MOSFET structure and the method for forming the same provided by the present invention will be described in detail below with reference to the accompanying drawings.
[0037] This specific embodiment provides a trench MOSFET structure, Figure 1 Schematic diagram of the cross-section of a trench MOSFET structure in a specific embodiment of the present invention. Figure 1 As shown, the trench MOSFET structure comprises:
[0038] A substrate, the substrate comprising a top surface and a bottom surface that are oppositely distributed;
[0039] A gate trench 12 is located in the substrate, and the gate trench 12 extends from the top surface of the substrate to the inside of the substrate along a first direction D1, and the first direction D1 intersects the top surface of the substrate perpendicularly;
[0040] The gate structure is located in the gate groove 12, and the gate structure includes a gate dielectric layer 15 covering the inner wall of the gate groove 12 and a gate conductive layer 16 covering the surface of the gate dielectric layer 15 and filling the gate groove 12. The material of the gate dielectric layer 15 is a high dielectric constant material, and the material of the gate conductive layer 16 is a metal material.
[0041] The high dielectric constant material described in this specific embodiment refers to a material with a dielectric constant greater than that of silicon dioxide. Specifically, due to the gate capacitance (C = ￠S / kd, where C represents the gate capacitance, ￠ represents the dielectric constant, S represents the area of the capacitor plates facing each other, k represents the electrostatic force constant, and d represents the distance between the plates), only using high dielectric constant materials to form the gate dielectric layer 15 can increase the dielectric constant of the gate dielectric layer, so that the thickness of the gate dielectric layer (i.e., the distance d between the plates) can be flexibly adjusted while keeping the gate capacitance unchanged, for example, the thickness of the gate dielectric layer is increased, so that the gate dielectric layer with increased thickness can be used to solve the problem of the high working electric field of the gate dielectric layer at the bottom of the gate trench, reduce the probability of breakdown of the gate dielectric layer at the corner of the bottom of the gate trench (for example, the gate dielectric layer is not easily broken down under a high reverse bias voltage), and reduce the leakage problem of the gate structure. At the same time, the use of metal materials to form the gate conductive layer 16 can improve the compatibility of the gate conductive layer 16 with the gate dielectric layer 15, thereby further improving the reliability of the trench MOSFET structure. In addition, since the present invention does not need to add a depletion layer below the gate trench, the manufacturing process of the trench MOSFET structure is simplified, the manufacturing efficiency is improved, and the manufacturing cost is reduced.
[0042] In some embodiments, the substrate includes a silicon carbide substrate 10 and a silicon carbide epitaxial layer 11 covering the surface of the silicon carbide substrate 10 along the first direction D1, and the surface of the silicon carbide epitaxial layer 11 facing away from the silicon carbide substrate 10 serves as the top surface of the substrate;
[0043] The silicon carbide epitaxial layer 11 is exposed at the bottom of the gate trench 12 .
[0044] Specifically, the substrate includes the silicon carbide substrate 10 and the silicon carbide epitaxial layer 11 stacked on the surface of the silicon carbide substrate 10 along the first direction D1. The surface of the silicon carbide epitaxial layer 11 facing away from the silicon carbide substrate 10 serves as the top surface of the substrate, and the surface of the silicon carbide substrate 10 facing away from the silicon carbide epitaxial layer 11 serves as the bottom surface of the substrate. In one example, the silicon carbide epitaxial layer 11 has a first doping ion (e.g., an N-type ion). The trench MOSFET structure also includes a body region 13 located in the silicon carbide epitaxial layer 11, a source region 14 located in the body region 13, an isolation layer 17 located on the surface of the silicon carbide epitaxial layer 11 facing away from the silicon carbide substrate 10 and covering the gate structure, a source electrode 18 covering the isolation layer 17 and the source region 14, and a drain electrode 19 covering the surface of the silicon carbide substrate 10 facing away from the silicon carbide epitaxial layer 11. The body region 13 includes second doping ions (e.g., P-type ions), and the conductivity type of the second doping ions is opposite to the conductivity type of the first doping ions. The source region 14 includes the first doping ions. The material of the isolation layer 17 can be an oxide material, such as silicon dioxide. The material of the source electrode 18 and the material of the drain electrode 19 can both be conductive materials such as metals. The gate trench 12 extends from the surface of the silicon carbide epitaxial layer 11 away from the silicon carbide substrate 10 along the first direction D1 to the inside of the silicon carbide epitaxial layer 11, and there is no depletion layer below the gate trench 12, thereby simplifying the manufacturing process of the trench MOSFET structure, improving manufacturing efficiency and reducing manufacturing costs.
[0045] In some embodiments, the gate dielectric layer 15 is a single-layer structure; or,
[0046] The gate dielectric layer 15 includes a plurality of gate sub-dielectric layers stacked in sequence along the radial direction of the gate trench 12 .
[0047] In one example, the gate dielectric layer 15 is a single-layer structure, and the gate dielectric layer 15 only includes one high dielectric constant material, so as to further simplify the manufacturing process of the trench MOSFET structure. In another example, the gate dielectric layer 15 includes a plurality of gate sub-dielectric layers stacked in sequence along the radial direction of the gate trench 12, and the gate dielectric layer 15 includes more than two high dielectric constant materials, so as to further flexibly adjust the dielectric constant of the gate dielectric layer 15. The radial direction can be Figure 1 The second direction D2 is shown in FIG. 1 , and the second direction is parallel to the top surface of the substrate.
[0048] In some embodiments, the high dielectric constant material is any one of hafnium oxide, titanium oxide and zirconium oxide, or a combination of two or more thereof.
[0049] In some embodiments, the thickness of the gate dielectric layer 15 is
[0050] Specifically, by setting the thickness of the gate dielectric layer 15 to On the one hand, it can prevent the gate dielectric layer 15 from being too thin and failing to effectively prevent the gate dielectric layer 15 at the bottom of the gate trench 12 from being broken down; on the other hand, it can prevent the gate dielectric layer 15 from being too thick and affecting the filling of the gate conductive layer 16.
[0051] In some embodiments, the metal material is any one of nickel, nickel-manganese alloy and tungsten, or a combination of two or more thereof.
[0052] This specific embodiment also provides a method for forming a trench MOSFET structure. Figure 2 Schematic diagram of the trench MOSFET structure formed in this embodiment can be found in Figure 1 .like Figure 1 and Figure 2 As shown, the method for forming the trench MOSFET structure comprises the following steps:
[0053] Step S21, forming a substrate, wherein the substrate includes a top surface and a bottom surface that are relatively distributed;
[0054] Step S22, etching the substrate to form a gate trench 12 extending from the top surface of the substrate to the inside of the substrate along a first direction D1, wherein the first direction D1 intersects the top surface of the substrate perpendicularly;
[0055] Step S23, forming a gate structure in the gate trench 12, the gate structure includes a gate dielectric layer 15 covering the inner wall of the gate trench 12 and a gate conductive layer 16 covering the surface of the gate dielectric layer 15 and filling the gate trench 12, the material of the gate dielectric layer 15 is a high dielectric constant material, and the material of the gate conductive layer 16 is a metal material.
[0056] Figure 3 is a schematic diagram of the structure of a specific embodiment of the present invention after the body region and the source region are formed, Figure 4 is a schematic diagram of the structure of a specific embodiment of the present invention after forming a gate trench. In some embodiments, Figure 3 and Figure 4As shown, the substrate includes a silicon carbide substrate 10 and a silicon carbide epitaxial layer 11 covering the surface of the silicon carbide substrate 10 along the first direction D1, the silicon carbide epitaxial layer 11 has a first doping ion, and the surface of the silicon carbide epitaxial layer 11 away from the silicon carbide substrate 10 serves as the top surface of the substrate; before etching the substrate to form a gate trench 12 extending from the top surface of the substrate to the inside of the substrate along the first direction D1, the following steps are also included:
[0057] Implanting second doping ions into the silicon carbide epitaxial layer 11 to form a body region 13 in the silicon carbide epitaxial layer 11, wherein the conductivity type of the second doping ions is opposite to the conductivity type of the first doping ions;
[0058] The first doping ions are implanted into the body region 13 to form a source region 14 in the body region.
[0059] The following description will be made by taking the case where the first doped ions are N-type ions and the second doped ions are P-type ions as an example. For example, after the silicon carbide epitaxial layer 11 including N-type ions is formed on the surface of the silicon carbide substrate 10 by an epitaxial process, the silicon carbide substrate 10 and the silicon carbide epitaxial layer 11 are used together as the substrate. Next, an ion implantation process is used to implant P-type ions from the top surface of the substrate into the silicon carbide epitaxial layer 11 to form the body region 13 located in the silicon carbide epitaxial layer 11. The depth of the body region 13 along the first direction D1 is less than the thickness of the silicon carbide epitaxial layer 11 along the first direction D1. Afterwards, an ion implantation process is used to implant N-type ions into the body region 13 to form the source region 14 in the body region 13, the depth of which (for example, the depth along the first direction D1) is less than the depth of the body region 13 (for example, the depth along the first direction D1), as shown in FIG. Figure 3 shown.
[0060] In some embodiments, the specific steps of etching the substrate to form a gate trench 12 extending from the top surface of the substrate to the inside of the substrate along the first direction D1 include:
[0061] The silicon carbide epitaxial layer 11 is etched from the top surface of the substrate along the first direction D1 to form the gate trench 12 penetrating the body region 13 and extending to below the body region 13. Figure 4 shown.
[0062] Specifically, after forming the source region 14, there is no need to form a depletion layer in the silicon carbide epitaxial layer 11. Instead, the silicon carbide epitaxial layer 11 is directly etched using an etching process to form the gate trench 12 that penetrates the body region 13 along the first direction D1 and extends to below the body region 13, thereby simplifying the manufacturing process of the trench MOSFET structure and improving the manufacturing efficiency and manufacturing yield.
[0063] Figure 5 1 is a schematic diagram of a structure of a specific embodiment of the present invention after forming a gate structure. In some embodiments, the specific steps of forming the gate structure in the gate trench 12 include:
[0064] The high dielectric constant material is deposited into the gate trench 12 to form the gate dielectric layer 15 covering the inner wall of the gate trench 12, and the thickness of the gate dielectric layer 15 is
[0065] The metal material is deposited into the gate trench 12 to form a gate conductive layer 16 that covers the surface of the gate dielectric layer 15 and fills the gate trench 12 .
[0066] In some embodiments, the high dielectric constant material is any one of hafnium oxide, titanium oxide and zirconium oxide, or a combination of two or more thereof.
[0067] In some embodiments, the metal material is any one of nickel, nickel-manganese alloy and tungsten, or a combination of two or more thereof.
[0068] For example, after forming the gate trench 12, an atomic layer deposition process is used to deposit any one of hafnium oxide, titanium oxide and zirconium oxide or a combination of two or more materials in the gate trench 12 at a deposition temperature of 100° C. to 200° C. to form a layer with a thickness of Then, MOCVD (Metal-organic Chemical Vapor Deposition) is used to deposit any one of nickel, nickel-manganese alloy and tungsten or a combination of two or more materials in the gate trench 12 to form a gate conductive layer 16 covering the surface of the gate dielectric layer 15 and filling the gate trench 12. Figure 5As shown. Then, an oxide material (such as silicon dioxide) is deposited on the top surface of the substrate to form an isolation layer 17 located on the top surface of the substrate and covering the gate structure and part of the source region 14. Next, a first electrode material is deposited on the substrate to form a source electrode 18 covering the isolation layer 17 and the source region. After that, a second electrode material is deposited on the surface of the silicon carbide substrate 10 away from the silicon carbide epitaxial layer 11 to form a drain electrode 19 covering the surface of the silicon carbide substrate 10 away from the silicon carbide epitaxial layer 11, as shown. Figure 1 shown.
[0069] The trench MOSFET structure and its formation method provided in this specific embodiment, by only using high dielectric constant materials to form the gate dielectric layer, and using metal materials to form the gate conductive layer, can flexibly adjust the thickness of the gate dielectric layer while the gate capacitance in the trench MOSFET structure remains unchanged, for example, the thickness of the gate dielectric layer is increased, so that the gate dielectric layer with increased thickness can be used to solve the problem of high working electric field of the gate dielectric layer at the bottom of the gate trench, reduce the probability of breakdown of the gate dielectric layer at the bottom corner of the gate trench, and reduce the leakage problem of the gate structure. Moreover, due to the advantages of high conductivity, low resistance, fast electrical signal response, low operating voltage, low power consumption and high compatibility with the high dielectric constant material of the metal material, the reliability of the trench MOSFET structure can be further improved. Moreover, since this specific embodiment does not need to add a depletion layer below the gate trench, the manufacturing process of the trench MOSFET structure is simplified, the manufacturing efficiency is improved and the manufacturing cost is reduced.
[0070] The above is only a preferred embodiment of the present invention. It should be pointed out that ordinary technicians in this technical field can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.
Claims
1. A trench MOSFET structure, characterized in that: include: A substrate, the substrate comprising a top surface and a bottom surface that are oppositely distributed; A gate trench is located in the substrate, and the gate trench extends from the top surface of the substrate to the inside of the substrate along a first direction, and the first direction intersects the top surface of the substrate perpendicularly; A gate structure is located in the gate groove, and the gate structure includes a gate dielectric layer covering the inner wall of the gate groove and a gate conductive layer covering the surface of the gate dielectric layer and filling the gate groove. The material of the gate dielectric layer is a high dielectric constant material, and the material of the gate conductive layer is a metal material.
2. The trench MOSFET structure according to claim 1, characterized in that: The substrate comprises a silicon carbide substrate and a silicon carbide epitaxial layer covering the surface of the silicon carbide substrate along the first direction, wherein the surface of the silicon carbide epitaxial layer facing away from the silicon carbide substrate serves as the top surface of the substrate; The bottom of the gate trench exposes the silicon carbide epitaxial layer.
3. The trench MOSFET structure according to claim 1, characterized in that: The gate dielectric layer is a single-layer structure; or, The gate dielectric layer includes a plurality of gate sub-dielectric layers stacked in sequence along the radial direction of the gate trench.
4. The trench MOSFET structure according to claim 1, characterized in that: The high dielectric constant material is any one of hafnium oxide, titanium oxide and zirconium oxide, or a combination of two or more thereof.
5. The trench MOSFET structure according to claim 1, characterized in that: The thickness of the gate dielectric layer is 6. The trench MOSFET structure according to claim 1, characterized in that: The metal material is any one of nickel, nickel-manganese alloy and tungsten, or a combination of two or more thereof.
7. A method for forming a trench MOSFET structure, characterized in that: The steps include: forming a substrate, the substrate comprising a top surface and a bottom surface disposed opposite to each other; Etching the substrate to form a gate trench extending from the top surface of the substrate to the inside of the substrate along a first direction, wherein the first direction intersects the top surface of the substrate perpendicularly; A gate structure is formed in the gate trench, the gate structure comprising a gate dielectric layer covering the inner wall of the gate trench and a gate conductive layer covering the surface of the gate dielectric layer and filling the gate trench, the material of the gate dielectric layer is a high dielectric constant material, and the material of the gate conductive layer is a metal material.
8. The method for forming a trench MOSFET structure according to claim 7, characterized in that: The substrate comprises a silicon carbide substrate and a silicon carbide epitaxial layer covering the surface of the silicon carbide substrate along the first direction, the silicon carbide epitaxial layer has first doping ions, and the surface of the silicon carbide epitaxial layer facing away from the silicon carbide substrate serves as the top surface of the substrate; before etching the substrate to form a gate trench extending from the top surface of the substrate to the inside of the substrate along the first direction, the following steps are also included: Implanting second doping ions into the silicon carbide epitaxial layer to form a body region in the silicon carbide epitaxial layer, wherein the conductivity type of the second doping ions is opposite to the conductivity type of the first doping ions; The first doping ions are implanted into the body region to form a source region in the body region.
9. The method for forming a trench MOSFET structure according to claim 8, characterized in that: The specific steps of etching the substrate to form a gate trench extending from the top surface of the substrate to the inside of the substrate along a first direction include: The silicon carbide epitaxial layer is etched from the top surface of the substrate along the first direction to form the gate trench penetrating the body region and extending to below the body region.
10. The method for forming a trench MOSFET structure according to claim 7, wherein: The specific steps of forming a gate structure in the gate trench include: Depositing the high dielectric constant material into the gate trench to form the gate dielectric layer covering the inner wall of the gate trench, and the thickness of the gate dielectric layer is The metal material is deposited into the gate trench to form a gate conductive layer covering the surface of the gate dielectric layer and filling the gate trench.
11. The method for forming a trench MOSFET structure according to claim 7, wherein: The high dielectric constant material is any one of hafnium oxide, titanium oxide and zirconium oxide, or a combination of two or more thereof.
12. The method for forming a trench MOSFET structure according to claim 7, wherein: The metal material is any one of nickel, nickel-manganese alloy and tungsten, or a combination of two or more thereof.