Large-current power supply circuit design method

By designing an 8-phase controller, integrated MOSFET, intelligent Drmos circuit and remote feedback circuit on a 6U standard motherboard, the problems of large space, high power consumption and low efficiency of traditional power supplies under high current conditions are solved, and the problem of high-speed power consumption and low efficiency is achieved. The efficient and stable power supply design reduces the power supply size, reduces temperature and ripple current, and improves transient response.

CN119109322APending Publication Date: 2024-12-10BEIJING INST OF COMP TECH & APPL
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Patent Information

Application Number
CN202411240553.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-05
Publication Date
2024-12-10

AI Technical Summary

Technical Problem

Traditional power supply designs take up a lot of space, consume a lot of power, low efficiency and poor transient response at high current conditions, especially on 6U standard motherboards, which are difficult to achieve efficient and stable power supply design.

Method used

Design a high-current power supply circuit, adopting 8-phase controller circuit, 8 intelligent Drmos circuit with integrated MOSFET and compensation functions, and remote feedback circuit, to achieve dynamic load regulation and load balance through digital communication PMBus interface and digital PWM controller , form a closed loop loop to ensure current consistency and stability.

Benefits of technology

It realizes an efficient and stable power supply design on 6U motherboards, which reduces the power supply size, reduces the temperature, reduces the ripple current, improves the transient response capability, and enhances the overall performance of the power supply.

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Abstract

The invention relates to a large-current power supply circuit design method, and belongs to the field of circuit design. The high-current power supply circuit comprises an eight-phase controller circuit, eight intelligent Drmos circuits integrated with MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors) and a compensation function, and a far-end feedback circuit. The invention provides a design scheme for realizing a combined circuit of a single controller and 8-phase Drmos on a 6U standard mainboard, and the problem that the 6U mainboard is limited in design or poor in performance due to small space of a traditional power supply can be effectively solved. According to the invention, the limited space area of the mainboard is effectively reduced, the overvoltage and overfrequency capabilities are effectively improved, the problem of overheating of the mainboard is solved, the stability is improved, and the bandwidth capability of the converter is favorably improved.
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Description

Technical Field

[0001] The invention belongs to the field of circuit design, and in particular relates to a high-current power supply circuit design method. Background Art

[0002] In recent years, domestic high-performance processors have made great progress, including server processors, desktop processors and embedded processors. These processors have good performance and ecological compatibility. With the improvement of performance, the requirements for power supply design are getting higher and higher. Traditional power supply designs are single-phase. When the current is around 25A, its power consumption and efficiency are relatively efficient. However, when the current is larger or even up to several hundred amperes, the power consumption and efficiency of the single-phase solution will have problems. At this time, power consumption, efficiency, transient response, etc. will deteriorate, which is fatal for high-current loads and will affect the stability of the load. A good solution is to use a multi-phase buck converter design. This design is to solve this problem and design a high-current power supply that meets the requirements of small size, low heat generation, and good transient response under high current requirements.

[0003] The current nuclear power current of Feiteng high-performance server S5000C-32 is 180A, while the nuclear power current of S5000C-64 is as high as 360A. This places extremely high demands on power supply design, especially on a 6U standard motherboard. Due to limited space, how to make use of the limited space to design a stable and efficient power supply is the original intention and goal of this patent. Summary of the invention

[0004] 1. Technical issues to be resolved

[0005] The technical problem to be solved by the present invention is how to provide a high-current power supply circuit design method to solve the problems of large space occupation, high power consumption, low efficiency and poor transient response of Feiteng S5000C-32, S5000C-64 and other core processors according to conventional power supply design.

[0006] (II) Technical solution

[0007] In order to solve the above technical problems, the present invention proposes a design method for a high-current power supply circuit, the high-current power supply circuit comprising: an 8-phase controller circuit, 8 integrated MOSFETs and an intelligent Drmos circuit with compensation function, and a remote feedback circuit;

[0008] The 8-phase controller circuit is divided into two parts. The first part is the digital communication PMBus interface, which is connected to the PMBus part of the CPU and is used for the CPU to dynamically adjust the voltage according to the load size during operation. The second part is the digital PWM controller + CS current detection interface, which is connected to the 8 intelligent Drmos circuits with integrated MOSFET and compensation functions in the subsequent stage. The 8 intelligent Drmos are load balanced according to the load size to ensure that the output current of each channel is consistent.

[0009] 8 intelligent Drmos circuits with integrated MOSFET and compensation functions, controlled by the phase controller circuit, are used to send the output nuclear power voltage to the load CPU end;

[0010] The remote feedback circuit is used to remotely monitor the power consumption of the CPU at the load end of the power supply and feed it back to the 8-phase controller, thus forming a complete closed loop.

[0011] (III) Beneficial effects

[0012] The present invention proposes a high-current power supply circuit design method. The present invention proposes a combined circuit design scheme for implementing a single controller + 8-phase Drmos on a standard 6U motherboard, which can effectively improve the problem of limited traditional power supply design or poor performance due to the small space of the 6U motherboard, and has the following advantages:

[0013] 1. Multi-phase design can reduce the size of the power supply. Traditional power modules are large in size, especially high-current designs, which take up too much space on the motherboard. Multi-phase Drmos is a three-in-one package that is 1 / 4 the size of a discrete MOSFET, effectively reducing the limited space on the motherboard.

[0014] 2. Multi-phase design can reduce the power supply temperature. Traditional power modules will generate serious heat when designed with high current and have low conversion efficiency. The power density of multi-phase Drmos is 3 times that of MOSFET, which effectively increases the ability of overvoltage and overclocking, protects the motherboard from overheating, and improves stability.

[0015] 3. Multi-phase design can reduce ripple current. The reduction of ripple current of the power supply is beneficial to the input and output capacitors. Since the more phases there are, the lower the calculated RMS current value is, thus protecting the input and output capacitors.

[0016] 4. Multi-phase design can improve the transient response of the power supply. Since multi-phase makes the current rise faster, it reduces the magnetic inductance, that is, reduces the magnetic components, which helps to increase the bandwidth capability of the converter. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a circuit diagram of an 8-phase controller of the present invention;

[0018] Figure 2 Circuit diagrams for 8 smart Drmos;

[0019] Figure 3 This is the circuit diagram of the first intelligent Drmos;

[0020] Figure 4 This is the circuit diagram of the remote feedback circuit;

[0021] Figure 5 Output voltage-current waveform for circuit simulation;

[0022] Figure 6 It is the overall 0~2ms waveform diagram of 8-phase Vout points in circuit simulation;

[0023] Figure 7 This is the expansion diagram of the 8-phase Vout points in circuit simulation;

[0024] Figure 8 This is the power supply circuit block diagram. DETAILED DESCRIPTION

[0025] In order to make the purpose, content and advantages of the present invention more clear, the specific implementation methods of the present invention are further described in detail below in conjunction with the drawings and examples.

[0026] The present invention belongs to the field of circuit design, and specifically relates to a high-current power supply circuit design method, including scheme design, circuit design, and design simulation. According to the simulation results, it is verified that the multi-phase power supply design has better thermal performance, smaller size, smaller input and output ripple, and better transient response than the single-phase design, which accumulates technical reserves and design experience for later power supply design.

[0027] The technical problem to be solved by the present invention is how to design an efficient, stable and reliable power supply circuit to solve the problems of large space occupation, high power consumption, low efficiency and poor transient response of Feiteng S5000C-32, S5000C-64 and other core processors according to conventional power supply design under the condition of limited space of standard 6U motherboard.

[0028] In order to solve the above technical problems, the present invention proposes a high current power supply circuit design method, the high current power supply circuit includes: an 8-phase controller circuit, 8 integrated MOSFETs and an intelligent Drmos circuit with compensation function, and a remote feedback circuit, such as Figure 8 shown.

[0029] The 8-phase controller circuit is divided into two parts. The first part is the digital communication PMBus interface, which is connected to the PMBus part of the CPU. It can ensure that the CPU can dynamically adjust the voltage according to the load size during operation, thereby improving the efficiency and stability of the circuit. The second part is the digital PWM controller + CS current detection interface, which is connected to the 8 subsequent intelligent Drmos circuits with integrated MOSFET and compensation functions. Its function is to load balance the 8 intelligent Drmos according to the load size to ensure that the output current of each channel is consistent, avoiding the risk of Drmos damage caused by inconsistent output of each Drmos due to differences in layout distance.

[0030] 8 intelligent Drmos circuits with integrated MOSFET and compensation functions are controlled by the phase controller circuit to send the output nuclear power voltage to the load CPU end.

[0031] The remote feedback circuit is used to remotely monitor the power consumption of the CPU at the load end of the power supply and feed it back to the 8-phase controller, thereby forming a complete closed loop, and ultimately achieving the purpose of controlling the 8-phase Drmos to output a maximum stable current of 300A.

[0032] Embodiment 1:

[0033] In order to make the purpose, content and advantages of the present invention more clear, the specific implementation methods of the present invention are further described in detail below in conjunction with the drawings and examples.

[0034] The technical problem to be solved by the present invention is how to design an efficient, stable and reliable power supply circuit to solve the problems of large space occupation, high power consumption, low efficiency and poor transient response of Feiteng S5000C-32, S5000C-64 and other core processors according to conventional power supply design under the condition of limited space of standard 6U motherboard.

[0035] In order to solve the above problems, the present invention proposes a combination circuit of an 8-phase controller + 8 Drmos on a standard 6U motherboard, the circuit comprising: an 8-phase controller circuit, 8 integrated MOSFETs and an intelligent Drmos circuit with compensation function, and a remote feedback circuit.

[0036] 1. The 8-phase controller circuit works as follows:

[0037] like Figure 1 As shown, the 8-phase controller circuit includes: an 8-phase controller D1, resistors R1-R27, and capacitors C1-C8; wherein,

[0038] Pin 38 of the 8-phase controller D1 is the input voltage detection pin. VDD12V is reasonably divided by R1 and R2, and then sent to pin 38 after filtering by C1. The specific connection relationship is: one end of R1 is connected to VDD12V, the other end of R1, one end of R2, one end of C1, and pin 38 are connected, the other end of R2 is grounded, and the other end of C1 is grounded.

[0039] Pin 37 of D1 is the input pin of the current op amp. VDD5V_S3 is reasonably divided by R3 and R4, and then sent to pin 37 after filtering by C3. The specific connection relationship is: one end of R3 is connected to VDD5V_S3, the other end of R3, one end of R4, one end of C3, and pin 37 are connected, the other end of R4 is grounded, and the other end of C3 is grounded.

[0040] Pin 39 of D1 is the 3.3V power input, which is sent to pin 39 after being filtered by RC formed by R7 and C4. The specific connection relationship is: one end of R7 is connected to VDD3V3_S3, the other end of R7, one end of C4 and pin 39 are connected, and the other end of C4 is grounded.

[0041] Pin 40 of D1 is a 1.8V output pin, which is grounded through capacitor C5 and has a filtering effect on the output 1.8V.

[0042] Pin 14 of D1 is the over-temperature indication pin. This pin is an open-drain output. It is pulled up by R8 externally and then output to CPLD through R9 to inform the chip of over-temperature. The specific connection relationship is: one end of R8 is connected to VDD3V3_S3, the other end of R8, one end of R9, and pin 14 are connected, and the other end of R9 is connected to CPLD.

[0043] Pins 15, 17, 18, and 19 of D1 are all NC pins and do not need to be connected. They can be left floating directly.

[0044] Pin 20 of D1 is EN2, which enables PWM output according to the matched phase number. This voltage cannot exceed 2V. The specific connection relationship is: one end of R14, pin 20 of D1, and 1.8V IO pin of CPLD are connected, and the other end of R14 is grounded.

[0045] Pin 33 of D1 is the fault 1 enable pin, and the connection relationship is: one end of R15 is connected to VDD3V3_S3, the other end of R15, one end of R16, and pin 33 are connected, and the other end of R16 is grounded.

[0046] Pins 9, 10, and 11 of D1 are PMBus communication interfaces, which are connected to the X1 connector through resistors R17, R18, and R19, respectively, for easy debugging. The specific connection relationship is: one end of R17 is connected to pin 9 of D1, the other end of R17 is connected to pin 1 of X1, one end of R18 is connected to pin 10 of D1, the other end of R18 is connected to pin 2 of X1, one end of R19 is connected to pin 11 of D1, and the other end of R19 is connected to pin 3 of X1.

[0047] Pin 13 of D1 is EN1, which enables PWM output according to the matched phase number, and is sent to the corresponding pin of 3.3VIO of CPLD after being pulled down by R21. The specific connection relationship is: one end of R21, pin 13, and the corresponding pin of 3.3VIO of CPLD are connected, and the other end of R21 is grounded.

[0048] Pin 34 of D1 is a multi-function configuration pin. Different configuration parameters can be selected by matching with external resistor R20. The specific connection relationship is: one end of R20 is connected to pin 34, and the other end of R20 is grounded.

[0049] Pins 12 and 16 of D1 are PG1 and PG2 pins, which are used to indicate the output power status. The specific connection relationship is: one end of R22 is connected to VDD3V3_S3, and the other end of R22, pin 12, and the corresponding pin of 3.3V IO of CPLD are connected. One end of R23 is connected to VDD3V3_S3, and the other end of R23, pin 16, and the corresponding pin of 3.3VIO of CPLD are connected.

[0050] Pins 36 and 35 of D1 are TSNN1 and TSNN2 pins, which are used to collect and report the temperature of Drmos. The specific connection relationship is: Pin 36 of D1 is connected to one end of R24, the other end of R24, one end of C8, one end of R27, one end of R34, one end of R35, one end of R49, one end of R52, one end of R63, one end of R69, one end of R79, one end of R85, the other end of C8 is grounded, and the other end of R27 is grounded. Pin 35 of D1 is connected to one end of R25, the other end of R25, one end of C7, and one end of R26 are connected, the other end of C7 is grounded, and the other end of R26 is grounded.

[0051] Pin 41 of D1 is the ground pin and is directly connected to the external ground.

[0052] Pins 21, 22, 32, and 31 of D1 are two sets of remote power feedback pins, which are specifically introduced in the remote feedback circuit introduction in Part 3.

[0053] Pins 1 to 8 of D1 are PWM8 to PWM1 respectively, and are connected to pin 34 of Drmos through a 0 ohm resistor to adjust the output voltage of Drmos. The specific connection relationship is: Pin 8 of D1 is connected to one end of R31, and the other end of R31 is connected to pin 34 of D3. Pin 7 of D1 is connected to one end of R30, and the other end of R30 is connected to pin 34 of D2. Pin 6 of D1 is connected to one end of R46, and the other end of R46 is connected to pin 34 of D4. Pin 5 of D1 is connected to one end of R48, and the other end of R48 is connected to pin 34 of D5. Pin 4 of D1 is connected to one end of R62, and the other end of R62 is connected to pin 34 of D6. Pin 3 of D1 is connected to one end of R65, and the other end of R65 is connected to pin 34 of D7. Pin 2 of D1 is connected to one end of R86, and the other end of R86 is connected to pin 34 of D9. Pin 1 of D1 is connected to one end of R87, and the other end of R87 is connected to pin 34 of D8.

[0054] Pins 23 to 30 of D1 are CS1 to CS8 respectively, and are connected to pin 38 of Drmos through a 0 ohm resistor to detect the current of Drmos. The specific connection relationship is: pin 23 of D1 is connected to one end of R36, and the other end of R36 is connected to pin 38 of D3. Pin 24 of D1 is connected to one end of R37, and the other end of R37 is connected to pin 38 of D2. Pin 25 of D1 is connected to one end of R51, and the other end of R51 is connected to pin 38 of D4. Pin 26 of D1 is connected to one end of R54, and the other end of R54 is connected to pin 38 of D5. Pin 27 of D1 is connected to one end of R66, and the other end of R66 is connected to pin 38 of D6. Pin 28 of D1 is connected to one end of R70, and the other end of R70 is connected to pin 38 of D7.

[0055] Connect the 29th pin of D1 to one end of R82, and the other end of R82 to the 38th pin of D9. Connect the 30th pin of D1 to one end of R80, and the other end of R80 to the 38th pin of D8.

[0056] 2. The intelligent Drmos circuit with 8 integrated MOSFETs works as follows:

[0057] like Figure 2As shown, these 8 Drmos are connected in parallel and have the same circuit with the same function. The first smart Drmos circuit includes: smart Drmos D2, resistors R30, R35, R37, etc.; the second smart Drmos circuit includes: smart Drmos D3, resistors R31, R34, R36, etc.; the third smart Drmos circuit includes: smart Drmos D4, resistors R46, R49, R51, etc.; the fourth smart Drmos circuit includes: smart Drmos D5, resistors R48, R52, R54, etc.; the fifth smart Drmos circuit includes: smart Drmos D6, resistors R62, R63, R66, etc.; the sixth smart Drmos circuit includes: smart Drmos D7, resistors R65, R69, R70, etc.; the seventh smart Drmos circuit includes: smart Drmos D8, resistors R87, R79, R80, etc.; the eighth smart Drmos circuit includes: smart Drmos D9, resistors R86, R85, R82, etc.

[0058] Here we only introduce the design and function of the second Drmos in the upper left corner. Figure 3 The second smart Drmos circuit is shown, including: smart Drmos D3, resistors R28, R31, R32, R34, R36, R38, R40, R41, capacitors C9-C14, C22, C23, C26, C27, C29, C31, and inductor L1;

[0059] The 25-29 and 30 pins of the smart Drmos D3 are all VDD12V power input pins, and C9-C14 are VDD12V filter capacitors. The specific connection relationship is: VDD12V power supply, D3's 25-29 and 30 pins, one end of C9-C14 are connected, and the other end of C9-C14 is grounded.

[0060] Pin 34 of D3 is the PWM control input, which is connected to the previous 8-phase controller through a 0 ohm resistor. The specific connection relationship is: one end of R31 is connected to pin 34 of D3, and the other end of R31 is connected to pin 8 of D1.

[0061] Pin 35 of D3 is the EN enable pin, which is connected to VDD5V_S3 through a 0 ohm resistor, indicating that it is always enabled. The specific connection relationship is: one end of R32 is connected to pin 35 of D3, and the other end of R32 is connected to the power supply VDD5V_S3.

[0062] Pin 4 and pin 3 of D3 are power input pins, connected to VDD5V_S3 power supply. The specific connection relationship is: VDD5V_S3 power supply, one end of C27, one end of R38, and pin 4 are connected, the other end of C27 is grounded, the other end of R38, one end of C29, and pin 3 are connected, and the other end of C29 is grounded.

[0063] Pins 1, 31, 37, and 39 of D3 are all NC and are left floating externally.

[0064] Pin 2, pins 7-9, pins 20-24, pin 5, and pin 40 of D3 are all ground pins and are directly grounded externally.

[0065] Pin 33 of D3 is the BOOT Strap capacitor configuration pin, and pin 32 is the phase control pin. The specific connection relationship is: pin 33 is connected to one end of R28, the other end of R28 is connected to one end of C26, and the other end of C26 is connected to pin 32.

[0066] Pins 10 to 19 of D3 are SW output pins, which need to be matched with inductor L1 to output 0.84V voltage normally, and then matched with C22 and C23 for filtering for CPU use. The specific connection relationship is: pins 10-19 are connected to one end of L1, the other end of L1, one end of C22, one end of C23, and CPU_VDD are connected, the other end of C22 is grounded, and the other end of C23 is grounded.

[0067] Pin 36 of D3 is the temperature output pin. This pin of 8 Drmos needs to be connected in parallel and then connected to pin 36 of 8-phase controller D1. The specific connection relationship is: pin 36 of D3 is connected to one end of R34, the other end of R34 (connected to the corresponding signal of other 7 channels) is connected to one end of R24, and the other end of R24 is connected to pin 36 of D1.

[0068] Pin 38 of D3 is a current output pin, which is connected to pin C23 of 8-phase controller D1 through a 0 ohm resistor. The specific connection relationship is: pin 38 of D3 is connected to one end of R36, and the other end of R36 is connected to pin 23 of D1.

[0069] Pin 6 and pin 41 of D3 are the Gate pins of the low-side power FET. This design does not use this function, so they are left floating externally.

[0070] 3. The remote feedback circuit works as follows:

[0071] like Figure 1 and Figure 4 As shown in the figure, the remote feedback circuit consists of pins 21-22 and 31-32 of D1 and two sets of differential sensing circuits. The specific connection relationship is:

[0072] Pin 21 of D1 and one end of R6 are connected, the other end of R6, one end of C2 and one end of R5 are connected, the other end of R5 is connected to the positive pin corresponding to the remote feedback on the first group of CPU side, pin 22 of D1, the other end of C2 and one end of R10 are connected, the other end of R10 is connected to the negative pin corresponding to the remote feedback on the first group of CPU side.

[0073] Pin 32 of D1 and one end of R11 are connected, the other end of R11, one end of C6 and one end of R12 are connected, the other end of R12 is connected to the positive pin corresponding to the remote feedback on the second set of CPU side, pin 31 of D1, the other end of C6 and one end of R13 are connected, the other end of R13 is connected to the negative pin corresponding to the remote feedback on the second set of CPU side.

[0074] 4. The simulation verification for this circuit is as follows:

[0075] like Figure 5 As shown, it can be seen that the 8-phase output has the advantages of fast power supply startup and small fluctuation, which improves stability and protects the input and output capacitors.

[0076] like Figure 6 As shown, it can be seen that the 8-phase power supply has a startup trend at different times. Due to the 8-phase design, the startup impact current is significantly reduced compared to the traditional single-phase design, and the stability of each circuit is improved.

[0077] like Figure 7 As shown, it can be seen that in the 8-phase power simulation expansion diagram, the 8-way output power phase shares 360°. Generally, the phase is evenly divided into 360°, such as 6 phases, 60° per phase, and when it comes to 8 phases, considering the device, output stability, etc., the distribution is uneven. This design is the best phase distribution method. The 8-phase design is to burn different firmware inside the 8-phase controller D1. These firmware can be configured on the computer host, and then the firmware is burned into the chip through the downloader connected to the X1 connector in the circuit. The 8-phase firmware configuration has a variety of phase combinations, such as 0°, 45°, 90°, 135°, 180°, 225°, 270°, 315°, 360°, or 0°, 60°, 90°, 120°, 180°, 240, 270°, 300°, 360°, etc. as designed in this design. However, according to the simulation results, the latter is better. The output voltage of the 8-phase power supply is 0.84V, but the current is the sum of the 8 phases, thus meeting the power and current requirements of the CPU side.

[0078] The present invention proposes a combined circuit design scheme for implementing a single controller + 8-phase Drmos on a standard 6U motherboard, which can effectively improve the problem of limited traditional power supply design or poor performance of the 6U motherboard due to the small space, and has the following advantages:

[0079] 1. Multi-phase design can reduce the size of the power supply. Traditional power modules are large in size, especially high-current designs, which take up too much space on the motherboard. Multi-phase Drmos is a three-in-one package that is 1 / 4 the size of a discrete MOSFET, effectively reducing the limited space on the motherboard.

[0080] 2. Multi-phase design can reduce the power supply temperature. Traditional power modules will generate serious heat when designed with high current and have low conversion efficiency. The power density of multi-phase Drmos is 3 times that of MOSFET, which effectively increases the ability of overvoltage and overclocking, protects the motherboard from overheating, and improves stability.

[0081] 3. Multi-phase design can reduce ripple current. The reduction of ripple current of the power supply is beneficial to the input and output capacitors. Since the more phases there are, the lower the calculated RMS current value is, thus protecting the input and output capacitors.

[0082] 4. Multi-phase design can improve the transient response of the power supply. Since multi-phase makes the current rise faster, it reduces the magnetic inductance, that is, reduces the magnetic components, which helps to increase the bandwidth capability of the converter.

[0083] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A high current power supply circuit design method, characterized in that: The high current power supply circuit includes: an 8-phase controller circuit, 8 intelligent Drmos circuits with integrated MOSFETs and compensation functions, and a remote feedback circuit; The 8-phase controller circuit is divided into two parts. The first part is the digital communication PMBus interface, which is connected to the PMBus part of the CPU and is used for the CPU to dynamically adjust the voltage according to the load size during operation. The second part is the digital PWM controller + CS current detection interface, which is connected to the 8 intelligent Drmos circuits with integrated MOSFET and compensation functions in the subsequent stage. The 8 intelligent Drmos are load balanced according to the load size to ensure that the output current of each channel is consistent. 8 intelligent Drmos circuits with integrated MOSFET and compensation functions, controlled by the phase controller circuit, are used to send the output nuclear power voltage to the load CPU end; The remote feedback circuit is used to remotely monitor the power consumption of the CPU at the load end of the power supply and feed it back to the 8-phase controller, thus forming a complete closed loop.

2. The high current power supply circuit design method according to claim 1, characterized in that: The CPU is Feiteng S5000C-32 or S5000C-64 core processor.

3. The high current power supply circuit design method according to claim 1, characterized in that: The 8-phase controller circuit includes: an 8-phase controller D1, resistors R1-R27, and capacitors C1-C8; Pin 38 of the 8-phase controller D1 is the input voltage detection pin. VDD12V is divided reasonably by R1 and R2, and then filtered by C1 and sent to pin 38. Pin 37 of D1 is the input pin of the current amplifier. VDD5V_S3 is divided reasonably by R3 and R4, and then filtered by C3 and sent to pin 37. Pin 39 of D1 is 3.3V power input, which is sent to pin 39 after passing through RC filter formed by R7 and C4; Pin 40 of D1 is a 1.8V output pin, which is grounded through capacitor C5 and has a filtering effect on the output 1.8V; Pin 14 of D1 is an over-temperature indication pin. This pin is an open-drain output. It is pulled up externally by R8 and then output to the CPLD through R9 to inform the chip of over-temperature. Pins 15, 17, 18, and 19 of D1 are all NC pins, and do not need to be connected. Just leave them unconnected. Pin 20 of D1 is EN2, which enables PWM output according to the number of phases matched. This voltage cannot exceed 2V. Pin 33 of D1 is the fault 1 enable pin, one end of R15 is connected to VDD3V3_S3, the other end of R15, one end of R16 and pin 33 are connected, and the other end of R16 is grounded; Pins 9, 10, and 11 of D1 are PMBus communication interfaces, which are connected to the X1 connector through resistors R17, R18, and R19, respectively, for easy debugging; Pin 13 of D1 is EN1, which enables PWM output according to the phase number, and is pulled down by R21 and sent to the corresponding 3.3VIO pin of CPLD; Pin 34 of D1 is a multi-function configuration pin, which can select different configuration parameters by matching with external resistor R20; Pins 12 and 16 of D1 are PG1 and PG2 pins, which are used to indicate the output power status. The specific connection relationship is as follows; Pins 36 and 35 of D1 are TSNN1 and TSNN2 pins, which are used to collect and report the temperature of Drmos; Pin 41 of D1 is the ground pin, which is directly connected to the external ground; Pins 21, 22, 32, and 31 of D1 are two sets of remote power feedback pins; Pins 1 to 8 of D1 are PWM8 to PWM1 respectively, which are connected to pin 34 of Drmos through a 0 ohm resistor to adjust the output voltage of Drmos; Pins 23 to 30 of D1 are CS1 to CS8 respectively, which are connected to pin 38 of Drmos through a 0 ohm resistor to detect the current of Drmos; Pin 29 of D1 is connected to one end of R82, and the other end of R82 is connected to pin 38 of D9; pin 30 of D1 is connected to one end of R80, and the other end of R80 is connected to pin 38 of D8.

4. The high current power supply circuit design method as claimed in claim 3, characterized in that: One end of R1 is connected to VDD12V, the other end of R1, one end of R2, one end of C1, and pin 38 are connected, the other end of R2 is grounded, and the other end of C1 is grounded; one end of R3 is connected to VDD5V_S3, the other end of R3, one end of R4, one end of C3, and pin 37 are connected, the other end of R4 is grounded, and the other end of C3 is grounded; one end of R7 is connected to VDD3V3_S3, the other end of R7, one end of C4, and pin 39 are connected, and the other end of C4 is grounded; one end of R8 is connected to VDD3V3_S3, the other end of R8, one end of R9, and pin 14 are connected, and the other end of R9 is connected to CPLD; one end of R14, pin 20 of D1, and the 1.8VIO pin of CPLD are connected, and the other end of R14 is connected Ground; one end of R17 is connected to pin 9 of D1, and the other end of R17 is connected to pin 1 of X1, one end of R18 is connected to pin 10 of D1, and the other end of R18 is connected to pin 2 of X1, one end of R19 is connected to pin 11 of D1, and the other end of R19 is connected to pin 3 of X1; one end of R21 is connected to pin 13 and the corresponding pin of 3.3VIO of CPLD, and the other end of R21 is grounded; one end of R20 is connected to pin 34, and the other end of R20 is grounded; one end of R22 is connected to VDD3V3_S3, and the other end of R22 is connected to pin 12 and the corresponding pin of 3.3VIO of CPLD; one end of R23 is connected to VDD3V3_S3, and the other end of R23 is connected to pin 16 and the corresponding pin of 3.3VIO of CPLD.

5. The high current power supply circuit design method as claimed in claim 3, characterized in that: Pin 36 of D1 is connected to one end of R24, the other end of R24, one end of C8, one end of R27, one end of R34, one end of R35, one end of R49, one end of R52, one end of R63, one end of R69, one end of R79, and one end of R85 are connected, the other end of C8 is grounded, and the other end of R27 is grounded; pin 35 of D1 is connected to one end of R25, the other end of R25, one end of C7, and one end of R26 are connected, the other end of C7 is grounded, and the other end of R26 is grounded.

6. The high current power supply circuit design method as claimed in claim 3, characterized in that: Pin 8 of D1 is connected to one end of R31, and the other end of R31 is connected to pin 34 of D3; pin 7 of D1 is connected to one end of R30, and the other end of R30 is connected to pin 34 of D2; pin 6 of D1 is connected to one end of R46, and the other end of R46 is connected to pin 34 of D4; pin 5 of D1 is connected to one end of R48, and the other end of R48 is connected to pin 34 of D5; pin 4 of D1 is connected to one end of R62, and the other end of R62 is connected to pin 34 of D6; pin 3 of D1 is connected to one end of R65, and the other end of R65 is connected to pin 34 of D7; pin 2 of D1 is connected to one end of R86, and the other end of R86 is connected to pin 34 of D9; pin 1 of D1 is connected to one end of R87, and the other end of R87 is connected to pin 34 of D8.

7. The high current power supply circuit design method according to claim 3, characterized in that: Pin 23 of D1 is connected to one end of R36, and the other end of R36 is connected to pin 38 of D3; pin 24 of D1 is connected to one end of R37, and the other end of R37 is connected to pin 38 of D2; pin 25 of D1 is connected to one end of R51, and the other end of R51 is connected to pin 38 of D4; pin 26 of D1 is connected to one end of R54, and the other end of R54 is connected to pin 38 of D5; pin 27 of D1 is connected to one end of R66, and the other end of R66 is connected to pin 38 of D6; pin 28 of D1 is connected to one end of R70, and the other end of R70 is connected to pin 38 of D7.

8. The high current power supply circuit design method according to any one of claims 3 to 7, characterized in that: The eight smart Drmos circuits with integrated MOSFET and compensation function are the same circuits connected in parallel, and one of the smart Drmos circuits includes: smart Drmos D3, resistors R28, R31, R32, R34, R36, R38, R40, R41, capacitors C9-C14, C22, C23, C26, C27, C29, C31, and inductor L1; The 25-29 and 30 pins of the smart Drmos D3 are all VDD12V power input pins, and C9-C14 are VDD12V filter capacitors; the specific connection relationship is: VDD12V power supply, D3's 25-29, 30 pins, one end of C9-C14 are connected, and the other end of C9-C14 is grounded; Pin 34 of D3 is PWM control input, which is connected to the previous 8-phase controller through a 0 ohm resistor. The specific connection relationship is: one end of R31 is connected to pin 34 of D3, and the other end of R31 is connected to pin 8 of D1; Pin 35 of D3 is the EN enable pin, which is connected to VDD5V_S3 through a 0 ohm resistor, indicating that it is always enabled. The specific connection relationship is: one end of R32 is connected to pin 35 of D3, and the other end of R32 is connected to the power supply VDD5V_S3; Pin 4 and pin 3 of D3 are power input pins, connected to VDD5V_S3 power supply. The specific connection relationship is: VDD5V_S3 power supply, one end of C27, one end of R38, and pin 4 are connected, the other end of C27 is grounded, the other end of R38, one end of C29, and pin 3 are connected, and the other end of C29 is grounded; Pins 1, 31, 37 and 39 of D3 are all NC and are suspended externally; Pin 2, pins 7-9, pins 20-24, pin 5, and pin 40 of D3 are ground pins, which are directly grounded externally; Pin 33 of D3 is the BOOT Strap capacitor configuration pin, and pin 32 is the phase control pin. The specific connection relationship is: pin 33 is connected to one end of R28, the other end of R28 is connected to one end of C26, and the other end of C26 is connected to pin 32; Pins 10 to 19 of D3 are SW output pins, which need to be matched with inductor L1 to output 0.84V voltage normally, and then matched with C22 and C23 for filtering for CPU use; the specific connection relationship is: pins 10-19 are connected to one end of L1, the other end of L1, one end of C22, one end of C23, and CPU_VDD are connected, the other end of C22 is grounded, and the other end of C23 is grounded; Pin 36 of D3 is the temperature output pin. This pin of 8 Drmos needs to be connected in parallel and then connected to pin 36 of the 8-phase controller D1. The specific connection relationship is: pin 36 of D3 is connected to one end of R34, the other end of R34 is connected to one end of R24, and the other end of R24 is connected to pin 36 of D1. Pin 38 of D3 is a current output pin, which is connected to pin C23 of 8-phase controller D1 after passing through a 0 ohm resistor; the specific connection relationship is: pin 38 of D3 is connected to one end of R36, and the other end of R36 is connected to pin 23 of D1; Pin 6 and pin 41 of D3 are the Gate pins of the low-side power FET and are externally left floating.

9. The high current power supply circuit design method according to claim 8, characterized in that: The remote feedback circuit is composed of pins 21-22 and 31-32 of D1 and two sets of differential sensing circuits; the connection relationship is: Pin 21 of D1 is connected to one end of R6, the other end of R6, one end of C2 and one end of R5 are connected, the other end of R5 is connected to the positive pin corresponding to the remote feedback of the first group of CPU side, pin 22 of D1, the other end of C2 and one end of R10 are connected, the other end of R10 is connected to the negative pin corresponding to the remote feedback of the first group of CPU side; Pin 32 of D1 and one end of R11 are connected, the other end of R11, one end of C6 and one end of R12 are connected, the other end of R12 is connected to the positive pin corresponding to the remote feedback on the second set of CPU side, pin 31 of D1, the other end of C6 and one end of R13 are connected, the other end of R13 is connected to the negative pin corresponding to the remote feedback on the second set of CPU side.

10. The high current power supply circuit design method according to claim 9, characterized in that: The 8-phase design is to burn different firmware inside the 8-phase controller D1. The 8-phase firmware configuration uses the following phase combinations: 0°, 60°, 90°, 120°, 180°, 240°, 270°, 300°, 360°.