Display device

Abstract

The invention relates to a display device. The display device includes: at least one spatial light modulator that displays an augmented reality content image; a surface light source device located behind the at least one spatial light modulator and providing the image display light of the first resolution to the at least one spatial light modulator as background light; and at least one image transmission member forming a display path of the augmented reality content image. The surface light source device includes an organic light emitting display unit in which a plurality of sub-light emitting pixels performing surface light emission are arranged, and an emission driving circuit driving the plurality of sub-light emitting pixels. Each of the plurality of sub-light-emitting pixels includes a plurality of pixel drivers and a light-emitting element.

Description

Technical Field

[0001] The present disclosure relates to a display device. Background Art

[0002] Recently, with the development of electronic devices and display devices capable of realizing virtual reality (VR), technologies capable of realizing augmented reality (AR), mixed reality (MR), and extended reality content images (such as, for example, holograms) have been studied as the next step of virtual reality.

[0003] Unlike virtual reality, which is based on a completely virtual world, augmented reality is a display technology that can further increase the reality effect by superimposing virtual objects or image information on the real world environment. In some cases, the stereoscopic imaging technology using the hologram method can fundamentally avoid the weakness of the traditional stereoscopic method that uses binocular parallax to view stereoscopic images. Therefore, the stereoscopic imaging technology using the hologram method has attracted attention as the next generation of stereoscopic imaging technology that is finally achieved.

[0004] In the case of an extended reality content image (such as, for example, a hologram), since the actual image formed is directly seen by the eyes without using an optical illusion, the user may experience a 3D effect in which the user feels no different from seeing a corresponding real object or environment. Therefore, the extended reality content image can provide an advantage that viewing the extended reality content image for a long time does not cause fatigue.

[0005] Some methods of displaying an extended reality content image (such as, for example, a hologram) may use a spatial light modulator, and in some cases, the performance of the spatial light modulator may be used as a factor in determining the 3D effect and performance. Recently, a liquid crystal display panel has been used as a spatial light modulator. Therefore, the emission structure of a light-emitting panel used as a background light source (such as, for example, a backlight) may be used as a factor in determining the display quality and viewing angle of the extended reality content image. Summary of the invention

[0006] Aspects of the present disclosure provide a display device that is capable of adjusting the arrangement structure of light-emitting pixels and the stacking structure of each light-emitting element in a surface light source device that provides background light to a spatial light modulator. In some aspects, the display device is capable of using an ultra-low resolution surface light source to display an extended reality content image (such as, for example, a hologram).

[0007] Aspects of the present disclosure also provide a display device that is capable of increasing the resolution and 3D effect of an extended reality content image (such as, for example, a hologram) by adjusting an ultra-low resolution of a surface light source device.

[0008] However, aspects of the present disclosure are not limited to the examples set forth herein. The above and other aspects of the present disclosure will become more apparent to those skilled in the art to which the present disclosure pertains by referring to the detailed description of the present disclosure given herein.

[0009] According to an embodiment of the present disclosure, a display device includes: at least one spatial light modulator, which displays an extended reality content image; a surface light source device, which is located behind the at least one spatial light modulator and provides image display light of a first resolution as background light to the at least one spatial light modulator; and at least one image transmission member, which forms a display path for the extended reality content image, wherein the surface light source device includes an organic light-emitting display unit and an emission driving circuit, a plurality of sub-light-emitting pixels that perform surface light emission are arranged in the organic light-emitting display unit, the emission driving circuit drives the plurality of sub-light-emitting pixels, and each of the plurality of sub-light-emitting pixels includes a plurality of pixel drivers and light-emitting elements.

[0010] In an embodiment, the emission driving circuit generates a gate control signal and an analog image signal for driving a plurality of sub-luminescent pixels at the same timing in units of at least one frame, the display device provides the gate control signal to the first gate driver in units of at least one frame, and the display device provides the analog image signal to the plurality of sub-luminescent pixels simultaneously.

[0011] According to an embodiment of the present disclosure, a display device includes: at least one spatial light modulator that displays an extended reality content image; a surface light source device that is located behind the at least one spatial light modulator and provides image display light of a first resolution as background light to the at least one spatial light modulator; and at least one image transmission member that forms a display path of the extended reality content image, wherein the surface light source device includes: an organic light-emitting display unit in which a plurality of sub-light-emitting pixels that perform surface light emission are arranged; and an emission drive circuit that drives the plurality of sub-light-emitting pixels. Each of the plurality of sub-light-emitting pixels includes a plurality of pixel drivers and light-emitting elements, and the light-emitting element included in each of the plurality of sub-light-emitting pixels is formed in the organic light-emitting display unit to include at least one of the following shapes or a combination of different shapes: a fan-shaped shape, a triangular shape, a rhombus shape, a quadrilateral shape other than a rhombus shape, a circular shape, a semicircular shape, and an elliptical shape.

[0012] In an embodiment, the emission driving circuit generates a gate control signal and an analog image signal for driving a plurality of sub-luminescent pixels at the same timing in units of at least one frame, the display device provides the gate control signal to the first gate driver in units of at least one frame, and the display device provides the analog image signal to the plurality of sub-luminescent pixels simultaneously.

[0013] In the display device according to the embodiment of the present disclosure, the light-emitting pixel arrangement structure and the surface light-emitting structure of the surface light source device are simplified, thereby providing ultra-low resolution background light to the spatial light modulator. Therefore, the aspects described herein support improving the efficiency of manufacturing a display device that displays an extended reality content image (such as, for example, a hologram).

[0014] In addition, in the display device according to the embodiment of the present disclosure, the RC value of the light-emitting element of each light-emitting pixel is reduced. Therefore, as described herein, a display device capable of improving the amount of light emitted from each light-emitting element and further improving the resolution and 3D effect of an extended reality content image (such as, for example, a hologram) is supported. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] These and / or other aspects will become apparent and more readily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0016] Figure 1 An application example of a projector-type extended reality content image display device according to an embodiment of the present disclosure is shown;

[0017] Figure 2 An application example of a glasses-type extended reality content image display device according to an embodiment of the present disclosure is shown;

[0018] Figure 3 is an exploded perspective view schematically showing a configuration of an augmented reality content image display device according to an embodiment;

[0019] Figure 4 is an exploded perspective view schematically showing a configuration of an augmented reality content image display device according to an embodiment;

[0020] Figure 5 yes Figure 4 A detailed plan view of the surface light source device shown;

[0021] Figure 6 It is shown Figure 4 A side sectional view of the sectional structure of the surface light source device shown;

[0022] Figure 7 It is schematically shown Figure 5 and Figure 6 A plan view of the structure of an organic light emitting display surface of a surface light source device shown;

[0023] Figure 8 is a circuit diagram showing a circuit structure of a light-emitting pixel according to an embodiment of the present disclosure;

[0024] Fig. 9The first embodiment shows Figure 7 A plan view of the arrangement structure of the light-emitting pixels of the surface light-emitting unit shown;

[0025] Fig.10 The second embodiment is shown in FIG. Figure 7 A plan view of the arrangement structure of the light-emitting pixels of the surface light-emitting unit shown;

[0026] Fig.11 The third embodiment shows Figure 7 A plan view of the arrangement structure of the light-emitting pixels of the surface light-emitting unit shown;

[0027] Fig.12 The fourth embodiment shows Figure 7 A plan view of the arrangement structure of the light-emitting pixels of the surface light-emitting unit shown;

[0028] Fig.13 It shows that along Fig.10 and Fig.12 A cross-sectional view of a first embodiment of a cross-sectional structure of a plane cut along line II';

[0029] Fig.14 It shows that along Fig.10 and Fig.12 A cross-sectional view of a second embodiment of the cross-sectional structure of a plane cut along line II';

[0030] Fig.15 It shows that along Fig.10 and Fig.12 A cross-sectional view of a third embodiment of the cross-sectional structure of a plane cut along line II';

[0031] Fig.16 yes Figure 3 A detailed plan view of the surface light source device shown;

[0032] Fig.17 It is schematically shown Fig.16 A plan view of the structure of a surface light emitting unit of the surface light source device shown;

[0033] Fig.18 yes Figure 3 A detailed plan view of a spatial light modulator is shown;

[0034] Fig.19 It is schematically shown Fig.18 A plan view of the structure of a liquid crystal image display unit of a spatial light modulator shown;

[0035] Fig. 20 shows the background light and background light display resolution of the surface light source device according to the embodiment;

[0036] Fig.21 shows a display image and image display resolution of a spatial light modulator according to an embodiment; and

[0037] Fig. 22 The resolution of the augmented reality content image displayed by the display device according to the embodiment is shown. DETAILED DESCRIPTION

[0038] The present disclosure will now be described more fully below with reference to the accompanying drawings, in which preferred embodiments of the present disclosure are shown. However, the present disclosure may be implemented in different forms and should not be construed as limited to the embodiments set forth herein. On the contrary, these embodiments are provided so that the present disclosure will be thorough and complete and will fully convey the scope of the present disclosure to those skilled in the art.

[0039] It will also be understood that when a layer is referred to as being 'on' another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. Throughout the specification, the same reference numerals refer to the same components.

[0040] It will be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the teachings of the present disclosure, the first element discussed below may be referred to as the second element. Similarly, the second element may also be referred to as the first element.

[0041] Each of the features of the various embodiments of the present disclosure can be combined with each other in part or in whole, and various interlocks and drives are technically possible. Each embodiment can be implemented independently of each other, or can be implemented together in association.

[0042] Hereinafter, illustrative embodiments will be described in detail with reference to the accompanying drawings.

[0043] Figure 1 An application example of the projector-type extended reality content image display device 200 according to an embodiment of the present disclosure is shown. Figure 2 An application example of the glasses-type augmented reality content image display device 200 according to an embodiment of the present disclosure is shown.

[0044] refer to Figure 1 and Figure 2 According to the embodiment, the display device 200 can display an extended reality content image, such as a hologram. Figure 1In an exemplary embodiment, the display device 200 may be formed as a projector type. In the example, the display device 200 of the projector type may be easily carried by the user and may be installed or assembled on a ceiling or a wall or in a specific space in a variety of structures. The display device 200 may also be referred to as an extended reality content image display device.

[0045] exist Figure 2 In an exemplary embodiment of the present invention, the display device 200 may be integrally formed with a glasses-type frame. In an example, the display device 200 formed with a glasses-type frame may be easily carried and worn or removed by a user, or may be mounted or assembled into a glasses-type frame.

[0046] According to an exemplary aspect of the present disclosure, the display device 200 may display and provide an extended reality content image FH (such as, for example, a hologram) in a specific space through a 3D lens or a thin sheet, so that the extended reality content image FH can be recognized in a real space visible to the user's eyes. The real space may represent a physical environment. The extended reality content image FH may include two-dimensional (2D) or three-dimensional (3D) extended reality image content, which may include a combination of graphic images, images captured by a camera, and text images, as well as sound content.

[0047] Figure 3 2 is an exploded perspective view schematically showing a configuration of an augmented reality content image display device 200 according to an embodiment. Figure 4 2 is an exploded perspective view schematically showing a configuration of an augmented reality content image display device 200 according to an embodiment.

[0048] refer to Figure 3 , Figure 1 and Figure 2 The display device 200 for displaying the extended reality content image FH (such as, for example, a hologram) may be in a polygonal shape. For example, the shape of the display device 200 may be a polygonal plane, such as a square or rectangular plane or a quadrilateral plate. In some other embodiments, reference Figure 4 , the display device 200 may be in a circular shape, an elliptical shape, etc. For example, the display device 200 may be in a shape of a disk or a circular plate having a curved edge (such as, for example, a circular or elliptical edge).

[0049] In one or more embodiments, the display device 200 may be a quadrilateral (eg, Figure 3 as shown) or a circular plate (e.g. Figure 4), and includes at least one spatial light modulator 210, at least one surface light source device 110, and at least one image transmission member 310. Each of the spatial light modulator 210 and the surface light source device 110 may be shaped according to the planar structure or shape of the display device 200. For example, each of the spatial light modulator 210 and the surface light source device 110 may be a quadrilateral (e.g., as shown in FIG. 1 ) according to the planar structure or shape of the display device 200. Figure 3 as shown) or a circular plate (e.g. Figure 4 In some aspects, at least one image transmission member 310 may be shaped according to the planar structure or shape of the display device 200. For example, according to the planar structure or shape of the display device 200, at least one image transmission member 310 may be a quadrilateral (e.g., Figure 3 as shown) or a circular plate (e.g. Figure 4 shown).

[0050] exist Figure 3 and Figure 4 In the example of FIG. 1 , a case of a single surface light source device 110, a spatial light modulator 210, and an image transmission member 310 is shown. However, aspects of the present disclosure are not limited thereto, and it will be understood that the display device 200 may include a plurality of surface light source devices 110, spatial light modulators 210, and image transmission members 310. In some embodiments, each combination of the surface light source device 110, the spatial light modulator 210, and the image transmission member 310 may generate a corresponding augmented reality content image FH.

[0051] At least one surface light source device 110 is disposed behind the spatial light modulator 210 so that the at least one surface light source device 110 can provide background light as backlight to the rear surface of the spatial light modulator 210 .

[0052] The surface light source device 110 may include an organic light emitting display device (OLED), an inorganic electroluminescent (EL) display device, a quantum dot light emitting display device (QED), a cathode ray tube (CRT) display device, a micron light emitting diode (LED) display device, or a nano LED display device.

[0053] The case where an organic light emitting display panel is applied as the surface light source device 110 will be described herein as an example. However, the surface light source device 110 according to an exemplary aspect of the present disclosure is not limited to an organic light emitting display panel or device, and other display panels or devices listed herein or known in the art may also be applied within the scope of the shared technical spirit.

[0054] The surface light source device 110 applied as an organic light emitting display panel may be formed to have a different resolution than the at least one spatial light modulator 210. Specifically, for example, the surface light source device 110 may be formed to have a lower resolution than the at least one spatial light modulator 210.

[0055] The surface light source device 110 may receive the extended reality content image data from the outside (e.g., from a device different from the display device 200), and may arrange the extended reality content image data according to a preset first resolution. In an example, the display device 200 may convert the extended reality content image data of the first resolution into an analog image signal, and display the extended reality content image data on the emission area of ​​the organic light emitting display surface.

[0056] The augmented reality content image display light of the first resolution presented on the organic light emitting display surface of the surface light source device 110 (ie, on the emission area of ​​the surface light source device 110) is provided to the rear surface of the spatial light modulator 210 as backlight, ie, background light.

[0057] The spatial light modulator 210 generates an extended reality content image according to the extended reality content image data from the outside, and provides the extended reality content image to the image transmission member 310 in front of the spatial light modulator 210, so that the extended reality content image is displayed in the image display direction and space of the image transmission member 310. In other words, the spatial light modulator 210 can provide the extended reality content image in the image display direction and space of the image transmission member 310.

[0058] The spatial light modulator 210 may include a liquid crystal display (LCD) device that displays an augmented reality content image of the second resolution on the front surface of the spatial light modulator 210. For example, the LCD may display the augmented reality content image on the front surface of the spatial light modulator 210 by using a background light of the first resolution provided from the surface light source device 110 located behind the spatial light modulator 210.

[0059] The case of applying a liquid crystal display panel as the spatial light modulator 210 is described herein as an example. However, the embodiments described herein are not limited to liquid crystal display panels or devices, and other display devices listed herein or known in the art may also be applied within the scope of the shared technical spirit.

[0060] The spatial light modulator 210 used as a liquid crystal display panel may be formed to have the same resolution as or a different resolution from the at least one surface light source device 110. In an embodiment, the spatial light modulator 210 may be formed to have a higher resolution than the at least one surface light source device 110.

[0061] The spatial light modulator 210 can receive the extended reality content image data input from the outside, and can arrange the extended reality content image data according to the preset second resolution. In the example, the spatial light modulator 210 can convert the extended reality content image data of the second resolution into an analog image signal, and display the analog image signal on the image display surface on which a plurality of pixels are arranged. In some embodiments, the second resolution of the spatial light modulator 210 is set to be higher than the first resolution of the surface light source device 110. Therefore, for example, the spatial light modulator 210 can generate an extended reality content image of a second resolution higher than the first resolution by using the background light of the first resolution provided from at least one surface light source device 110 behind the spatial light modulator 210, and display the generated extended reality content image on the front surface of the spatial light modulator 210.

[0062] At least one image transmission component 310 can transmit an extended reality content image FH of a third resolution, in which the background light of the first resolution and the extended reality content image of the second resolution are mixed. At least one image transmission component 310 can transmit the extended reality content image FH through a preset optical path to guide and provide the extended reality content image FH in a preset image display direction. Specifically, for example, the image transmission component 310 can form a display path (or optical path) of the extended reality content image FH so that the extended reality content image FH of the third resolution can be displayed in a preset space or display surface.

[0063] In some embodiments, the third resolution is a mixture of the first resolution and the second resolution. For example, the third resolution can be different from the first resolution and the second resolution. In some examples, the third resolution can be between the first resolution and the second resolution.

[0064] The image transmission member 310 may include at least one optical member among an optical waveguide (e.g., a prism), a diverging lens, and a focusing lens. In an example, the extended reality content image FH displayed by the at least one spatial light modulator 210 is guided to a specific space through at least one of the optical waveguide, the diverging lens, and the focusing lens, and is recognized as an extended reality content image FH of a third resolution in the real space. The extended reality content image FH displayed as a hologram type by the image transmission member 310 may include 2D or 3D extended reality image content. In an example, the 2D or 3D extended reality image content may include a combination of a graphic image, an image captured by a camera, and a text image and sound content.

[0065] Figure 5 is a detailed plan view of a surface light source device 110 according to one or more embodiments of the present disclosure. For example, Figure 5 yes Figure 4FIG. 1 is a detailed plan view of the surface light source device 110 shown. It will be understood that Figure 5 Aspects of the surface light source device 110 described in the accompanying drawings may be similarly applied to Figure 3 The surface light source device 110 is provided.

[0066] refer to Figure 5 , the at least one surface light source device 110 is formed so that the at least one surface light source device 110 can be used as a light source capable of providing background light to the rear surface of the at least one spatial light modulator 210.

[0067] In a plan view, the surface light source device 110 may have a rectangular shape, a square shape, a circular shape, an elliptical shape or other square shape. For example, in an embodiment in which the spatial light modulator 210 is formed as a circular shape in a plan view, the surface light source device 110 may have a circular shape corresponding to the circular plate shape of the spatial light modulator 210. However, the embodiment is not limited thereto. For example, in an embodiment in which the spatial light modulator 210 is formed as a rectangular shape having a long side extending in a horizontal direction and a short side extending in a vertical direction, the surface light source device 110 may be formed as a rectangular shape having a long side extending in a horizontal direction and a short side extending in a vertical direction. In some embodiments, the surface light source device 110 and the spatial light modulator 210 may also be formed as a rectangular shape having a long side positioned in a horizontal direction and a short side positioned in a vertical direction.

[0068] refer to Figure 5 , at least one surface light source device 110 includes: a surface light-emitting unit (also called an organic light-emitting display unit) DU1, which presents background light as a surface light source; an emission driving circuit 120, which drives the light-emitting pixels of the surface light-emitting unit DU1; and a first data processor 140, which provides extended reality content image data of a first resolution to the emission driving circuit 120.

[0069] Specifically, for example, at least one surface light source device 110 includes a surface light emitting unit DU1 that presents background light as a surface light source. The surface light emitting unit DU1 may include a plurality of light emitting pixels, and the background light may be emitted by the light emitting pixels as a surface light source. The light emitting pixels in the surface light emitting unit DU1 are formed and arranged to correspond to a preset first resolution.

[0070] The first data processor 140 may extract the extended reality content image data of the first resolution from the extended reality content image data input from the outside. Optionally, the first data processor 140 may convert the extended reality content image data input from the outside into extended reality content image data of the preset first resolution. The first data processor 140 may transmit the extended reality content image data with the first resolution to the emission driving circuit 120 of the surface light source device 110.

[0071] The emission driving circuit 120 may output a data signal and a voltage for driving the light-emitting pixels of the surface light-emitting unit DU1. Specifically, for example, the emission driving circuit 120 may receive the extended reality content image data from the first data processor 140 (such as, for example, a graphics card), and arrange the extended reality content image data according to a preset first resolution. In the example, the emission driving circuit 120 may convert the extended reality content image data of the first resolution into an analog image signal, and provide the analog image signal to the light-emitting pixels arranged on the organic light-emitting display surface DA1 of the surface light-emitting unit DU1.

[0072] Figure 6 is a side cross-sectional view showing a cross-sectional structure of a surface light source device 110 according to one or more embodiments of the present disclosure. For example, Figure 6 It is shown Figure 4 FIG. 1 is a side cross-sectional view of the cross-sectional structure of the surface light source device 110 shown. It will be understood that Figure 6 Aspects of the surface light source device 110 described in the accompanying drawings may be similarly applied to Figure 3 The surface light source device 110 is provided.

[0073] refer to Figure 5 and Figure 6 The surface light emitting unit DU1 may be divided into a first main area MA1 and a first sub-area SBA1. The first main area MA1 may include an organic light emitting display surface DA1 on which a plurality of light emitting pixels performing surface emission are arranged, and a first non-display area NDA1 disposed around the organic light emitting display surface DA1.

[0074] Light emitted from each emission region or opening region of the light-emitting pixel may be presented as background light on the organic light-emitting display surface DA1. In one or more embodiments, the light-emitting pixel on the organic light-emitting display surface DA1 may include a pixel driver having a switching element, a pixel defining layer defining an emission region or an opening region, and a self-luminous element.

[0075] The first non-display area NDA1 may be an area outside the organic light emitting display surface DA1. The first non-display area NDA1 may be defined as an edge area of ​​the first main area MA1. The first non-display area NDA1 may include a first gate driver 111 that provides a gate signal to a gate line and a fan-out line (not shown) connecting the emission driving circuit 120 and the organic light emitting display surface DA1.

[0076] The first sub-area SBA1 may extend from one side of the first main area MA1. The first sub-area SBA1 may include a flexible material that may be bent, folded, or curled. For example, when the first sub-area SBA1 is bent, the first sub-area SBA1 (or a portion of the first sub-area SBA1) may overlap with the first main area MA1 in the thickness direction (Z-axis direction). The first sub-area SBA1 may include an emission driving circuit 120 and a pad unit (not shown) connected to the first circuit board 130. In some embodiments, the first sub-area SBA1 may be omitted, and the emission driving circuit 120 and the pad unit may be disposed in the first non-display area NDA1.

[0077] According to one or more embodiments of the present disclosure, at least one emission driving circuit 120 may be formed as an integrated circuit and mounted in the first non-display area NDA1 by a chip on glass (COG) method, a chip on plastic (COP) method, or an ultrasonic bonding method. For example, the emission driving circuit 120 may be disposed in the first sub-area SBA1 and may overlap with the first main area MA1 in the thickness direction (Z-axis direction) by bending of the first sub-area SBA1. In another example, the emission driving circuit 120 may be mounted on the first circuit board 130.

[0078] The first circuit board 130 may be attached to the pad unit of the first non-display area NDA1 using an anisotropic conductive film (ACF). The leads of the first circuit board 130 may be electrically connected to the pad unit of the first non-display area NDA1. The first circuit board 130 may be a flexible printed circuit board, a printed circuit board, or a flexible film (such as, for example, a chip on film).

[0079] Figure 6 The substrate SUB of the surface light-emitting unit DU1 shown may be a base substrate or a base member. The substrate SUB may be a flexible substrate that can be bent, folded, or curled. For example, the substrate SUB may include a glass material or a metal material. However, the embodiment is not limited thereto. In another example, the substrate SUB may include a polymer resin, such as polyimide (PI) as an example.

[0080] The first thin film transistor layer TFTL1 may be disposed on the substrate SUB. The first thin film transistor layer TFTL1 may include a plurality of thin film transistors constituting a pixel driver of a light emitting pixel. The first thin film transistor layer TFTL1 may also include a gate line, a data line, a power line, a gate control line, a fan-out line connecting the emission driving circuit 120 and the data line, and a lead connecting the emission driving circuit 120 and the pad unit. In an exemplary implementation in which the first gate driver 111 is formed on one side of the first non-display area NDA1 of the surface light emitting unit DU1, the first gate driver 111 may include a thin film transistor.

[0081] The first thin film transistor layer TFTL1 may be disposed throughout the organic light emitting display surface DA1, the first non-display area NDA1, and the first sub-area SBA1. The thin film transistors, gate lines, data lines, and power lines of the pixels of the first thin film transistor layer TFTL1 may be disposed on the organic light emitting display surface DA1. The gate control lines and fan-out lines of the first thin film transistor layer TFTL1 may be disposed in the first non-display area NDA1. The leads of the first thin film transistor layer TFTL1 may be disposed in the first sub-area SBA1.

[0082] The first light emitting element layer EML1 may be disposed on the first thin film transistor layer TFTL1. The first light emitting element layer EML1 may include a plurality of light emitting elements, each of which includes a first electrode, a light emitting layer, and a second electrode sequentially stacked to emit light. The light emitting elements of the first light emitting element layer EML1 may each include a pixel defining layer defining a pixel. The light emitting elements of the first light emitting element layer EML1 may be disposed on the organic light emitting display surface DA1.

[0083] The first encapsulation layer TFEL1 may cover the upper surface and the side surface of the first light emitting element layer EML1 and may protect the first light emitting element layer EML1. The first encapsulation layer TFEL1 may include at least one inorganic layer and at least one organic layer encapsulating the first light emitting element layer EML1.

[0084] Figure 7 It is schematically shown Figure 5 and Figure 6 FIG. 1 is a plan view of the structure of the organic light emitting display surface DA1 of the surface light source device 110. It will be understood that Figure 7 Aspects of the surface light source device 110 described in the accompanying drawings may be similarly applied to Figure 3 The surface light source device 110 is provided.

[0085] refer to Figure 7, the organic light emitting display surface DA1 of the surface light emitting unit DU1 is an area of ​​the surface light emitting unit DU1 that presents background light through surface light emission, and may be defined as a central area of ​​the surface light emitting unit DU1. The organic light emitting display surface DA1 may include a plurality of light emitting pixels OSP, gate lines GL, data lines DL, and power lines VL. Each of the light emitting pixels OSP may be defined as a minimum unit (or basic unit) that emits light.

[0086] The gate line GL may provide a gate signal received from the first gate driver 111 to a plurality of light-emitting pixels OSP at the same time. That is, for example, the first gate driver 111 may provide a gate signal to the light-emitting pixels OSP via the gate line GL. The gate line GL may extend in the X-axis direction and the Y-axis direction according to the arrangement direction and the plane shape of the light-emitting pixels OSP, and may be arranged around the light-emitting pixels OSP in the X-axis direction or the Y-axis direction. For example, the gate line GL may extend in the X-axis direction and the Y-axis direction and surround the light-emitting pixels OSP.

[0087] The data line DL may provide the light-emitting pixel OSP with an image data voltage received from the emission driving circuit 120. The data line DL may extend in the X-axis direction and the Y-axis direction according to the arrangement direction and the plane shape of the light-emitting pixel OSP, and may be arranged around the light-emitting pixel OSP in the X-axis direction or the Y-axis direction. For example, the data line DL may extend in the X-axis direction and the Y-axis direction and surround the light-emitting pixel OSP.

[0088] The power line VL may provide each power supply voltage received from the emission driving circuit 120 to the light-emitting pixel OSP. In one or more embodiments, the power supply voltage may be at least one of a high potential driving voltage, a low potential ground voltage, and a reference voltage. The power line VL may extend in the X-axis direction and the Y-axis direction according to the arrangement direction and the plane shape of the light-emitting pixel OSP, and may be arranged around the light-emitting pixel OSP in the X-axis direction or the Y-axis direction. For example, the power line VL may extend in the X-axis direction and the Y-axis direction and surround the light-emitting pixel OSP.

[0089] The first non-display area NDA1 may include a first gate driver 111, a fan-out line FOL, and a first gate control line GCL1. The first gate driver 111 may generate a gate signal in units of at least one frame period based on a gate control signal, and may simultaneously provide the gate signal to the gate line GL in units of at least one frame period. For example, the gate control signal and the corresponding gate control signal may each correspond to a unit of one frame period or a unit of a plurality of frame periods.

[0090] The fan-out line FOL may extend from the emission driving circuit 120 to the organic light emitting display surface DA1. The fan-out line FOL may simultaneously provide a plurality of data lines DL with a data voltage received from the emission driving circuit 120 in units of at least one frame period. For example, the data voltage may correspond to a frame period or a plurality of frame periods.

[0091] The first gate control line GCL1 may extend from the emission driving circuit 120 to the first gate driver 111. The first gate control line GCL1 may provide a gate control signal received from the emission driving circuit 120 to the first gate driver 111. That is, for example, the emission driving circuit 120 of the display device 200 may provide the gate control signal to the first gate driver 111 via the first gate control line GCL1 in units of at least one frame period.

[0092] The emission driving circuit 120 provides a gate control signal to the first gate driver 111 through the first gate control line GCL1. Therefore, for example, the first gate driver 111 can provide a control signal for simultaneously driving a plurality of light-emitting pixels OSP to the light-emitting pixel OSP, such as a scan control signal as an example. Here, for example, the emission driving circuit 120 can output an analog image signal for simultaneously driving a plurality of light-emitting pixels OSP to a plurality of fan-out lines FOL. The emission driving circuit 120 can simultaneously provide an analog image signal to a plurality of data lines DL through the fan-out lines FOL. The analog image signal can be provided to the light-emitting pixel OSP, and the brightness of the light-emitting pixel OSP can be determined. That is, for example, the emission driving circuit 120 of the display device 200 can provide a plurality of light-emitting pixels OSP (and at least reference hereinafter) through the data lines DL and the fan-out lines FOL. Fig.10 The sub-pixels OSP1 to OSP3) described herein provide analog image signals simultaneously.

[0093] Figure 8 is a circuit diagram showing a circuit structure of a light emitting pixel OSP according to an embodiment of the present disclosure.

[0094] refer to Figure 8 as well as Figure 7 , each of the light emitting pixels OSP arranged on the organic light emitting display surface DA1 may include a plurality of pixel drivers DP1 to DPn and a light emitting element LEL.

[0095] The light emitting elements LEL are connected in series with the pixel drivers DP1 to DPn, and emit light in response to driving currents simultaneously input from the pixel drivers DP1 to DPn. Figure 8 In the example, the pixel drivers DP1 to DPn are connected in parallel, and the parallel-connected pixel drivers DP1 to DPn are connected in series with the light emitting element LEL.

[0096] The pixel drivers DP1 to DPn may receive the same control signal and analog image signal at the same timing through the first gate driver 111 and the emission driving circuit 120, and drive the light emitting elements LEL connected in series with the pixel drivers DP1 to DPn at the same driving timing in units of at least one frame. For example, the first gate driver 111 may provide the same control signal (or multiple control signals) to the pixel drivers DP1 to DPn, and the emission driving circuit 120 may provide the same analog image signal to the pixel drivers DP1 to DPn.

[0097] In an exemplary embodiment, the light-emitting pixel OSP is set at an ultra-low resolution. For example, the light-emitting pixel OSP may be formed in units of at least three light-emitting pixels OSP and disposed on the organic light-emitting display surface DA1. In other words, the light-emitting pixel OSP may be formed in units of at least three light-emitting pixels OSP and disposed on the organic light-emitting display surface DA1. For example, the number of light-emitting pixels OSP disposed on the organic light-emitting display surface DA1 may be a multiple of 3 (e.g., 3, 6, 9, 12, 15, etc.).

[0098] The planar area of ​​the light emitting element LEL of each light emitting pixel OSP is inversely proportional to the resolution value. That is, for example, the planar area of ​​each light emitting element LEL may be inversely proportional to the resolution at which the light emitting element LEL is set. Since the resistance-capacitance (RC) value of each light emitting element LEL increases as the planar area of ​​each light emitting element LEL increases, each light emitting element LEL is connected to a plurality of pixel drivers DP1 to DPn to prevent a reduction in the amount of light emitted from each light emitting element LEL. In an example, the pixel drivers DP1 to DPn of each light emitting pixel OSP may receive control signals and analog image signals at the same timing, and drive the light emitting element LEL at the same driving timing.

[0099] refer to Figure 8 , each of the pixel drivers DP1 to DPn of each light emitting pixel OSP may be connected to a kth display initialization line GILk, a kth display scan line GLk, a kth display control line GCLk, and a kth emission control line VLk.

[0100] In some aspects, each of the pixel drivers DP1 to DPn may be connected to a first driving voltage line VDL to which a high potential first driving voltage is supplied, a second driving voltage line VSL to which a low potential second driving voltage is supplied, and a third driving voltage line VIL to which a high potential third driving voltage is supplied. Hereinafter, letters k and n used instead of numbers will be defined as positive integers not including zero.

[0101] Each of the pixel drivers DP1 to DPn of each light emitting pixel OSP may include a driving transistor DT, a switching element, and a capacitor CST1. The switching element includes first to sixth transistors ST1 to ST6.

[0102] The driving transistor DT of each of the pixel drivers DP1 to DPn may include a gate electrode, a first electrode, and a second electrode. The driving transistor DT may control a drain-source current (Ids) (hereinafter, referred to as a "driving current") flowing between the first electrode and the second electrode according to a data voltage applied to the gate electrode. The driving current (Ids) flowing through the channel of the driving transistor DT is proportional to the square of the difference between the voltage (Vsg) between the first electrode and the gate electrode of the driving transistor DT and the threshold voltage (Vth), as shown in Formula 1.

[0103] Ids = k' × (Vsg - Vth) 2 (1)

[0104] In Formula 1, k' is a proportionality coefficient determined by the structure and physical characteristics of the driving transistor, Vsg is a voltage between the first electrode and the gate electrode of the driving transistor, and Vth is a threshold voltage of the driving transistor.

[0105] The light emitting element LEL emits light according to the driving current (Ids) simultaneously provided by the pixel drivers DP1 to DPn. As the driving current (Ids) provided in parallel from the pixel drivers DP1 to DPn increases, the amount of light emitted from the light emitting element LEL may increase.

[0106] The light emitting element LEL may be an organic light emitting diode including an organic light emitting layer disposed between an anode and a cathode. Alternatively, the light emitting element LEL may be an inorganic light emitting element including an inorganic semiconductor disposed between an anode and a cathode. Alternatively, the light emitting element LEL may be a quantum dot light emitting element including a quantum dot light emitting layer disposed between an anode and a cathode. Alternatively, the light emitting element LEL may be a micrometer light emitting element including a micrometer light emitting diode disposed between an anode and a cathode. In one or more embodiments, the display device 200 may include light emitting elements LEL of the same type (e.g., an organic light emitting diode, an inorganic light emitting element, etc. described herein) or different types.

[0107] The anode of each light emitting element LEL may be connected to the first electrode of the fourth transistor ST4 and the second electrode of the sixth transistor ST6 of each of the pixel drivers DP1 to DPn, and the cathode may be connected to the second driving voltage line VSL. A parasitic capacitor Cel may be formed between the anode and the cathode of the light emitting element LEL.

[0108] The first transistor ST1 may be turned on by an initialization scan signal of the kth display initialization line GILk, and in the on state, the first transistor ST1 connects the gate electrode of the driving transistor DT to the third driving voltage line VIL. Therefore, for example, the third driving voltage of the third driving voltage line VIL may be applied to the gate electrode of the driving transistor DT. The first transistor ST1 may have a gate electrode connected to the kth display initialization line GILk, a first electrode connected to the gate electrode of the driving transistor DT, and a second electrode connected to the third driving voltage line VIL.

[0109] The second transistor ST2 is turned on by the display scan signal of the k-th display scan line GLk, and in the turned-on state, the second transistor ST2 connects the first electrode of the driving transistor DT to the data line DL. Therefore, for example, the data voltage of the data line DL can be applied to the first electrode of the driving transistor DT. The second transistor ST2 may have a gate electrode connected to the k-th display scan line GLk, a first electrode connected to the first electrode of the driving transistor DT, and a second electrode connected to the data line DL.

[0110] The third transistor ST3 is turned on by the display scan signal of the kth display scan line GLk, and in the turned-on state, the third transistor ST3 connects the gate electrode and the second electrode of the driving transistor DT. When the gate electrode and the second electrode of the driving transistor DT are connected, the driving transistor DT operates as a diode. The third transistor ST3 may have a gate electrode connected to the kth display scan line GLk, a first electrode connected to the second electrode of the driving transistor DT, and a second electrode connected to the gate electrode of the driving transistor DT.

[0111] The fourth transistor ST4 is turned on by the display control signal of the kth display control line GCLk, and in the on state, the fourth transistor ST4 connects the anode of the light emitting element LEL to the third driving voltage line VIL. The third driving voltage of the third driving voltage line VIL may be applied to the anode of the light emitting element LEL. The fourth transistor ST4 may have a gate electrode connected to the kth display control line GCLk, a first electrode connected to the anode of the light emitting element LEL, and a second electrode connected to the third driving voltage line VIL.

[0112] The fifth transistor ST5 is turned on by the emission signal of the kth emission control line VLk, and in the turned-on state, the fifth transistor ST5 connects the first electrode of the driving transistor DT to the first driving voltage line VDL. The fifth transistor ST5 may have a gate electrode connected to the kth emission control line VLk, a first electrode connected to the first driving voltage line VDL, and a second electrode connected to the first electrode of the driving transistor DT.

[0113] The sixth transistor ST6 is disposed between the second electrode of the driving transistor DT and the anode of the light emitting element LEL. The sixth transistor ST6 is turned on by the emission signal of the kth emission control line VLk, and in the on state, the sixth transistor ST6 connects the second electrode of the driving transistor DT to the anode of the light emitting element LEL. The sixth transistor ST6 may have a gate electrode connected to the kth emission control line VLk, a first electrode connected to the second electrode of the driving transistor DT, and a second electrode connected to the anode of the light emitting element LEL.

[0114] When both the fifth transistor ST5 and the sixth transistor ST6 are turned on, a driving current (Ids) of the driving transistor DT according to a data voltage applied to the gate electrode of the driving transistor DT may flow to the light emitting element LEL.

[0115] The capacitor CST1 is formed between the gate electrode of the driving transistor DT and the first driving voltage line VDL. A first capacitor electrode of the capacitor CST1 may be connected to the gate electrode of the driving transistor DT, and a second capacitor electrode may be connected to the first driving voltage line VDL.

[0116] In an example, the first electrode of each of the first to sixth transistors ST1 to ST6 and the driving transistor DT is a source electrode, and the second electrode is a drain electrode. Alternatively, in another example, the first electrode of each of the first to sixth transistors ST1 to ST6 and the driving transistor DT is a drain electrode, and the second electrode is a source electrode.

[0117] The active layer of each of the first to sixth transistors ST1 to ST6 and the driving transistor DT may be formed of any one of polysilicon, amorphous silicon, and an oxide semiconductor. Figure 8 , the case where the first transistor ST1 to the sixth transistor ST6 and the driving transistor DT are formed as a P-type metal oxide semiconductor field effect transistor (MOSFET) is described, but the embodiment is not limited thereto. For example, the first transistor ST1 to the sixth transistor ST6 and the driving transistor DT may also be formed as an N-type MOSFET. Optionally, in the example, at least one of the first transistor ST1 to the sixth transistor ST6 may be formed as an N-type MOSFET.

[0118] Fig. 9 The first embodiment shows Figure 7 FIG. 1 is a plan view of an arrangement structure of light-emitting pixels OSP of a surface light-emitting unit DU1. Fig.10 The second embodiment is shown in FIG. Figure 7 FIG. 1 is a plan view of an arrangement structure of light-emitting pixels OSP of a surface light-emitting unit DU1.

[0119] refer to Fig. 9 and Fig.10 , the organic light emitting display surface DA1 may be formed in a circular shape in a plan view according to the planar shape of the surface light source device 110. Light emitted from the light emitting element LEL of each light emitting pixel OSP may be presented as background light on the organic light emitting display surface DA1. The light emitting element LEL of each light emitting pixel OSP emits light in response to a driving current provided in parallel from a plurality of pixel drivers DP1 to DPn.

[0120] In one or more embodiments, the light-emitting pixels OSP may be formed in units of at least three and disposed on the organic light-emitting display surface DA1. Therefore, for example, the number of light-emitting elements LEL disposed on the organic light-emitting display surface DA1 may be a multiple of 3 (eg, 3, 6, 9, 12, 15, 18 ...).

[0121] On the organic light-emitting display surface DA1 formed in a circular shape in a plan view, the light-emitting element LEL may be approximately formed in a fan-shaped shape, a triangular shape, a quadrilateral shape (e.g., a diamond shape), a circular shape, a semicircular shape, and an elliptical shape in a plan view, or may be formed in a combination of a plurality of shapes. For example, one or more light-emitting elements LEL may be formed by a combination of a first shape (e.g., a fan-shaped shape) and at least one other shape (e.g., a triangular shape, a quadrilateral shape, etc.).

[0122] refer to Fig. 9 and Fig.10 , the light emitting elements LEL formed in a sector shape may be arranged in a circular shape in a plan view so that the light emitting elements LEL surround the center (or center point) of the organic light emitting display surface DA1 in a circular shape. The plane area of ​​each light emitting element LEL is inversely proportional to the resolution value. That is, for example, Fig. 9 As shown in FIG. 1 , when the number of light emitting elements LEL is small and the resolution is low, the plane area of ​​each light emitting element LEL can be large. On the contrary, for example, Fig.10 As shown, when the number of light emitting elements LEL is large and the resolution is high, the planar area of ​​each light emitting element LEL can be smaller.

[0123] Power lines VL (eg, first, second, and third driving voltage lines VDL, VSL, and VIL) that supply power voltages to the pixel drivers DP1 to DPn and the light emitting elements LEL may be disposed and formed between and around the light emitting elements LEL.

[0124] As described herein, since the RC value of each light emitting element LEL increases as the planar area of ​​each light emitting element LEL increases, each light emitting element LEL is connected to a plurality of pixel drivers DP1 to DPn, which prevents a reduction in the amount of light emitted from each light emitting element LEL. The pixel drivers DP1 to DPn of each light emitting pixel OSP may be formed and disposed along at least any one side surface of the light emitting element LEL to partially overlap the light emitting element LEL. The pixel drivers DP1 to DPn of each light emitting pixel OSP may receive a scan control signal and an analog image signal at the same timing, and drive the light emitting element LEL at the same driving timing.

[0125] refer to Fig.10 , the first to third sub-pixels OSP1 to OSP3 capable of presenting red light, green light, and blue light, respectively, may constitute each unit light-emitting pixel UP capable of emitting white light, and the unit light-emitting pixels UP may be alternately and repeatedly arranged on the organic light-emitting display surface DA1. The unit light-emitting pixels UP may be arranged in a circular shape in a plan view, so that the unit light-emitting pixels UP surround the center (or center point) of the organic light-emitting display surface DA1 in a circular shape.

[0126] Fig.11 The third embodiment shows Figure 7 FIG. 1 is a plan view of an arrangement structure of light-emitting pixels OSP of a surface light-emitting unit DU1.

[0127] refer to Fig.11 , the first to third sub-pixels OSP1 to OSP3 formed in an approximately fan-shaped, triangular, or quadrilateral shape in a plan view may be disposed on the organic light emitting display surface DA1 formed in a circular shape in a plan view. Fig.11 In the example, the first sub-pixel OSP1 is approximately in a quadrilateral shape, the second sub-pixel OSP2 is in a fan-shaped shape (or an approximately triangular shape), and the third sub-pixel OSP3 is in an approximately quadrilateral shape.

[0128] For example, the first to third sub-pixels OSP1 to OSP3 formed in an approximately triangular shape and an approximately quadrilateral shape (i.e., the light-emitting elements LEL of the first to third sub-pixels OSP1 to OSP3) may be arranged in a circular shape in a plan view so that the light-emitting elements LEL surround the center of the organic light-emitting display surface DA1 in a circular shape. Here, for example, when the number of light-emitting elements LEL arranged is small and the resolution is low, the planar area of ​​each light-emitting element LEL may be large. On the contrary, when the number of light-emitting elements LEL arranged is large and the resolution is high, the planar area of ​​each light-emitting element LEL may be small. In one or more embodiments, the light-emitting elements LEL of the first to third sub-pixels OSP1 to OSP3 may have the same planar area. For example, the light emitting element LEL is formed such that the respective planar areas of the light emitting elements LEL in the first sub-pixel OSP1 are the same (e.g., in shape and / or total area), the respective planar areas of the light emitting elements LEL in the second sub-pixel OSP2 are the same, and the respective planar areas of the light emitting elements LEL in the third sub-pixel OSP3 are the same. In some other embodiments, the light emitting element LEL may be formed such that the respective planar areas of the light emitting element LEL are different.

[0129] A plurality of pixel drivers DP1 to DPn are connected to each of the light emitting elements LEL formed in an approximately fan-shaped shape, an approximately triangular shape, or an approximately quadrilateral shape. The pixel drivers DP1 to DPn of each of the first to third sub-light emitting pixels OSP1 to OSP3 may be formed and disposed along at least any one side surface of the light emitting element LEL to partially overlap the light emitting element LEL. The pixel drivers DP1 to DPn of each of the first to third sub-light emitting pixels OSP1 to OSP3 receive control signals and data voltages at the same timing and drive the light emitting elements LEL at the same driving timing.

[0130] As described herein, the first to third sub-pixels OSP1 to OSP3 capable of presenting red light, green light, and blue light, respectively, may constitute each unit light-emitting pixel UP, and the unit light-emitting pixels UP may be alternately and repeatedly arranged on the organic light-emitting display surface DA1. The unit light-emitting pixels UP may be arranged in a circular shape in a plan view so that the unit light-emitting pixels UP surround the center of the organic light-emitting display surface DA1 in a circular shape.

[0131] Fig.12 The fourth embodiment shows Figure 7 FIG. 1 is a plan view of an arrangement structure of light-emitting pixels OSP of a surface light-emitting unit DU1.

[0132] refer to Fig.12 , the light emitting element LEL included in any one of the first to third sub-pixels OSP1 to OSP3 may be formed in an approximately triangular shape. In addition, the light emitting element LEL included in the other two of the first to third sub-pixels OSP1 to OSP3 may be formed in an approximately quadrilateral shape. Therefore, for example, each unit light emitting pixel UP composed of a combination of the first to third sub-pixels OSP1 to OSP3 may be formed and arranged in an approximately fan-shaped shape. Fig.12 In the example of FIG. 1 , the first sub-pixel OSP1 is approximately in a quadrilateral shape, the second sub-pixel OSP2 is approximately in a quadrilateral shape, and the third sub-pixel OSP3 is approximately in a triangular shape.

[0133] The unit light-emitting pixel UP formed in an approximately fan-shaped shape (i.e., the light-emitting elements LEL included in the first sub-pixel OSP1 to the third sub-pixel OSP3 of the unit light-emitting pixel UP) may be arranged in a circular shape in a plan view, so that the unit light-emitting pixel UP (and the light-emitting elements LEL included therein) surround the center of the organic light-emitting display surface DA1 in a circular shape. Here, for example, the light-emitting elements LEL of the first sub-pixel OSP1 to the third sub-pixel OSP3 of the unit light-emitting pixel UP may all have the same planar area. For example, the light-emitting elements LEL are formed so that the respective planar areas of the light-emitting elements LEL in the first sub-pixel OSP1 are the same (e.g., in shape and / or total area), the respective planar areas of the light-emitting elements LEL in the second sub-pixel OSP2 are the same, and the respective planar areas of the light-emitting elements LEL in the third sub-pixel OSP3 are the same.

[0134] At least one pixel driver DP1 to DPn may be connected to the light emitting element LEL of each of the first to third sub-light emitting pixels OSP1 to OSP3. For example, for at least one of the first sub-light emitting pixels OSP1, at least one of the second sub-light emitting pixels OSP2, and / or at least one of the third sub-light emitting pixels OSP3, a pixel driver may be connected to the corresponding light emitting element LEL. The unit light emitting pixels UP may receive the control signal and the data voltage at the same timing and drive the light emitting element LEL at the same driving timing.

[0135] Fig.13 is a diagram showing the first embodiment of the present invention. Fig.10 and Fig.12 A cross-sectional view of the cross-sectional structure of the plane cut along line II'.

[0136] As explained herein, since the RC value of each light emitting element LEL increases as the planar area of ​​each light emitting element LEL increases, each light emitting element LEL is connected to a plurality of pixel drivers DP1 to DPn, which prevents a reduction in the amount of light emitted from each light emitting element LEL. The pixel drivers DP1 to DPn of each light emitting pixel OSP may be formed and disposed along at least any one side surface of the light emitting element LEL such that the pixel drivers DP1 to DPn partially overlap the light emitting element LEL in a Z-axis direction which is a thickness direction.

[0137] In addition, in some aspects, since the RC value of each light emitting element LEL increases as the planar area of ​​each light emitting element LEL increases, the present disclosure supports the application of a structure that reduces the RC value of each light emitting element LEL in order to prevent a reduction in the amount of light emitted from each light emitting element LEL.

[0138] Specifically, for example, the light emitting element LEL of each sub-pixel OSP1 to OSP3 is formed in a structure in which a first planar electrode D2, a first light emitting electrode 171, an organic light emitting layer 172, and a common electrode 173 are stacked. The first planar electrode D2 extends from a drain terminal formed in at least any one thin film transistor ST (such as, for example, the sixth transistor ST6), and is formed as a plane in the emission region.

[0139] refer to Fig.13 as well as Fig.12 , the first planar electrode D2 extends from the drain terminal of at least one thin film transistor ST formed in each of the pixel drivers DP1 to DPn, and is arranged in a plane in the emission region where the light emitting element LEL is formed. In addition, for example, the first light emitting electrode 171 used as a pixel electrode is formed in the emission region so that the first light emitting electrode 171 covers the first planar electrode D2 and overlaps with a portion of the front surface of the first planar electrode D2.

[0140] Aspects of the present disclosure support reducing or lowering the RC value of the first light emitting electrode 171 overlapping and contacting the first planar electrode D2 in a planar shape according to the thickness and planar area of ​​the first planar electrode D2.

[0141] The organic light emitting layer 172 is formed and disposed on the front surface of the first light emitting electrode 171. In addition, for example, the common electrode 173 may be formed and disposed on the entire organic light emitting display surface DA1 so that the common electrode 173 covers the entire organic light emitting layer 172 of the light emitting element LEL.

[0142] Now refer to Fig.12 and Fig.13A method of forming any one of the thin film transistor ST and the light emitting element LEL in each of the sub-light emitting pixels OSP1 to OSP3 according to one or more embodiments of the present disclosure is described in detail.

[0143] A barrier layer BR may be provided on the substrate SUB. The substrate SUB may be formed of an insulating material such as, for example, a polymer resin. For example, the substrate SUB may be formed of polyimide. The substrate SUB may be a flexible substrate that may be bent, folded, or rolled.

[0144] The barrier layer BR is a layer for protecting the thin film transistor ST of the thin film transistor layer TFTL and the organic light emitting layer 172 of the light emitting element layer EML from moisture introduced through the substrate SUB which is easily permeable to moisture. The barrier layer BR may be composed of a plurality of inorganic layers alternately stacked. Figures 13 to 15 The light emitting element layer EML described includes reference Figure 6 Aspects of the first light emitting element layer EML1 are described.

[0145] The thin film transistor ST of each of the pixel drivers DP1 to DPn may be formed and disposed on the barrier layer BR. Each of the thin film transistors ST includes an active layer ACT1, a gate electrode G1, a source electrode S1, and a drain electrode D1.

[0146] For example, the active layer ACT1, the source electrode S1, and the drain electrode D1 of the thin film transistor ST may be disposed on the barrier layer BR. The active layer ACT1 of the thin film transistor ST may include polycrystalline silicon, single crystal silicon, low temperature polycrystalline silicon, amorphous silicon, or an oxide semiconductor. The active layer ACT1 overlapping the gate electrode G1 in the thickness direction of the substrate SUB may be defined as a channel region. In one or more embodiments, the source electrode S1 and the drain electrode D1 are regions that do not overlap with the gate electrode G1, and may be formed to have conductivity by doping a silicon semiconductor or an oxide semiconductor with ions or impurities.

[0147] A gate insulating layer 131 may be disposed on the active layer ACT1, the source electrode S1, and the drain electrode D1 of the thin film transistor ST. The gate insulating layer 131 may be formed of an inorganic layer such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0148] The gate electrode G1 of the thin film transistor ST may be disposed on the gate insulating layer 131. The gate electrode G1 may overlap the active layer ACT1 in the thickness direction. Each of the gate electrodes G1 may be a single layer or a multilayer formed of any one or more of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and alloys thereof.

[0149] A first interlayer insulating layer 141 may be disposed on the gate electrode G1 of the thin film transistor ST. The first interlayer insulating layer 141 may be formed of an inorganic layer such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The first interlayer insulating layer 141 may include a plurality of inorganic layers. For example, the first interlayer insulating layer 141 may include one or more examples of the inorganic layer described herein.

[0150] A plurality of contact holes are formed in the first interlayer insulating layer 141, and a source terminal and a drain terminal are formed in the contact holes of the first interlayer insulating layer 141 (also referred to herein as a first interlayer insulating film). Here, for example, the first planar electrode D2 is integrated with the drain terminal and is formed as a plane in the emission region forming the light emitting element LEL. The first planar electrode D2 and the source terminal and the drain terminal may each be a single layer or a multilayer formed of any one or more of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and alloys thereof.

[0151] A first light emitting electrode 171 serving as a pixel electrode (or anode) of the light emitting element LEL is formed in the emission region including the first planar electrode D2. Here, for example, the first light emitting electrode 171 is formed in the emission region so that the first light emitting electrode 171 covers the first planar electrode D2 and overlaps with a portion of the front surface of the first planar electrode D2. The RC value of the first light emitting electrode 171 overlapping and contacting the first planar electrode D2 in a planar shape is reduced or lowered according to the thickness and planar area of ​​the first planar electrode D2.

[0152] The pixel defining layer 190 may be formed on the first interlayer insulating layer 141 on which the first light emitting electrode 171 is disposed, such that the pixel defining layer 190 separates the first light emitting electrode 171 .

[0153] Then, an organic light emitting layer 172 may be formed in each of the emission regions respectively including the first light emitting electrode 171 , and a common electrode 173 may be formed and disposed on the entire organic light emitting display surface DA1 so that the common electrode 173 covers the entire organic light emitting layer 172 of the light emitting element LEL.

[0154] Fig.14 is a diagram showing a second embodiment of the present invention. Fig.10 and Fig.12 A cross-sectional view of the cross-sectional structure of the plane cut along line II'.

[0155] As described herein, since the RC value of each light emitting element LEL increases as the planar area of ​​each light emitting element LEL increases, the present disclosure applies a structure that reduces the RC resistance of each light emitting element LEL, which prevents a reduction in the amount of light emitted from each light emitting element LEL.

[0156] Specifically, for example, the light emitting element LEL of each sub-pixel OSP1 to OSP3 is formed as a structure in which a floating gate electrode G2, a first plane electrode D2, a first light emitting electrode 171, an organic light emitting layer 172, and a common electrode 173 are stacked. The floating gate electrode G2 is formed by the same process as the gate electrode G1 formed in at least any one of the thin film transistors ST (for example, taking the sixth transistor ST6 as an example). The floating gate electrode G2 is electrically separated from the gate electrode G1. The floating gate electrode G2 is arranged in a plane in the emission region where the light emitting element LEL is formed.

[0157] refer to Fig.14 as well as Fig.12 The floating gate electrode G2 is formed by the same process as the gate electrode G1 formed in at least any one thin film transistor ST of each of the pixel drivers DP1 to DPn. The floating gate electrode G2 is electrically separated from the gate electrode G1 and is formed and arranged in a plane in the emission region where the light emitting element LEL is formed.

[0158] The first planar electrode D2 extends from a drain terminal formed in at least any one of the thin film transistors ST, and is formed in the emission region such that the first planar electrode D2 covers the floating gate electrode G2 and overlaps a portion of the front surface of the floating gate electrode G2.

[0159] In addition, a first light emitting electrode 171 serving as a pixel electrode (or an anode) is formed in the emission region such that the first light emitting electrode 171 covers the first planar electrode D2 and overlaps a portion of a front surface of the first planar electrode D2.

[0160] Aspects of the present disclosure support reducing or lowering the RC value of the first light emitting electrode 171 overlapping and contacting the floating gate electrode G2 and the first planar electrode D2 in a planar shape according to the thickness and planar area of ​​the floating gate electrode G2 and the first planar electrode D2 overlapping and electrically connected to each other.

[0161] The organic light emitting layer 172 is formed and disposed on the front surface of the first light emitting electrode 171. In addition, for example, the common electrode 173 may be formed and disposed on the entire organic light emitting display surface DA1 so that the common electrode 173 covers the entire organic light emitting layer 172 of the light emitting element LEL.

[0162] Now refer to Fig.12 and Fig.14A method of forming any one of the thin film transistor ST and the light emitting element LEL in each of the sub-light emitting pixels OSP1 to OSP3 according to one or more embodiments of the present disclosure is described in detail.

[0163] A gate insulating layer 131 may be disposed on the active layer ACT1, the source electrode S1, and the drain electrode D1 of each thin film transistor ST, and a gate electrode G1 and a floating gate electrode G2 of each thin film transistor ST may be simultaneously formed and disposed on the gate insulating layer 131. Here, for example, the gate electrode G1 is formed and disposed so that the gate electrode G1 overlaps the active layer ACT1 in the thickness direction, and the floating gate electrode G2 is electrically separated from the gate electrode G1, and is formed and disposed in a plane in an emission region where the light emitting element LEL is formed.

[0164] Each of the gate electrode G1 and the floating gate electrode G2 can be a single layer or a multilayer formed of any one or more of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu) and their alloys.

[0165] A first interlayer insulating layer 141 may be disposed on the gate electrode G1 of the thin film transistor ST.

[0166] A plurality of contact holes are formed in the first interlayer insulating layer 141, and a source terminal and a drain terminal are formed in the contact holes of the first interlayer insulating layer 141. Here, for example, the first planar electrode D2 is integrated with the drain terminal and is formed as a plane in the emission region where the light emitting element LEL is formed. The first planar electrode D2 extends from the drain terminal formed in at least any one of the thin film transistors ST and is formed in the emission region so that the first planar electrode D2 covers the floating gate electrode G2 and overlaps a portion of the front surface of the floating gate electrode G2.

[0167] A first light emitting electrode 171 serving as a pixel electrode (or anode) of the light emitting element LEL is formed in the emission region including the first planar electrode D2. Here, for example, the first light emitting electrode 171 is formed in the emission region so that the first light emitting electrode 171 covers the first planar electrode D2 and overlaps with a portion of the front surface of the first planar electrode D2. The RC value of the first light emitting electrode 171 overlapping and contacting the floating gate electrode G2 and the first planar electrode D2 in a planar shape is reduced or lowered according to the thickness and planar area of ​​the floating gate electrode G2 and the first planar electrode D2.

[0168] The pixel defining layer 190 may be formed on the first interlayer insulating layer 141 on which the first light emitting electrode 171 is disposed, such that the pixel defining layer 190 separates the first light emitting electrode 171 .

[0169] Then, an organic light emitting layer 172 may be formed in each of the emission regions respectively including the first light emitting electrode 171 , and a common electrode 173 may be formed and disposed on the entire organic light emitting display surface DA1 so that the common electrode 173 covers the entire organic light emitting layer 172 of the light emitting element LEL.

[0170] Fig.15 is a diagram showing a method of moving the Fig.10 and Fig.12 A cross-sectional view of the cross-sectional structure of the plane cut along line II'.

[0171] refer to Fig.15 , the light emitting element LEL of each sub-pixel OSP1 to OSP3 is formed in a structure in which a floating gate electrode G2, a floating capacitor electrode CAE2, a first plane electrode D2, a first light emitting electrode 171, an organic light emitting layer 172, and a common electrode 173 are stacked. The floating capacitor electrode CAE2 is formed in the emission region such that the floating capacitor electrode CAE2 covers the floating gate electrode G2 and overlaps a portion of the front surface of the floating gate electrode G2.

[0172] refer to Fig.12 and Fig.15 The floating gate electrode G2 is formed by the same process as the gate electrode G1 formed in at least any one thin film transistor ST of each of the pixel drivers DP1 to DPn. The floating gate electrode G2 is electrically separated from the gate electrode G1 and is formed and arranged in a plane in the emission region where the light emitting element LEL is formed.

[0173] The floating capacitor electrode CAE2 is formed by the same process as the capacitor electrode CAE1 formed in the capacitor of each of the pixel drivers DP1 to DPn. The floating capacitor electrode CAE2 is electrically separated from the capacitor electrode CAE1, and is formed and arranged in a plane in the emission region so that the floating capacitor electrode CAE2 covers the floating gate electrode G2 and overlaps a portion of the front surface of the floating gate electrode G2.

[0174] The first planar electrode D2 extends from a drain terminal formed in at least any one thin film transistor ST and is formed in a planar structure in the emission region such that the first planar electrode D2 covers the floating capacitor electrode CAE2 and overlaps a portion of the front surface of the floating capacitor electrode CAE2.

[0175] The first light emitting electrode 171 serving as a pixel electrode (or an anode) is formed in the emission region such that the first light emitting electrode 171 covers the first planar electrode D2 and overlaps a portion of the front surface of the first planar electrode D2.

[0176] Aspects of the present disclosure support reducing or lowering the RC value of the first light emitting electrode 171 overlapping and contacting the floating capacitor electrode CAE2, the floating gate electrode G2 and the first planar electrode D2 in a planar shape according to the thickness and planar area of ​​the floating capacitor electrode CAE2, the floating gate electrode G2 and the first planar electrode D2 that overlap and are electrically connected to each other.

[0177] The organic light emitting layer 172 is formed and disposed on the front surface of the first light emitting electrode 171. In addition, the common electrode 173 may be formed and disposed on the entire organic light emitting display surface DA1 such that the common electrode 173 covers the entire organic light emitting layer 172 of the light emitting element LEL.

[0178] Now refer to Fig.12 and Fig.15 A method of forming any one of the thin film transistor ST and the light emitting element LEL in each of the sub-light emitting pixels OSP1 to OSP3 according to one or more embodiments of the present disclosure is described in detail.

[0179] A first interlayer insulating layer 141 may be disposed on the gate electrode G1 of the thin film transistor ST. Then, the first interlayer insulating layer 141 overlapping the floating gate electrode G2 may be etched and removed. Thus, the first interlayer insulating layer 141 may be disposed in a region where the thin film transistor ST is formed, and the first interlayer insulating layer 141 may not be disposed in a region where the thin film transistor ST is not formed.

[0180] The capacitor electrode CAE1 is formed and disposed on the first interlayer insulating layer 141 so that the capacitor electrode CAE1 overlaps the gate electrode G1 of each thin film transistor ST. At the same time, for example, a floating capacitor electrode CAE2 separated from the capacitor electrode CAE1 is formed and disposed on the floating gate electrode G2. The capacitor electrode CAE1 and the floating capacitor electrode CAE2 may be formed by the same patterning process.

[0181] Since the first interlayer insulating layer 141 has a predetermined dielectric constant, a capacitor may be formed by the capacitor electrode CAE1, the gate electrode G1, and the first interlayer insulating layer 141 disposed between the capacitor electrode CAE1 and the gate electrode G1. Each of the capacitor electrode CAE1 and the floating capacitor electrode CAE2 may be a single layer or a multilayer formed of any one or more of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and alloys thereof.

[0182] A second interlayer insulating layer 142 may be disposed on the capacitor electrode CAE1. The second interlayer insulating layer 142 may be formed of an inorganic layer, for example, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0183] A plurality of contact holes are formed in the first interlayer insulating layer 141 and the second interlayer insulating layer 142. Here, for example, the second interlayer insulating layer 142 partially overlapping the floating capacitor electrode CAE2 may be etched and removed. Therefore, the first interlayer insulating layer 141 and the second interlayer insulating layer 142 may be provided in a region where the thin film transistor ST is formed, without providing the first interlayer insulating layer 141 and the second interlayer insulating layer 142 in a region where the thin film transistor ST is not formed.

[0184] A source terminal and a drain terminal are formed in contact holes of the first interlayer insulating layer 141 and the second interlayer insulating layer 142. Here, for example, a first planar electrode D2 integrated with the drain terminal is formed as a plane in an emission region where the light emitting element LEL is formed. The first planar electrode D2 extends from a drain terminal formed in at least any one of the thin film transistors ST, and is formed in the emission region such that the first planar electrode D2 covers the floating capacitor electrode CAE2 and overlaps a portion of the front surface of the floating capacitor electrode CAE2.

[0185] A first light emitting electrode 171 serving as a pixel electrode (or anode) of the light emitting element LEL is formed in the emission region including the first planar electrode D2. Here, for example, the first light emitting electrode 171 is formed in the emission region so that the first light emitting electrode 171 covers the first planar electrode D2 and overlaps with a portion of the front surface of the first planar electrode D2. Aspects of the present disclosure support reducing or lowering the RC value of the first light emitting electrode 171 overlapping and contacting the floating gate electrode G2, the floating capacitor electrode CAE2, and the first planar electrode D2 in a planar shape according to the thickness and planar area of ​​the floating gate electrode G2, the floating capacitor electrode CAE2, and the first planar electrode D2.

[0186] The pixel defining layer 190 may be formed on the first interlayer insulating layer 141 on which the first light emitting electrode 171 is disposed, such that the pixel defining layer 190 separates the first light emitting electrode 171 .

[0187] Then, for example, an organic light emitting layer 172 may be formed in each of the emission regions respectively including the first light emitting electrode 171 , and a common electrode 173 may be formed and disposed on the entire organic light emitting display surface DA1 so that the common electrode 173 covers the entire organic light emitting layer 172 of the light emitting element LEL.

[0188] Fig.16 yes Figure 3 A detailed plan view of the surface light source device 110 is shown. Fig.17 It is schematically shown Fig.16 FIG. 1 is a plan view showing the structure of a surface light emitting unit DU1 of a surface light source device 110. FIG.

[0189] refer to Fig.16 and Fig.17 , the surface light source device 110 may have a rectangular shape, a square shape, or other square shapes in a plan view. For example, when the spatial light modulator 210 is formed in a rectangular shape, a square shape, or other square shapes in a plan view, the surface light source device 110 may also have a rectangular shape, a square shape, or other square shapes corresponding to the plan shape of the spatial light modulator 210. For example, the surface light source device 110 and the spatial light modulator 210 may also be formed in a rectangular shape having a long side positioned in the horizontal direction and a short side positioned in the vertical direction.

[0190] The surface light source device 110 includes a surface light emitting unit DU1 that presents background light as a surface light source. Here, for example, the surface light emitting unit DU1 may include a plurality of sub-light emitting pixels, and the background light as the surface light source may be emitted by the sub-light emitting pixels. The sub-light emitting pixels in the surface light emitting unit DU1 are formed and arranged to correspond to a preset first resolution.

[0191] The first data processor 140 may extract the extended reality content image data of the first resolution from the extended reality content image data inputted from the outside, or convert the extended reality content image data inputted from the outside into the extended reality content image data of the preset first resolution. Then, for example, the first data processor 140 may transmit the extended reality content image data with the first resolution to the emission driving circuit 120 of the surface light source device 110.

[0192] The emission driving circuit 120 may output a data signal and a voltage for driving the sub-luminescent pixels of the surface light-emitting unit DU1. Specifically, for example, the emission driving circuit 120 may receive the extended reality content image data from the first data processor 140 (such as, for example, a graphics card), and arrange the extended reality content image data according to a preset first resolution. In the example, the emission driving circuit 120 may convert the extended reality content image data of the first resolution into an analog image signal, and provide the analog image signal to the sub-luminescent pixels arranged on the organic light-emitting display surface DA1 of the surface light-emitting unit DU1.

[0193] The organic light emitting display surface DA1 of the surface light emitting unit DU1 is a region presenting background light through surface light emission, and may be defined as a central region of the surface light emitting unit DU1 .

[0194] The light-emitting pixels OSP may be formed in units of at least three and disposed on the organic light-emitting display surface DA1. Therefore, for example, the number of light-emitting elements LEL disposed on the organic light-emitting display surface DA1 may be a multiple of 3 (eg, 3, 6, 9, 12, 15, 18 ...).

[0195] Specifically, for example, the light emitting elements LEL of the first to third sub-pixels OSP1 to OSP3 may be formed in a quadrilateral shape (such as a rectangle or a square, for example) on the organic light emitting display surface DA1 formed in a quadrilateral shape in a plan view.

[0196] Each unit light-emitting pixel UP or the first sub-light-emitting pixel OSP1 to the third sub-light-emitting pixel OSP3 constituting each unit light-emitting pixel UP can be formed and arranged in a vertical or horizontal stripe shape on the organic light-emitting display surface DA1. The plane area of ​​each light-emitting element LEL is inversely proportional to the resolution value. That is, for example, when the number of light-emitting elements LEL set is small and the resolution is low, the plane area of ​​each light-emitting element LEL can be large. On the contrary, for example, when the number of light-emitting elements LEL set is large and the resolution is high, the plane area of ​​each light-emitting element LEL can be small. However, the light-emitting elements LEL of the first sub-light-emitting pixel OSP1 to the third sub-light-emitting pixel OSP3 can have the same plane area.

[0197] Each light emitting element LEL formed in a quadrilateral shape is connected to a plurality of pixel drivers DP1 to DPn. The pixel driver DP1 to DPn of each of the first to third sub-light emitting pixels OSP1 to OSP3 may partially overlap with the light emitting element LEL, and may be formed and disposed along at least any one side surface of the light emitting element LEL. The pixel driver DP1 to DPn of each of the first to third sub-light emitting pixels OSP1 to OSP3 receives control signals and data voltages at the same timing, and drives the light emitting element LEL at the same driving timing.

[0198] Fig.18 yes Figure 3 A detailed plan view of spatial light modulator 210 is shown.

[0199] refer to Fig.18 , the spatial light modulator 210 of the augmented reality content image display device 200 displays the augmented reality content image on the front surface by using the background light provided from the surface light source device 110 positioned behind the spatial light modulator 210 .

[0200] The spatial light modulator 210 may be formed in the same planar shape as the surface light source device 110 that provides background light as backlight, and may have a rectangular shape, a square shape, a circular shape, an elliptical shape, or other square shape in a plan view. For example, when the surface light source device 110 is formed in a rectangular shape, the spatial light modulator 210 may have a rectangular shape having a long side positioned in the horizontal direction corresponding to the shape of the surface light source device 110. However, the embodiment is not limited thereto. The long side may also be positioned in the vertical direction, or the spatial light modulator 210 may also be rotatably mounted so that the long side of the spatial light modulator 210 may be variably positioned in the horizontal or vertical direction. The spatial light modulator 210 may also be similar to the reference 110. Figures 5 to 12 The surface light source device 110 described above is formed in a circular shape in a plan view.

[0201] refer to Fig.18 , the spatial light modulator 210 includes a liquid crystal image display unit DU2 and a second data processor 240. The second sub-area SBA2 may be disposed on one side of the second non-display area NDA2 of the liquid crystal image display unit DU2. A display driving circuit 220 and a pad unit (not shown) connected to the second circuit board 230 may be disposed in the second sub-area SBA2.

[0202] The liquid crystal image display unit DU2 can display an augmented reality content image on the front surface by using background light provided from the surface light source device 110 positioned behind the spatial light modulator 210. The liquid crystal image display unit DU2 includes a plurality of liquid crystal pixels, and can display the augmented reality content image through the liquid crystal pixels. The liquid crystal pixels in the liquid crystal image display unit DU2 are formed and arranged so that the liquid crystal pixels correspond to a preset second resolution.

[0203] The second data processor 240 may provide the augmented reality content image data to the display driving circuit 220 that drives the liquid crystal pixels of the liquid crystal image display unit DU2 .

[0204] The second data processor 240 may extract the second resolution of the extended reality content image data from the externally input extended reality content image data, or convert the externally input extended reality content image data into the preset second resolution of the extended reality content image data. Then, for example, the second data processor 240 may transmit the second resolution of the extended reality content image data to the display driving circuit 220 of the spatial light modulator 210.

[0205] The display driving circuit 220 of the spatial light modulator 210 may output a data signal and a voltage for driving the liquid crystal pixels of the liquid crystal image display unit DU2. Specifically, for example, the display driving circuit 220 may receive the extended reality content image data from the second data processor 240 (such as, for example, a graphics card), and arrange the extended reality content image data according to a preset second resolution. In the example, the display driving circuit 220 may convert the extended reality content image data of the second resolution into an analog image signal, and provide the analog image signal to the liquid crystal pixels arranged on the image display surface DA2 of the liquid crystal image display unit DU2.

[0206] Fig.19 It is schematically shown Fig.18 FIG. 2 is a plan view showing the structure of the liquid crystal image display unit DU2 of the spatial light modulator 210 shown.

[0207] refer to Fig.18 and Fig.19 , the image display surface DA2 is an image display area that displays an extended reality content image, and may be defined as a central area of ​​the liquid crystal image display unit DU2. The image display surface DA2 may include a plurality of liquid crystal pixels LSP, a plurality of gate lines GL, a plurality of data lines DL, and a plurality of power lines VL. Each of the liquid crystal pixels LSP may be defined as a minimum unit that displays an extended reality content image by passing background light therethrough.

[0208] Each of the liquid crystal pixels LSP is connected to a data line DL and a gate line GL crossing the data line DL, and includes a thin film transistor TFT formed at the intersection of the data line DL and the gate line GL, a pixel electrode connected to the thin film transistor TFT, a liquid crystal cell Clc formed in a region between the pixel electrode and the common electrode, and a storage capacitor Cst formed in parallel with the liquid crystal cell Clc. The liquid crystal cell Clc is driven by a differential voltage between a data voltage of the pixel electrode and a common voltage Vcom of the common electrode and an electric field according to the differential voltage. The liquid crystal cell Clc diffracts and passes background light through the differential voltage between the data voltage and the common voltage Vcom and the electric field according to the differential voltage to realize image display light. A color filter may be provided on each liquid crystal pixel LSP to display a colored image.

[0209] The gate lines GL may provide the liquid crystal pixels LSP with gate signals received from the second gate driver 221. The gate lines GL may extend in an X-axis direction and may be spaced apart from each other in a Y-axis direction crossing the X-axis direction.

[0210] The data lines DL may provide the liquid crystal pixels LSP with image data voltages received from the display driving circuit 220. The data lines DL may extend in the Y-axis direction and may be spaced apart from each other in the X-axis direction.

[0211] The power line VL may provide the liquid crystal pixel LSP with a power voltage received from the display driving circuit 220 , such as a common voltage Vcom for example.

[0212] The second non-display area NDA2 may include a second gate driver 221, a fan-out line FOL, and a second gate control line GCL2. The second gate driver 221 may generate a plurality of gate signals based on the gate control signal, and may sequentially provide the gate signals to the gate lines GL according to a set order.

[0213] The fan-out line FOL may extend from the display driving circuit 220 to the image display surface DA2. The fan-out line FOL may provide a data voltage received from the display driving circuit 220 to the data line DL.

[0214] The second gate control line GCL2 may extend from the display driving circuit 220 to the second gate driver 221. The second gate control line GCL2 may provide a gate control signal received from the display driving circuit 220 to the second gate driver 221.

[0215] The display driving circuit 220 may output a control signal and an image data voltage for driving the liquid crystal pixel LSP of the image display surface DA2 to the fan-out line FOL. The display driving circuit 220 may provide the image data voltage to the data line DL through the fan-out line FOL. The image data voltage may be provided to the liquid crystal pixel LSP, and the brightness of the liquid crystal pixel LSP may be determined. The display driving circuit 220 may provide a gate control signal to the second gate driver 221 through the second gate control line GCL2.

[0216] Fig. 20 The backlight and the backlight display resolution of the surface light source device 110 according to the embodiment are shown.

[0217] refer to Fig. 20 , the first data processor 140 of the surface light source device 110 may convert the extended reality content image data input from the outside into extended reality content image data of a preset first resolution. Then, for example, the first data processor 140 may transmit the extended reality content image data with the first resolution to the emission driving circuit 120 of the surface light source device 110.

[0218] The emission driving circuit 120 of the surface light source device 110 may receive the extended reality content image data of the first resolution from the first data processor 140, and arrange the extended reality content image data according to the first resolution. In an example, the emission driving circuit 120 may convert the extended reality content image data of the first resolution into an analog image signal, and provide the analog image signal to the sub-luminescent pixels arranged on the organic light-emitting display surface DA1 of the surface light-emitting unit DU1. The image FH(110) according to the first resolution is displayed on the organic light-emitting display surface DA1 of the surface light-emitting unit DU1 by the sub-luminescent pixels of the surface light source device 110, and the image display light according to the first resolution is provided to the spatial light modulator 210 by the surface light source device 110 as a surface light source and background light.

[0219] Fig.21 A display image and image display resolution of the spatial light modulator 210 according to an embodiment are shown.

[0220] refer to Fig.21 , the second data processor 240 of the spatial light modulator 210 converts the augmented reality content image data input from the outside into augmented reality content image data of a preset second resolution. Then, for example, the second data processor 240 can transmit the augmented reality content image data of the second resolution to the display driving circuit 220 of the spatial light modulator 210.

[0221] As described herein, the second resolution of the spatial light modulator 210 may be set different from the first resolution of the surface light source device 110. That is, for example, the second resolution of the spatial light modulator 210 may be set higher than the first resolution of the surface light source device 110.

[0222] The display driving circuit 220 of the spatial light modulator 210 may receive the augmented reality content image data of the second resolution from the second data processor 240, and arrange the augmented reality content image data according to the preset second resolution. Then, for example, the display driving circuit 220 may convert the augmented reality content image data of the second resolution into an analog image signal, and provide the analog image signal to the liquid crystal pixels arranged on the image display surface DA2 of the liquid crystal image display unit DU2. Therefore, for example, the spatial light modulator 210 may generate an augmented reality content image FH(210) of a second resolution higher than the first resolution by using the background light of the first resolution provided from the surface light source device 110, and display the augmented reality content image FH(210) on the front surface.

[0223] Fig. 22 The resolution of the augmented reality content image displayed by the display device according to the embodiment of the present disclosure is shown.

[0224] refer to Fig. 22 The background light of the first resolution provided by the surface light source device 110 and the augmented reality content image FH (210) of the second resolution according to the spatial light modulator 210 (for example, Fig.21 The extended reality content image FH(210) of the third resolution is mixed so that the extended reality content image FH(200) of the third resolution is displayed on the front surface of the spatial light modulator 210.

[0225] The augmented reality content image FH (200) of the third resolution is provided to the image transmission member 310, and the image transmission member 310 can form a display path (or optical path) of the augmented reality content image FH (200) so that the augmented reality content image FH of the third resolution can be displayed in a preset space or on a display surface. Therefore, for example, the augmented reality content image FH displayed by at least one spatial light modulator 210 is guided to a specific space through an optical waveguide, a diffusion lens, and at least one focusing lens, and is recognized as the augmented reality content image FH (200) in the real space.

[0226] In the display device according to the embodiment of the present disclosure, the light-emitting pixel arrangement structure and the surface light-emitting structure of the surface light source device are simplified so that ultra-low resolution background light can be provided to the spatial light modulator. Therefore, for example, the light-emitting pixel arrangement structure and the surface light-emitting structure of the surface light source device as described herein support improving the manufacturing efficiency of the display device that displays an extended reality content image (such as, for example, a hologram).

[0227] In addition, for example, in the display device according to the embodiment of the present disclosure, the RC value of the light-emitting element of each light-emitting pixel is reduced. Therefore, the reduction of the RC value can help improve the amount of light emitted from each light-emitting element and further improve the resolution and 3D effect of the extended reality content image (such as, for example, a hologram).

[0228] However, the effects of the present disclosure are not limited to the effects set forth herein. The above and other effects of the present disclosure will become more apparent to those of ordinary skill in the art to which the present disclosure belongs by referring to the claims.

[0229] At the end of the detailed description, those skilled in the art will appreciate that many changes and modifications may be made to the exemplary embodiments without departing substantially from the principles of the present disclosure. Therefore, the disclosed exemplary embodiments of the present disclosure are used in an overview and descriptive sense, rather than for a limiting purpose.

Claims

1. Display device, include: at least one spatial light modulator, displaying an augmented reality content image; a surface light source device, located behind the at least one spatial light modulator, and providing image display light of a first resolution as background light to the at least one spatial light modulator; as well as at least one image transmission component, forming a display path of the extended reality content image, Among them, the surface light source device includes an organic light-emitting display unit and an emission driving circuit, in which a plurality of sub-light-emitting pixels performing surface light emission are arranged, the emission driving circuit drives the plurality of sub-light-emitting pixels, and each of the plurality of sub-light-emitting pixels includes a plurality of pixel drivers and light-emitting elements.

2. The display device according to claim 1, in: The emission driving circuit generates a gate control signal and an analog image signal for driving the plurality of sub-light-emitting pixels at the same timing in units of at least one frame, The display device provides the gate control signal to the first gate driver in units of at least one frame, and The display device simultaneously provides the analog image signal to the plurality of sub-light-emitting pixels.

3. The display device according to claim 2, in: The light emitting element is connected in series to the plurality of pixel drivers and emits light in response to one or more drive currents provided by the plurality of pixel drivers, and The multiple pixel drivers drive the light emitting elements based on control signals and the analog image signals so that the light emitting elements emit light, wherein the multiple pixel drivers receive the control signals and the analog image signals at the same timing through the emission driving circuit and the first gate driver.

4. The display device according to claim 2, in, The light emitting element is included in each of the plurality of sub-pixels and is formed in the organic light emitting display unit to include at least one of the following shapes or a combination of different shapes: a fan shape, a triangle shape, a diamond shape, a quadrilateral shape other than the diamond shape, a circle shape, a semicircle shape, and an ellipse shape, Among them, the light-emitting elements respectively included in the multiple sub-light-emitting pixels are arranged in the circular shape in the plan view, so that the light-emitting elements surround the center of the organic light-emitting display unit according to the circular shape, or are arranged in the quadrilateral shape in the plan view, so that the light-emitting elements surround the center of the organic light-emitting display unit according to the quadrilateral shape.

5. The display device according to claim 4, in, The plurality of sub-light-emitting pixels constitute a plurality of unit light-emitting pixels, and the plurality of unit light-emitting pixels are alternately and repeatedly arranged in the organic light-emitting display unit, wherein: Each of the unit light-emitting pixels emits white light and is composed of three sub-light-emitting pixels, which respectively emit red light, green light, and blue light, among the plurality of sub-light-emitting pixels, and The three sub-light-emitting pixels provided in each of the unit light-emitting pixels are formed in the fan-shaped shape, the triangular shape or the quadrilateral shape in the plan view, wherein the light emitting element included in any one of the three sub-light emitting pixels in each of the unit light emitting pixels is formed in the triangle shape, and The light emitting elements included in the other two of the three sub-pixels are formed into the quadrilateral shape so that each of the unit light emitting pixels constituted by a combination of the three sub-pixels is formed and arranged into the fan-shaped shape, Wherein, the three sub-light-emitting pixels of each of the unit light-emitting pixels are arranged in the circular shape in the plan view, so that the three sub-light-emitting pixels surround the center of the organic light-emitting display unit in the circular shape; and the three sub-light-emitting pixels are formed so that the respective planar areas of the three sub-light-emitting pixels are the same.

6. The display device according to claim 2, in, The light emitting element comprises: a first planar electrode extending from a drain terminal of at least one transistor formed in each of the plurality of pixel drivers and disposed in a plane in an emission region in which the light emitting element is formed; a first light emitting electrode formed in the emission region, wherein the first light emitting electrode covers the first planar electrode and overlaps a portion of a front surface of the first planar electrode; an organic light-emitting layer formed and arranged on a front surface of the first light-emitting electrode; and A common electrode is formed and arranged so that the common electrode covers the front surface of the organic light emitting layer.

7. The display device according to claim 2, in, The light emitting element comprises: a floating gate electrode formed by the same process as a gate electrode formed in at least one transistor of each of the plurality of pixel drivers, electrically separated from the gate electrode, and disposed in a plane in an emission region in which the light emitting element is formed; a first planar electrode extending from a drain terminal formed in the at least one transistor and formed in the emitter region, wherein the first planar electrode covers the floating gate electrode and overlaps a portion of a front surface of the floating gate electrode; a first light emitting electrode formed in the emission region, wherein the first light emitting electrode covers the first planar electrode and overlaps a portion of a front surface of the first planar electrode; an organic light-emitting layer formed and arranged on a front surface of the first light-emitting electrode; and A common electrode is formed and arranged on the front surface of the organic light-emitting layer, wherein the common electrode covers the front surface of the organic light-emitting layer.

8. The display device according to claim 2, in, The light emitting element comprises: a floating gate electrode formed by the same process as a gate electrode formed in at least one transistor of each of the plurality of pixel drivers, electrically separated from the gate electrode, and disposed in a plane in an emission region in which the light emitting element is formed; a floating capacitor electrode formed by the same process as a capacitor electrode formed in a capacitor of each of the plurality of pixel drivers, electrically separated from the capacitor electrode, and formed in the emission region, wherein the floating capacitor electrode covers the floating gate electrode and overlaps a portion of a front surface of the floating gate electrode; a first planar electrode extending from a drain terminal formed in the at least one transistor and formed in the emitter region, wherein the first planar electrode covers the floating capacitor electrode and overlaps a portion of a front surface of the floating capacitor electrode; a first light emitting electrode formed in the emission region, wherein the first light emitting electrode covers the first planar electrode and overlaps a portion of a front surface of the first planar electrode; an organic light-emitting layer formed and arranged on a front surface of the first light-emitting electrode; and A common electrode is formed and arranged so that the common electrode covers the front surface of the organic light emitting layer.

9. The display device according to claim 2, in: The surface light source device further includes a first data processor, and the first data processor extracts the extended reality content image data of the first resolution from the extended reality content image data input from the outside or converts the extended reality content image data input from the outside into the extended reality content image data of the first resolution, and The emission driving circuit converts the augmented reality content image data of the first resolution into the analog image signal, and provides the analog image signal to the plurality of sub-pixels of the organic light emitting display unit, wherein the at least one spatial light modulator generates an augmented reality content image of a second resolution by using the image display light of the first resolution as the background light, and The at least one image transmission component forms a display path of an extended reality content image of a third resolution, and the image display light of the first resolution is mixed with the extended reality content image of the second resolution in the extended reality content image of the third resolution, wherein the first resolution is a preset resolution lower than the second resolution, and the third resolution is a mixture of the first resolution and the second resolution.

10. The display device according to claim 1, in, The surface light source device generates the image display light of the first resolution as a surface light source by: converting augmented reality content image data input from outside the display device into augmented reality content image data of the first resolution, converting the augmented reality content image data of the first resolution into an analog image signal, and providing the analog image signal to the plurality of sub-pixels of the organic light emitting display unit, Wherein, the at least one spatial light modulator: converting the augmented reality content image data input from outside the display device into augmented reality content image data of a second resolution, converting the augmented reality content image data of the second resolution into the analog image signal, and providing the analog image signal to the liquid crystal pixels of the liquid crystal image display unit, and generating an augmented reality content image of the second resolution by using the image display light of the first resolution provided from the surface light source device located behind the at least one spatial light modulator as the background light, and The at least one image transmission component forms a display path of an augmented reality content image of a third resolution, and the image display light of the first resolution is mixed with the augmented reality content image of the second resolution in the augmented reality content image of the third resolution.

11. Display device, include: at least one spatial light modulator, displaying an augmented reality content image; a surface light source device, located behind the at least one spatial light modulator, and providing image display light of a first resolution as background light to the at least one spatial light modulator; as well as at least one image transmission component, forming a display path of the extended reality content image, Wherein, the surface light source device comprises: an organic light emitting display unit in which a plurality of sub-light emitting pixels performing surface light emission are arranged; and An emission driving circuit drives the plurality of sub-light-emitting pixels, Wherein, each of the multiple sub-light-emitting pixels includes multiple pixel drivers and light-emitting elements, and the light-emitting element included in each of the multiple sub-light-emitting pixels is formed in the organic light-emitting display unit to include at least one of the following shapes or a combination of different shapes: a fan shape, a triangular shape, a diamond shape, a quadrilateral shape other than the diamond shape, a circular shape, a semicircular shape and an elliptical shape.

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