Monitoring circuit and monitoring method for dynamic on-resistance of GaN power device

Abstract

According to the monitoring circuit and the monitoring method for the dynamic on-resistance of the GaN power device, constant drain current is injected when the GaN device is turned on, and the dynamic on-resistance is monitored by extracting drain-source voltage of the device. The measuring circuit comprises an isolation power supply unit, a conventional driving unit, a current output unit, a trigger unit, a sampling unit, an adjusting unit and a clamping circuit unit. When the DUT is in a high-voltage blocking state, the current output unit does not output current, and the clamping circuit unit outputs a protection low-voltage signal; when the DUT is switched on, the current output unit injects current into the DUT, and the clamping circuit unit reflects the switch-on voltage of the DUT, so that the dynamic switch-on resistance of the GaN device is obtained. The device has the advantages of simple structure, low design cost, high measurement precision and the like.

Description

Technical Field

[0001] The present invention relates to the field of power electronic power device testing, and in particular to a monitoring circuit and a monitoring method for the dynamic on-resistance of a GaN power device. Background Art

[0002] With the advancement of science and technology, higher requirements are placed on the performance of semiconductor devices. As a result, third-generation semiconductor devices represented by GaN and SiC have emerged. Compared with traditional semiconductor power devices, GaN power devices are more suitable for high-frequency and high-voltage fields, but they also have some problems in their applications, among which the current collapse effect is the most serious, which is specifically manifested in the change of dynamic on-resistance.

[0003] Although GaN power devices have extremely low on-resistance, due to their unique physical structure, they have a dynamic resistance degradation phenomenon, also known as current collapse. This phenomenon refers to the phenomenon that when the device switches to the on state after being subjected to a high voltage bias, the actual on-voltage is higher than the ideal on-voltage. In electronic power applications, switching devices need to operate at high frequencies, and the dynamic resistance of GaN power devices is not enough to recover to the ideal value during the on-time, which will increase the power loss of the device, reduce efficiency, and restrict the further application and development of GaN power devices. The on-resistance given in the device data sheet is often under static conduction conditions. The actual on-resistance is several times or even dozens of times higher than this value. Therefore, accurately measuring the on-resistance of GaN power devices can provide accurate data for the design of power electronic applications and reduce the difficulty of design.

[0004] To calculate the dynamic on-resistance of a GaN power device, it is necessary to measure its drain-source voltage VDS and on-current. However, when the GaN power device is working, the drain-source voltage VDS will reach several hundred volts when it is turned off, and only a few hundred millivolts to a few volts when it is turned on. When the drain-source voltage VDS value is 400V when it is turned off, according to the minimum resolution formula of an 8-bit oscilloscope, the minimum resolution of this oscilloscope is 1.56V, which cannot meet the accuracy requirements during measurement. If the oscilloscope range is too large, the error in reading the on-state voltage value will be too large, affecting the subsequent analysis of experimental results. If the oscilloscope range is too small, the oscilloscope cannot display the complete waveform when the GaN power device is turned off. Therefore, how to accurately measure the on-state voltage drop of GaN power devices has become an urgent problem to be solved.

[0005] At present, there are two main methods for measuring the dynamic resistance of GaN power devices. One is to use test equipment such as curve tracers or power analyzers to test the dynamic resistance by simultaneously controlling the gate and drain voltages. These test instruments are expensive and have limited test frequencies. They are mainly used to test bare chips in laboratories. For packaged devices, a large contact resistance will be introduced, and the test frequency is not high. At present, most laboratories use specific test circuits to measure the dynamic on-resistance of GaN power devices of different package types under high frequency and high voltage. The existing test circuits have problems such as high complexity, inaccurate measurement, and difficulty in integration. Summary of the invention

[0006] In order to overcome the defects of the above-mentioned prior art, the present invention provides a monitoring circuit and monitoring method for the dynamic on-resistance of a GaN power device, solves the problem of difficult on-voltage drop measurement, reduces the voltage input range of the oscilloscope, and greatly improves the accuracy of the on-voltage drop measurement of the GaN power device while ensuring that the complete waveform can be measured, reduces the test probe, is easy to integrate, and realizes accurate and rapid measurement of the on-voltage of the GaN power device. At the same time, the current flowing through the device under test DUT is constant, and the on-resistance is calculated from the ratio of the on-voltage drop to the constant current.

[0007] The technical solution adopted by the present invention is:

[0008] A monitoring circuit for dynamic on-resistance of a GaN power device, the monitoring circuit comprising:

[0009] Isolation power supply unit, conventional drive unit, current output unit, trigger unit, sampling unit, adjustment unit, clamping circuit unit;

[0010] The isolated power supply unit is respectively connected to the trigger unit, the clamping circuit unit, the conventional driving unit, the current output unit, the sampling unit, and the regulating unit to supply power to these units;

[0011] The conventional driving unit controls the on and off of the device under test DUT according to the trigger signal received from the microprocessor; the current output unit is used to inject a constant large current into the device under test DUT when the device under test DUT is turned on;

[0012] The trigger unit controls the working state of the regulating unit according to the trigger signal received from the microprocessor;

[0013] The sampling unit samples the conduction current and converts it into a voltage signal;

[0014] The regulating unit is used to compare the voltage signal input by the sampling unit with the reference voltage to control the current size of the current output unit;

[0015] The clamp circuit unit is used to measure the drain-source voltage of the device under test (DUT).

[0016] The microprocessor is connected to the conventional drive unit and the trigger unit respectively. The input control signal sent by the microprocessor includes S V1 With S V2 , respectively input to the conventional drive unit and the trigger unit;

[0017] The conventional driving unit is connected to the device under test DUT. The conventional driving unit inputs a control signal S V1 When the control signal S is high, the output high level controls the conduction of the device under test DUT, and when the control signal S is high, the V1 When it is at a low level, it outputs a low level to control the shutdown of the device under test DUT;

[0018] The trigger unit is connected to the adjustment unit, and the trigger unit can input the control signal S V2 When it is high, the output signal S of the trigger unit V3 The high level control regulation unit works, and the input control signal S V2 When it is at a low level, the output signal S of the trigger unit V3 The low level controls the regulation unit to shut down;

[0019] The regulating unit is connected to the current output unit, and the regulating unit outputs a control signal S V4 To control the output current of the current output unit;

[0020] The current output unit is connected to the device under test (DUT), and the current output unit injects a constant current into the device under test (DUT);

[0021] The current output unit is connected to the sampling unit, and the sampling unit measures the current S of the current output unit. V5 Sampling and converting into voltage signal S V6 , voltage signal S V6 It will be input to the regulating unit, and the regulating unit will output a voltage signal S V4 Control the size of

[0022] The clamp circuit unit is connected to the device under test DUT and the microprocessor. The clamp circuit unit monitors the drain-source voltage of the device under test DUT and transmits the monitored data to the microprocessor.

[0023] The isolated power supply unit has an input interface and multiple output interfaces. The input interface of the isolated power supply unit is used to connect to an external power supply, and the output interface of the isolated power supply unit is respectively connected to the conventional drive unit, current output unit, trigger unit, sampling unit, adjustment unit, and clamping circuit unit to provide corresponding power supply for each unit.

[0024] The conventional driving unit includes a driver OP, a resistor R 8 , resistor R 9 , resistor R 10 , resistor R 11 、Diode D 4 ; The input of the driver OP is connected through the resistor R 8 The two power supply terminals of the driver OP are respectively connected to the output interface of the isolation power supply unit capable of outputting two voltage values ​​of -Vm and +Vs, and the output terminals of the driver OP are respectively connected to the resistors R 9 One end of the resistor R 10 Connect one end of the resistor R 9 The other end of the diode D 4 Cathode, diode D 4 The anode is connected to the resistor R 9 The other end of the resistor R 11 One end of the resistor R 11 The other end of the resistor R 11 Connected in parallel to the gate G and source S of the device under test DUT.

[0025] The resistor R 9 The resistor R 10 、Diode D 4 The series connection forms a driving circuit when the device under test DUT is turned off, thereby reducing the oscillation when the device under test DUT is turned off. 11 Connected in parallel to the gate-source of the device under test (DUT) to reduce the input impedance of the device.

[0026] The current output unit includes a diode D 2 、Diode D 3 , capacitor C 1 、P-type MOS tube Q 2 , resistor R g ; The input terminal of the current output unit is connected to the V cc Output connection, V cc The output port is connected to diode D 2 anode,

[0027] Diode D 2 Cathode and capacitor C 1 One end of the capacitor C 1 The other end is grounded;

[0028] P-type MOS tube Q 2 The source S and diode D 2 Cathode connection, P-type MOS tube Q 2The gate G and the resistor R g One end of the P-type MOS tube Q 2 The drain D and diode D 3 connected to the anode.

[0029] The trigger unit consists of two resistors R 7 , operational amplifier device OP 3 , controllable switch composition;

[0030] The resistor R on the left 7 One end is connected to the input signal V in , the resistor R on the left 7 The other end is connected to the amplifier OP 3 The negative input terminal and the resistor R 7 One end of the right resistor R 7 The other end of the amplifier OP 3 The output terminal.

[0031] The sampling unit consists of two resistors R 4 , two resistors of the same resistance R 3 , sampling resistor R S1 , and an amplifier OP 1 Composition: sampling resistor R S1 The two ends of the resistor are connected to two resistors R with the same resistance value. 4 One end, the resistor R 4 The other end of the amplifier OP 1 The positive input terminal, the resistor R 4 The other end of the amplifier OP 1 The negative input terminal; the resistor R 3 One end is grounded and the other end is connected to the OP 1 Positive input terminal; resistor R 3 One end of the amplifier is connected to the OP 1 Negative input terminal, the other end is connected to the amplifier OP 1 The output terminal.

[0032] The regulation unit consists of an amplifier OP 2 , resistor R 5 , resistor R 6 , capacitor C 2 Composition: Resistance R 5 One end is connected to the reference voltage V f , resistor R 5 The other end is connected to amplifier OP 2 The negative input terminal, resistor R 6 One-terminal amplifier OP 2 The negative input terminal, resistor R 6 The other end is connected to capacitor C2 One end, capacitor C 2 The other end of the amplifier OP 2 The output terminal.

[0033] The voltage clamp circuit includes a MOS tube Q 3 and a small current source, wherein the small current source includes a voltage regulator tube D 1 , resistor R 1 , resistor R 2 , transistor Q 1 ; Zener tube D 1 One end is connected to the positive pole of the power supply V CC , Zener tube D 1 The other end is connected to transistor Q 1 The base b terminal; resistor R 2 One end is connected to the positive pole of the power supply V CC , resistor R 2 The other end is connected to transistor Q 1 The emitter e end of the resistor R1 is connected to the transistor Q 1 The base b end of the resistor R1 is connected to the ground. The drain of the MOS tube Q3 is connected to the drain of the device under test DUT, and the source of the MOS tube is connected to the output end of the small current source.

[0034] The drain-source voltage test point of the device under test DUT is point a. When the device under test DUT is turned on, the voltage V at point a is measured. a V a =V mos_on +V on , where V on is the on-state voltage drop of the device under test (DUT), V mos_on Q for MOS tube 3 When conducting, the voltage drop is mos_on The value is very small, the purpose is to make V a Closer to V on , V on is the conduction voltage drop of the device under test DUT, so the conduction voltage drop of the device under test DUT V on It can be obtained by the following formula: V on ≈V a ;

[0035] When the device under test DUT is turned off, the small current source does not output current, and the transistor Q 1 In saturation state, transistor Q 1 The collector voltage is approximately equal to the emitter voltage, which is R 2 (V cc -V be ) / (R 1 +R 2 );

[0036] When the device under test DUT is turned on, MOS tube Q3 is turned on, and the small current source outputs current. At this time, transistor Q 1 In zoomed state.

[0037] A method for monitoring dynamic on-resistance of a power GaN device comprises the following steps:

[0038] S1. High voltage DC is turned on and voltage stress is applied to the device under test (DUT).

[0039] S2, the trigger signal outputs a high level, so that the conventional drive circuit outputs a high level, the device under test DUT is turned on, and at the same time, a constant current is injected into the device under test DUT through the current output unit. At this time, the voltage measured by the clamp circuit unit is approximately the conduction voltage drop of the device under test DUT. Then, using Ohm's theorem, the ratio of the measured voltage to the injected current is the dynamic on-resistance;

[0040] S3, the trigger signal outputs a low level, so that the conventional drive circuit outputs a low level, the device under test DUT is turned off, and the current output unit does not output current. At this time, the voltage measured by the clamping circuit unit is much smaller than the voltage of the applied voltage stress, preventing DC high voltage from entering the oscilloscope.

[0041] The present invention provides a monitoring circuit and a monitoring method for the dynamic on-resistance of a GaN power device, and the technical effects are as follows:

[0042] 1) The monitoring circuit structure of the present invention is simple, the response speed is fast, and the design cost is low. At the same time, for different models of GaN power devices, changing the corresponding parameters can achieve accurate measurement. In addition, the present invention does not need to use a differential voltage measurement probe for measurement, which reduces the cost of use.

[0043] 2) The monitoring method of the present invention effectively measures the on-state voltage drop of the GaN device. When the device is on, the voltage V at the measuring point a is a =V mos_on +V on , where: V mos_on Q for MOS tube 3 The on-time voltage drop, and V mos_on The value is very small, the purpose is to make V a Closer to V on , V on is the conduction voltage drop of the device under test DUT, so the conduction voltage drop of the device under test DUT V on It can be obtained by the following formula: V on =V a -V mos_on This makes it easy to achieve the on-state voltage drop V on Calculation.

[0044] 3) The present invention injects a constant current into the device under test DUT, and there is no need to measure the current of the device under test, thereby reducing the complexity of the measurement circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 The present invention is a structural block diagram of a circuit for measuring the dynamic on-resistance of a GaN power device.

[0046] Figure 2 The circuit schematic diagram of a conventional driving unit in the measurement circuit of the dynamic on-resistance of a GaN power device of the present invention.

[0047] Figure 3 The circuit schematic diagram of the current output unit in the measurement circuit of the dynamic on-resistance of the GaN power device of the present invention.

[0048] Figure 4 The circuit schematic diagram of the trigger unit in the measurement circuit of the dynamic on-resistance of the GaN power device of the present invention.

[0049] Figure 5 The circuit schematic diagram of the sampling unit in the measurement circuit of the dynamic on-resistance of the GaN power device of the present invention.

[0050] Figure 6 The circuit schematic diagram of the regulating unit in the measurement circuit of the dynamic on-resistance of the GaN power device of the present invention.

[0051] Figure 7 The present invention is a circuit schematic diagram of a clamping circuit unit in a circuit for measuring the dynamic on-resistance of a GaN power device.

[0052] Figure 8 The schematic diagram of the measurement circuit of the dynamic on-resistance of the GaN power device of the present invention is shown in FIG.

[0053] Fig. 9 The experimental waveforms measured by an oscilloscope under different voltage stresses. DETAILED DESCRIPTION

[0054] like Figure 1 As shown, a monitoring circuit for the dynamic on-resistance of a GaN power device is composed of the following parts: an isolated power supply unit supplies power to other units; a conventional drive unit controls the on and off of the device under test; a current output unit outputs a rated current; a trigger unit provides a control signal to the adjustment unit; a sampling unit samples the on-current and converts it into a voltage signal; the adjustment unit compares the voltage signal input by the sampling unit with the reference voltage to control the current size of the current output unit; and a clamping circuit unit measures the on-voltage drop of the device under test DUT.

[0055] When the device under test DUT is in a high-voltage blocking state, the current output unit does not output current, and the clamping circuit unit outputs a protective low-voltage signal; when the device under test DUT is turned on, the current output unit injects current into the device under test DUT. At this time, the clamping circuit unit reflects the on-voltage of the device under test DUT, thereby obtaining the dynamic on-resistance of the GaN device.

[0056] like Figure 2 As shown, the conventional driving unit includes a driver OP, a resistor R 8 , resistor R 9 , resistor R 10 , resistor R 11 、Diode D 4 , the driver input is connected through the resistor R 8 The two power supply terminals of the driver are respectively connected to the output interface of the isolation power supply unit capable of outputting two voltage values ​​of -Vm and +Vs, and the output terminal of the driver is connected to the resistor R 9 , resistor R 10 The resistor R 9 The resistor R 10 Diode D 4 The resistor R is connected in series to form a driving loop when the device under test DUT is turned off, thereby reducing the oscillation when the device under test DUT is turned off. 11 Connected in parallel to the gate-source of the device under test (DUT) to reduce the input impedance of the device.

[0057] See also Figure 2 The working principle of the conventional drive unit is as follows: the drive signal is input through the input terminal of the driver OP. When the input level is low, the driver outputs a high level through the resistor R 9 Drive the device under test DUT to make it conductive. When the drive signal is low, the driver outputs a low level, and the resistor R 10 to shut down the device under test (DUT).

[0058] like Figure 3 As shown, the current output unit includes a diode D 2 、Diode D 3 , capacitor C 1 、P-type MOS tube Q 2 , resistor R g , the current output unit input is isolated from the power supply single source V cc Output connection, diode D 2 One end of the capacitor C 1 One end of the capacitor C 1 The other end of the P-type MOS tube Q 2 The source S is connected to the cathode of the diode, and the P-type MOS tube Q2 The gate G and the resistor R g One end of the P-type MOS tube Q 2 The drain D and diode D 3 The positive pole is connected.

[0059] See also Figure 3 The working principle of the current output unit is as follows: through the MOS tube Q 2 The diode D is turned off to control the output current. 2 、Diode D 3 Its function is to prevent the reverse voltage from being too large and causing current backflow.

[0060] like Figure 4 As shown, the trigger unit consists of two resistors R with the same resistance. 7 , operational amplifier device OP 3 , controllable switch, the resistor R on the left 7 One end is connected to the input signal V in , the other end is connected to amplifier OP 3 The negative input terminal and the right resistor R 7 One end of the right resistor R 7 The other end of the amplifier OP 3 The output terminal.

[0061] See also Figure 4 The trigger unit works as follows: When the op amp device OP 3 When the input is high level, the trigger unit outputs high level, making the adjustment unit work. 3 When the input is high or low, the trigger unit outputs a low level, causing the adjustment unit to stop working.

[0062] like Figure 5 As shown, the sampling unit consists of two resistors R 4 , two resistors of the same resistance R 3 , sampling resistor R S1 With an amplifier OP 1 Composition. Sampling resistor R S1 Connect two resistors R with the same resistance value at both ends. 4 , the resistor R 4 The other end is connected to the amplifier's OP 1 Positive input terminal, resistor R 4 The other end is connected to the amplifier's OP 1 Negative input terminal, the resistor R 3 One end is grounded and the other end is connected to the OP 1 Positive input terminal, resistor R 3 One end of the amplifier is connected to the OP 1Negative input terminal, the other end is connected to the amplifier OP 1 The output terminal.

[0063] See also Figure 5 The sampling unit works as follows: through the sampling resistor R S1 The voltage signal is collected and passed through the amplifier OP 1 Amplify and output the amplified voltage signal with voltage regulation unit. The amplification formula is as follows:

[0064]

[0065] Where V Rs1 is the sampling resistor R S1 The voltage difference between the two ends, V o is the voltage output by the sampling unit.

[0066] like Figure 6 As shown, the adjustment unit amplifier OP 2 , resistor R 5 , resistor R 6 , capacitor C 2 Composition. Resistor R 5 One end is connected to the reference voltage V f , the other end is connected to amplifier OP 2 The negative input terminal, resistor R 6 One-terminal amplifier OP 2 The negative input terminal of the 2 , capacitor C 2 The other end of the amplifier OP 2 The output terminal.

[0067] See also Figure 6 The working principle of the regulation unit is as follows: the voltage V f is the reference voltage of the adjustment unit, and the voltage V o The reference voltage V f Comparison, after passing through amplifier OP 2 Output different voltages to control the MOS tube Q 2 The conduction state.

[0068] like Figure 7 As shown in the figure, the voltage clamp circuit is composed of a MOSFET tube and a small current source, in which the small current is supplied by the voltage regulator tube D 1 , resistor R 1 , resistor R 2 , transistor Q 1 Composition. Zener tube D 1 One end is connected to the positive pole of the power supply V CC , the other end is connected to transistor Q 1 The base b terminal; resistor R2 One end is connected to the positive pole of the power supply V CC , the other end is connected to transistor Q 1 The emitter e end; the resistor R 1 One end is connected to transistor Q 1 The base b end of the MOSFET is connected to the base b end of the MOSFET tube, and the other end is grounded. The drain of the MOSFET tube is connected to the drain of the device under test DUT, and the source of the MOSFET tube is connected to the output end of the small current source.

[0069] See also Figure 7 The working principle of the clamp circuit is as follows: when the GaN power device to be tested is turned off and the current source does not flow current, the transistor Q 1 At this time, it is in saturation state, and the transistor emitter e-pole voltage V e =V CC -V Z -V be_set , where V CC is the voltage value of the DC power supply, V be_set is the voltage difference of the diode between the emitter e and the base b. When the transistor is saturated, the transistor emitter e voltage V e Approximately equal to the collector voltage V c , that is, V e ≈V c ,like Figure 1 , measuring point voltage V a Equal to the collector voltage V c , that is, V c =V a When the GaN power device to be tested is turned on, the MOS tube Q 3 Fully turned on, the transistor works in the amplification state, and the voltage V at point a is measured. a =V on_mos +V on , where V on_mos Q for MOS tube 3 Voltage drop during conduction, V on is the on-state voltage drop of the GaN power device, so the on-state voltage drop of the GaN device V on It can be obtained by the following formula: V on =V a -V on_mos At the same time, the MOS tube conduction voltage drop V on_mos Much smaller than the on-state voltage drop V of GaN power devices on , V on ≈V a .

[0070] See also Figure 8When the circuit is working, voltage stress is applied to the GaN power device. Combined with the above analysis of the working principle of each unit, the dynamic on-resistance R of the GaN device can be obtained by measuring the parameters. on for:

[0071]

[0072] V on is the on-state voltage of the device under test (DUT), I ccs is a constant current.

[0073] Fig. 9 The experimental waveforms measured by an oscilloscope under different voltage stresses are shown in Figure 2. Fig. 9 It can be seen that the on-current remains unchanged, and as the drain-source voltage stress increases when the device under test is turned off, the on-voltage of the device under test increases when it is turned on. According to Ohm's theorem, the dynamic on-resistance of the device under test increases. This means that when the on-current remains unchanged, the dynamic on-resistance of the device under test increases with the increase of the drain-source voltage stress when it is turned off.

[0074] The present invention is suitable for measuring the dynamic on-resistance of GaN power devices and is mainly used by relevant manufacturers and researchers in related fields.

[0075] In summary, the present invention has the advantages of simple structure, low design cost, etc. while ensuring that the dynamic on-resistance of the GaN power device is measured accurately and quickly.

Claims

1. A monitoring circuit for dynamic on-resistance of a GaN power device, characterized in that: The monitoring circuit includes: Isolation power supply unit, conventional drive unit, current output unit, trigger unit, sampling unit, adjustment unit, clamping circuit unit; The isolated power supply unit is respectively connected to the trigger unit, the clamping circuit unit, the conventional driving unit, the current output unit, the sampling unit, and the regulating unit, and is used for supplying power to these units; The conventional driving unit controls the on and off of the device under test DUT according to the trigger signal received from the microprocessor; the current output unit is used to inject a constant large current into the device under test DUT when the device under test DUT is turned on; The trigger unit controls the working state of the regulating unit according to the trigger signal received from the microprocessor; The sampling unit samples the conduction current and converts it into a voltage signal; The regulating unit is used to compare the voltage signal input by the sampling unit with the reference voltage to control the current size of the current output unit; The clamp circuit unit is used to measure the drain-source voltage of the device under test (DUT).

2. A monitoring circuit for dynamic on-resistance of a GaN power device according to claim 1, characterized in that: The microprocessor is connected to the conventional drive unit and the trigger unit respectively. The input control signal sent by the microprocessor includes S V1 With S V2 , respectively input to the conventional drive unit and the trigger unit; The conventional driving unit is connected to the device under test DUT. The conventional driving unit inputs a control signal S V1 When the control signal S is high, the output high level controls the conduction of the device under test DUT, and when the control signal S is high, the V1 When it is at a low level, it outputs a low level to control the shutdown of the device under test DUT; The trigger unit is connected to the adjustment unit, and the trigger unit can input the control signal S V2 When it is high, the output signal S of the trigger unit V3 The high level control regulation unit works, and the input control signal S V2 When it is at a low level, the output signal S of the trigger unit V3 The low level controls the regulation unit to shut down; The regulating unit is connected to the current output unit, and the regulating unit outputs a control signal S V4 To control the output current of the current output unit; The current output unit is connected to the device under test (DUT), and the current output unit injects a constant current into the device under test (DUT); The current output unit is connected to the sampling unit, and the sampling unit measures the current S of the current output unit. V5 Sampling and converting into voltage signal S V6 , voltage signal S V6 It will be input to the regulating unit, and the regulating unit will output a voltage signal S V4 Control the size of The clamp circuit unit is connected to the device under test DUT and the microprocessor. The clamp circuit unit monitors the drain-source voltage of the device under test DUT and transmits the monitored data to the microprocessor.

3. A monitoring circuit for dynamic on-resistance of a GaN power device according to claim 1, characterized in that: The conventional driving unit includes a driver OP, a resistor R8, a resistor R9, a resistor R 10 , resistor R 11 , diode D4; the input end of the driver OP is connected to the trigger signal through the resistor R8, the two power supply ends of the driver OP are respectively connected to the output interface of the isolation power supply unit that can output two voltage values ​​of -Vm and +Vs, and the output end of the driver OP is respectively connected to one end of the resistor R9, the resistor R 10 The other end of the resistor R9 is connected to the cathode of the diode D4, and the anode of the diode D4 is connected to the other end of the resistor R9 and the resistor R 11 One end of the resistor R 11 The other end of the resistor R 11 Connected in parallel to the gate G and source S of the device under test DUT.

4. A monitoring circuit for dynamic on-resistance of a GaN power device according to claim 1, characterized in that: The current output unit includes a diode D2, a diode D3, a capacitor C1, a P-type MOS tube Q2, a resistor R g ; The input terminal of the current output unit and the V cc Output connection, V cc The output port is connected to the anode of the diode D2, the cathode of the diode D2 is connected to one end of the capacitor C1, and the other end of the capacitor C1 is grounded; the source S of the MOS tube Q2 is connected to the cathode of the diode D2, and the gate G of the MOS tube Q2 is connected to the resistor R g The drain D of the MOS tube Q2 is connected to the anode of the diode D3.

5. The monitoring circuit of the dynamic on-resistance of a GaN power device according to claim 1, characterized in that: The voltage clamp circuit includes a MOS tube Q3 and a small current source, wherein the small current source includes a voltage regulator tube D1, a resistor R1, a resistor R2, and a transistor Q1; one end of the voltage regulator tube D1 is connected to the positive electrode V CC , the other end of the voltage regulator D1 is connected to the base terminal b of the transistor Q1; one end of the resistor R2 is connected to the positive electrode of the power supply V CC , the other end of the resistor R2 is connected to the emitter e end of the transistor Q1; one end of the resistor R1 is connected to the base b end of the transistor Q1, and the other end of the resistor R1 is grounded; the drain of the MOS tube Q3 is connected to the drain of the device under test DUT, and the source of the MOS tube is connected to the output end of the small current source.

6. The monitoring circuit for dynamic on-resistance of a GaN power device according to any one of claims 1 to 5, characterized in that: The drain-source voltage test point of the device under test DUT is point a. When the device under test DUT is turned on, the voltage V at point a is measured. a V a =V mos_on +V on , where V on is the on-state voltage drop of the device under test (DUT), V mos_on is the voltage drop when MOS tube Q3 is turned on, and V mos_on The value of V a Closer to V on , V on is the conduction voltage drop of the device under test DUT, so the conduction voltage drop of the device under test DUT V on It can be obtained by the following formula: V on ≈V a .

7. A monitoring circuit for dynamic on-resistance of a GaN power device according to claim 6, characterized in that: When the device under test DUT is turned off, the small current source does not output current, the transistor Q1 is in a saturated state, and the collector voltage of the transistor Q1 is approximately equal to the emitter voltage, which is R2 (V cc -V be ) / (R1+R2); when the device under test DUT is turned on, the MOS tube Q3 is turned on, and the small current source outputs current. At this time, the transistor Q1 is in the amplification state.

8. A method for monitoring dynamic on-resistance of a power GaN device based on any one of the monitoring circuits of claims 1 to 5, characterized in that The following steps are involved: S1, high voltage DC is turned on, and voltage stress is applied to the device under test (DUT); S2, the trigger signal outputs a high level, so that the conventional drive circuit outputs a high level, the device under test DUT is turned on, and at the same time, a constant current is injected into the device under test DUT through the current output unit. At this time, the voltage measured by the clamp circuit unit is approximately the conduction voltage drop of the device under test DUT. Then, using Ohm's theorem, the ratio of the measured voltage to the injected current is the dynamic on-resistance; S3, the trigger signal outputs a low level, so that the conventional drive circuit outputs a low level, the device under test DUT is turned off, and the current output unit does not output current. At this time, the voltage measured by the clamping circuit unit is much smaller than the voltage of the applied voltage stress, preventing DC high voltage from entering the oscilloscope.

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