Power semiconductor junction temperature calibration device and online junction temperature measurement system suitable for inverter power topology

Abstract

The present application provides a power semiconductor junction temperature calibration device and an online junction temperature measurement system suitable for inverter power topology, wherein the calibration device includes an inverter power topology structure, a first inductor, a pulse generator, an on-state voltage acquisition module, a current acquisition module and a thermostat; the inverter power topology structure includes a calibration power device and an auxiliary power device, the first inductor is used to generate an on-state current of the calibration power device, the pulse generator is used to control the on and off of the calibration power device, the on-state voltage acquisition module is used to obtain the on-state voltage of the calibration power device, the current acquisition module is used to obtain the on-state current of the calibration power device, and the thermostat is used to keep the temperature of the calibration power device at a specified value. The present application effectively improves the conformity of the junction temperature calibration result with the actual working condition by constructing a power topology structure that is the same as the actual working state of the inverter, and helps to improve the accuracy of online junction temperature measurement of power devices.

Description

Technical Field

[0001] The present application belongs to the field of power semiconductor testing, and specifically provides a power semiconductor junction temperature calibration device and an online junction temperature measurement system suitable for inverter power topology. Background Art

[0002] With the development of new energy and electrification of transportation, the durability and reliability of inverters, as core components of electric drive systems, have attracted widespread attention. In inverters, power semiconductors play an important role in rectification and inversion, and their working state directly affects the overall energy efficiency of the system. The junction temperature of power semiconductors refers to the temperature of the hottest area inside a power semiconductor device. Accurately measuring and monitoring the junction temperature is crucial to ensuring device reliability, optimizing performance, and extending service life. High junction temperature increases the on-resistance and switching loss of the device, shortening the device's service life.

[0003] Currently, the most commonly used junction temperature measurement method uses the on-state voltage and on-state current of the power semiconductor as temperature-sensitive electrical parameters, and obtains the junction temperature by measuring the voltage and comparing it with a pre-calibrated voltage-current-junction temperature function. However, existing junction temperature calibration and measurement schemes, such as the scheme disclosed in Chinese invention patent CN115060953A, all focus on the junction temperature calibration of a single power semiconductor device, without considering the actual inverter power topology, such as the influence of the three-phase six-bridge arm power topology commonly used in the inverter on the junction temperature calibration result. At the same time, since the power semiconductor works in a high-voltage and high-speed switching state, the on-state voltage measurement and the off-state high voltage appear alternately. The existing online measurement technology is difficult to solve the problem of blocking the high voltage when the power semiconductor is turned off and accurately measuring the on-state voltage when it is turned on. Summary of the invention

[0004] The purpose of the present application is to provide a power semiconductor junction temperature calibration device suitable for inverter power topology, so as to accurately calibrate the junction temperature of the power semiconductor device when the inverter is in working state.

[0005] The junction temperature calibration device comprises:

[0006] An inverter power topology structure constructed by a calibration power device, an auxiliary power device and a DC bus power supply, wherein the calibration power device and the auxiliary power device are both power semiconductors and are connected in series between the positive and negative electrodes of the DC bus power supply;

[0007] A first inductor is connected between the DC bus power supply and the gate of the auxiliary power device, and is used to generate an on-state current of the calibration power device;

[0008] A pulse generating device, connected to the gate of the calibration power device, and used to control the on and off of the calibration power device;

[0009] An on-state voltage acquisition module is connected in parallel between the drain and source of the calibration power device to obtain the on-state voltage of the calibration power device;

[0010] A current acquisition module, connected in series with the calibration power device, for acquiring the on-state current of the calibration power device;

[0011] A constant temperature box is used to maintain the temperature of the calibration power device at a specified value.

[0012] Furthermore, the on-state voltage acquisition module includes a first Schottky diode, a second Schottky diode, a current mirror circuit, a subtractor circuit, a first limiting circuit and a second limiting circuit; the cathodes of the first Schottky diode and the second Schottky diode are respectively connected to the drain and source of the calibration power device, and the anodes are respectively connected to the positive input and negative input of the subtractor circuit; the current mirror circuit is used to keep the current flowing through the first Schottky diode and the second Schottky diode the same; the output end of the subtractor circuit outputs its on-state drain-source voltage when the calibration power device is turned on; the first limiting circuit and the second limiting circuit are respectively used to protect the positive input and negative input of the subtractor circuit.

[0013] Preferably, the current mirror circuit includes a first NPN transistor, a first PNP transistor and a second PNP transistor; the base of the first NPN transistor is connected to the first positive power supply through a first resistor, and is grounded through a first diode and a second diode, the emitter is grounded through a second resistor, and the collector is respectively connected to the base of the first PNP transistor and the second PNP transistor; the emitters of the first PNP transistor and the second PNP transistor are both connected to the first positive power supply, and the collectors are respectively connected to the anodes of the first Schottky diode and the second Schottky diode.

[0014] Preferably, the subtractor circuit includes a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first capacitor, a second capacitor and a first operational amplifier; the first end of the third resistor is connected to the anode of the first Schottky diode, the second end is connected to the first end of the fifth resistor, and the second end of the fifth resistor is connected to the positive input terminal of the first operational amplifier; the first end of the fourth resistor is connected to the anode of the second Schottky diode, the second end is connected to the first end of the sixth resistor, and the second end of the sixth resistor is connected to the negative input terminal of the first operational amplifier; the seventh resistor and the first capacitor are connected in parallel between the positive input terminal and the ground terminal of the first operational amplifier; the eighth resistor and the second capacitor are connected in parallel between the negative input terminal and the output terminal of the first operational amplifier; the two power input terminals of the first operational amplifier are respectively connected to the first positive power supply and the first negative power supply.

[0015] Preferably, the resistance value of the third resistor plus the resistance value of the fifth resistor is equal to the resistance value of the seventh resistor, the resistance value of the fourth resistor plus the resistance value of the sixth resistor is equal to the resistance value of the eighth resistor, and the resistance value of the seventh resistor is equal to the resistance value of the eighth resistor.

[0016] Preferably, the first limiting circuit includes a third diode and a fourth diode, the cathode of the third diode is connected to the first positive power supply, the anode is connected to the cathode of the fourth diode and the second end of the third resistor, and the anode of the fourth diode is connected to the first negative power supply; the second limiting circuit includes a fifth diode and a sixth diode, the cathode of the fifth diode is connected to the first positive power supply, the anode is connected to the cathode of the sixth diode and the second end of the fourth resistor, and the anode of the sixth diode is connected to the first negative power supply.

[0017] Furthermore, the current acquisition module includes a current transformer and an integrator circuit; the current transformer is used to sense the current change of the calibration power device when the calibration power device is in the on state; the integrator circuit is used to integrate the current change to obtain the on-state current of the calibration power device.

[0018] The present application also provides an online junction temperature measurement system through an embodiment, which is used to measure the junction temperature of a power device under test in an inverter power topology structure, wherein the power device under test is arranged in an upper half bridge or a lower half bridge in the inverter power topology structure;

[0019] The online junction temperature measurement system includes an on-state voltage acquisition module and a current acquisition module included in the aforementioned junction temperature calibration device; wherein the on-state voltage acquisition module is connected in parallel between the drain and source of the power device under test, and is used to obtain the on-state voltage of the power device under test; the current acquisition module is connected in series between the power device under test and a DC bus power supply, and is used to obtain the on-state current of the power device under test.

[0020] Preferably, the calibration power device, the auxiliary power device and the power device under test are all SiC MOSFETs.

[0021] The power semiconductor junction temperature calibration device provided in the present application utilizes calibration power devices and auxiliary power devices to construct a power topology structure that is identical to the actual working state of the inverter. Therefore, when calibrating the junction temperature of the power device, its voltage and current conditions in the off state and the on state can be kept consistent with the conditions during the subsequent online measurement of the inverter power semiconductor device, thereby effectively improving the degree of conformity between the junction temperature calibration result and the actual working conditions and ensuring the accuracy of the subsequent online junction temperature measurement of the actual power device. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1A schematic diagram of a framework of a power semiconductor junction temperature calibration device applicable to an inverter power topology provided according to an embodiment of the present application;

[0023] Figure 2 A circuit diagram of an on-state voltage acquisition module provided according to an embodiment of the present application;

[0024] Figure 3 A circuit diagram of a current acquisition module provided according to an embodiment of the present application;

[0025] Figure 4 A schematic diagram of measurement results of a power semiconductor junction temperature calibration device applicable to an inverter power topology provided according to an embodiment of the present application;

[0026] Figure 5 A schematic diagram of a junction temperature model lookup table generated by a power semiconductor junction temperature calibration device applicable to an inverter power topology provided according to an embodiment of the present application;

[0027] Figure 6 A schematic diagram of the framework of an online junction temperature measurement system provided according to an embodiment of the present application;

[0028] Figure 7 The figure is a schematic diagram of measurement results of an online junction temperature measurement system provided according to an embodiment of the present application. DETAILED DESCRIPTION

[0029] Hereinafter, the present application will be further described based on preferred embodiments with reference to the accompanying drawings.

[0030] In the description of the embodiments of the present application, it should be noted that if the terms "upper", "lower", "inside", "outside", etc. indicate an orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the products of the embodiments of the present application are usually placed when in use, it is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, in the description of the present application, in order to distinguish different units, the words first, second, etc. are used in this specification, but these are not limited by the order of manufacture, nor can they be understood as indicating or implying relative importance, and their names may be different in the detailed description and claims of the present application.

[0031] The vocabulary in this specification is used to illustrate the embodiments of the present application, but is not intended to limit the present application. It should also be noted that, unless otherwise clearly specified and limited, the terms "disposed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection, it can be a direct connection, it can be an indirect connection through an intermediate medium, and it can be the internal connection of two components. For those skilled in the art, the specific meanings of the above terms in this application can be specifically understood.

[0032] Figure 1 A schematic diagram of a power semiconductor junction temperature calibration device applicable to an inverter power topology according to some embodiments of the present application is shown in FIG. Figure 1 As shown, the junction temperature calibration device includes an inverter power topology structure, a first inductor L1, a pulse generating device, an on-state voltage acquisition module, a current acquisition module and a constant temperature box.

[0033] The inverter power topology is composed of calibration power devices, auxiliary power devices and DC bus power supply. Its power topology is the same as the structure of any phase in the current automotive motor inverter (such as an inverter with a three-phase six-bridge arm structure). For example, Figure 1 The upper and lower half bridges are respectively provided with auxiliary power device Q1 and calibration power device DUT1. The drain of Q1 is connected to the positive pole of the DC bus power supply, the source of Q1 is connected to the drain of DUT1, and the source of DUT1 is connected to the negative pole of the DC bus power supply. Generally, the voltage U dc is much larger than the on-state voltage of DUT1. For example, in some specific embodiments, U dc The on-state voltage of DUT1 is less than 1V.

[0034] Furthermore, the first inductor L1 is connected between the DC bus power supply Udc and the gate of the auxiliary power device Q1, and is used to generate an on-state current of the calibration power device DUT1.

[0035] The pulse generating device is connected to the gate of the calibration power device DUT1 and is used to generate a pulse signal to control the on and off of the calibration power device DUT1 when performing junction temperature calibration.

[0036] The on-state voltage acquisition module is connected in parallel between the drain and source of the calibration power device DUT1 to obtain the on-state voltage of the calibration power device DUT1;

[0037] A current acquisition module is connected in series with the calibration power device DUT1 and is used to obtain the on-state current of the calibration power device;

[0038] The constant temperature box is used to place the DUT1 in the constant temperature box when the junction temperature of the calibration power device DUT1 is calibrated, so as to keep the temperature of the calibration power device DUT1 at a specified value.

[0039] In some preferred embodiments, Figure 1 As shown, the junction temperature calibration device also includes a capacitor C1 for stabilizing the Udc voltage during the experiment.

[0040] In some embodiments, the junction temperature calibration device may be used to calibrate the junction temperature of the calibration power device DUT1 through the following steps:

[0041] The first step is to set the temperature in the thermostat to the calibration temperature T j (e.g. 25°C), place the calibration power device DUT1 in a constant temperature box for a long enough time until it reaches a thermal equilibrium state. At this time, it can be considered that the junction temperature of DUT1 is the same as the calibration temperature.

[0042] In the second step, the pulse generator sends the first pulse of duration t1 to the gate of DUT1. At this time, DUT1 is turned on and the on-state current I set The calculation formula is shown in formula (1):

[0043]

[0044] The third step is to send a second pulse of duration t2 to the gate of DUT1 through the pulse generator. At this time, DUT1 is turned on again, and the on-state voltage acquisition module and the current acquisition module continuously collect data during the second pulse.

[0045] Step 4: reset the calibration temperature of the thermostat and return to step 1 until all calibration temperatures are collected (for example, perform junction temperature calibration every 5°C between 25°C and 145°C).

[0046] The fifth step is to perform function fitting on the on-state voltage and on-state current of the calibration power device DUT1 at multiple calibration temperatures (the above fitting can be performed using methods familiar to those skilled in the art such as quadratic polynomial interpolation), to form a functional relationship between the on-state voltage, on-state current and junction temperature of DUT1, thereby obtaining a junction temperature model lookup table in the form of V ON (I DS ,θ J ), where V ON ,I DS ,θ J They are the on-state voltage, on-state current and junction temperature of DUT1 respectively.

[0047] In some optional embodiments, the on-state resistance R of DUT1 can also be further calculated. ON, through analysis, we can get the on-state resistance R ON The conclusion is that it is highly sensitive to junction temperature and is DS ,R ON It is easier to interpolate on a square regular domain with θ as input, so a quadratic polynomial function can be used on the experimental data with θ J (i DS ,R ON ) form, and finally obtain i for junction temperature estimation DS ,R ON As the input quantity, θ J Junction temperature model lookup table for output quantities.

[0048] After obtaining the junction temperature model lookup table through the above calibration steps, the on-state voltage acquisition module and the current acquisition module in the junction temperature calibration device can be further set in the inverter under the actual working state to measure the on-state voltage and on-state current of the power device under test in the on-state, and then determine the junction temperature of the power device under test corresponding to the measured on-state voltage and on-state current through the junction temperature model lookup table, or further calculate the on-state resistance corresponding to the on-state voltage and on-state current, and use the values ​​of the on-state current and on-state resistance as the input of the junction temperature model lookup table to obtain the corresponding junction temperature. Since the junction temperature calibration device provided by the present application uses the calibration power device DUT1 and the auxiliary power device Q1 to construct a power topology structure that is the same as the actual working state of the inverter, when the junction temperature of DUT1 is calibrated, its voltage and current conditions in the off state and the on state are consistent with the state of the subsequent online measurement of the inverter power semiconductor device, thereby effectively improving the degree of conformity of the junction temperature calibration result with the actual working conditions.

[0049] In some preferred embodiments, the calibration power device DUT1, the auxiliary power device Q1, and the power device under test in the actual inverter are all SiC MOSFETs. Compared with conventional power devices, the switching speed of SiC MOSFETs is significantly improved, which can reach 10 4 As described above, during the high-speed switching process of SiC MOSFET, the voltage difference between its drain and source is repeatedly switched from hundreds of volts in the off state to several volts or even zero tenths of a volt in the on state at high speed. Therefore, the data acquisition circuit needs to accurately measure the on-state voltage with an amplitude of about 1V in a timely manner during the voltage drop process, and effectively protect the data acquisition circuit during the voltage rise process. In order to achieve the above objectives, some preferred embodiments of the present application optimize the design of the on-state voltage acquisition module and the current acquisition module.

[0050] Figure 2 FIG. 4 shows a schematic diagram of the circuit principle of the on-state voltage acquisition module in some preferred embodiments, such as Figure 2 As shown, the on-state voltage acquisition module circuit and the power device DUT1 to be calibrated form a parallel structure to directly obtain the on-state voltage of DUT1.

[0051] Specifically, the on-state voltage acquisition module includes two Schottky diodes (a first Schottky diode D3 and a second Schottky diode D4), a subtractor circuit, a current mirror circuit and two limiter circuits (a first limiter circuit and a second limiter circuit).

[0052] The cathode and anode of the first Schottky diode D3 are connected to the drain of the calibration power device DUT1 and the positive input terminal of the subtractor circuit respectively, and the cathode and anode of the second Schottky diode D4 are connected to the source of the calibration power device DUT1 and the negative input terminal of the subtractor circuit respectively.

[0053] In some specific embodiments, Figure 2 As shown, the core components of the current mirror circuit include three transistors, namely, a first NPN transistor Q2, a first PNP transistor Q3 and a second PNP transistor Q4, wherein the base of the first NPN transistor Q2 is connected to the first positive power supply through the first resistor R1, and is connected to the ground terminal through the first diode D1 and the second diode D2 connected in series; its emitter is grounded to the ground terminal through the second resistor R2, and its collector is connected to the base of the first PNP transistor Q3 and the second PNP transistor Q4 respectively; the emitters of the first PNP transistor Q3 and the second PNP transistor Q4 are both connected to the first positive power supply, and the collectors are respectively connected to the anodes of the first Schottky diode D3 and the second Schottky diode D4 and output currents of the same magnitude to D3 and D4 respectively.

[0054] In some specific embodiments, Figure 2As shown, the subtractor circuit includes a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first capacitor C2, a second capacitor C3 and a first operational amplifier U1. Among them, the first end of the third resistor R3 is connected to the anode of the first Schottky diode D3, the second end is connected to the first end of the fifth resistor R5, and the second end of the fifth resistor R5 is connected to the positive input terminal of the first operational amplifier U1; the first end of the fourth resistor R4 is connected to the anode of the second Schottky diode D4, the second end is connected to the first end of the sixth resistor R6, and the second end of the sixth resistor R6 is connected to the negative input terminal of the first operational amplifier U1; the seventh resistor R7 is connected in parallel with the first capacitor C2 between the positive input terminal and the ground terminal of the first operational amplifier U1; the eighth resistor R8 is connected in parallel with the second capacitor C3 between the negative input terminal and the output terminal of the first operational amplifier U1, and the output terminal of U1 is further connected to an analog-to-digital converter (ADC) to realize the digitization of the analog signal; the two power input terminals of the first operational amplifier U1 are respectively connected to the first positive power supply and the first negative power supply.

[0055] Preferably, the resistance of the third resistor R3 and the fifth resistor R5 added together equals the resistance of the seventh resistor R7, the resistance of the fourth resistor R4 and the sixth resistor R6 added together equals the resistance of the eighth resistor R8, and the resistance of the seventh resistor R7 is equal to the resistance of the eighth resistor R8.

[0056] In some specific embodiments, the first limiting circuit includes a third diode D5 and a fourth diode D6, wherein the cathode of the third diode D5 is connected to the first positive power supply, the anode is connected to the cathode of the fourth diode D6 and the second end of the third resistor R3, and the anode of the fourth diode D6 is connected to the first negative power supply; the second limiting circuit includes a fifth diode D7 and a sixth diode D8, wherein the cathode of the fifth diode D7 is connected to the first positive power supply, the anode is connected to the cathode of the sixth diode D8 and the second end of the fourth resistor R4, and the anode of the sixth diode D8 is connected to the first negative power supply.

[0057] The first positive power supply and the first negative power supply have opposite potentials relative to the ground terminal. For example, in some specific embodiments, the first positive power supply provides a 5V voltage and the first negative power supply provides a -5V voltage. The above power supplies can be implemented in a manner known to those skilled in the art (for example, consisting of a DC-DC converter, a voltage regulator diode and a filter capacitor), which will not be elaborated here.

[0058] The working process of the on-state voltage acquisition module is:

[0059] 1) When the calibration power device DUT1 is in the off state, the subtractor circuit formed by the operational amplifier U1 is isolated from the DC bus power supply of the inverter power topology through the first Schottky diode D3, thereby protecting the signal circuit from the influence of the DC link voltage. At this time, the first limiting circuit formed by the third diode D5 and the fourth diode D6 limits the voltage of the third resistor R3 to within the range of ±5V, thereby protecting the positive input terminal of the first operational amplifier U1 (that is, the positive input terminal of the subtractor circuit); similarly, the second limiting circuit formed by the third diode D7 and the fourth diode D8 protects the negative input terminal of the first operational amplifier U1 (that is, the negative input terminal of the subtractor circuit).

[0060] 2) In the process of the calibration power device DUT1 switching from off to on, the same current is injected into the first Schottky diode D3 and the second Schottky diode D4 through the current mirror structure composed of Q2, Q3, and Q4, so that the two Schottky diodes D3 and D4 are forward biased and have the same voltage drop, and further through the subtractor circuit composed of R3, R4, R5, R6, R7, R8, and U1, the output of U1 is the difference between the cathode voltage of Schottky diode D3 and the cathode voltage of Schottky diode D4, that is, the on-state drain-source voltage of DUT1. Preferably, in order to ensure that the voltage drops of the two Schottky diodes D3 and D4 are as similar as possible, in the actual circuit, D3 and D4 are set as close as possible on the basis of not generating electromagnetic influence on each other, and the distance between them is less than 1mm, so that the temperature change affects their voltage drops to the same extent.

[0061] The on-state voltage acquisition module of the above structure realizes the isolation of the DC bus voltage from the signal acquisition circuit when the calibration power device DUT1 is disconnected through the first Schottky diode D3, and the conduction between the DUT1 drain and the positive input terminal of the operational amplifier U1 after DUT1 is turned on. At the same time, the second Schottky diode D4 is used to ensure that the same voltage drop is generated on the drain channel and the source channel, so as to transfer the on-state drain-source voltage to between the positive and negative input terminals of the first operational amplifier U1. Compared with the existing junction temperature measurement circuits of various power devices, this circuit structure effectively eliminates the influence of the power device switch delay on the measurement response speed by switching high-voltage isolation and low-voltage measurement through the switch of power devices such as switch tubes, and can realize the real-time acquisition of the on-state voltage during the process of the calibration power device from shutting down to conducting.

[0062] You should know that Figure 2 The circuit structure shown is only an optional real-time method of the present application. Without departing from the inventive concept of the present application, those skilled in the art can Figure 2The current mirror circuit, subtractor circuit and limiting circuit are adaptively modified as long as they can respectively achieve the functions of equal current injection, potential difference output and voltage limiting.

[0063] Figure 3 FIG. 4 shows a schematic diagram of the circuit principle of the current acquisition module in some preferred embodiments, such as Figure 3 As shown, the current acquisition module can form a series structure with the calibration power device DUT1, and the series position can be adaptively set by those skilled in the art according to the actual inverter topology. For example, the current acquisition module can be Figure 1 As shown, it is arranged between the source of the calibration power device DUT1 and the negative electrode of the DC bus power supply, and can also be as shown Figure 3 As shown, it is arranged between the auxiliary power device Q1 and the calibration power device DUT1, or the current acquisition module can also be used to collect the current of other electronic components with the same branch or corresponding main relationship as the calibration power device DUT1, that is, the current acquisition module can directly or indirectly obtain the on-state current of the calibration power device DUT1.

[0064] In some specific embodiments, Figure 3 As shown, the current acquisition module includes a current transformer and an integrator circuit, wherein the current transformer is used to sense the current change (i.e., dI) flowing through the drain and source of the calibration power device DUT1 when the device is in the on state. DS ), the core device of the integrator circuit is the second operational amplifier U2, and preferably, it also includes auxiliary components (R9-R12, C4-C7) for adjusting the current change dI DS Integrate to obtain the on-state current I of the calibration power device DUT1 DS .

[0065] Figure 4 In a specific embodiment, a schematic diagram of a junction temperature model lookup table obtained by calibrating a SiC MOSFET through the junction temperature calibration device provided by the present application is shown. After obtaining the above-mentioned junction temperature model lookup table, online junction temperature measurement can be performed on each SiC MOSFET of the same specification in the inverter.

[0066] Some embodiments of the present application also provide an online junction temperature measurement system, which can be used to perform online junction temperature measurement on each power device of a working inverter.

[0067] Figure 5 FIG. 4 shows a schematic diagram of the connection between the online junction temperature measurement system and the inverter in some embodiments, such as Figure 5As shown, the inverter adopts a three-phase six-bridge arm architecture to drive the motor MOTOR, and each power device is arranged in the upper half bridge or the lower half bridge in the inverter power topology structure, wherein the power device for which the junction temperature measurement is required is called the power device under test.

[0068] like Figure 5 As shown, the online junction temperature measurement system includes the on-state voltage acquisition module and the current acquisition module included in the aforementioned junction temperature calibration device, wherein the on-state voltage acquisition module is connected in parallel between the drain and the on-state resistance of the power device under test, and is used to obtain the on-state voltage of the power device under test; the current acquisition module is connected in series between the power device under test and the DC bus power supply, and is used to obtain the on-state current of the power device under test. The circuit structure and setting method of the on-state voltage acquisition module and the current acquisition module have been described in detail in the previous text, and will not be repeated here.

[0069] Figure 6 FIG. 4 shows the on-state voltage and on-state current obtained by measuring the power device under test by the online junction temperature measurement system in a specific embodiment. Figure 7 FIG. 4 shows the real-time junction temperature measurement result finally determined by using the above junction temperature model lookup table. In this embodiment, the power device under test is SiC MOSFET, U dc Set to 300V, through Figure 6 , Figure 7 It can be seen that when the power device under test is turned off, the current is almost 0, the high voltage is blocked by the first Schottky diode D3, and the collected voltage is almost 5V. When the power device under test is turned on, the on-state voltage is collected, and the voltage value is 0.7V. At this time, the current is 7A. According to the technical manual of the Sic MOSFET, its on-state resistance is 100mΩ. Therefore, the on-state voltage conforms to its on-state current multiplied by the on-state resistance, which further shows that the on-state voltage acquisition module and the current acquisition module can accurately measure the electrical parameters of the SiC MOSFET, and finally realize the online measurement of the real-time junction temperature of the power device.

[0070] The above is a detailed introduction to the specific implementation methods of the present application. For those skilled in the art, several improvements and modifications may be made to the present application without departing from the principles of the present application. These improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A power semiconductor junction temperature calibration device suitable for inverter power topology, characterized in that: include: An inverter power topology structure constructed by a calibration power device, an auxiliary power device and a DC bus power supply, wherein the calibration power device and the auxiliary power device are both power semiconductors and are connected in series between the positive and negative electrodes of the DC bus power supply; A first inductor is connected between the DC bus power supply and the gate of the auxiliary power device, and is used to generate an on-state current of the calibration power device; A pulse generating device, connected to the gate of the calibration power device, and used to control the on and off of the calibration power device; An on-state voltage acquisition module is connected in parallel between the drain and source of the calibration power device to obtain the on-state voltage of the calibration power device; A current acquisition module, connected in series with the calibration power device, for acquiring the on-state current of the calibration power device; A constant temperature box, used to maintain the temperature of the calibration power device at a specified value; The on-state voltage acquisition module includes a first Schottky diode, a second Schottky diode, a current mirror circuit, a subtractor circuit, a first limiter circuit and a second limiter circuit; The cathodes of the first Schottky diode and the second Schottky diode are respectively connected to the drain and source of the calibration power device, and the anodes are respectively connected to the positive input terminal and the negative input terminal of the subtractor circuit; The current mirror circuit is used to keep the current flowing through the first Schottky diode and the current flowing through the second Schottky diode the same; The output end of the subtractor circuit outputs the on-state drain-source voltage of the calibration power device when the calibration power device is turned on; The first amplitude limiting circuit and the second amplitude limiting circuit are used to protect the positive input terminal and the negative input terminal of the subtractor circuit respectively; The current mirror circuit includes a first NPN transistor, a first PNP transistor and a second PNP transistor; The base of the first NPN transistor is connected to the first positive power supply through the first resistor, and is grounded through the first diode and the second diode, the emitter is grounded through the second resistor, and the collector is connected to the bases of the first PNP transistor and the second PNP transistor respectively; The emitters of the first PNP transistor and the second PNP transistor are both connected to the first positive power supply, and the collectors are respectively connected to the anodes of the first Schottky diode and the second Schottky diode.

2. The power semiconductor junction temperature calibration device applicable to inverter power topology according to claim 1, characterized in that: The subtractor circuit includes a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first capacitor, a second capacitor and a first operational amplifier; The first end of the third resistor is connected to the anode of the first Schottky diode, the second end is connected to the first end of the fifth resistor, and the second end of the fifth resistor is connected to the positive input terminal of the first operational amplifier; The first end of the fourth resistor is connected to the anode of the second Schottky diode, the second end is connected to the first end of the sixth resistor, and the second end of the sixth resistor is connected to the negative input terminal of the first operational amplifier; The seventh resistor and the first capacitor are connected in parallel between the positive input terminal of the first operational amplifier and the ground terminal; The eighth resistor and the second capacitor are connected in parallel between the negative input terminal and the output terminal of the first operational amplifier; Two power input terminals of the first operational amplifier are connected to a first positive power supply and a first negative power supply respectively.

3. The power semiconductor junction temperature calibration device applicable to inverter power topology according to claim 2, characterized in that: The resistance value of the third resistor plus the resistance value of the fifth resistor is equal to the resistance value of the seventh resistor, the resistance value of the fourth resistor plus the resistance value of the sixth resistor is equal to the resistance value of the eighth resistor, and the resistance value of the seventh resistor is equal to the resistance value of the eighth resistor.

4. The power semiconductor junction temperature calibration device applicable to inverter power topology according to claim 3, characterized in that: The first amplitude limiting circuit includes a third diode and a fourth diode, the cathode of the third diode is connected to the first positive power supply, the anode of the third diode is connected to the cathode of the fourth diode and the second end of the third resistor, and the anode of the fourth diode is connected to the first negative power supply; The second amplitude limiting circuit includes a fifth diode and a sixth diode. The cathode of the fifth diode is connected to the first positive power supply, the anode is connected to the cathode of the sixth diode and the second end of the fourth resistor, and the anode of the sixth diode is connected to the first negative power supply.

5. The power semiconductor junction temperature calibration device applicable to inverter power topology according to claim 1, characterized in that: The current acquisition module includes a current transformer and an integrator circuit; The current transformer is used to sense the current change of the calibration power device when the calibration power device is in the on state; The integrator circuit is used to integrate the current change to obtain the on-state current of the calibration power device.

6. An online junction temperature measurement system for measuring a power device under test in an inverter power topology structure, wherein the power device under test is arranged in an upper half bridge or a lower half bridge in the inverter power topology structure, characterized in that: include: The power semiconductor junction temperature calibration device suitable for inverter power topology as described in claim 1; The on-state voltage acquisition module is connected in parallel between the drain and source of the power device under test, and is used to obtain the on-state voltage of the power device under test; The current acquisition module is connected in series between the power device under test and the DC bus power supply, and is used to obtain the on-state current of the power device under test.

7. The online junction temperature measurement system according to claim 6, characterized in that: The calibration power device, auxiliary power device and tested power device are all SiC MOSFETs.

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