Data cache configuration method and terminal

Abstract

The invention discloses a data cache configuration method and a terminal, after a cache simulation memory block is generated, a cache unit is created for data of an access object capable of caching data according to an IO access request, and the memory block is filled with the data in the cache unit; and then obtaining the processing logic of the cache unit and generating a logic unit, filling the data in the logic unit into the memory block, and configuring a cache index for the cache unit. In this way, hierarchical caching of module data of the cache unit, the logic unit and the like can be achieved, and the access efficiency of the cache and the utilization rate of cache resources can be effectively improved.

Description

Technical Field

[0001] The present invention relates to the technical field of data cache, and in particular to a data cache configuration method and a terminal. Background Art

[0002] With the rapid development of information technology, the dramatic increase in data volume and the continuous improvement of users' requirements for data processing efficiency and real-time performance, cache technology has been widely used in various fields as an important means to optimize data storage and access performance. Traditional cache technologies, such as file cache technology and online video cache technology, significantly reduce the number of times data is read directly from slow storage devices (such as hard disks) by temporarily storing frequently accessed data in memory, thereby improving the system's response speed and throughput.

[0003] However, although these technologies have alleviated the bottleneck problem of data access to a certain extent, they still have some significant limitations and cannot meet the needs of efficient data processing and refined resource management in current complex application scenarios. Specifically, the shortcomings of existing cache technologies are mainly reflected in the following aspects:

[0004] 1. Limitations of overall data caching: Most current cache systems use an overall data caching strategy, which means that all data is cached equally regardless of its importance, access frequency, or usage scenario. Although this indiscriminate caching method is simple and easy to implement, it lacks flexibility and cannot effectively distinguish and prioritize key data, resulting in low utilization of cache resources. It may also occupy too many system resources due to caching too much non-critical data.

[0005] 2. Lack of hierarchical caching mechanism: Hierarchical caching is a technology that divides data into different levels based on factors such as data access frequency, importance or timeliness, and stores them in storage media with different access speeds and capacities. However, most existing cache technologies lack such a hierarchical processing mechanism and cannot achieve refined management and efficient use of cache resources.

[0006] 3. Insufficient integration of algorithms and bionics: Although algorithms and bionics have made significant progress in many fields in recent years, their application in the field of cache technology is still relatively limited. Traditional cache strategies often rely on simple replacement algorithms (such as LRU, LFU, etc.). Although these algorithms improve cache hit rates to a certain extent, they fail to fully utilize the complexity and dynamics of data access. Bionics, such as simulating the adaptive and self-organizing characteristics of biological systems, are expected to provide new ideas and methods for the design of cache strategies, but their application in the field of cache is still in the exploratory stage.

[0007] 4. Existing cache technologies mainly focus on data cache processing, that is, how to effectively store data in the cache and reduce the latency of data access. However, relying solely on data cache processing is usually difficult to meet the cache requirements in complex application scenarios, resulting in limited optimization space for cache strategies. Summary of the invention

[0008] The technical problem to be solved by the present invention is to provide a data cache configuration method and a terminal, which can improve the access efficiency of the cache and the utilization rate of the cache resources.

[0009] In order to solve the above technical problems, the technical solution adopted by the present invention is:

[0010] A method for configuring a data cache comprises the steps of:

[0011] Generate cache simulation memory blocks;

[0012] receiving an IO access request, and if the access object is an object that can cache data, creating a corresponding cache unit for the data of the access object, and filling the data in the cache unit into the memory block;

[0013] The processing logic of the cache unit is obtained and a logic unit is generated, the data in the logic unit is filled into the memory block, and a cache index is configured for the cache unit.

[0014] In order to solve the above technical problems, another technical solution adopted by the present invention is:

[0015] A data cache configuration terminal comprises a memory, a processor and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, each step of the above-mentioned data cache configuration method is implemented.

[0016] The beneficial effects of the present invention are as follows: after generating a cache simulation memory block, according to an IO access request, a cache unit is created for the data of the access object that can cache data, and the data in the cache unit is filled into the memory block; then the processing logic of the cache unit is obtained and a logic unit is generated, the data in the logic unit is filled into the memory block, and a cache index is configured for the cache unit. In this way, hierarchical caching of module data such as cache units and logic units can be realized, which can effectively improve the access efficiency of the cache and the utilization rate of cache resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A flowchart of a method for configuring a data cache according to an embodiment of the present invention;

[0018] Figure 2A schematic diagram of a configuration terminal for data caching according to an embodiment of the present invention;

[0019] Figure 3 A schematic diagram of a flow chart of a method for configuring a data cache according to an embodiment of the present invention;

[0020] Description of labels:

[0021] 1. A data cache configuration terminal; 2. A memory; 3. A processor. DETAILED DESCRIPTION

[0022] In order to explain the technical content, achieved objectives and effects of the present invention in detail, the following is an explanation in combination with the implementation modes and the accompanying drawings.

[0023] Please refer to Figure 1 , an embodiment of the present invention provides a method for configuring a data cache, comprising the steps of:

[0024] Generate cache simulation memory blocks;

[0025] receiving an IO access request, and if the access object is an object that can cache data, creating a corresponding cache unit for the data of the access object, and filling the data in the cache unit into the memory block;

[0026] The processing logic of the cache unit is obtained and a logic unit is generated, the data in the logic unit is filled into the memory block, and a cache index is configured for the cache unit.

[0027] From the above description, it can be seen that the beneficial effect of the present invention is that after generating a cache simulation memory block, according to an IO access request, a cache unit is created for the data of the access object that can cache data, and the data in the cache unit is filled into the memory block; then the processing logic of the cache unit is obtained and a logic unit is generated, the data in the logic unit is filled into the memory block, and a cache index is configured for the cache unit. In this way, hierarchical caching of module data such as cache units and logic units can be realized, which can effectively improve the access efficiency of the cache and the utilization rate of cache resources.

[0028] Further, creating a corresponding cache unit for the data of the access object and filling the data in the cache unit into the memory block includes:

[0029] Acquire the data of the cache unit, fill the data of the cache unit into the memory block, and set a mark of the corresponding cache unit for the filled data in the memory block;

[0030] A buffer zone is set for the memory block, and data marked with a cache unit in the memory block is compressed and released into the buffer zone.

[0031] From the above description, it can be seen that when the data of the cache unit is filled into the memory block, the data in the memory block is compressed, and a buffer is generated to store the compressed data in the buffer, thereby realizing secondary hierarchical management of data. This not only saves cache space, but also allows other programs to access the buffer instead of repeatedly accessing the memory block when performing the same operation, thereby accelerating data, extending the service life of hardware, and reducing CPU load.

[0032] Further, obtaining the processing logic of the cache unit and generating a logic unit, and filling the data in the logic unit into the memory block, includes:

[0033] The processing logic in each cache unit is obtained, and a corresponding logic unit is generated for the cache unit where the processing logic exists, the processing logic in the logic unit and the processing result thereof are filled into the mark where the corresponding cache unit is stored in the memory block, and the processing logic in the logic unit and the processing result thereof are compressed and released into the corresponding buffer.

[0034] From the above description, it can be seen that after caching the data of the cache unit, the logical unit of the cache unit is further cached, and the data of the logical unit is cached at a location related to the cache unit in the memory block, effectively realizing hierarchical caching to improve cache access efficiency and utilization.

[0035] Further, configuring a cache index for the cache unit includes:

[0036] Establishing a cache index according to the tags of each cache unit stored in the memory block;

[0037] Configuring a cache index for the cache unit, and then comprising:

[0038] A data search request is received, and it is determined whether there is a cache unit for data compression. If so, a corresponding buffer is released, and data search is performed using the cache index based on the content of the data to be searched in the data search request.

[0039] As can be seen from the above description, generating a cache index for a cache unit can generate a cache directory for a device object that has completed caching, and cached data can be subsequently searched according to the cache index, further improving cache access efficiency.

[0040] Furthermore, if the accessed object is an object whose data cannot be cached, data caching is not performed.

[0041] As can be seen from the above description, objects with uncacheable data are directly accessed without data caching, so as to improve the applicability of data access.

[0042] Please refer to Figure 2Another embodiment of the present invention provides a data cache configuration terminal, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements each step of the above-mentioned data cache configuration method when executing the computer program.

[0043] The above-mentioned data cache configuration method and terminal of the present invention are suitable for improving cache access efficiency and cache resource utilization in data cache, and are described below through specific implementation methods:

[0044] Embodiment 1

[0045] Please refer to Figure 1 and Figure 3 , a data cache configuration method, comprising the steps of:

[0046] S1. Generate cache simulation memory blocks.

[0047] Specifically, a cache simulation memory block is generated, and the memory block is also used to store the unit objects that need to be cached, and a memory space of a corresponding size can be created according to the unit objects.

[0048] S2. Receive an IO access request. If the access object is an object that can cache data, create a corresponding cache unit for the data of the access object, and fill the data in the cache unit into the memory block.

[0049] Specifically, through IO access, the access object is directly accessed, wherein the access object may be: disk data, database or device object.

[0050] In this embodiment, for uncacheable access object data, that is, device object data that cannot be cached, the access object is directly accessed to implement data access.

[0051] For cacheable access object data, a corresponding cache unit is created for the access object, the data of the cache unit is obtained, the data is filled into the memory block according to the data size of the cache unit, and a mark of the corresponding cache unit is set for the filled data in the memory block. The set mark can be "disk data", "database" or "device object".

[0052] A buffer is set for the memory block, and the data marked with the cache unit in the memory block is compressed and released to the buffer, thereby saving cache space.

[0053] S3. Obtain the processing logic of the cache unit and generate a logic unit, fill the data in the logic unit into the memory block, and configure a cache index for the cache unit.

[0054] Specifically, the processing logic in each cache unit is obtained, such as the processing logic for reading, writing, deleting, and modifying data, and a corresponding logic unit is generated for the cache unit with the processing logic.

[0055] The processing logic and processing results in the logic unit are filled into the mark of the corresponding cache unit in the memory block, and the processing logic and processing results in the logic unit are compressed and released to the corresponding buffer. In this way, the logical relationship that needs to be repeatedly executed on the data and the data processed by the processing logic can be stored in the corresponding position of the corresponding cache unit in the memory block.

[0056] In some embodiments, different logical cache strategies can be adopted for different objects. That is, for unchanged data, such as storage data, hard disk data, and unchanged logical unit data, cache unit storage can be performed; for real-time changing data, such as access devices, data dynamic changes, and data that needs to be accessed through IO at all times, the corresponding processing logic is cached in the logical unit.

[0057] Afterwards, a cache index is established based on the tags of each cache unit stored in the memory block, and the index is stored in the buffer so that after receiving a data search request later, it can be determined whether there is a cache unit for data compression. If so, the corresponding buffer is released, and the cache index is used to search for data based on the content of the data to be searched in the data search request.

[0058] In this embodiment, the keyword to be searched may be determined first. Since the cache unit stores an index, the index may include a content data index and a file name index:

[0059] When the keyword to be searched is content data, the content data index can be used for searching, and a list of file names of files containing the content data can be returned;

[0060] When the keyword to be searched is a file name, if there is a file name index in the buffer, the file name index can be used to find the file and the content corresponding to the file can be directly accessed through IO; if there is no file name index in the buffer, the file corresponding to the file name can be directly accessed through IO.

[0061] Embodiment 2

[0062] Please refer to Figure 2 A data cache configuration terminal 1 includes a memory 2, a processor 3, and a computer program stored in the memory 2 and executable on the processor 3. When the processor 3 executes the computer program, each step of a data cache configuration method of embodiment 1 is implemented.

[0063] In summary, the present invention provides a data cache configuration method and terminal. After generating a cache simulation memory block, according to an IO access request, a cache unit is created for the data of the access object that can cache data, and the data in the cache unit is filled into the memory block. When the data of the cache unit is filled into the memory block, the data in the memory block is compressed, and a buffer is generated to store the compressed data in the buffer, so as to realize secondary hierarchical management of data. This can not only save cache space, but also allow other programs to access the buffer instead of repeatedly accessing the memory block when performing the same operation, thereby accelerating data and reducing CPU load. After that, the processing logic of the cache unit is obtained and a logical unit is generated, the data in the logical unit is filled into the memory block, and the data of the logical unit is cached in a position related to the cache unit in the memory block, so as to effectively realize hierarchical cache; and a cache index is configured for the cache unit, and the cached data can be searched according to the cache index later. Moreover, objects for non-cacheable data can be directly accessed without data caching, so as to improve the scope of application of data access. In this way, hierarchical cache of module data such as cache units and logical units can be realized, which can effectively improve the access efficiency of cache and the utilization rate of cache resources.

[0064] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent transformations made using the contents of the present invention's specification and drawings, or directly or indirectly applied in related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A method for configuring a data cache, characterized in that: Includes steps: Generate cache simulation memory blocks; receiving an IO access request, and if the access object is an object that can cache data, creating a corresponding cache unit for the data of the access object, and filling the data in the cache unit into the memory block; The processing logic of the cache unit is obtained and a logic unit is generated, the data in the logic unit is filled into the memory block, and a cache index is configured for the cache unit.

2. A data cache configuration method according to claim 1, characterized in that: Creating a corresponding cache unit for the data of the access object and filling the data in the cache unit into the memory block includes: Acquire the data of the cache unit, fill the data of the cache unit into the memory block, and set a mark of the corresponding cache unit for the filled data in the memory block; A buffer zone is set for the memory block, and data marked with a cache unit in the memory block is compressed and released into the buffer zone.

3. A data cache configuration method according to claim 2, characterized in that: Acquiring the processing logic of the cache unit and generating a logic unit, and filling the data in the logic unit into the memory block, including: The processing logic in each cache unit is obtained, and a corresponding logic unit is generated for the cache unit where the processing logic exists, the processing logic in the logic unit and the processing result thereof are filled into the mark where the corresponding cache unit is stored in the memory block, and the processing logic in the logic unit and the processing result thereof are compressed and released into the corresponding buffer.

4. A data cache configuration method according to claim 2, characterized in that: Configuring a cache index for the cache unit includes: Establishing a cache index according to the tags of each cache unit stored in the memory block; Configuring a cache index for the cache unit, and then comprising: A data search request is received, and it is determined whether there is a cache unit for data compression. If so, a corresponding buffer is released, and data search is performed using the cache index based on the content of the data to be searched in the data search request.

5. A data cache configuration method according to claim 1, characterized in that: If the accessed object is an object whose data cannot be cached, the data will not be cached.

6. A data cache configuration terminal, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the following steps are implemented: Generate cache simulation memory blocks; receiving an IO access request, and if the access object is an object that can cache data, creating a corresponding cache unit for the data of the access object, and filling the data in the cache unit into the memory block; The processing logic of the cache unit is obtained and a logic unit is generated, the data in the logic unit is filled into the memory block, and a cache index is configured for the cache unit.

7. A data cache configuration terminal according to claim 6, characterized in that: Creating a corresponding cache unit for the data of the access object and filling the data in the cache unit into the memory block includes: Acquire the data of the cache unit, fill the data of the cache unit into the memory block, and set a mark of the corresponding cache unit for the filled data in the memory block; A buffer zone is set for the memory block, and data marked with a cache unit in the memory block is compressed and released into the buffer zone.

8. A data cache configuration terminal according to claim 7, characterized in that: Acquiring the processing logic of the cache unit and generating a logic unit, and filling the data in the logic unit into the memory block, including: The processing logic in each cache unit is obtained, and a corresponding logic unit is generated for the cache unit where the processing logic exists, the processing logic in the logic unit and the processing result thereof are filled into the mark where the corresponding cache unit is stored in the memory block, and the processing logic in the logic unit and the processing result thereof are compressed and released into the corresponding buffer.

9. A data cache configuration terminal according to claim 7, characterized in that: Configuring a cache index for the cache unit includes: Establishing a cache index according to the tags of each cache unit stored in the memory block; Configuring a cache index for the cache unit, and then comprising: A data search request is received, and it is determined whether there is a cache unit for data compression. If so, a corresponding buffer is released, and data search is performed using the cache index based on the content of the data to be searched in the data search request.

10. A data cache configuration terminal according to claim 6, characterized in that: If the accessed object is an object whose data cannot be cached, the data will not be cached.

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