Method, device and equipment for detecting signal abnormity between interconnected elements and medium

Abstract

The invention relates to the technical field of computers, and discloses a method, a device and equipment for detecting signal abnormity between interconnected elements and a medium, and the method comprises the following steps: obtaining a pre-generated circuit document; traversing first identification information of an element pin for outputting the target signal from the circuit document; identifying an element type of a second element of the input target signal; when it is determined that the element type of the first element is not the preset element type, traversing is continued from the circuit document until it is traversed that the third element is the element of the preset type, traversing is stopped, and it is determined that a signal link is formed between the first element and the third element; acquiring second identification information of an element pin of a third element in the signal link; acquiring first attribute information based on the first identification information, and acquiring second attribute information based on the second identification information; and determining whether signal abnormity exists in the signal link according to the first attribute information and the second attribute information. Manual operation is not needed, testing efficiency is greatly improved, and time and labor cost are saved.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a method, device, equipment and medium for detecting signal anomalies between interconnected elements. Background Art

[0002] When designing the schematic diagram of a board, many integrated circuits will be used. It is necessary to pay attention to whether the interconnection signal voltages between different integrated circuits are the same. If the voltage at the Integrated Circuit's Input / Output Power Pin (VCCIO) and the voltage for the internal logic circuit of the integrated circuit (VCCINT) are different, leakage problems may occur. Leakage problems may not only interfere with the normal operation of the circuit, but may even damage the integrated circuit and cause the board to be scrapped.

[0003] In the related technology, during the design process, hardware developers need to carefully check the interconnection signals between integrated circuits. If the interconnection signal voltages are different, an isolation circuit is added. For boards with relatively few circuits, manual inspection is barely acceptable; however, for some boards with short product development time and numerous circuits, hardware developers need to conduct inspections. This not only takes more time and energy, but may also fail to detect all problems due to negligence. If the review cannot be passed in one go, serious errors may cause delays in the drawing progress, and even the boards cannot be used normally after the boards are printed, wasting company resources. Summary of the invention

[0004] In view of this, the present invention provides a method, device, equipment and medium for detecting abnormal signals between interconnected components, so as to solve the problem in the related art that for boards with short product development time and numerous circuits, hardware developers need to spend more time and energy to check, and there may be omissions and the boards cannot pass the review in one go.

[0005] In a first aspect, the present invention provides a method for detecting signal anomalies between interconnected components, the method comprising:

[0006] Obtain a pre-generated circuit document, where the circuit document is a circuit document generated based on a schematic diagram of a circuit to be tested;

[0007] Traversing first identification information of a component pin that outputs a target signal from a circuit document, wherein the circuit to be tested includes multiple components, the target signal is any one of multiple signals generated in the circuit to be tested, and the target signal is a signal output by a first component among the multiple components, and the first component is a component of a preset type;

[0008] identifying a component type of a second component of the input target signal;

[0009] When it is determined that the component type of the second component is not the preset component type, continue to traverse the components that directly or indirectly establish an electrical connection relationship with the second component from the circuit document until the third component in the circuit document is a component of the preset type, stop traversing, and determine that a signal link is formed between the first component and the third component;

[0010] Acquire second identification information of a component pin of a third component connected in the signal link;

[0011] Acquire first attribute information corresponding to the first element from a pre-built database based on the first identification information, and acquire second attribute information corresponding to the third element from the database based on the second identification information;

[0012] Determine whether there is a signal anomaly in the signal link according to the first attribute information and the second attribute information.

[0013] The present invention provides a method for detecting abnormal signals between interconnected components, which has the following advantages:

[0014] First, a circuit document is generated based on the schematic diagram of the circuit to be tested, and then the first identification information of the component pins that output the target signal is automatically traversed from the circuit document, and then the component type of the second component that inputs the target signal is identified. If the second component is a preset type component, the traversal can be stopped, and the first component and the second component form a signal chain including the target signal. If the second component is not a preset type component, the traversal continues until the third component is a preset type component, and a complete signal chain is formed. The identification information of the component pins of the preset type components at the end of the signal chain that input / output the signal in the signal chain is obtained, and the attribute information corresponding to the components at the end of the end is obtained based on the identification information, and finally the signal in the signal chain is determined based on the attribute information. Whether there is an abnormality. The whole process does not require manual operation, greatly improves the test efficiency, saves time and labor costs. Moreover, automatic traversal and identification can reduce human errors and improve the accuracy of test results. In this process, the entire circuit document can be traversed to ensure that all possible signal chains are detected, which improves the comprehensiveness of the test. Especially for complex circuits, automatic testing can more effectively handle a large number of signals and components and improve the feasibility of testing. Timely detection and resolution of signal anomalies reduces the risk of product failure during use.

[0015] In an optional implementation, when the input target signal includes multiple elements, the method further includes:

[0016] respectively identifying a type of each of the plurality of components;

[0017] When it is determined that the type of at least one of the plurality of elements is a preset type, stopping traversing the signal link formed between each of the at least one element and the first element;

[0018] Obtain identification information of a component pin of each component of at least one component for inputting a target signal;

[0019] Based on the third identification information of the pin of the fourth component, acquiring third attribute information corresponding to the fourth component from the database, wherein the fourth component is any one of the at least one component;

[0020] It is determined whether there is a signal abnormality in a signal link formed between the first element and the fourth element according to the first attribute information and the third attribute information.

[0021] Specifically, in a circuit document, in many cases, there are target signals that are input into different components respectively. Therefore, when multiple components input target signals respectively, it is necessary to determine the component type of each component in the multiple components respectively. If the component type is not a component of a preset type, the method steps in the aforementioned content are used to operate until the preset type of component is traversed and the traversal is stopped, and subsequent operations are performed. If it is identified that there is a preset type of component in multiple components, the traversal operation is stopped immediately. The identification information of the component pin that inputs the target signal in the component is directly obtained, and then the attribute information of the component is obtained. And based on the first attribute information and the third attribute information corresponding to the component, it is determined whether there is a signal abnormality in the signal link formed between the first component and the fourth component. In this method, by traversing multiple components connected to the target signal, and automatically traversing and identifying the component type, the signal link can be quickly determined, reducing manual operation and time cost, and can also ensure the comprehensiveness and accuracy of the detection signal link. In this way, signal abnormalities are discovered in a timely manner, which helps to quickly take measures to repair or adjust.

[0022] In an optional implementation, the attribute information includes: one or more of component pin voltage, open-drain output state, and push-pull output state, and the attribute information includes first attribute information, second attribute information, and third attribute information.

[0023] Specifically, understanding the voltage of the component pin helps ensure the normal operation of the circuit and detect voltage abnormalities in a timely manner. Determining the open-drain output or push-pull output state is crucial to correctly understand and control the behavior of the circuit. Abnormal voltage or output state may indicate a component failure. Therefore, in this application, these attribute information are used to determine whether there is a signal abnormality in the signal link. In an optional embodiment, based on the first attribute information and the second attribute information, determining whether there is a signal abnormality in the signal link specifically includes:

[0024] determining whether a component pin voltage of the first component and a component pin voltage of the third component are the same;

[0025] When it is determined that the component pin voltage of the first component is the same as the component pin voltage of the third component, it is determined that the signal in the signal link is normal;

[0026] Alternatively, when it is determined that the component pin voltage of the first component is different from the component pin voltage of the third component, it is determined that there is a signal abnormality in the signal link, and prompt information of the signal abnormality is generated.

[0027] Specifically, by comparing the component pin voltage, it is possible to accurately determine whether the signal is normal. This allows for quick determination of whether there is an abnormality in the signal link, improving detection efficiency. In addition, the status of the signal link can be monitored in real time to detect problems in a timely manner. Once a problem is found, prompt information is generated in a timely manner. This helps to quickly locate the location of the signal abnormality, facilitates maintenance and debugging, and reduces the possibility of failures. This reduces losses and maintenance costs caused by signal abnormalities.

[0028] In an optional implementation, determining whether there is a signal abnormality in the signal link according to the first attribute information and the second attribute information specifically includes:

[0029] When it is determined that the configuration of at least one of the configuration corresponding to the first element and the configuration corresponding to the third element is an open drain output, it is determined that the signal in the signal link is normal;

[0030] Alternatively, when it is determined that the configuration corresponding to the first element and the configuration corresponding to the third element are both push-pull outputs, it is determined that an abnormal signal exists in the signal link, and a prompt message of signal abnormality is generated.

[0031] Specifically, similar to the above-mentioned embodiment, by comparing the specific configuration of the components, it is also possible to more accurately determine whether there is an abnormality in the signal link, thereby quickly determining whether there is an abnormality in the signal link, and improving the detection efficiency. Moreover, the state of the signal link can be monitored in real time to find problems in a timely manner. Once a problem is found, prompt information is generated in a timely manner. It helps to quickly locate the location of the signal abnormality, facilitates maintenance and debugging, and reduces the possibility of failure. Reduce the loss and maintenance costs caused by signal abnormalities.

[0032] In an optional implementation, after acquiring first attribute information corresponding to the first component from a pre-built database based on the first identification information, and acquiring second attribute information corresponding to the third component from the database based on the second identification information, the method further includes:

[0033] Establishing a binding relationship based on the first attribute information, the second attribute information, the first identification information, the second identification information, and the target signal, and forming a relationship entry;

[0034] Multiple relationship entries constitute a relationship table.

[0035] Specifically, by establishing a binding relationship between the first attribute information, the first identification information, the second attribute information, the second identification information, and the target signal, etc., a relationship entry is formed, and multiple similar relationship entries form a relationship table, so as to more efficiently manage and organize the relationship between the component pins, signals, etc. of each component in the circuit document. The relationship table provides a structured way to store information, which is convenient for subsequent query and analysis. In addition, clear binding relationships help ensure the accuracy and consistency of information.

[0036] In an optional implementation, after acquiring the signal links corresponding to the plurality of signals respectively, in addition to extracting the identification information and attribute information of the component pins connected to the components of the preset component type in the plurality of signal links, the method further includes:

[0037] Respectively obtain identification information of component pins connected in the signal link and attribute information of other components other than the components of the preset component type included in each signal link, wherein when one or more components have attribute values, the attribute information corresponding to the one or more components respectively includes the attribute values;

[0038] Create a signal link model according to the types of all components included in each signal link, identification information of connected component pins and attribute information of each component;

[0039] When it is determined based on the signal link model that at least two signal links among the plurality of signal links have an associated relationship, based on the type of components included in each of the at least two signal links, identification information of component pins of each component connected in the signal link, and attribute information of each component, the at least two signal links are simulated to obtain signal transmission characteristics and a timing relationship between the at least two signal links;

[0040] Based on the signal transmission characteristics and timing relationship, determine whether at least two signal links are abnormal.

[0041] Specifically, in the steps of this method, by obtaining the pin identification information of the pins connected to all components included in each signal link in multiple signal links and the attribute information of each component, the composition and characteristics of the signal link are fully understood. In addition, a signal link model is created based on the more complete information that has been obtained, and based on the signal link model, signal links with associated relationships can be discovered. Thus, the signal transmission characteristics and timing relationships in the signal links with associated relationships are obtained through simulation, and whether there are abnormalities in the signal links. This method judges whether there are abnormalities in the signal link in a more in-depth manner from multiple dimensions, discovers potential problems, and facilitates subsequent fault diagnosis and optimization.

[0042] In an optional implementation, when the schematic diagram of the circuit to be tested is changed, the method further includes:

[0043] Get a new circuit document corresponding to the changed schematic;

[0044] Compare the new circuit document with the pre-generated circuit document to obtain a first comparison result;

[0045] When it is determined according to the first comparison result that there is a signal change in the modified schematic diagram, identifying the signal change type;

[0046] When the change type is that there is a newly added signal, identify the component attribute information of the preset type components at the first and last ends of the signal chain of the newly added signal, and the identification information of the component pins to which the preset type components at the first and last ends are connected in the signal chain, and based on the component attribute information of the preset type components at the first and last ends and the identification information of the component pins, generate a new relationship entry corresponding to the newly added signal, and update the new relationship entry into the relationship table;

[0047] Alternatively, when the change type is a deletion signal, identifying a relationship entry corresponding to the deletion signal from the relationship table;

[0048] Deleting the relation entry corresponding to the deletion signal from the relation table;

[0049] Alternatively, when the change type is to change the property information of the target preset type element included in the signal link corresponding to the target signal, extract the target relationship entry corresponding to the target signal in the relationship table;

[0050] After copying the target relationship entry, modify the attribute information of the target preset type component in the copied entry;

[0051] The copied entry after modifying the attribute information of the target preset type component is added to the relationship table.

[0052] Specifically, by comparing the new circuit document with the pre-generated circuit document, the specific modification content of the changed schematic diagram can be identified. Then the change type of the signal in the changed schematic diagram can be quickly identified. In the above manner, for the newly added signal, a new relationship entry will be automatically generated and updated to the relationship table. For deleted signals, the relationship entry corresponding to the deleted signal can also be accurately deleted from the relationship table. For components whose attributes have changed, a new entry is added on the basis of the original entry to form a clear contrast. The provision of these contents can well preserve the traces of modification operations on the schematic diagram, which is convenient for subsequent tracing. Moreover, this method reduces the workload of manually maintaining the relationship table, improves maintenance efficiency, and reduces the possibility of human errors. At the same time, it also ensures the consistency of the information in the relationship table with the actual circuit.

[0053] In a second aspect, the present invention provides a device for detecting abnormal signals between interconnected elements, the device comprising:

[0054] An acquisition module is used to acquire a pre-generated circuit document, where the circuit document is a circuit document generated based on a schematic diagram of a circuit to be tested;

[0055] A traversal module, configured to traverse first identification information of a component pin that outputs a target signal from a circuit document, wherein the circuit to be tested includes a plurality of components, the target signal is any one of a plurality of signals generated in the circuit to be tested, and the target signal is a signal output by a first component among the plurality of components, and the first component is a component of a preset type;

[0056] an identification module, used for identifying a component type of a second component of an input target signal;

[0057] The traversal module is further configured to, when it is determined that the component type of the second component is not a preset component type, continue to traverse the components that directly or indirectly establish an electrical connection relationship with the second component from the circuit document until a third component in the circuit document is a component of the preset type, stop traversing, and determine that a signal link is formed between the first component and the third component;

[0058] The acquisition module is further used to acquire second identification information of a component pin of a third component connected in the signal link; acquire first attribute information corresponding to the first component from a pre-built database based on the first identification information, and acquire second attribute information corresponding to the third component from the database based on the second identification information;

[0059] The determination module is used to determine whether there is a signal anomaly in the signal link according to the first attribute information and the second attribute information.

[0060] The present invention provides a signal anomaly detection device between interconnected components, which has the following advantages:

[0061] First, a circuit document is generated based on the schematic diagram of the circuit to be tested, and then the first identification information of the component pins that output the target signal is automatically traversed from the circuit document, and then the component type of the second component that inputs the target signal is identified. If the second component is a preset type component, the traversal can be stopped, and the first component and the second component form a signal chain including the target signal. If the second component is not a preset type component, the traversal continues until the third component is a preset type component, and a complete signal chain is formed. The identification information of the component pins of the preset type components at the end of the signal chain that input / output the signal in the signal chain is obtained, and the attribute information corresponding to the components at the end of the end is obtained based on the identification information, and finally the signal in the signal chain is determined based on the attribute information. Whether there is an abnormality. The whole process does not require manual operation, greatly improves the test efficiency, saves time and labor costs. Moreover, automatic traversal and identification can reduce human errors and improve the accuracy of test results. In this process, the entire circuit document can be traversed to ensure that all possible signal chains are detected, which improves the comprehensiveness of the test. Especially for complex circuits, automatic testing can more effectively handle a large number of signals and components and improve the feasibility of testing. Timely detection and resolution of signal anomalies reduces the risk of product failure during use.

[0062] In a third aspect, the present invention provides a computer device, comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the method for detecting signal anomalies between interconnected elements of the first aspect or any corresponding embodiment thereof by executing the computer instructions.

[0063] In a fourth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the method for detecting signal anomalies between interconnected elements of the first aspect or any corresponding embodiment thereof.

[0064] In a fifth aspect, the present invention provides a computer program product, comprising computer instructions for causing a computer to execute the method for detecting signal anomalies between interconnected elements of the first aspect or any corresponding embodiment thereof. BRIEF DESCRIPTION OF THE DRAWINGS

[0065] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0066] Figure 1 It is a schematic diagram of a signal interconnection structure provided by the present invention;

[0067] Figure 2 It is a flow chart of a method for detecting abnormal signals between interconnected components provided by an embodiment of the present invention;

[0068] Figure 3 It is a flow chart of another method for detecting abnormal signals between interconnected elements provided by an embodiment of the present invention;

[0069] Figure 4 It is a schematic diagram of the overall process of a method for detecting signal anomalies between interconnected components provided by an embodiment of the present invention;

[0070] Figure 5 It is a schematic diagram of the operation interface of a signal inspection tool between interconnected components provided by the present invention;

[0071] Figure 6 It is a structural block diagram of a signal anomaly detection device between interconnected elements provided by an embodiment of the present invention;

[0072] Figure 7 It is a schematic diagram of the hardware structure of a computer device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0073] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0074] When designing the schematic diagram of a board, many integrated circuits are used. It is necessary to pay attention to whether the interconnect signal voltages between different integrated circuits are the same. If the VCCIO and VCCINT of the output signal integrated circuit are different, leakage problems may occur. Leakage problems may not only interfere with the normal operation of the circuit, but may even damage the integrated circuit and cause the board to be scrapped.

[0075] In the related art, during the design process, hardware developers are required to carefully check the interconnection signals between integrated circuits, and add an isolation circuit if the interconnection signal voltages are different.

[0076] See Figure 1As shown, when checking the interconnection signal, it is necessary to confirm the VCCIO of integrated circuit A, and then determine the VCCINT of integrated circuit B. If the two levels are different, it is necessary to add an isolation line to the signal interconnection line to avoid damage to the integrated circuit due to different levels.

[0077] When it comes to boards with relatively few circuits, manual inspection is barely acceptable; however, for some products, hardware R&D personnel are generally responsible for multiple board tasks at the same time, and the board development time is short and the tasks are heavy; if a board has many components and complex signal connections, the hardware R&D personnel must check the relevant circuits on the board. This not only takes a lot of time and energy, but also has low work efficiency. It may also fail to check all the problems due to momentary negligence and fail to pass the review at one time. Serious errors may lead to delays in the drawing progress, and even the board cannot be used normally after the board is made, wasting company resources.

[0078] Therefore, developing a tool to automatically check the voltage of interconnect signals can not only save the time and energy of hardware R&D personnel, but also make the checking process more comprehensive and accurate, effectively intercepting problems in the development process.

[0079] To solve the above problems, an embodiment of the present invention provides an embodiment of signal anomaly detection between interconnected elements. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system (computer device) including a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0080] In this embodiment, a method for detecting abnormal signals between interconnected components is provided, which can be used for the above-mentioned terminal devices, such as mobile phones, tablet computers, etc. Figure 2 is a flow chart of a method for detecting signal anomalies between interconnected components provided by an embodiment of the present invention. Figure 2 As shown, the process includes the following steps:

[0081] Step S201, obtaining a pre-generated circuit document.

[0082] The circuit document is a circuit document generated based on the schematic diagram of the circuit to be tested.

[0083] Specifically, according to the designed board schematic, obtain the network name (Net name), pin number (Pin number), input / output direction (Direction) of the pin and other information in the schematic, so as to determine the circuit connection relationship in the schematic, the pin position of each component, and whether the signal involved in the pin of the component is an input signal or an output signal, etc. Then form a circuit document based on this information. One of the purposes of this operation is to determine the consistency of the network name, pin number and pin direction, etc., to ensure that the logical connection of the schematic is correct and that each signal line will not lack signals. The exported information can be used as a document record of the schematic to facilitate subsequent applications.

[0084] Step S202: traverse first identification information of component pins that output target signals from a circuit document.

[0085] The circuit to be tested includes multiple components, the target signal is any one of the multiple signals generated in the circuit to be tested, and the target signal is a signal output by a first component among the multiple components, and the first component is a component of a preset type.

[0086] Specifically, the type of the first element may be an integrated circuit type. In the test circuit, when two integrated circuits are directly connected, as a signal link, the signal in the signal link is the same signal. However, if there is another element between the two integrated circuits, such as a resistor or a capacitor, the signal link formed between the two integrated circuits may include at least two signals, one of which is a signal generated between the integrated circuit at the head end of the signal link and a non-preset element such as a capacitor / resistor, and the other is a signal generated between a non-preset element such as a resistor / capacitor and an integrated circuit at the tail end of the signal link. Of course, if there are multiple non-preset type devices in the middle, at least one signal may also be generated between multiple adjacent non-preset type devices.

[0087] Therefore, firstly, it is necessary to traverse the first identification information of the component pins that output the target signal from the circuit document. Here, the component that outputs the target signal is actually the integrated circuit at the head end of the signal chain.

[0088] Step S203 , identifying the component type of the second component of the input target signal.

[0089] Step S204, when it is determined that the component type of the second component is not the preset component type, continue to traverse the components that directly or indirectly establish an electrical connection relationship with the second component from the circuit document until the third component in the circuit document is a component of the preset type, stop traversing, and determine that a signal link is formed between the first component and the third component.

[0090] Specifically, the second component that inputs the target signal is a component that is directly connected to the first component. Therefore, it is necessary to identify the component type of the second component.

[0091] When it is determined that the component type of the second component is a preset component type, that is, an integrated circuit type component, the traversal is directly stopped. A signal link formed between the first component and the second component is determined.

[0092] Alternatively, when it is determined that the component type of the second component is not the preset component type, the components that directly or indirectly establish an electrical connection relationship with the second component continue to be traversed from the circuit document until the third component in the circuit document is a component of the preset type, and the traversal is stopped.

[0093] For example, the second element is a resistor, and another resistor is electrically connected to the resistor. Then, it is necessary to continue traversing along this line to traverse the devices that establish an electrical connection relationship with the other circuit until the traversal operation is stopped after traversing to the integrated circuit.

[0094] Alternatively, if the second element is a capacitor and the integrated circuit is electrically connected to the capacitor, the traversal is stopped.

[0095] Step S205: Acquire second identification information of a component pin of a third component connected in the signal link.

[0096] Step S206: acquiring first attribute information corresponding to the first component from a pre-built database based on the first identification information, and acquiring second attribute information corresponding to the third component from the database based on the second identification information.

[0097] Specifically, the pre-built database includes attribute information of multiple components, and there is a mapping relationship between the attribute information and identification information corresponding to the pins of the components.

[0098] Therefore, the first attribute information corresponding to the first component can be extracted from the database according to the first identification information, and the second attribute information corresponding to the third component can be extracted from the database according to the second identification information.

[0099] Step S207: Determine whether there is a signal anomaly in the signal link according to the first attribute information and the second attribute information.

[0100] The first attribute information of the first element at the head end of the signal link can be compared with the second attribute information of the third element at the tail end of the signal link to determine the similarities or differences between the two, and then judge whether there is an abnormal signal in the signal link based on the similarities or differences between the attribute information.

[0101] The signal anomaly detection method between interconnected components provided in this embodiment first generates a circuit document based on the schematic diagram of the circuit to be tested, then automatically traverses the first identification information of the component pins that output the target signal from the circuit document, and then identifies the component type of the second component that inputs the target signal. If the second component is a preset type component, the traversal can be stopped, and the first component and the second component form a signal link including the target signal. If the second component is not a preset type component, the traversal continues until the third component is a preset type component, and a complete signal link is formed. The identification information of the component pins of the preset type components at the end of the signal link that input / output the signal in the signal link is obtained, and the attribute information corresponding to each of the components at the end of the signal link is obtained based on the identification information, and finally the signal in the signal link is determined based on the attribute information. Whether there is an abnormality. The whole process does not require manual operation, greatly improves the test efficiency, saves time and labor costs. Moreover, automatic traversal and identification can reduce human errors and improve the accuracy of test results. In this process, the entire circuit document can be traversed to ensure that all possible signal links are detected, thereby improving the comprehensiveness of the test. Especially for complex circuits, automatic testing can more effectively process a large number of signals and components, improve the feasibility of testing, and timely discover and solve signal anomalies, reducing the risk of product failure during use.

[0102] In an optional example, considering that in the circuit document, the receiving device of the target signal may include not only one component but also multiple components. Therefore, the method further includes the following method steps, such as Figure 3 As shown:

[0103] Step S301 , identifying the type of each component among a plurality of components.

[0104] Specifically, it is to identify whether the type of the component is a preset type.

[0105] Step S302: when it is determined that the type of at least one of the multiple components is a preset type, stop traversing the signal link formed between each of the at least one component and the first component.

[0106] Specifically, when it is determined that one or more of the multiple components are of the preset type, a complete signal link to be detected has been formed between these components and the first component, and no further traversal is required.

[0107] Step S303: obtaining identification information of a component pin of each component in at least one component for inputting a target signal.

[0108] Step S304: based on the third identification information of the pin of the fourth component, obtain the third attribute information corresponding to the fourth component from the database.

[0109] The fourth element is any one of the at least one element.

[0110] Specifically, after stopping the traversal as described above, it is necessary to obtain identification information of a component pin of each component that inputs a target signal in at least one component.

[0111] Taking the fourth component as an example, after obtaining the third identification information of the pin of the fourth component, it is necessary to extract the third attribute information corresponding to the fourth component that has a mapping relationship with the third identification information from the database.

[0112] Step S305: Determine whether there is a signal anomaly in the signal link formed between the first component and the fourth component according to the first attribute information and the third attribute information.

[0113] Further, similar to the previous embodiment, in this embodiment, it is determined whether there is an abnormal signal in the signal link formed between the first element and the fourth element based on the first attribute information and the third attribute information.

[0114] A method for detecting signal anomalies between interconnected components provided by an embodiment of the present invention, in a circuit document, there are many cases where target signals are input into different components respectively. Therefore, when multiple components input target signals respectively, it is necessary to determine the component type of each of the multiple components respectively. If the component type is not a component of a preset type, the method steps in the above content are used to operate until the traversal to the component of the preset type stops traversal and subsequent operations are performed. If it is identified that there is a component of the preset type in multiple components, the traversal operation is stopped immediately. The identification information of the component pin that inputs the target signal in the component is directly obtained, and then the attribute information of the component is obtained. And based on the first attribute information and the third attribute information corresponding to the component, it is determined whether there is a signal anomaly in the signal link formed between the first component and the fourth component. In this method, by traversing multiple components connected to the target signal, and automatically traversing and identifying the component type, the signal link can be quickly determined, reducing manual operation and time cost, and can also ensure the comprehensiveness and accuracy of the detection signal link. In this way, signal anomalies are discovered in a timely manner, which helps to quickly take measures to repair or adjust.

[0115] Optionally, in any of the aforementioned embodiments, the attribute information includes: one or more of component pin voltage, open-drain output state, and push-pull output state, and the attribute information includes first attribute information, second attribute information, and third attribute information.

[0116] Knowing the voltage of the component pin helps ensure the normal operation of the circuit and detects voltage anomalies in time. Determining the open-drain output or push-pull output state is crucial to correctly understand and control the behavior of the circuit. Abnormal voltage or output state may indicate a component failure. Therefore, in the embodiment of the present application, these attribute information are used to determine whether there is a signal anomaly in the signal link. In a specific example, based on the first attribute information and the second attribute information, determining whether there is a signal anomaly in the signal link specifically includes the following method steps:

[0117] Step a1, determining whether the component pin voltage of the first component and the component pin voltage of the third component are the same.

[0118] In a specific example, the component pin refers to a general-purpose input / output pin (General-Purpose Input / Output, GPIO for short). Therefore, in the embodiment of the present application, it is determined whether the GPIO pin voltage of the first component is the same as the GPIO pin voltage of the third component.

[0119] Step a2: When it is determined that the component pin voltage of the first component is the same as the component pin voltage of the third component, it is determined that the signal in the signal link is normal.

[0120] or,

[0121] Step a3: when it is determined that the component pin voltage of the first component is different from the component pin voltage of the third component, it is determined that there is a signal abnormality in the signal link, and a prompt message of the signal abnormality is generated.

[0122] Specifically, when the voltage of the GPIO pin of the first component is different from the voltage of the GPIO pin of the third component, it indicates that there is a problem with the signal in the signal link. It is necessary to generate a prompt message of signal abnormality, such as marking the signal link prominently to facilitate engineers to check.

[0123] Moreover, by comparing the component pin voltage, it is possible to accurately determine whether the signal is normal. This allows for quick determination of whether there is an abnormality in the signal link, improving detection efficiency. Moreover, the status of the signal link can be monitored in real time to detect problems in a timely manner. Once a problem is detected, prompt information is generated in a timely manner. This helps to quickly locate the location of the signal abnormality, facilitates maintenance and debugging, and reduces the possibility of failures. This reduces losses and maintenance costs caused by signal abnormalities.

[0124] In another specific example, determining whether there is a signal abnormality in the signal link according to the first attribute information and the second attribute information specifically includes:

[0125] Step b1, when it is determined that the configuration of at least one of the configurations corresponding to the first element and the configuration corresponding to the third element is an open-drain output, determining that the signal in the signal link is normal;

[0126] or,

[0127] Step b2: when it is determined that the configuration corresponding to the first element and the configuration corresponding to the third element are both push-pull outputs, it is determined that an abnormal signal exists in the signal link, and a prompt message of signal abnormality is generated.

[0128] Specifically, when the configuration corresponding to the first component and the configuration of the third component are both open drain output (OD), or one is OD and the other is push-pull output (Push-Pull), it means that the signal in the signal link is normal. However, if the configurations of both components are Push-Pull, it means that the signal in the signal link is abnormal. It needs to be marked prominently to facilitate engineers to check.

[0129] Similar to the above-mentioned implementation mode, by comparing the specific configuration of the components, it is also possible to more accurately determine whether there is an abnormality in the signal link, thereby quickly determining whether there is an abnormality in the signal link, and improving the detection efficiency. In addition, the status of the signal link can be monitored in real time to find problems in a timely manner. Once a problem is found, prompt information is generated in a timely manner. It helps to quickly locate the location of the signal abnormality, facilitate maintenance and debugging, and reduce the possibility of failure. Reduce the loss and maintenance costs caused by signal abnormalities.

[0130] Furthermore, in an optional example, in the steps of the method, based on the aforementioned embodiment, it can be determined that, through the aforementioned method, the signal links corresponding to the multiple signals can actually be obtained. It is also possible to obtain the identification information and attribute information of the connected component pins of the components of the preset component type corresponding to the head and tail ends of each signal link in the multiple signal links. Then, it is judged whether there is an abnormality in the signal link. However, in addition to judging whether the signal link is abnormal through the aforementioned steps, the method can also include further judging whether there is an abnormality between the signal links from multiple dimensions.

[0131] The specific implementation process is as follows:

[0132] Specifically, after acquiring the signal links corresponding to the plurality of signals respectively, in addition to extracting the identification information and attribute information of the component pins connected to the components of the preset component type in the plurality of signal links, the method further includes:

[0133] Step c1, respectively obtaining identification information of component pins of other components connected in the signal chain and attribute information of other components other than components of a preset component type included in each signal chain.

[0134] Specifically, in an optional example, in addition to including the identification information of each pin corresponding to the components of the preset component type and the attribute information of the components of the preset component type, the database can also be further enriched and expanded to include the identification information of the pins of each component and the attribute information of various types of components, wherein, when one or more components have attribute values, the attribute information corresponding to the one or more components includes the attribute values.

[0135] Therefore, the process of obtaining the identification information of the component pins connected in the signal chain and the attribute information of other components other than the components of the preset component type included in the signal chain is similar to the method of obtaining the components of the preset component type in the previous article. The first step is to identify the identification information of each pin connected to each component in the signal chain, and then match the corresponding attribute information from the pre-built database based on the identification information of each pin of each component. Of course, if the database does not exist, it can also be output blank and then filled in manually by the staff. And the manually filled information can be enriched in the database for subsequent use.

[0136] Step c2: creating a signal link model according to the types of all components included in each signal link, identification information of connected component pins and attribute information of each component.

[0137] Specifically, the steps include:

[0138] 1. Determine the elements that need to be included in the model based on the types of all components included in the signal chain. For example, the elements may include integrated circuits, resistors, capacitors, inductors, transistors, etc.

[0139] 2. Extract component attributes: For each component, define its attributes. As mentioned above, when one or more components have attribute values, the attribute information corresponding to the one or more components includes the attribute values.

[0140] For example, the attribute information corresponding to the components such as resistors, capacitors, and inductors will include resistance values, capacitance values, and inductance values, respectively. These attribute values ​​will be used to calculate the transmission characteristics of the signal in the link.

[0141] 3. Connect the components according to the identification information of the connected component pins to form a topological structure of the signal link.

[0142] The specific implementation process can use graphical tools or programming languages ​​to represent the connection relationship between components.

[0143] 4. Establish a mathematical model of the signal link based on the types and connection relationships of components.

[0144] Specifically, it can be achieved by using circuit theory, transmission line theory or other related mathematical methods. Among them, the mathematical model will describe the transmission behavior of the signal in the link, such as the changes in voltage, current, impedance, etc.

[0145] 5. Use actual measurement data or known signal transmission characteristics to verify the accuracy of the model.

[0146] If there is a deviation between the model and the actual situation, the model parameters can be adjusted or the modeling method can be improved.

[0147] 6. In an optional example, the model can also be optimized as needed to improve its performance or meet specific design requirements.

[0148] For example, these include adjusting component parameters, changing the link topology, or using a more accurate mathematical model.

[0149] Step c3, when it is determined based on the signal link model that there are at least two signal links among the multiple signal links that have an associated relationship, based on the types of components included in each signal link of the at least two signals, the identification information of the component pins of each component connected in the signal link, and the attribute information of each component, the at least two signal links are simulated to obtain the signal transmission characteristics and timing relationship between the at least two signal links.

[0150] Specifically, through the signal link model, it is possible to intuitively determine whether there is an association relationship among multiple signal links. When it is determined that at least two signal links have an association relationship, based on the type of components included in each signal link of the at least two signals, the identification information of the component pins connected to each component in the signal link, and the attribute information of each component, the at least two signal links are simulated, for example, by implementing simulation on a corresponding software or hardware platform through circuit design software or simulation tools, so as to analyze and evaluate the at least two signal links, and then obtain the transmission characteristics, timing relationships, etc. of the signals.

[0151] Step c4: Determine whether there are abnormalities in at least two signal links based on the signal transmission characteristics and timing relationship.

[0152] Specifically, the signal transmission characteristics include, for example, signal attenuation, delay, noise, bandwidth, reflection, crosstalk, transmission speed, etc. The timing relationship includes, for example, signal arrival time, signal delay, signal period, signal phase, etc.

[0153] Based on the above factors, it is possible to further evaluate whether there are problems with the signal link, for example, whether there is signal delay, noise, etc.

[0154] In the steps of this method, by obtaining the pin identification information of the pins connected to all components included in each signal link in multiple signal links and the attribute information of each component, the composition and characteristics of the signal link are fully understood. In addition, a signal link model is created based on the more complete information that has been obtained, and based on the signal link model, signal links with associated relationships can be discovered. Thus, the signal transmission characteristics and timing relationships in the signal links with associated relationships are obtained through simulation, and whether there are abnormalities in the signal links. This method can more deeply judge whether there are abnormalities in the signal link from multiple dimensions, discover potential problems, and facilitate subsequent fault diagnosis and optimization.

[0155] Further, in an optional example, after obtaining first attribute information corresponding to the first component from a pre-built database based on the first identification information, and obtaining second attribute information corresponding to the third component from the database based on the second identification information, the method further includes:

[0156] A binding relationship is established based on the first attribute information, the second attribute information, the first identification information, the second identification information, and the target signal, and a relationship entry is formed, wherein a plurality of relationship entries constitute a relationship table.

[0157] Specifically, a relationship entry is formed by establishing a binding relationship between the first attribute information, the first identification information, the second attribute information, the second identification information, and the target signal. As described above, there are multiple entries in the pre-generated circuit document, so there will be multiple similar relationship entries. Multiple relationship entries can form a relationship table. The purpose of this operation is to more efficiently manage and organize the relationship between the component pins, signals, etc. of each component in the circuit document. The relationship table provides a structured way to store information, which is convenient for subsequent query and analysis. In addition, clear binding relationships help ensure the accuracy and consistency of information.

[0158] Furthermore, in an optional example, the above operation can be understood as an operation performed on the first circuit document. However, the schematic diagram of the circuit is not immutable and may be adjusted to a certain extent. Therefore, a new circuit document will also be generated.

[0159] Therefore, when the schematic diagram of the circuit to be tested is changed, the method further comprises the following method steps:

[0160] Step d1, obtaining a new circuit document corresponding to the modified schematic diagram.

[0161] The specific implementation process is described above and will not be repeated here.

[0162] Step d2, comparing the new circuit document with the pre-generated circuit document to obtain a first comparison result.

[0163] Step d3, when it is determined according to the first comparison result that there is a signal change in the modified schematic diagram, the signal change type is identified.

[0164] Step d4, when the change type is the existence of a new signal, identify the component attribute information of the preset type components at the beginning and end of the signal chain of the new signal, as well as the identification information of the component pins connected to the preset type components at the beginning and end in the signal chain, and based on the component attribute information and the identification information of the component pins of the preset type components at the beginning and end, generate a new relationship entry corresponding to the new signal, and update the new relationship entry to the relationship table.

[0165] or,

[0166] Step d5: When the change type is a deletion signal, a relationship entry corresponding to the deletion signal is identified from the relationship table.

[0167] Step d6, deleting the relationship entry corresponding to the deletion signal from the relationship table.

[0168] or,

[0169] Step d7, when the change type is to change the attribute information of the target preset type element included in the signal link corresponding to the target signal, extract the target relationship entry corresponding to the target signal in the relationship table.

[0170] Step d8, after copying the target relationship entry, modify the attribute information of the target preset type component in the copied entry.

[0171] Step d9, adding the duplicate entry after modifying the attribute information of the target preset type component to the relationship table.

[0172] Specifically, the change type may generally include adding a new signal, deleting an original signal, or changing the attribute information of a preset type component in the original signal link, etc. Therefore, the final relationship entry may be adjusted according to these situations to facilitate subsequent use.

[0173] Among them, when the change type is the existence of a new signal, through the method steps introduced above, the component attribute information of the preset type components at the head and tail ends of the signal chain of the new signal, as well as the identification information of the component pins connected to the preset type components at the head and tail ends in the signal chain can be identified, and based on the component attribute information of the preset type components at the head and tail ends and the identification information of the component pins, a new relationship entry corresponding to the new signal is generated, and then the new relationship entry is updated to the relationship table.

[0174] or,

[0175] When the change type is a deletion signal, the identification information of the device pin corresponding to the input / output of the deletion signal directly obtained in the aforementioned step can also be used. Because the relationship table records the identification information, attribute information, etc. of the pins included in all signal links, the relationship entry can be directly matched according to the identification information of the component pin that inputs / outputs the deletion signal, and the relationship entry corresponding to the deletion signal can be deleted from the relationship table.

[0176] or,

[0177] When the change type is to change the attribute information of the target preset type component included in the signal link corresponding to the target signal, the target relationship entry corresponding to the target signal in the relationship table can be directly extracted using the aforementioned similar principle, and then the target relationship entry is copied, and the attribute information of the target preset type component is modified in the copied entry. The copied entry after modifying the attribute information of the target preset type component is added to the relationship table. By comparing the two entries, it is easy to see which components' attribute information has changed, which is convenient for subsequent tracing.

[0178] In this method, the new circuit document is compared with the pre-generated circuit document, and the specific modification content of the modified schematic diagram can be identified. Then the change type of the signal in the modified schematic diagram can be quickly identified. In the above manner, for the newly added signal, a new relationship entry will be automatically generated and updated to the relationship table. For the deleted signal, the relationship entry corresponding to the deleted signal can also be accurately deleted from the relationship table. For the components whose attributes have changed, a new entry is added on the basis of the original entry to form a clear contrast. The provision of these contents can well preserve the traces of the modification operation on the schematic diagram, which is convenient for subsequent tracing. Moreover, this method reduces the workload of manually maintaining the relationship table, improves the maintenance efficiency, and reduces the possibility of human error. At the same time, it also ensures the consistency of the information in the relationship table with the actual circuit.

[0179] Figure 4 The overall process diagram of the above method example is illustrated in FIG, including obtaining schematic information, building a database including GPIO pin attributes of preset type components, comparing the identification information of the component pin of the target signal output from the circuit document with all the identification information in the database, and obtaining the attribute information of the component.

[0180] Optionally, in an optional implementation, it is possible that the database does not have relevant attribute information of the component corresponding to the first identifier. Therefore, the method may also include: when exporting relevant information, outputting the attribute information of the component as blank, and then manually filling it in by the staff, and enriching the database based on this information.

[0181] After all the relevant information is obtained, corresponding entries are generated to form a relational table. In a specific example, an exe table is formed.

[0182] Then compare the properties of the GPIO pins of the preset type components at both ends of the signal chain to determine whether the signal in the signal chain is abnormal. If normal, pass, if abnormal, generate "fail" and other prompt information.

[0183] The specific implementation process has been introduced in detail in the previous article, so it will not be repeated here.

[0184] In addition, it should be noted that the above method steps can be integrated into a signal inspection tool between interconnected components in specific applications. Figure 5 As shown, Figure 5 The schematic diagram of the operation interface of the signal inspection tool between interconnected components is shown. In this interface diagram, you only need to input the schematic diagram, and the diagram shows that Figure 5 Indicated in After selecting the document path for obtaining the schematic diagram and uploading the schematic diagram document, click Document Generation to directly obtain the final test results. The specific implementation process will be implemented by running the aforementioned method steps in the background. The final test results include but are not limited to the links with specific abnormal signals, circuit documents, relationship entry tables, etc.

[0185] In this embodiment, a signal anomaly detection device between interconnected elements is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and will not be repeated hereafter. As used below, the term "module" can implement a combination of software and / or hardware of a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0186] This embodiment provides a signal anomaly detection device between interconnected components, such as Figure 6 As shown, it includes: an acquisition module 601, a traversal module 602, an identification module 603 and a determination module 604.

[0187] An acquisition module 601 is used to acquire a pre-generated circuit document, where the circuit document is a circuit document generated based on a schematic diagram of a circuit to be tested;

[0188] A traversal module 602 is used to traverse first identification information of a component pin that outputs a target signal from a circuit document, wherein the circuit to be tested includes multiple components, the target signal is any one of multiple signals generated in the circuit to be tested, and the target signal is a signal output by a first component among the multiple components, and the first component is a component of a preset type;

[0189] An identification module 603, used to identify the component type of the second component of the input target signal;

[0190] The traversal module 602 is further configured to, when it is determined that the component type of the second component is not a preset component type, continue to traverse the components that directly or indirectly establish an electrical connection relationship with the second component from the circuit document until a third component in the circuit document is a component of the preset type, stop traversing, and determine that a signal link is formed between the first component and the third component;

[0191] The acquisition module 601 is further used to acquire second identification information of a component pin of a third component connected in the signal link; acquire first attribute information corresponding to the first component from a pre-built database based on the first identification information, and acquire second attribute information corresponding to the third component from the database based on the second identification information;

[0192] The determination module 604 is used to determine whether there is a signal anomaly in the signal link according to the first attribute information and the second attribute information.

[0193] In an optional example, when the input target signal includes multiple components, the identification module 603 is further used to: identify the type of each of the multiple components respectively;

[0194] The traversal module 602 is further configured to stop traversing the signal link formed between each of the at least one element and the first element when it is determined that the type of at least one element among the plurality of elements is a preset type;

[0195] The acquisition module 601 is further used to acquire identification information of a component pin of each component of the at least one component for inputting a target signal; based on the third identification information of the pin of a fourth component, acquire third attribute information corresponding to the fourth component from the database, wherein the fourth component is any one of the at least one component;

[0196] The determination module 604 is further configured to determine whether there is a signal anomaly in the signal link formed between the first component and the fourth component according to the first attribute information and the third attribute information.

[0197] In an optional example, the attribute information includes: one or more of component pin voltage, open-drain output state, and push-pull output state, and the attribute information includes first attribute information, second attribute information, and third attribute information.

[0198] In an optional example, the determination module 604 is specifically configured to:

[0199] determining whether a component pin voltage of the first component and a component pin voltage of the third component are the same;

[0200] When it is determined that the component pin voltage of the first component is the same as the component pin voltage of the third component, it is determined that the signal in the signal link is normal;

[0201] Alternatively, when it is determined that the component pin voltage of the first component is different from the component pin voltage of the third component, it is determined that there is a signal abnormality in the signal link, and prompt information of the signal abnormality is generated.

[0202] In an optional example, the determination module 604 is specifically configured to:

[0203] When it is determined that the configuration of at least one of the configuration corresponding to the first element and the configuration corresponding to the third element is an open drain output, it is determined that the signal in the signal link is normal;

[0204] Alternatively, when it is determined that the configuration corresponding to the first element and the configuration corresponding to the third element are both push-pull outputs, it is determined that an abnormal signal exists in the signal link, and a prompt message of signal abnormality is generated.

[0205] In an optional example, the apparatus further includes: an establishing module 605;

[0206] Establishing module 605, used to establish a binding relationship based on the first attribute information, the second attribute information, the first identification information, the second identification information, and the target signal, and form a relationship entry;

[0207] Multiple relationship entries constitute a relationship table.

[0208] In an optional example, the apparatus further includes: a processing module 606;

[0209] The acquisition module 601 is also used to acquire a new circuit document corresponding to the modified schematic diagram;

[0210] The processing module 606 is used to compare the new circuit document with the pre-generated circuit document to obtain a first comparison result; when it is determined according to the first comparison result that there is a signal change in the modified schematic diagram, identify the signal change type; when the change type is the presence of a new signal, identify the component attribute information of the preset type components at both ends of the signal chain of the new signal, and the identification information of the component pins connected to the preset type components at both ends in the signal chain, and based on the component attribute information of the preset type components at both ends and the identification information of the component pins, generate a new relationship entry corresponding to the new signal, and update the new relationship entry to the relationship table; or, when the change type is a deletion of the signal, identify the relationship entry corresponding to the deleted signal from the relationship table;

[0211] Delete the relationship entry corresponding to the deleted signal from the relationship table; or, when the change type is to change the attribute information of the target preset type component included in the signal link corresponding to the target signal, extract the target relationship entry corresponding to the target signal in the relationship table; after copying the target relationship entry, modify the attribute information of the target preset type component in the copied entry; add the copied entry after modifying the attribute information of the target preset type component to the relationship table.

[0212] The signal anomaly detection device between interconnected elements in this embodiment is presented in the form of a functional module, where the module refers to an application specific integrated circuit (ASIC), a processor and memory that executes one or more software or fixed programs, and / or other components that can provide the above functions.

[0213] The further functional description of each of the above modules and units is the same as that of the above corresponding embodiments and will not be repeated here.

[0214] An embodiment of the present invention provides a signal anomaly detection device between interconnected components. First, a circuit document is generated based on the schematic diagram of the circuit to be tested, and then the first identification information of the component pins that output the target signal is automatically traversed from the circuit document, and then the component type of the second component that inputs the target signal is identified. If the second component is a preset type component, the traversal can be stopped, and the first component and the second component form a signal link including the target signal. If the second component is not a preset type component, the traversal continues until the third component is a preset type component, and a complete signal link is formed. The identification information of the component pins of the preset type components at the end of the signal link that respectively input / output the signal in the signal link is obtained, and the attribute information corresponding to each of the components at the end of the signal link is obtained based on the identification information, and finally the signal in the signal link is determined based on the attribute information. The whole process does not require manual operation, which greatly improves the test efficiency and saves time and labor costs. Moreover, automatic traversal and identification can reduce human errors and improve the accuracy of the test results. In this process, the entire circuit document can be traversed to ensure that all possible signal links are detected, thereby improving the comprehensiveness of the test. Especially for complex circuits, automatic testing can more effectively process a large number of signals and components, improve the feasibility of testing, and timely discover and solve signal anomalies, reducing the risk of product failure during use.

[0215] The embodiment of the present invention also provides a computer device having the above Figure 6 A signal anomaly detection device between interconnected elements is shown.

[0216] See also Figure 7 , Figure 7is a schematic diagram of the structure of a computer device provided by an optional embodiment of the present invention, such as Figure 7 As shown, the computer device includes: one or more processors 10, a memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components are connected to each other using different buses for communication, and can be installed on a common mainboard or installed in other ways as needed. The processor can process the instructions executed in the computer device, including instructions stored in or on the memory to display the graphical information of the GUI on an external input / output device (such as, a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple computer devices can be connected, and each device provides some necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 7 A processor 10 is taken as an example.

[0217] The processor 10 may be a central processing unit, a network processor or a combination thereof. The processor 10 may further include an integrated circuit. The integrated circuit may be a dedicated integrated circuit, a programmable logic element or a combination thereof. The programmable logic element may be a complex programmable logic element, a field programmable logic gate array, a general purpose array logic or any combination thereof.

[0218] The memory 20 stores instructions executable by at least one processor 10, so that at least one processor 10 executes the method shown in the above embodiment.

[0219] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created by the use of a computer device according to the presentation of a small program landing page, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage element, a flash memory element, or other non-transient solid-state storage element. In some optional embodiments, the memory 20 may optionally include a memory remotely arranged relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0220] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid state drive; the memory 20 may also include a combination of the above types of memory.

[0221] The computer device also includes an input device 30 and an output device 40. The processor 10, the memory 20, the input device 30 and the output device 40 may be connected via a bus or other means. Figure 7 The example of connecting through bus is taken in the following.

[0222] The input device 30 can receive input digital or character information, and generate key signal input related to the user settings and function control of the computer device, such as a touch screen, a keypad, a mouse, a track pad, a touch pad, an indicator bar, one or more mouse buttons, a trackball, a joystick, etc. The output device 40 may include a display device, an auxiliary lighting device (e.g., an LED) and a tactile feedback device (e.g., a vibration motor), etc. The above-mentioned display device includes but is not limited to a liquid crystal display, a light emitting diode, a display and a plasma display. In some optional embodiments, the display device can be a touch screen.

[0223] The embodiment of the present invention also provides a computer-readable storage medium. The method provided in the above embodiment of the present invention can be implemented in hardware, firmware, or implemented as a computer code that can be recorded in a storage medium, or is implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and will be stored in a local storage medium and downloaded through a network, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state hard disk, etc.; further, the storage medium can also include a combination of the above types of memories. It can be understood that a computer, a processor, a microprocessor controller, or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor, or hardware, the method shown in the above embodiment is implemented.

[0224] A part of the present invention may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer. Those skilled in the art should understand that the existence of the computer program instruction in a computer-readable medium includes, but is not limited to, a source file, an executable file, an installation package file, etc., and accordingly, the way in which the computer program instruction is executed by the computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium may be any available computer-readable storage medium or communication medium accessible to the computer.

[0225] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A method for detecting signal anomalies between interconnected components, characterized in that: The method comprises: Obtaining a pre-generated circuit document, wherein the circuit document is a circuit document generated based on a schematic diagram of a circuit to be tested; Traversing first identification information of component pins that output a target signal from the circuit document, wherein the circuit to be tested includes a plurality of components, the target signal is any one of a plurality of signals generated in the circuit to be tested, and the target signal is a signal output by a first component among the plurality of components, and the first component is a component of a preset type; identifying a component type of a second component that inputs the target signal; When it is determined that the component type of the second component is not a preset component type, continue to traverse the components that directly or indirectly establish an electrical connection relationship with the second component from the circuit document until a third component in the circuit document is a component of the preset type, stop traversing, and determine that a signal link is formed between the first component and the third component; Acquire second identification information of a component pin of the third component connected in the signal link; Acquire first attribute information corresponding to the first component from a pre-built database based on the first identification information, and acquire second attribute information corresponding to the third component from the database based on the second identification information; It is determined whether there is a signal anomaly in the signal link according to the first attribute information and the second attribute information.

2. The method according to claim 1, characterized in that When there are multiple elements for inputting the target signal, the method further includes: identifying respectively a type of each of the plurality of components; When it is determined that the type of at least one of the multiple elements is a preset type, stopping traversing the signal link formed between each of the at least one element and the first element; Obtain identification information of a component pin of each component of at least one component for inputting the target signal; Based on the third identification information of the pin of the fourth component, acquiring the third attribute information corresponding to the fourth component from the database, wherein the fourth component is any one of the at least one component; It is determined whether there is a signal abnormality in a signal link formed between the first element and the fourth element according to the first attribute information and the third attribute information.

3. The method according to claim 2, characterized in that The attribute information includes: one or more of component pin voltage, open-drain output state, and push-pull output state, and the attribute information includes the first attribute information, the second attribute information, and the third attribute information.

4. The method according to claim 3, characterized in that The determining, according to the first attribute information and the second attribute information, whether there is a signal abnormality in the signal link specifically includes: determining whether a component pin voltage of the first component and a component pin voltage of the third component are the same; When it is determined that the element pin voltage of the first element is the same as the element pin voltage of the third element, it is determined that the signal in the signal link is normal; Alternatively, when it is determined that the element pin voltage of the first element is different from the element pin voltage of the third element, it is determined that there is a signal abnormality in the signal link, and prompt information of the signal abnormality is generated.

5. The method according to claim 3, characterized in that: The determining, according to the first attribute information and the second attribute information, whether there is a signal abnormality in the signal link specifically includes: When it is determined that the configuration of at least one of the configuration corresponding to the first element and the configuration corresponding to the third element is an open-drain output, determining that the signal in the signal link is normal; Alternatively, when it is determined that the configuration corresponding to the first element and the configuration corresponding to the third element are both push-pull outputs, it is determined that an abnormal signal exists in the signal link, and prompt information of the signal abnormality is generated.

6. The method according to any one of claims 1 to 5, characterized in that: After acquiring the first attribute information corresponding to the first component from a pre-built database based on the first identification information, and acquiring the second attribute information corresponding to the third component from the database based on the second identification information, the method further includes: Establishing a binding relationship based on the first attribute information, the second attribute information, the first identification information, the second identification information, and the target signal, and forming a relationship entry; A plurality of the relationship entries constitute a relationship table.

7. The method according to any one of claims 3 to 5, characterized in that: After acquiring the signal links corresponding to the plurality of signals respectively, in addition to extracting the identification information and attribute information of the component pins connected to the components of the preset component type in the plurality of signal links, the method further includes: Respectively obtain identification information of component pins of other components other than the components of the preset component type included in each of the signal links and attribute information of the other components connected in the signal links, wherein when one or more components have attribute values, the attribute information corresponding to the one or more components respectively includes the attribute values; Creating a signal link model according to the types of all components included in each of the signal links, identification information of connected component pins, and attribute information of each component; When it is determined based on the signal link model that at least two signal links among the plurality of signal links have an associated relationship, based on the type of components included in each signal link of the at least two signals, identification information of component pins of each component connected in the signal link, and attribute information of each component, the at least two signal links are simulated to obtain signal transmission characteristics and a timing relationship between the at least two signal links; Based on the signal transmission characteristics and the timing relationship, it is determined whether there is an abnormality in at least two signal links.

8. A signal anomaly detection device between interconnected components, characterized in that: The device comprises: An acquisition module, used for acquiring a pre-generated circuit document, wherein the circuit document is a circuit document generated based on a schematic diagram of a circuit to be tested; a traversal module, configured to traverse first identification information of a component pin that outputs a target signal from the circuit document, wherein the circuit to be tested includes a plurality of components, the target signal is any one of a plurality of signals generated in the circuit to be tested, and the target signal is a signal output by a first component among the plurality of components, and the first component is a component of a preset type; an identification module, used for identifying the component type of the second component inputting the target signal; The traversal module is further configured to, when it is determined that the component type of the second component is not a preset component type, continue to traverse the components that directly or indirectly establish an electrical connection relationship with the second component from the circuit document until a third component in the circuit document is a component of the preset type, stop traversing, and determine that a signal link is formed between the first component and the third component; The acquisition module is further configured to acquire second identification information of a component pin of the third component connected in the signal link; acquire first attribute information corresponding to the first component from a pre-built database based on the first identification information, and acquire second attribute information corresponding to the third component from the database based on the second identification information; A determination module is used to determine whether there is a signal anomaly in the signal link according to the first attribute information and the second attribute information.

9. A computer device, characterized in that: include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the method for detecting signal anomalies between interconnected elements according to any one of claims 1 to 7 by executing the computer instructions.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the method for detecting signal anomalies between interconnected elements according to any one of claims 1 to 7.

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