One-stop quantum circuit cutting method based on quantum classical hybrid algorithm

The automated quantum circuit cutting method addresses hardware limitations by using a quantum-classical hybrid algorithm to divide circuits optimally, enhancing fidelity and efficiency in large-scale quantum computing.

CN119129763APending Publication Date: 2024-12-13SOUTHEAST UNIV
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Patent Information

Application Number
CN202411134984.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-08-19
Publication Date
2024-12-13

AI Technical Summary

Technical Problem

Existing quantum circuit cutting schemes fail to account for specific hardware and network architecture limitations, leading to inefficiencies in large-scale quantum computing applications.

Method used

An automated quantum circuit cutting method using a quantum-classical hybrid algorithm that optimally divides circuits based on hardware constraints, employing multi-objective planning, graph segmentation, and tensor contraction for improved fidelity.

Benefits of technology

The method provides a versatile and high-fidelity solution for quantum circuit cutting, adapting to various hardware and improving large-scale quantum computing efficiency by optimizing circuit division and reconstruction.

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Abstract

The invention discloses a one-stop quantum circuit cutting method based on a quantum classical hybrid algorithm. Any quantum circuit can be cut into sub-circuits with smaller scales, and an optimal cutting scheme is given according to actual quantum chip bit number limitation and circuit depth limitation. According to the method, a line cutting problem is converted into a multi-objective programming (MOP) problem, and then a Pareto optimal solution of the multi-objective programming problem is solved by using a solver, so that the complexity of classical post-processing is minimized while the load balance of each chip is ensured. According to the method, a universal line compiling module is integrated at the same time, the compiling process of sub-lines on different chips can be automatically completed, the method is suitable for any quantum line physical hardware, the actual execution efficiency and line reconstruction fidelity of a large-scale quantum line cutting task can be effectively improved, and the method is suitable for popularization and application. And the development efficiency of a large-scale quantum circuit cutting algorithm and application thereof is improved.
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Description

Technical Field

[0001] The present invention belongs to the field of quantum computing, and in particular relates to a quantum circuit cutting method based on a quantum-classical hybrid algorithm. Background Art

[0002] There are still many technical and scientific challenges to achieve large-scale quantum computing in practical applications: many practical quantum applications require tens of thousands of high-quality qubits. These qubits are either implemented in a logically error-corrected version, requiring millions of noisy and error-prone physical qubits, or the underlying physical qubits must have sufficient fidelity to avoid the need for error correction. Either way, scale and complexity introduce significant engineering barriers, making the realization of practical quantum computing applications a daunting task. As technology develops, researchers have begun to consider how to combine quantum and classical computing techniques to form a distributed quantum computing system. Such a system can not only improve computing efficiency, but also complete complex tasks through multiple computing nodes. This modular and distributed system requires quantum algorithms to be redesigned to adapt to the distributed architecture, and the compiler must be able to take into account the physical limitations of the network and hardware and effectively distribute computing tasks to different quantum processing units.

[0003] The quantum circuit cutting theory is a solution to the above problem. This theory can divide a large quantum circuit into several smaller sub-circuits, which can be executed in parallel on multiple QPUs with fewer quantum bits. Then, classical post-processing is used to reconstruct the outputs of these small sub-circuits. Existing quantum computing devices such as ion traps, superconductors and quantum dots, each technology has its inherent limitations, especially in the number of quantum bits that can be integrated. Previous quantum circuit cutting schemes have not taken into account the specific hardware and network architecture and QPU parameter performance, including circuit depth and quantum bit number limitations.

[0004] Therefore, in actual application scenarios, a set of automated hardware-adapted quantum circuit cutting solutions is of great significance. Summary of the invention

[0005] Technical problem: The purpose of the present invention is to overcome the above-mentioned shortcomings and provide a one-stop quantum circuit cutting method based on a quantum classical hybrid algorithm. By proposing an automated circuit cutting framework, the optimal cutting solution is found according to the actual quantum hardware limitations and can automatically adapt to various different quantum hardware for the compilation process. This method is independent of the implementation of quantum hardware and is suitable for different quantum computing devices. Compared with the best quantum cutting solution currently available, this solution is more versatile and has better fidelity.

[0006] Technical solution: In order to achieve the above-mentioned purpose, the technical solution adopted by the present invention includes the following steps:

[0007] (1) Input the initial quantum circuit;

[0008] (2) Define the multi-objective planning problem for quantum circuit cutting according to given quantum hardware constraints;

[0009] (3) Find the Pareto optimal solution to the multi-objective planning problem;

[0010] (4) Taking the Pareto optimal solution as the cutting parameter, the graph segmentation tool is used to cut the quantum circuit into the optimal sub-circuit set according to the given parameter;

[0011] (5) Use the quantum compiler to perform the compilation process on all sub-circuits according to the quantum hardware structure;

[0012] (6) Use the tensor contraction method to reconstruct the sub-circuit results probabilistically;

[0013] (7) Output the quantum circuit results after data processing.

[0014] The definition of the multi-objective programming problem in step (2) includes the following steps:

[0015] Given the constraints N of the quantum hardware device q ,d q , where N q is the quantum bit limit, d q It is the line depth limit;

[0016] Select a decision space D with 2-dimensional decision variables x = (x1, x2), where x1 is a float variable representing the graph partitioning balance parameter, and x2 is an int variable representing the number of partition blocks;

[0017] Given a multi-objective function f1(x), f2(x), f3(x), f4(x), f5(x), where

[0018] f1(x)=max N m Indicates the maximum number of cutting points for a single sub-line;

[0019] f2(x)=N c Indicates the total number of cutting points of the line;

[0020] f3(x)=maxq s -minq s Indicates the maximum difference in the number of quantum bits in the sub-circuit;

[0021] f4(x)=maxN g -minN g Indicates the maximum difference in the number of quantum gates in the subcircuit;

[0022] f5(x)=maxd s -mind s Indicates the maximum difference in sub-line depth.

[0023] The Pareto optimal solution to the multi-objective programming problem in step (3) includes the following methods:

[0024] Find the conditions that meet

[0025] g1(x)≤maxN q

[0026] g2(x)≤d q

[0027] x∈D, where g1(x) is the number of qubits in a single subcircuit and g2(x) is the circuit depth of a single subcircuit;

[0028] In the solution set that meets the conditions, the graph partitioning balance parameter x1 and the number of partition blocks x2 are used as input variables of the solver to find the variables corresponding to the Pareto optimal solution of the multi-objective function f1(x), f2(x), f3(x), f4(x), f5(x). The Pymoo solver can be used for the solution, and the choice of the solver does not affect the implementation of the present invention.

[0029] In step (4), using the graph segmentation tool to cut the quantum circuit into an optimal subcircuit set includes the following steps:

[0030] Use the method to convert quantum circuit into DAG (Directed Acyclic Graph);

[0031] Use the graph partitioning tool to cut the DAG graph into DAG subgraphs according to the optimal graph partitioning balance parameter x1 and the number of partition blocks x2;

[0032] Convert the DAG subgraph back to the quantum circuit graph to obtain the subcircuit graph.

[0033] The process of compiling the subcircuit using the quantum compiler in step (5) includes the following steps:

[0034] Input a piece of quantum hardware topology;

[0035] Perform line mapping and bit routing on sub-lines;

[0036] Before the line is run, it is decomposed and optimized according to a given basic gate set.

[0037] The quantum compiler here can be a quantum compiler such as Qiskit compiler, and the selection of the quantum compiler does not affect the implementation of the present invention.

[0038] In step (6), probability reconstruction is achieved by tensor contraction. The tensor contraction method uses the following formula:

[0039]

[0040] Among them A i,j , B j,k are the two tensors before contraction, C i,k is the contracted tensor, i, j, k represent the contraction subscripts.

[0041] The circuit output result in step (7) is the quantum circuit probability distribution, which is calculated as follows:

[0042]

[0043] Among them, p1(k) and p2(k) are the result probability distributions of the two sub-circuits before and after the kth cutting point on a certain quantum bit, and q0 and q1 represent different quantum bits.

[0044] Beneficial effects: The present invention can divide any quantum circuit into smaller sub-circuits and provide the optimal division scheme according to the actual quantum chip bit number limit and circuit depth limit. Compared with existing methods, the present invention provides a one-stop quantum circuit cutting solution, taking into account the specific hardware and network architecture and QPU parameter performance, including circuit depth and quantum bit number limits, and is applicable to all quantum hardware physical implementation methods and topological structures, providing better fidelity, and contributing to the actual operation effect of large-scale quantum circuits. Compared with the best quantum circuit cutting scheme currently available, the present invention provides a more general automated processing scheme with higher fidelity. It can find the optimal solution for the constraints of actual physical hardware, automatically perform quantum circuit cutting, and complete circuit compilation and classical post-processing processes. The circuit reconstruction fidelity is better than previous schemes. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 It is a work flow chart of the present invention;

[0046] Figure 2 Schematic diagram of an example quantum circuit and a corresponding DAG graph in the present invention;

[0047] Figure 3 This is a schematic diagram of a sub-circuit diagram after the quantum circuit is cut in the present invention;

[0048] Figure 4 Schematic diagram of tensor contraction in step (6) of the embodiment of the present invention;

[0049] Figure 5 Schematic diagram of the calculation method in step (7) of the embodiment of the present invention;

[0050] Figure 6 This is a schematic diagram of the quantum circuit output results of an embodiment of the present invention. DETAILED DESCRIPTION

[0051] The present invention will be further described below in conjunction with the accompanying drawings.

[0052] Figure 1 The flowchart of a one-stop quantum circuit cutting solution is shown, which includes the following steps:

[0053] (1) Input the initial quantum circuit;

[0054] (2) Define the multi-objective planning problem for quantum circuit cutting according to given quantum hardware constraints;

[0055] (3) Find the Pareto optimal solution to the multi-objective planning problem;

[0056] (4) Taking the Pareto optimal solution as the cutting parameter, the graph segmentation tool is used to cut the quantum circuit into the optimal sub-circuit set according to the given parameter;

[0057] (5) Use the quantum compiler to compile all subcircuits according to the quantum hardware structure and then run the subcircuits;

[0058] (6) Use the tensor contraction method to reconstruct the sub-circuit results probabilistically;

[0059] (7) Output the quantum circuit results after data processing.

[0060] Step (2) defines the multi-objective planning problem for quantum circuit cutting according to the constraints of quantum hardware devices. The constraints of quantum hardware devices include:

[0061] N q —— Maximum number of qubits;

[0062] d q ——Maximum line depth.

[0063] In this embodiment, the definition process of the multi-objective programming problem in step (2) is as follows:

[0064] Determine the 2D decision space D, which contains two decision variables (x1, x2), where x1 is a float variable representing the graph segmentation balance parameter, with a value range of (0≤x1≤1), and x2 is an int variable representing the number of segmentation blocks, with a value range of (x2≥2);

[0065] In this example, the KaHyPar graph segmentation tool is used, and the decision variables (x1, x2) are used as input parameters of the KaHyPar graph segmentation tool. After the graph is cut, the following data results are collected:

[0066] N m = {N m1 ,N m2 ,…}——The number of cutting points on each sub-circuit;

[0067] N c =∑#cut——the sum of line cutting points;

[0068] q s = {q s1 ,q s2 ,…} — the number of qubits per subcircuit;

[0069] N g = {N g1 ,N g2 ,…}——the number of quantum gates on each sub-circuit;

[0070] d s ={d s1 ,d s2 ,…}——The circuit depth of each sub-circuit.

[0071] The multi-objective function expressions f1(x), f2(x), f3(x), f4(x), and f5(x) are given as follows:

[0072] f1(x)=maxN m Indicates the maximum number of cutting points for a single sub-line;

[0073] f2(x)=N c Indicates the total number of cutting points of the line;

[0074] f3(x)=maxq s -minq s Indicates the maximum difference in the number of quantum bits in the sub-circuit;

[0075] f4(x)=maxN g -minN g Indicates the maximum difference in the number of quantum gates in the subcircuit;

[0076] f5(x)=maxd s -mind s Indicates the maximum difference in sub-line depth.

[0077] In step (3) of this embodiment, the Pymoo solver is used to solve the Pareto optimal solution of the multi-objective programming problem. The Pareto optimal solution of the multi-objective programming problem includes the following methods:

[0078] Calculate the constraint function based on the result obtained in step (2):

[0079] g1(x)=qs = {q s1 ,q s2 ,…} — the number of qubits in a single subcircuit;

[0080] g2(x)=d s ={d s1 ,d s2 ,…}——the circuit depth of each sub-circuit;

[0081] Compute the following inequality constraints to find the solution set for x:

[0082] g1(x)≤maxN q

[0083] g2(x)≤d q

[0084] x∈D,

[0085] In the above solution set, the graph partitioning balance parameter x1 and the number of partition blocks x2 are used as the input variables of the Pymoo solver to find the Pareto optimal solution of the multi-objective function f1(x), f2(x), f3(x), f4(x), f5(x) that satisfies

[0086] miny=F(x)=(f1(x),f2(x),f3(x),f4(x),f5(x))

[0087] Returns the corresponding variable (x1,x2).

[0088] In step (4), the KaHyPar graph segmentation tool is used as an example to cut the quantum circuit into an optimal subcircuit set, including the following steps:

[0089] Use qiskit.dagcircuit package to convert quantum circuit into DAG (Directed Acyclic Graph). The quantum circuit diagram example and its corresponding DAG diagram are shown in Figure 2 As shown;

[0090] The optimal graph partitioning balance parameter x1 and the number of partition blocks x2 obtained in step (3) are used as input, and the KaHyPar graph partitioning tool is used to split the DAG graph into DAG subgraphs. In this example, the original quantum circuit graph is split into three subgraphs. Figure 3 As shown;

[0091] Use the qiskit.dagcircuit package to convert the DAG subgraph back to a quantum circuit graph and obtain a subcircuit graph.

[0092] In step (5), using the Qiskit compiler to compile and run the subcircuit includes the following steps:

[0093] Input quantum hardware topology;

[0094] Use the Qiskit compiler to perform line mapping and bit routing on sub-circuits;

[0095] Input the basic gate set according to the actual situation, and use the Qiskit compiler quantum compiler to perform circuit decomposition and optimization;

[0096] Run subcircuits on actual quantum hardware and collect circuit results.

[0097] The method of tensor contraction in step (6) is used to reconstruct the sub-circuit results probabilistically, including the following steps:

[0098] All sub-circuit results are represented by tensors, such as Figure 4 A and B in the figure represent two subcircuit tensors respectively; the tensor contraction is calculated according to the following formula:

[0099]

[0100] Among them A i,j , B j,k are the two tensors before contraction, C i,k is the contracted tensor, i, j, k represent the contraction subscripts, and the calculation process is as follows Figure 4 shown.

[0101] In step (7), the circuit probability distribution is used as the quantum circuit output result, and its calculation formula is as follows:

[0102]

[0103] Among them, p1(k) and p2(k) are the probability distributions of the results of the two sub-circuits before and after the kth cutting point on a certain quantum bit, q0 and q1 represent different quantum bits. The calculation method diagram is shown in Figure 5 In the quantum circuit of this embodiment, the output result of the circuit is represented as follows Figure 6 shown.

[0104] The present invention uses the best quantum circuit cutter as a benchmark for comparison, and selects representative AQFT (Approximate Quantum Fourier Transform) circuits, HWEA (Hardware efficient ansatz) circuits and random quantum circuits as experimental verification objects. Quantum Fourier Transform is widely used in quantum algorithms as a sub-algorithm. It has an exponential acceleration for the classical corresponding algorithm. Approximate Quantum Fourier Transform is its approximate version. The effect of AQFT algorithm on current noisy quantum devices is better than that of QFT. Hardware efficient ansatz circuit is an effective implementation circuit of the currently widely used variational quantum algorithm (VQA), which can achieve good application results on current quantum devices.

[0105] After implementing the one-stop quantum circuit cutting solution of the present invention on the above quantum circuit, the fidelity of the results compared with ScaleQC and MLFT cutters are shown in the following table:

[0106] Table 1 Comparison of the fidelity of AQFT quantum circuit cutting results

[0107]

[0108] Table 2 Comparison of HWEA quantum circuit cutting results fidelity

[0109]

[0110] Table 3 Comparison of fidelity of random quantum circuit cutting results

[0111]

[0112] The above table shows that compared with the best quantum circuit cutter currently available, the result fidelity of the present invention is better than that of previous solutions, and the result fidelity can be improved by an average of 0.5% to 1% on different quantum circuits. The existing quantum circuit cutting solutions do not take into account the specific quantum hardware device limitations. The one-stop quantum circuit cutting solution proposed in this paper can solve this problem well and find the optimal circuit cutting solution by solving the multi-objective planning problem.

Claims

1. A one-stop quantum circuit cutting method based on a quantum classical hybrid algorithm, characterized in that: The steps include: (1) Input the initial quantum circuit; (2) Define the multi-objective planning problem for quantum circuit cutting according to given quantum hardware constraints; (3) Find the Pareto optimal solution to the multi-objective planning problem; (4) Taking the Pareto optimal solution as the cutting parameter, the graph segmentation tool is used to cut the quantum circuit into the optimal sub-circuit set according to the given parameter; (5) Use the quantum compiler to perform the compilation process on all sub-circuits according to the quantum hardware structure; (6) Use the tensor contraction method to reconstruct the sub-circuit results probabilistically; (7) Output the quantum circuit results after data processing.

2. A one-stop quantum circuit cutting method based on a quantum classical hybrid algorithm according to claim 1, characterized in that: Step (2) According to the given quantum hardware constraints, the quantum circuit cutting problem is transformed into a multi-objective planning problem, and the mathematical definition of the multi-objective planning problem is given as follows: min y=F(x) subject to:g1(x)≤max N q g2(x)≤d q x∈D in is a 2D decision variable, R represents the real number space, x = (x1, x2) contains two decision variables, x1 is a float variable, representing the graph partitioning balance parameter, x2 is an int variable, representing the number of partition blocks, D is a 2D decision space, g1(x) is the number of quantum bits in a single subcircuit, g2(x) is the depth of a single subcircuit, N q is the quantum bit limit, d q This is the line depth limit.

3. A one-stop quantum circuit cutting method based on a quantum classical hybrid algorithm according to claim 2, characterized in that: The objective component functions of the multi-objective programming problem F(x) = (f1(x), f2(x), f3(x), f4(x), f5(x)) include the following functions: f1(x)=maxN m Indicates the maximum number of cutting points for a single sub-line; f2(x)=N c Indicates the total number of cutting points of the line; f3(x)=max q s -min q s Indicates the maximum difference in the number of quantum bits in the sub-circuit; f4(x)=max N g -min N g Indicates the maximum difference in the number of quantum gates in the subcircuit; f5(x)=max d s -min d s Indicates the maximum difference in sub-line depth.

4. The one-stop quantum circuit cutting method based on quantum classical hybrid algorithm according to claim 2 is characterized in that: In step (3), a solver is used to solve the Pareto optimal solution of the multi-objective programming problem, and the line cutting parameters x1 and x2 are used as input variables of the solver to solve the Pareto optimal solution of the multi-objective programming problem.

5. The one-stop quantum circuit cutting method based on quantum classical hybrid algorithm according to claim 4 is characterized in that: The solver is the Pymoo solver.

6. The one-stop quantum circuit cutting method based on quantum classical hybrid algorithm according to claim 1 is characterized in that: In step (4), the input variables corresponding to the Pareto optimal solution are used as parameters, and the graph segmentation tool is used to cut the quantum circuit into a set of optimal sub-circuits, which includes the following specific steps: (1) Convert the quantum circuit into a DAG graph; (2) Use the graph segmentation tool to cut the DAG graph into DAG subgraphs according to the optimal parameters; (2) Convert the DAG subgraph back to a quantum circuit graph.

7. The one-stop quantum circuit cutting method based on quantum classical hybrid algorithm according to claim 1 is characterized in that: The steps of using the quantum compiler to compile the subcircuit in step (5) are as follows: (1) Given a piece of quantum hardware topology; (2) Perform line mapping and bit routing on the sub-lines; (3) Before the line is put into operation, it is decomposed and optimized according to the given basic gate set.

8. The one-stop quantum circuit cutting method based on quantum classical hybrid algorithm according to claim 7 is characterized in that: The quantum compiler is Qiskit compiler.

9. The one-stop quantum circuit cutting method based on quantum classical hybrid algorithm according to claim 1 is characterized in that: Step (6) uses the following formula to perform tensor contraction on the quantum circuit result tensor to achieve probability reconstruction: Among them A i,j , B j,k are the two tensors before contraction, C i,k is the contracted tensor, i, j, k represent the contraction subscripts.

10. The one-stop quantum circuit cutting method based on quantum classical hybrid algorithm according to claim 1 is characterized in that: The circuit output result in step (7) is the quantum circuit probability distribution, which is calculated as follows: Among them, p1(k) and p2(k) are the result probability distributions of the two sub-circuits before and after the kth cutting point on a certain quantum bit, and q0 and q1 represent different quantum bits.