High-voltage bidirectional PNP electrostatic protection device and preparation method thereof
By embedding additional P+ injection zones in high-voltage ESD protection devices to form parasitic PNP transistors, the problems of weak discharge capacity and large area in bidirectional ESD protection are solved, and efficient ESD current leakage and cost savings are achieved.
Patent Information
- Application Number
- CN202411270910.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-11
- Publication Date
- 2024-12-13
AI Technical Summary
Existing high-voltage ESD protection devices have problems of weak discharge capacity, large area and high cost in bidirectional ESD protection.
Design a high-voltage bidirectional PNP electrostatic protection device, and form multiple parasitic PNP transistors by embedding additional P+ injection regions in the P-well and connecting them to the anode and cathode of the device respectively. These parasitic PNP transistors share the base region to improve ESD The current leakage capacity and the isolation structure avoids the influence of substrate potential.
It significantly improves the device's ability to discharge ESD current, reduces on-resistance and failure voltage, saves layout area and chip cost, and is suitable for narrower high-voltage ESD protection windows.
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Figure CN119133172A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of electrostatic protection, and in particular to a high-voltage bidirectional PNP electrostatic protection device and a preparation method thereof. Background Art
[0002] In recent years, with the increasing demand for automotive chips, power management chips and industrial control chips, high-voltage application chip technology has also continued to develop. For terminal products or electronic systems, electrostatic discharge is one of the main causes of reliability problems. Such high-voltage integrated circuits often work in environments with strong interference, high current and high voltage, and have high requirements for the robustness of ESD (Electro-Static discharge) devices. At present, the ESD device protection capabilities in the ESD solutions provided by semiconductor process manufacturers are often low and the area is large. Therefore, in some chips with high requirements for ESD protection capabilities, new on-chip electrostatic protection devices must be developed to meet such high ESD protection requirements.
[0003] In high-voltage ESD protection, the traditional PNP transistor structure is the most widely used. As one of the active devices, it has a certain ESD protection capability. The majority carriers of the PNP transistor are holes, and the carrier mobility of holes is much lower than that of electrons, which leads to the multiplication factor of the PNP transistor being smaller than that of the NPN transistor. Therefore, the NPN transistor under the ESD current state is a voltage hysteresis device, while the PNP transistor is a non-voltage hysteresis device. Compared with the NPN transistor, the PNP transistor can effectively avoid the risk of latch-up. In some high-voltage ports of interfaces, power supplies and other chips with high chip reliability requirements, PNP transistors are widely used. However, the disadvantages of the PNP transistor are also very obvious. Its characteristics of no voltage hysteresis and relatively weak ESD current discharge capability. In some ports with high requirements for HBM (human body model) and IEC levels, the total width of the PNP transistor is often required to reach thousands of microns, resulting in a large die area and increased cost. At the same time, when the on-resistance of the PNP transistor is large, its failure voltage is likely to be greater than the breakdown voltage of the core components inside the circuit, resulting in circuit breakdown during system-level ESD testing. Reducing the on-resistance of the PNP transistor is also very critical.
[0004] At the same time, in chips where the voltage fluctuation range transmitted by the I / O pins is positive or negative, bidirectional ESD protection is required. The most commonly used method is to use two unidirectional PNP devices back-to-back to meet the forward and reverse voltage withstand requirements of the ESD device, but this method will cause the ESD device layout area to be too large.
[0005] The cross-section diagram of a traditional unidirectional PNP electrostatic protection device is as follows: Figure 1 Its equivalent circuit diagram is shown as Figure 2 As shown. When an ESD pulse is applied to the unidirectional PNP anode, the N-type well forms a reverse biased PN junction with the P-type epitaxial layer and the P-type well respectively. When the pulse voltage is higher than the avalanche breakdown voltage of the reverse biased PN junction, a large amount of avalanche current will be generated inside the device. The current flow path is the P+ injection connected to the anode, the N-type well, the P-type epitaxial layer and the P-type well, and finally flows to the cathode through the P+ injection connected to the cathode. At this time, the PNP transistor is turned on and begins to discharge the large ESD current. The traditional unidirectional PNP has a fast turn-on speed and high process consistency, but the disadvantage is also very obvious, that is, the structural area efficiency is low, especially in the bidirectional ESD protection port.
[0006] Therefore, how to provide a bidirectional ESD protection device with strong discharge capability, small occupied area and low cost has become one of the problems to be solved urgently by those skilled in the art.
[0007] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present invention and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because these solutions are described in the background technology section of the present invention. Summary of the invention
[0008] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a high-voltage bidirectional PNP electrostatic protection device and a preparation method thereof, which are used to solve the problems of weak discharge capacity, large occupied area and high cost of bidirectional ESD protection devices in the prior art.
[0009] In order to achieve the above-mentioned object and other related objects, the present invention provides a high-voltage bidirectional PNP electrostatic protection device, which at least includes:
[0010] A P-type substrate, an N-type buried layer disposed in the P-type substrate, and a bidirectional PNP device structure disposed on the N-type buried layer;
[0011] Wherein, the bidirectional PNP device structure includes a first P-type epitaxial layer, a first high-voltage N-well and a second P-type epitaxial layer sequentially laid on the N-type buried layer, a first P-type well arranged in the first P-type epitaxial layer, a first N-type well arranged in the first P-type epitaxial layer, the first high-voltage N-well and the second P-type epitaxial layer, a second P-type well arranged in the second P-type epitaxial layer, M P+ injection regions sequentially arranged in intervals in the first P-type well from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device, and M P+ injection regions sequentially arranged in intervals in the second P-type well from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device;
[0012] The M P+ injection regions in the first P-type well are connected together and serve as the anode of the high-voltage bidirectional PNP electrostatic protection device, and the M P+ injection regions in the second P-type well are connected together and serve as the cathode of the high-voltage bidirectional PNP electrostatic protection device; M is a natural number greater than or equal to 2.
[0013] Optionally, the high-voltage bidirectional PNP electrostatic protection device also includes: a first field oxygen isolation region arranged outside the outermost P+ injection region in the first P-type well, a second field oxygen isolation region arranged outside the outermost P+ injection region in the second P-type well, a third field oxygen isolation region arranged between the innermost P+ injection region in the first P-type well and the innermost P+ injection region in the second P-type well; M-1 field oxygen isolation regions arranged between each P+ injection region in the first P-type well; and M-1 field oxygen isolation regions arranged between each P+ injection region in the second P-type well.
[0014] Optionally, M is set to 3; the first P+ injection area, the second P+ injection area and the third P+ injection area are arranged in sequence from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device; the fourth P+ injection area, the fifth P+ injection area and the sixth P+ injection area are arranged in sequence from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device.
[0015] More optionally, the high-voltage bidirectional PNP electrostatic protection device further includes an isolation structure arranged at the periphery of the bidirectional PNP device structure.
[0016] More optionally, the isolation structure includes: a second high-voltage N-well arranged outside the first P-type epitaxial layer, a second N-type well arranged on the second high-voltage N-well, a first floating N+ injection region arranged in the second N-type well, a third high-voltage N-well arranged outside the second P-type epitaxial layer, a third N-type well arranged on the third high-voltage N-well, and a second floating N+ injection region arranged in the third N-type well.
[0017] More optionally, the isolation structure further includes: a fourth field oxygen isolation region disposed outside the first floating N+ implantation region, and a fifth field oxygen isolation region disposed outside the second floating N+ implantation region.
[0018] To achieve the above-mentioned purpose and other related purposes, the present invention provides a method for preparing the above-mentioned high-voltage bidirectional PNP electrostatic protection device, and the method for preparing the high-voltage bidirectional PNP electrostatic protection device comprises:
[0019] Step 1) forming an N-type buried layer in a P-type substrate;
[0020] Step 2) forming a first N-type well in the P-type epitaxial layer on the N-type buried layer;
[0021] Step 3) forming a first high-voltage N-well below the first N-well, and dividing the P-type epitaxial layer into a first P-type epitaxial layer and a second P-type epitaxial layer;
[0022] Step 4) forming a first P-type well in the first P-type epitaxial layer, and forming a second P-type well in the second P-type epitaxial layer;
[0023] Step 5) forming M P+ injection regions arranged in sequence from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device in the first P-type well, and forming M P+ injection regions arranged in sequence from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device in the second P-type well;
[0024] Step 6) performing annealing treatment on each implantation region to eliminate the migration of impurities in the implantation region;
[0025] Step 7) Connect the P+ injection regions in the first P-type well together and use them as the anode of the high-voltage bidirectional PNP electrostatic protection device, and connect the P+ injection regions in the second P-type well together and use them as the cathode of the high-voltage bidirectional PNP electrostatic protection device.
[0026] Optionally, between step 2) and step 3), it also includes: forming a first field oxygen isolation region on the outer side of the outermost P+ injection region in the first P-type well, forming a second field oxygen isolation region on the outer side of the outermost P+ injection region in the second P-type well, forming a third field oxygen isolation region between the innermost P+ injection region in the first P-type well and the innermost P+ injection region in the second P-type well; forming M-1 field oxygen isolation regions between each P+ injection region in the first P-type well; forming M-1 field oxygen isolation regions between each P+ injection region in the second P-type well.
[0027] More optionally, the method further includes forming an isolation structure around the bidirectional PNP device structure:
[0028] Step 2) further includes: forming a second N-type well and a third N-type well on both sides of the P-type epitaxial layer;
[0029] Step 3) further includes: forming a second high-voltage N-well below the second N-type well, and forming a third high-voltage N-well below the third N-type well;
[0030] Step 5) forming a first floating N+ implantation region in the second N-type well, and forming a second floating N+ implantation region in the third N-type well.
[0031] More optionally, between step 2) and step 3), the method further includes: forming a fourth field oxygen isolation region outside the first floating N+ implantation region, and forming a fifth field oxygen isolation region outside the second floating N+ implantation region.
[0032] As described above, the high voltage bidirectional PNP electrostatic protection device and the preparation method thereof of the present invention have the following beneficial effects:
[0033] 1. The present invention floats the base region of the PNP structure and symmetrically processes the emitter and collector of the PNP to form a bidirectional PNP structure, which can be applied to high-voltage ports that require bidirectional ESD protection.
[0034] 2. The present invention embeds at least one additional P+ injection in the P-type well and connects to the anode and cathode of the device respectively. The additional embedded P+ injection can form an additional parasitic PNP transistor, which is equivalent to forming a multi-finger bidirectional PNP structure, and the single-finger on-resistance is lower; for the case of embedding two additional P+ injections, the three parasitic PNP transistors share the same base region, and this design can effectively increase the failure current of the bidirectional PNP transistor structure and significantly improve the device's discharge capacity for ESD current. Compared with the traditional method of directly increasing the discharge capacity for ESD current by increasing the index of the bidirectional PNP transistor, the nested multi-injection method can make multiple parasitic PNP transistors share a relatively large base region of the layout area. As the index of the device increases, the saved layout area is larger, and the unit area discharge efficiency of the device is higher, which can save the chip bare die cost as much as possible.
[0035] 3. The present invention embeds an additional parasitic PNP transistor in the P-type well, which is equivalent to connecting two parasitic PNP structures in parallel with a smaller layout area. It can significantly reduce the on-resistance of the bidirectional PNP device after it is turned on, reduce the failure voltage of the device, and enable the bidirectional PNP device to be used in a narrower high-voltage ESD protection window, further reducing the chip die cost.
[0036] 4. The present invention designs a bidirectional PNP structure in a high-voltage isolation ring composed of an N-type well, a high-voltage N-well and an N-type buried layer, wherein the N-type buried layer can isolate the ESD device from the substrate to avoid being affected by the substrate potential and effectively avoid parasitic effects with the core circuit devices of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] Figure 1 Shown is a cross-sectional schematic diagram of a unidirectional PNP electrostatic protection device.
[0038] Figure 2 Shown is the equivalent circuit diagram of a unidirectional PNP electrostatic protection device.
[0039] Figure 3 Shown is a schematic diagram of the three-dimensional structure of the high-voltage bidirectional PNP electrostatic protection device of the present invention.
[0040] Figure 4 It is a schematic cross-sectional view of the high-voltage bidirectional PNP electrostatic protection device of the present invention taken along the line AA′.
[0041] Figure 5 Shown is a schematic diagram of an equivalent circuit of a high-voltage bidirectional PNP electrostatic protection device of the present invention.
[0042] Component number description
[0043] 1 High voltage bidirectional PNP electrostatic protection device
[0044] 101 P-type substrate
[0045] 201 N-type buried layer
[0046] 11 Bidirectional PNP device structure
[0047] 301~302 First and second P-type epitaxial layers
[0048] 401~403 First, second and third high voltage N wells
[0049] 501~503 First, second and third N-type wells
[0050] 601~602 First and second P-type wells
[0051] 701~709 The first, second, third, fourth, fifth, sixth, seventh, eighth and ninth oxygen isolation areas
[0052] 801~806 First, second, third, fourth, fifth, sixth P+ implantation region
[0053] 807-808 First and second floating N+ implantation regions DETAILED DESCRIPTION
[0054] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.
[0055] See also Figure 3 to Figure 5 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.
[0056] like Figure 3 and Figure 4 As shown, the present invention provides a high-area efficiency, low-resistance, multi-injection high-voltage bidirectional PNP electrostatic protection device 1, the high-voltage bidirectional PNP electrostatic protection device 1 comprising:
[0057] A P-type substrate 101 , an N-type buried layer 201 disposed in the P-type substrate 101 , and a bidirectional PNP device structure 11 disposed on the N-type buried layer 201 .
[0058] like Figure 3 and Figure 4 As shown, the P-type substrate 101 is arranged at the bottom layer of the device, the N-type buried layer 201 is located on the upper layer of the P-type substrate 101, and the bidirectional PNP device structure 11 is located on the N-type buried layer 201. The bidirectional PNP device structure 11 is separated from the P-type substrate 101 by the N-type buried layer 201 to avoid the influence of the substrate potential on the bidirectional PNP device structure 11.
[0059] like Figure 3 and Figure 4 As shown, the bidirectional PNP device structure 11 includes a first P-type epitaxial layer 301, a first high-voltage N-well 401, a second P-type epitaxial layer 302, a first P-type well 601, a first N-type well 501, a second P-type well 602 and 2M P+ injection regions, where M is a natural number greater than or equal to 2.
[0060] Specifically, the first P-type epitaxial layer 301, the first high-voltage N-well 401 and the second P-type epitaxial layer 302 are laid (laid flat) on the N-type buried layer 201 in sequence, the first high-voltage N-well 401 is located in the center area of the device, and the first P-type epitaxial layer 301 and the second P-type epitaxial layer 302 are respectively located on both sides of the first high-voltage N-well 401.
[0061] Specifically, the first P-type well 601 is disposed in the first P-type epitaxial layer 301, the second P-type well 602 is disposed in the second P-type epitaxial layer 302, and the first N-type well 501 is disposed in the first P-type epitaxial layer 301, the first high-voltage N-well 401, and the second P-type epitaxial layer 302. That is, the first N-type well 501 is located in the center area of the device and on the first high-voltage N-well 401, and the two sides extend to the first P-type epitaxial layer 301 and the second P-type epitaxial layer 302; the first P-type well 601 and the second P-type well 602 are respectively located on both sides of the first N-type well 501, and the first P-type well 601 and the first N-type well 501 are isolated by the first P-type epitaxial layer 301, and the second P-type well 602 and the first N-type well 501 are isolated by the second P-type epitaxial layer 302.
[0062] Specifically, in the present embodiment, M is set to 3. The first P+ injection region 801, the second P+ injection region 802, and the third P+ injection region 803 are arranged in the first P-type well 601, and are arranged in sequence from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device 1; that is, in the present embodiment, the first P+ injection region 801, the second P+ injection region 802, and the third P+ injection region 803 are located on the left side of the device, and are close to the center area of the device from left to right. The fourth P+ injection region 804, the fifth P+ injection region 805, and the sixth P+ injection region 806 are arranged in the second P-type well 602, and are arranged in sequence from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device 1; that is, in the present embodiment, the fourth P+ injection region 804, the fifth P+ injection region 805, and the sixth P+ injection region 806 are located on the right side of the device, and are close to the center area of the device from right to left. It should be noted that the outer side of the high-voltage bidirectional PNP electrostatic protection device 1 mentioned in the present invention is the side away from the central base area, and the inner side of the high-voltage bidirectional PNP electrostatic protection device 1 is the side close to the central base area. In actual use, the number of M can be set according to actual needs, and the parallel structure of at least two PNP transistors is realized by nesting. The more the number of M, the lower the on-resistance of the device, the smaller the risk of circuit breakdown, and the stronger the ESD discharge capability of the device.
[0063] like Figure 4 As shown, the M P+ injection regions in the first P-type well 601 are connected together and serve as the anode of the high-voltage bidirectional PNP electrostatic protection device 1, and the M P+ injection regions in the second P-type well 602 are connected together and serve as the cathode of the high-voltage bidirectional PNP electrostatic protection device 1.
[0064] As another implementation of the present invention, Figure 3 and Figure 4As shown, the high-voltage bidirectional PNP electrostatic protection device 1 also includes: a first field oxygen isolation region 701, a second field oxygen isolation region 702, a third field oxygen isolation region 703 and 2 (M-1) field oxygen isolation regions. The first field oxygen isolation region 701 is located outside the first P+ injection region 801 (the outermost P+ injection region in the first P-type well 601); in this embodiment, the first field oxygen isolation region 701 is located on the surface at the junction of the first P-type epitaxial layer 301 and the first P-type well 601. The second field oxygen isolation region 702 is located outside the fourth P+ injection region 804 (the outermost P+ injection region in the second P-type well 602); in this embodiment, the second field oxygen isolation region 702 is located on the surface at the junction of the second P-type epitaxial layer 302 and the second P-type well 602. The third field oxygen isolation region 703 is located between the third P+ injection region 803 (the innermost P+ injection region in the first P-type well 601) and the sixth P+ injection region 806 (the innermost P+ injection region in the second P-type well 602); that is, it is located on the surface of the first P-type well 601, the first P-type epitaxial layer 301, the first N-type well 501, the second P-type epitaxial layer 302, and the second P-type well 602. In this example, two field oxygen isolation regions are provided in the first P-type well 601, which are recorded as the sixth field oxygen isolation region 706 and the seventh field oxygen isolation region 707; and two field oxygen isolation regions are provided in the second P-type well 602, which are recorded as the eighth field oxygen isolation region 708 and the ninth field oxygen isolation region 709. Among them, the sixth field oxygen isolation region 706 is located on the surface of the first P-type well 601 between the first P+ injection region 801 and the second P+ injection region 802; the seventh field oxygen isolation region 707 is located on the surface of the first P-type well 601 between the second P+ injection region 802 and the third P+ injection region 803; the eighth field oxygen isolation region 708 is located on the surface of the second P-type well 602 between the fourth P+ injection region 804 and the fifth P+ injection region 805; and the ninth field oxygen isolation region 709 is located on the surface of the second P-type well 602 between the fifth P+ injection region 805 and the sixth P+ injection region 806.
[0065] As another implementation of the present invention, Figure 3 and Figure 4As shown, the high-voltage bidirectional PNP electrostatic protection device 1 also includes an isolation structure disposed on the periphery of the bidirectional PNP device structure 11. As an example, the isolation structure includes: a second high-voltage N-well 402, a second N-type well 502, a first floating N+ injection region 807, a third high-voltage N-well 403, a third N-type well 503 and a second floating N+ injection region 808. The second high-voltage N-well 402 is located outside the first P-type epitaxial layer 301, the second N-type well 502 is located on the second high-voltage N-well 402, the first floating N+ injection region 807 is disposed in the second N-type well 502, the third high-voltage N-well 403 is located outside the second P-type epitaxial layer 302, the third N-type well 503 is located on the third high-voltage N-well 403, and the second floating N+ injection region 808 is disposed in the third N-type well 503. Further, the isolation structure also includes: a fourth field oxygen isolation region 704 and a fifth field oxygen isolation region 705. The fourth field oxygen isolation region 704 is located outside the first floating N+ implantation region 807; in this embodiment, the fourth field oxygen isolation region 704 is located on the surface of the P-type substrate 101 and the second N-type well 502. The fifth field oxygen isolation region 705 is arranged outside the second floating N+ implantation region 808; in this embodiment, the fifth field oxygen isolation region 705 is located on the surface of the P-type substrate 101 and the third N-type well 503.
[0066] like Figure 3 and Figure 4 As shown, the third P+ injection region 803, the first P-type well 601, the first N-type well 501, the second P-type well 602 and the sixth P+ injection region 806 constitute the first lateral parasitic PNP transistor PNP1; the second P+ injection region 802, the first P-type well 601, the first N-type well 501, the second P-type well 602 and the fifth P+ injection region 805 constitute the second lateral parasitic PNP transistor PNP2; the first P+ injection region 801, the first P-type well 601, the first N-type well 501, the second P-type well 602 and the fourth P+ injection region 804 constitute the third lateral parasitic PNP transistor PNP3. The isolation structure formed by the first floating N+ injection region 807 , the second N-type well 502 , the second high-voltage N-well 402 , the N-type buried layer 201 , the third high-voltage N-well 403 , the third N-type well 503 and the second floating N+ injection region 808 completely isolates the device from the P-type substrate 101 .
[0067] like Figure 3 and Figure 4As shown, when the ESD high-voltage pulse reaches the anode of the device, the first P+ injection area 801, the second P+ injection area 802 and the third P+ injection area 803 are at high potential, and the fourth P+ injection area 804, the fifth P+ injection area 805 and the sixth P+ injection area 806 at the other end are low-potential cathodes. The PN junction composed of the first N-type well 501, the first high-voltage N-well 401, the second P-type epitaxial layer 302 and the second P-type well 602 is reverse biased. When the pulse voltage is higher than the avalanche breakdown voltage of the reverse-biased PN junction, a large amount of avalanche current will be generated inside the device. The avalanche current flows through the second P-type well 602 and flows into the cathode. Since the parasitic PNP1 current path composed of the third P+ injection area 803 and the sixth P+ injection area 806 is the shortest, the parasitic PNP1 is turned on first, and then drives the parasitic PNP2 and PNP3 on the outside to turn on in sequence. From the equivalent circuit diagram Figure 5 It can be seen that when the voltage drop caused by the avalanche current on the parasitic resistance of the first N-type well 501 is large enough, the parasitic PNP1 is turned on, and after the parasitic PNP1 is turned on, the parasitic PNP2 and the parasitic PNP3 are also gradually turned on and discharge the ESD current together.
[0068] Similarly, when a positive ESD pulse appears at the cathode, the fourth P+ injection region 804, the fifth P+ injection region 805 and the sixth P+ injection region 806 are at high potential, and the first P+ injection region 801, the second P+ injection region 802 and the third P+ injection region 803 at the other end are low potential cathodes. The reverse biased PN junction composed of the first N-type well 501, the first high-voltage N-well 401, the first P-type epitaxial layer 301 and the first P-type well 601 undergoes avalanche breakdown, and the avalanche current flows through the second P-type well 602 and flows into the anode. The equivalent circuit Figure 5 It can be seen that when the voltage drop caused by the avalanche current on the parasitic resistance of the first N-type well 501 is large enough, the parasitic PNP1 is turned on first, and then the parasitic PNP2 and the parasitic PNP3 are gradually turned on and discharge the ESD current together, and a reverse ESD current discharge path is formed.
[0069] The present invention also provides a method for preparing the above-mentioned high-voltage bidirectional PNP electrostatic protection device 1, comprising the following steps:
[0070] Step 1) forming an N-type buried layer 201 in a P-type substrate 101 .
[0071] Specifically, as an example, before forming the N-type buried layer 201, step 1) also includes the step of pre-treating the P-type substrate 101; including: forming a growth inhibition layer on the P-type substrate 101 (for example, the growth inhibition layer includes but is not limited to a stacked silicon dioxide layer and a silicon nitride layer), spin coating a photoresist layer on the growth inhibition layer and exposing and developing based on a mask to form an isolation pattern to divide the device preparation area, removing the growth inhibition layer in the device preparation area and removing the isolation pattern.
[0072] Step 2) forming a first N-type well 501 in the P-type epitaxial layer on the N-type buried layer 201 .
[0073] Specifically, as an example, after forming the first N-type well 501, it also includes: forming a first field oxygen isolation region 701 on the outer side of the outermost P+ injection region in the first P-type well 601, forming a second field oxygen isolation region 702 on the outer side of the outermost P+ injection region in the second P-type well 602, and forming a third field oxygen isolation region 703 between the innermost P+ injection region in the first P-type well 601 and the innermost P+ injection region in the second P-type well 602; forming M-1 field oxygen isolation regions between each P+ injection region in the first P-type well 601; and forming M-1 field oxygen isolation regions between each P+ injection region in the second P-type well 602.
[0074] Specifically, when the high-voltage bidirectional PNP electrostatic protection device 1 includes an isolation structure, a second N-type well 502 and a third N-type well 503 are also formed in step 2). Further, after the first N-type well 501, the second N-type well 502 and the third N-type well 503 are formed, it also includes: forming a fourth field oxygen isolation region 704 outside the first floating N+ injection region 807, and forming a fifth field oxygen isolation region 705 outside the second floating N+ injection region 808.
[0075] Step 3) forming a first high-voltage N-well 401 below the first N-type well 501 , and dividing the P-type epitaxial layer into a first P-type epitaxial layer 301 and a second P-type epitaxial layer 302 .
[0076] Specifically, when the high-voltage bidirectional PNP electrostatic protection device 1 includes an isolation structure, step 3) also includes: forming a second high-voltage N-well 402 below the second N-type well 502 , and forming a third high-voltage N-well 403 below the third N-type well 503 .
[0077] Step 4) forming a first P-type well 601 in the first P-type epitaxial layer 301 , and forming a second P-type well 602 in the second P-type epitaxial layer 302 .
[0078] Step 5) M P+ injection regions are formed in the first P-type well 601 and are arranged in sequence from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device 1, and M P+ injection regions are formed in the second P-type well 602 and are arranged in sequence from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device 1.
[0079] Specifically, in the present embodiment, M is set to 3. A first P+ injection region 801, a second P+ injection region 802, and a third P+ injection region 803 are formed in the first P-type well 601, and the first P+ injection region 801, the second P+ injection region 802, and the third P+ injection region 803 are sequentially arranged from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device 1. A fourth P+ injection region 804, a fifth P+ injection region 805, and a sixth P+ injection region 806 are formed in the second P-type well 602, and the fourth P+ injection region 804, the fifth P+ injection region 805, and the sixth P+ injection region 806 are sequentially arranged from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device 1.
[0080] Specifically, when the high-voltage bidirectional PNP electrostatic protection device 1 includes an isolation structure, step 5) also includes: forming a first floating N+ injection region 807 in the second N-type well 502 , and forming a second floating N+ injection region 808 in the third N-type well 503 .
[0081] Step 6) performing annealing treatment on each implantation region to eliminate migration of impurities in the implantation region.
[0082] Step 7) Connect the P+ injection regions in the first P-type well 601 together and use them as the anode of the high-voltage bidirectional PNP electrostatic protection device 1, and connect the P+ injection regions in the second P-type well 602 together and use them as the cathode of the high-voltage bidirectional PNP electrostatic protection device 1.
[0083] Specifically, in this embodiment, the first P+ injection region 801, the second P+ injection region 802 and the third P+ injection region 803 are connected together through the lead-out electrode and serve as the anode of the device, and the fourth P+ injection region 804, the fifth P+ injection region 805 and the sixth P+ injection region 806 are connected together through the lead-out electrode and serve as the cathode of the device.
[0084] The preparation method of the high-voltage bidirectional PNP electrostatic protection device of the present invention is simple in process and easy to operate. The prepared bidirectional PNP electrostatic protection device structure can be applied to high-voltage bidirectional ESD ports, and can provide a design reference for the ESD protection device of high-voltage bidirectional ESD ports. At the same time, the present invention also adopts the technology of nested multi-injection, and at least one P+ injection is additionally embedded in the P-type well and connected to the anode and cathode of the device respectively. The additional embedded P+ injection can form an additional parasitic PNP triode. This design can effectively increase the failure current of the bidirectional PNP triode structure, increase its discharge capacity for ESD current, and significantly reduce the on-resistance of the device. Compared with the traditional method, that is, directly reducing the on-resistance and increasing the discharge capacity for ESD current by increasing the finger length or index of the bidirectional PNP triode, the nested multi-injection method can make multiple parasitic PNP triodes share a relatively large base area of the layout area, which can save area to the maximum extent, with higher area efficiency, significantly reducing the layout proportion of the ESD device, and reducing the cost of the bare chip. The example device of the present invention adopts a 0.18μm high-voltage BCDMOS process.
[0085] In summary, the present invention provides a high-voltage bidirectional PNP electrostatic protection device and a preparation method thereof, comprising: a P-type substrate, an N-type buried layer arranged in the P-type substrate, and a bidirectional PNP device structure arranged on the N-type buried layer; wherein the bidirectional PNP device structure comprises a first P-type epitaxial layer, a first high-voltage N-well and a second P-type epitaxial layer sequentially laid on the N-type buried layer, a first P-type well arranged in the first P-type epitaxial layer, a first N-type well arranged in the first P-type epitaxial layer, the first high-voltage N-well and the second P-type epitaxial layer, and a second P-type epitaxial layer arranged in the second P-type epitaxial layer. The second P-type well in the layer, the M P+ injection areas in the first P-type well are arranged in sequence from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device, and the M P+ injection areas in the second P-type well are arranged in sequence from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device; the M P+ injection areas in the first P-type well are connected together and serve as the anode of the high-voltage bidirectional PNP electrostatic protection device, and the M P+ injection areas in the second P-type well are connected together and serve as the cathode of the high-voltage bidirectional PNP electrostatic protection device; M is a natural number greater than or equal to 2. The present invention is suitable for high-voltage ports that require bidirectional ESD protection; it can effectively increase the failure current of the bidirectional PNP triode structure, and significantly improve the device's discharge capacity for ESD current; save layout area and chip bare die cost; it can significantly reduce the on-resistance of the bidirectional PNP device after it is turned on, reduce the failure voltage of the device, and enable the bidirectional PNP device to be applied to a narrower high-voltage ESD protection window, further reducing the chip bare die cost; the present invention also isolates the ESD device from the substrate to avoid being affected by the substrate potential, and can effectively avoid parasitic effects with the core circuit devices of the circuit. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.
[0086] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.
Claims
1. A high voltage bidirectional PNP electrostatic protection device, characterized in that: The high voltage bidirectional PNP electrostatic protection device at least comprises: A P-type substrate, an N-type buried layer disposed in the P-type substrate, and a bidirectional PNP device structure disposed on the N-type buried layer; Wherein, the bidirectional PNP device structure includes a first P-type epitaxial layer, a first high-voltage N-well and a second P-type epitaxial layer sequentially laid on the N-type buried layer, a first P-type well arranged in the first P-type epitaxial layer, a first N-type well arranged in the first P-type epitaxial layer, the first high-voltage N-well and the second P-type epitaxial layer, a second P-type well arranged in the second P-type epitaxial layer, M P+ injection regions sequentially arranged in intervals in the first P-type well from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device, and M P+ injection regions sequentially arranged in intervals in the second P-type well from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device; The M P+ injection regions in the first P-type well are connected together and serve as the anode of the high-voltage bidirectional PNP electrostatic protection device, and the M P+ injection regions in the second P-type well are connected together and serve as the cathode of the high-voltage bidirectional PNP electrostatic protection device; M is a natural number greater than or equal to 2.
2. The high voltage bidirectional PNP electrostatic protection device according to claim 1, characterized in that: The high-voltage bidirectional PNP electrostatic protection device also includes: a first field oxygen isolation region arranged outside the outermost P+ injection region in the first P-type well, a second field oxygen isolation region arranged outside the outermost P+ injection region in the second P-type well, a third field oxygen isolation region arranged between the innermost P+ injection region in the first P-type well and the innermost P+ injection region in the second P-type well; M-1 field oxygen isolation regions arranged between each P+ injection region in the first P-type well; and M-1 field oxygen isolation regions arranged between each P+ injection region in the second P-type well.
3. The high voltage bidirectional PNP electrostatic protection device according to claim 1, characterized in that: M is set to 3; the first P+ injection area, the second P+ injection area and the third P+ injection area are arranged in sequence from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device; the fourth P+ injection area, the fifth P+ injection area and the sixth P+ injection area are arranged in sequence from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device.
4. The high voltage bidirectional PNP electrostatic protection device according to any one of claims 1 to 3, characterized in that: The high-voltage bidirectional PNP electrostatic protection device also includes an isolation structure arranged at the periphery of the bidirectional PNP device structure.
5. The high voltage bidirectional PNP electrostatic protection device according to claim 4, characterized in that: The isolation structure includes: a second high-voltage N-well arranged outside the first P-type epitaxial layer, a second N-type well arranged on the second high-voltage N-well, a first floating N+ injection region arranged in the second N-type well, a third high-voltage N-well arranged outside the second P-type epitaxial layer, a third N-type well arranged on the third high-voltage N-well, and a second floating N+ injection region arranged in the third N-type well.
6. The high voltage bidirectional PNP electrostatic protection device according to claim 5, characterized in that: The isolation structure further includes: a fourth field oxygen isolation region disposed outside the first floating N+ implantation region, and a fifth field oxygen isolation region disposed outside the second floating N+ implantation region.
7. A method for preparing a high voltage bidirectional PNP electrostatic protection device according to any one of claims 1 to 6, characterized in that: The preparation method of the high-voltage bidirectional PNP electrostatic protection device comprises: Step 1) forming an N-type buried layer in a P-type substrate; Step 2) forming a first N-type well in the P-type epitaxial layer on the N-type buried layer; Step 3) forming a first high-voltage N-well below the first N-well, and dividing the P-type epitaxial layer into a first P-type epitaxial layer and a second P-type epitaxial layer; Step 4) forming a first P-type well in the first P-type epitaxial layer, and forming a second P-type well in the second P-type epitaxial layer; Step 5) forming M P+ injection regions arranged in sequence from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device in the first P-type well, and forming M P+ injection regions arranged in sequence from the outside to the inside of the high-voltage bidirectional PNP electrostatic protection device in the second P-type well; Step 6) performing annealing treatment on each implantation region to eliminate the migration of impurities in the implantation region; Step 7) Connect the P+ injection regions in the first P-type well together and use them as the anode of the high-voltage bidirectional PNP electrostatic protection device, and connect the P+ injection regions in the second P-type well together and use them as the cathode of the high-voltage bidirectional PNP electrostatic protection device.
8. The method for preparing a high voltage bidirectional PNP electrostatic protection device according to claim 7, characterized in that: Between step 2) and step 3), it also includes: forming a first field oxygen isolation region outside the outermost P+ injection region in the first P-type well, forming a second field oxygen isolation region outside the outermost P+ injection region in the second P-type well, and forming a third field oxygen isolation region between the innermost P+ injection region in the first P-type well and the innermost P+ injection region in the second P-type well; forming M-1 field oxygen isolation regions between each P+ injection region in the first P-type well; forming M-1 field oxygen isolation regions between each P+ injection region in the second P-type well.
9. The method for preparing a high voltage bidirectional PNP electrostatic protection device according to claim 7 or 8, characterized in that: The step of forming an isolation structure around the bidirectional PNP device structure is also included: Step 2) further includes: forming a second N-type well and a third N-type well on both sides of the P-type epitaxial layer; Step 3) further includes: forming a second high-voltage N-well below the second N-type well, and forming a third high-voltage N-well below the third N-type well; Step 5) forming a first floating N+ implantation region in the second N-type well, and forming a second floating N+ implantation region in the third N-type well.
10. The method for preparing a high voltage bidirectional PNP electrostatic protection device according to claim 9, characterized in that: Between step 2) and step 3), the method further includes: forming a fourth field oxygen isolation region outside the first floating N+ implantation region, and forming a fifth field oxygen isolation region outside the second floating N+ implantation region.