Display panel, manufacturing method thereof and display device

Abstract

The invention discloses a display panel, a manufacturing method thereof and a display device. The display panel comprises a substrate, a first conductive layer, an active layer and a second conductive layer, the first conductive layer is arranged on the substrate and comprises a data line; the active layer is arranged on one side, far away from the substrate, of the first conductive layer and comprises a channel part, and a first contact part and a second contact part which are connected to two opposite sides of the channel part; the second conductive layer is arranged on one side, away from the first conductive layer, of the active layer; wherein the second conductive layer comprises a first electrode and a second electrode, the first electrode is connected with the first contact part and the data line, the second electrode is connected with the second contact part, and the second electrode comprises a pixel electrode or an anode; according to the display panel, the number of photomasks in the manufacturing process of the display panel can be effectively reduced, and the production cost of the display panel is reduced.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof, and a display device. Background Art

[0002] Thin Film Transistor (TFT) array substrate is an important component of display devices and can be formed on a glass substrate or a plastic substrate. It is usually used as a switching device and a driving device in liquid crystal display devices (LCD) and organic light emitting display devices (OLED).

[0003] However, in the process of manufacturing a thin film transistor array substrate, multiple film layers in the thin film transistor array substrate need to use multiple masks to perform photolithography. Figure 1 The array substrate includes a light shielding layer 1a arranged on the substrate, a buffer layer 2a arranged on the substrate and covering the light shielding layer 1a, an active layer 3a arranged on the buffer layer 2a, a gate insulating layer and a gate 4a arranged on the side of the active layer 3a away from the buffer layer 2a, an interlayer dielectric layer 5a arranged on the buffer layer 2a and covering the active layer 3a and the gate 4a, a source-drain electrode layer 6a arranged on the interlayer dielectric layer 5a, a first inorganic insulating layer 7a arranged on the interlayer dielectric layer 5a and covering the source-drain electrode layer 6a, an organic insulating layer 8a arranged on the first inorganic insulating layer 7a, a common electrode layer 9a arranged on the organic insulating layer 8a, a second inorganic insulating layer 10a arranged on the organic insulating layer 8a and covering the common electrode layer 9a, and a pixel electrode layer 11a arranged on the second inorganic insulating layer 10a. Among them, the light shielding layer 1a needs to be formed by a photomask, the active layer 3a needs to be formed by a photomask, the gate 4a and the gate insulating layer need to be formed by a photomask, the via holes in the buffer layer 2a and the interlayer dielectric layer 5a need to be formed by a photomask, the source and drain layer 6a needs to be formed by a photomask, the via holes in the first inorganic insulating layer 7a need to be formed by a photomask, the via holes in the organic insulating layer 8a need to be formed by a photomask, the common electrode layer 9a needs to be formed by a photomask, the via holes in the second inorganic insulating layer 10a need to be formed by a photomask, and the pixel electrode layer 11a needs to be formed by a photomask; that is, Figure 1 The structure of the display panel shown requires 10 photomask processes, which results in high production costs and complex processes.

[0004] Further, in another process of manufacturing an array substrate, please refer to Figure 2The array substrate includes a data line layer 1b disposed on the substrate, a buffer layer 2b disposed on the substrate and covering the data line layer 1b, a semiconductor layer 3b disposed on the buffer layer 2b, a gate layer 4b and a gate insulating layer disposed on the semiconductor layer 3b, a first inorganic insulating layer 5b disposed on the buffer layer 2b and covering the semiconductor layer 3b and the gate layer 4b, an organic insulating layer 6b disposed on the first inorganic insulating layer 5b, a common electrode layer 7b disposed on the organic insulating layer 6b, a second inorganic insulating layer 8b disposed on the organic insulating layer 6b and covering the common electrode layer 7b, and a pixel electrode layer 9b disposed on the second inorganic insulating layer 8b. Figure 2 The array substrate shown in the figure is directly connected to the data line layer 1b and used as a switching line through the semiconductor layer 3b. Figure 1 The array substrate shown reduces the number of photomasks; specifically, the data line layer 1b needs one photomask to form, the via hole in the buffer layer 2b needs one photomask to form, the semiconductor layer 3b needs one photomask to form, the gate layer 4b and the gate insulating layer need one photomask to form, the via hole in the organic insulating layer 6b needs one photomask to form, the via hole in the first inorganic insulating layer 5b and the second inorganic insulating layer 8b needs one photomask to form, the common electrode layer 7b needs one photomask to form, and the pixel electrode layer 9b needs one photomask to form; that is, Figure 2 The structure of the array substrate shown in the figure requires 8 mask processes, compared to Figure 1 As for the array substrate structure shown in FIG. 1 , the number of masks is reduced, but Figure 2 The number of masks in the array substrate structure shown is still relatively large, resulting in a high production cost and a complex process.

[0005] As mentioned above, the number of masks in the current array substrate manufacturing process is relatively large, and the mask cost is relatively high. Therefore, the more masks there are, the higher the cost required for the thin film transistor array substrate manufacturing process is, and the manufacturing process time and complexity are increased. Summary of the invention

[0006] The embodiments of the present application provide a display panel and a manufacturing method thereof, and a display device, which can reduce the number of masks in the display panel manufacturing process and reduce production costs.

[0007] An embodiment of the present application provides a display panel, comprising:

[0008] substrate;

[0009] A first conductive layer, disposed on the substrate, wherein the first conductive layer includes a data line;

[0010] An active layer, disposed on a side of the first conductive layer away from the substrate, the active layer comprising a channel portion and a first contact portion and a second contact portion connected to opposite sides of the channel portion;

[0011] A second conductive layer is disposed on a side of the active layer away from the first conductive layer;

[0012] The second conductive layer includes a first electrode and a second electrode, the first electrode is connected to the first contact portion and the data line, the second electrode is connected to the second contact portion, and the second electrode includes a pixel electrode or an anode.

[0013] In one embodiment of the present application, the display panel further includes:

[0014] A buffer layer, disposed between the first conductive layer and the active layer;

[0015] a first insulating layer, disposed between the active layer and the second conductive layer;

[0016] an organic insulating layer, disposed between the first insulating layer and the second conductive layer;

[0017] a second insulating layer, disposed between the organic insulating layer and the second conductive layer;

[0018] The display panel also includes a first opening passing through the buffer layer, the first insulating layer, the organic insulating layer and the second insulating layer, the first electrode is located in the first opening, and part of the data line and at least part of the first contact portion are arranged corresponding to the first opening.

[0019] In one embodiment of the present application, the first opening includes a first sub-hole and a second sub-hole that are connected to each other, the second sub-hole is located between the first sub-hole and the data line, the first sub-hole passes through the second insulating layer and the organic insulating layer, and the second sub-hole passes through the first insulating layer and the buffer layer;

[0020] Wherein, the side wall of the first sub-hole is the surface of the second insulating layer.

[0021] In one embodiment of the present application, the second insulating layer includes a first sub-portion located on the sidewall of the first sub-hole and a second sub-portion located on a side of the organic insulating layer away from the substrate, and the thickness of the first sub-portion is less than or equal to the thickness of the second sub-portion.

[0022] In one embodiment of the present application, the first contact portion includes a first surface away from the first conductive layer and a first side surface connected to the first surface, one end of the first electrode covers the first surface and the first side surface, and the other end of the first electrode covers a side of the data line away from the substrate.

[0023] In one embodiment of the present application, the first conductive layer further includes a light shielding portion disposed between the channel portion and the substrate, and the light shielding portion is spaced apart from the data line;

[0024] The data line partially overlaps with the first contact portion along the thickness direction of the display panel, and the data line includes a second side surface arranged away from the light shielding portion, the first side surface is located on a side of the first contact portion away from the channel portion, and the second side surface is located on a side of the first side surface away from the channel portion.

[0025] In one embodiment of the present application, the display panel further includes a display area and a non-display area adjacent to the display area, and at least the second electrode is disposed in the display area;

[0026] The first conductive layer further includes a first signal line disposed on the substrate and located in the non-display area;

[0027] The display panel further comprises a third conductive layer disposed between the active layer and the first insulating layer, the third conductive layer comprising a gate disposed on a side of the channel portion away from the buffer layer and a second signal line located in the non-display area;

[0028] The second conductive layer further includes a switching line located in the non-display area;

[0029] The display panel also includes a second opening that passes through the buffer layer, the first insulating layer, the organic insulating layer and the second insulating layer, at least part of the adapter line is located in the second opening, at least part of the first signal line and at least part of the second signal line are arranged corresponding to the second opening, and the adapter line connects the first signal line and the second signal line.

[0030] In one embodiment of the present application, the second signal line includes a second surface away from the side of the substrate and a third side connected to the second surface, one end of the adapter line covers the second surface and the third side, and the other end of the adapter line covers the side of the first signal line away from the substrate.

[0031] In one embodiment of the present application, the second opening includes a third sub-hole and a fourth sub-hole that are connected to each other, the fourth sub-hole is located between the third sub-hole and the first signal line, the third sub-hole passes through the second insulating layer and the organic insulating layer, and the fourth sub-hole passes through the first insulating layer and the buffer layer;

[0032] Wherein, the side wall of the third sub-hole is the surface of the second insulating layer.

[0033] In one embodiment of the present application, the display panel also includes a third opening passing through the first insulating layer, the organic insulating layer and the second insulating layer, the third opening is arranged corresponding to the second contact portion, one end of the second electrode is located on a side of the second insulating layer away from the organic insulating layer, and the other end of the second electrode passes through the third opening and is connected to the second contact portion.

[0034] In one embodiment of the present application, the thickness of the active layer is greater than or equal to 50 angstroms.

[0035] In one embodiment of the present application, the display panel further comprises a liquid crystal layer disposed on a side of the second conductive layer away from the substrate and an opposing substrate disposed on a side of the liquid crystal layer away from the second conductive layer, and the second electrode is the pixel electrode;

[0036] Alternatively, the display panel further comprises a light-emitting functional layer disposed on a side of the second conductive layer away from the substrate and a cathode layer disposed on a side of the light-emitting functional layer away from the second conductive layer, and the second electrode is the anode.

[0037] According to the above-mentioned object of the present application, an embodiment of the present application further provides a method for manufacturing a display panel, which includes:

[0038] forming a first conductive layer on a substrate, wherein a data line is formed in the first conductive layer;

[0039] An active layer is formed on a side of the first conductive layer away from the substrate, wherein the active layer has a channel portion and a first contact portion and a second contact portion connected to opposite sides of the channel portion;

[0040] A second conductive layer is formed on a side of the active layer away from the first conductive layer, a first electrode and a second electrode are formed in the second conductive layer, the first electrode is connected to the first contact portion and the data line, the second electrode is connected to the second contact portion, and the second electrode includes a pixel electrode or an anode.

[0041] According to the above-mentioned purpose of the present application, an embodiment of the present application further provides a display device, which includes the display panel, or a display panel manufactured by the manufacturing method of the display panel.

[0042] The present application arranges the first electrode and the second electrode in the second conductive layer, and the second electrode serves as a pixel electrode or an anode and can be directly connected to the second contact portion of the active layer, thereby also having the function of a source or a drain. In this embodiment of the present application, the first electrode and the second electrode are located in the same film layer, which is equivalent to using the same mask to form the first electrode, the pixel electrode (or anode) and the source (or drain), which can effectively reduce the number of masks in the display panel manufacturing process and reduce the production cost of the display panel.

[0043] Other features and advantages of the present application will be described in detail in the subsequent specific implementation section. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can obtain other drawings based on these drawings without creative work.

[0045] In order to more completely understand the present application and its beneficial effects, the following description will be given in conjunction with the accompanying drawings, wherein the same figure numbers represent the same parts in the following description.

[0046] Figure 1 It is a structural schematic diagram of a display panel in the prior art;

[0047] Figure 2 is a schematic diagram of the structure of another display panel in the prior art;

[0048] Figure 3 A schematic diagram of the structure of a display panel provided in an embodiment of the present application;

[0049] Figure 4 Another schematic diagram of the structure of a display panel provided in an embodiment of the present application;

[0050] Figure 5 A flow chart of a method for manufacturing a display panel provided in an embodiment of the present application;

[0051] Figures 6 to 9 A structural schematic diagram of the manufacturing process of the display panel provided in an embodiment of the present application.

[0052] Description of reference numerals:

[0053] 10. substrate; 101. display area; 102. non-display area;

[0054] 20. first conductive layer; 21. data line; 22. light shielding portion; 23. first signal line;

[0055] 30. active layer; 31. channel portion; 32. first contact portion; 33. second contact portion;

[0056] 40. second conductive layer; 41. first electrode; 42. second electrode; 44. adapter wire;

[0057] 51. buffer layer; 52. first insulating layer; 53. organic insulating layer; 54. second insulating layer; 55. first gate insulating portion; 56. second gate insulating portion; 57. common electrode layer;

[0058] 60. third conductive layer; 61. gate; 62. second signal line;

[0059] 71, first opening; 711, first sub-hole; 712, second sub-hole; 72, second opening; 721, third sub-hole; 722, fourth sub-hole; 73, third opening;

[0060] 81. Pixel definition layer; 82. Light-emitting functional layer; 83. Cathode layer. DETAILED DESCRIPTION

[0061] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0062] Please refer to Figure 3 An embodiment of the present application provides a display panel, which includes a substrate 10, a first conductive layer 20, an active layer 30 and a second conductive layer 40.

[0063] Among them, the first conductive layer 20 is arranged on the substrate 10, and the first conductive layer 20 includes a data line 21; the active layer 30 is arranged on the side of the first conductive layer 20 away from the substrate 10, and the active layer 30 includes a channel portion 31 and a first contact portion 32 and a second contact portion 33 connected to the opposite sides of the channel portion 31; the second conductive layer 40 is arranged on the side of the active layer 30 away from the first conductive layer 20.

[0064] Furthermore, the second conductive layer 40 includes a first electrode 41 and a second electrode 42 . The first electrode 41 connects the first contact portion 32 and the data line 21 , and the second electrode 42 connects the second contact portion 33 . The second electrode 42 includes a pixel electrode or an anode.

[0065] During the implementation of the application, the embodiment of the present application arranges the first electrode 41 and the second electrode 42 in the second conductive layer 40, and the second electrode 42 serves as a pixel electrode or an anode, and can be directly connected to the second contact portion 33 of the active layer 30, and thus also has the function of a source or a drain. In this embodiment of the present application, the first electrode 41 and the second electrode 42 are located in the same film layer, which is equivalent to using the same mask to form the first electrode 41, the pixel electrode (or anode) and the source (or drain), which can effectively reduce the number of masks in the display panel manufacturing process and reduce the production cost of the display panel.

[0066] It should be noted that in the display panel provided in the embodiment of the present application, the first electrode 41 can be one of the source and the drain, and the second electrode 42 can be reused as the other of the source and the drain, that is, the embodiment of the present application can form the source and the drain in the same mask, thereby Figure 2 In the structure shown, the source and the drain are formed by two photomasks respectively, which can further reduce the number of photomasks in the manufacturing process of the display panel and reduce the production cost of the display panel.

[0067] Please continue to refer to Figure 3 In one embodiment of the present application, the display panel further includes a buffer layer 51, a first insulating layer 52, an organic insulating layer 53, a second insulating layer 54, a common electrode layer 57, a gate insulating layer and a third conductive layer 60. The buffer layer 51 is disposed between the first conductive layer 20 and the active layer 30; the first insulating layer 52 is disposed between the active layer 30 and the second conductive layer 40; the organic insulating layer 53 is disposed between the first insulating layer 52 and the second conductive layer 40; the second insulating layer 54 is disposed between the organic insulating layer 53 and the second conductive layer 40, and the third conductive layer 60 and the gate insulating layer are disposed between the active layer 30 and the first insulating layer 52.

[0068] Specifically, the buffer layer 51 is arranged on the substrate 10 and covers the first conductive layer 20, the third conductive layer 60 and the gate insulating layer are arranged on the active layer 30 and the buffer layer 51, the first insulating layer 52 is arranged on the buffer layer 51 and covers the active layer 30 and the third conductive layer 60, the organic insulating layer 53 is arranged on the first insulating layer 52, the common electrode layer 57 is arranged on the organic insulating layer 53, the second insulating layer 54 is arranged on the organic insulating layer 53 and covers the common electrode layer 57, and the second conductive layer 40 is arranged on the second insulating layer 54.

[0069] In some embodiments, the display panel includes a display area 101 and a non-display area 102 adjacent to the display area 101, the first conductive layer 20 includes a data line 21, a light shielding portion 22 and a first signal line 23 arranged in the display area 101; and the buffer layer 51 is used to cover part of the data line 21, the light shielding portion 22 and part of the first signal line 23, and the data line 21, the light shielding portion 22 and the first signal line 23 are all arranged at intervals.

[0070] In some embodiments, the active layer 30 is disposed on a surface of the buffer layer 51 away from the shading portion 22; wherein the active layer 30 includes a channel portion 31 and a first contact portion 32 and a second contact portion 33 connected to opposite sides of the channel portion 31. It can be understood that the channel portion 31 is a semiconductor material, and the first contact portion 32 and the second contact portion 33 can be formed by conducting the semiconductor material; and the shading portion 22 can be located between the channel portion 31 and the substrate 11. Further preferably, the orthographic projection of the channel portion 31 on the substrate 10 is located within the coverage range of the orthographic projection of the shading portion 22 on the substrate 10, and thus the shading portion 22 can block the light from one side of the substrate 10, thereby reducing the influence of the light on the electrical properties of the channel portion 31.

[0071] It is understandable that the data line 21 needs to be disposed close to the first contact portion 32 to facilitate the subsequent connection between the data line 21 and the first contact portion 32 .

[0072] In some embodiments, the material of the active layer 30 may include an oxide semiconductor material, specifically a metal oxide semiconductor material. For example, the material of the active layer 30 may include at least one of indium zinc oxide (IZO), indium gallium oxide (IGO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO) and indium gallium zinc tin oxide (IGZTO).

[0073] In some embodiments, the gate insulating layer includes a first gate insulating portion 55 disposed on the side of the active layer 30 away from the buffer layer 51 and a second gate insulating portion 56 disposed in the non-display area 102; the third conductive layer 60 includes a gate 61 disposed on the side of the first gate insulating portion 55 away from the active layer 30 and a second signal line 62 disposed on the side of the second gate insulating portion 56 away from the buffer layer 51; wherein the first gate insulating portion 55 is located on the side of the channel portion 31 away from the buffer layer 51, and the gate 61 is located on the side of the first gate insulating portion 55 away from the channel portion 31, and the second signal line 62 and the second gate insulating portion 56 are disposed close to the first signal line 23 to facilitate the subsequent connection between the second signal line 62 and the first signal line 23.

[0074] The first insulating layer 52 covers part of the second signal line 62, part of the active layer 30 and the gate 61, the organic insulating layer 53 is located on the side of the first insulating layer 52 away from the substrate 10, and the second insulating layer 54 covers the organic insulating layer 53; in some embodiments, the display panel also includes a first opening 71 that passes through the buffer layer 51, the first insulating layer 52, the organic insulating layer 53 and the second insulating layer 54, the first opening 71 is located in the display area 101 and is arranged corresponding to the data line 21, that is, the first opening 71 is located on the side of the data line 21 away from the substrate 10; wherein, part of the data line 21 and at least part of the first contact portion 32 are arranged corresponding to the first opening 71, that is, the first opening 71 can expose part of the surface of the data line 21 and part of the surface of the first contact portion 32.

[0075] In some embodiments, the second conductive layer 40 includes a first electrode 41 disposed in the display area 101, and the first electrode 41 is disposed in the first opening 71, and the first electrode 41 is connected between the data line 21 and the first contact portion 32, for transmitting the data signal in the data line 21 to the active layer 30.

[0076] In some embodiments, the first contact portion 32 includes a first surface away from the first conductive layer 20 and a first side surface connected to the first surface, one end of the first electrode 41 covers the first surface and the first side surface, and the other end of the first electrode 41 covers the side of the data line 21 away from the substrate 10; that is, the embodiment of the present application is relative to Figure 1 and Figure 2 As for the structure shown, since the first electrode 41 can cover the first surface and the first side surface of the first contact portion 32 at the same time, the embodiment of the present application can effectively increase the connection area between the first contact portion 32 and the data line 21, reduce the connection resistance between the data line 21, the first electrode 41 and the first contact portion 32, and improve the signal transmission efficiency.

[0077] In some embodiments, the material of the second conductive layer 40 may include ITO material, and thus relative to Figure 2 In the structure shown, a conductive semiconductor material is used to connect the data line. In the embodiment of the present application, the resistance of the first electrode 41 is smaller, which can further reduce the connection resistance between the data line 21, the first electrode 41 and the first contact portion 32, thereby improving the signal transmission efficiency.

[0078] In some embodiments, the data line 21 and the first contact portion 32 partially overlap along the thickness direction of the display panel, which is more conducive to the first opening 71 exposing the data line 21 and the first contact portion 32 at the same time, reducing the opening area of ​​the first opening 71 and improving the space utilization of the display panel.

[0079] In some embodiments, the data line 21 includes a second side surface arranged away from the light shading portion 22, the first side surface is located on a side of the first contact portion 32 away from the channel portion 31, and the second side surface is located on a side of the first side surface away from the channel portion 31, that is, a portion of the data line 21 is not blocked by the first contact portion 32, so as to facilitate the connection between the first electrode 41 and the data line 21.

[0080] In some embodiments, the first opening 71 includes a first sub-hole 711 and a second sub-hole 712 that are connected to each other, the second sub-hole 712 is located between the first sub-hole 711 and the data line 21, the first sub-hole 711 passes through the second insulating layer 54 and the organic insulating layer 53, and the second sub-hole 712 passes through the first insulating layer 52 and the buffer layer 51; wherein the side wall of the first sub-hole 711 is the surface of the second insulating layer 54; in the embodiment of the present application, the first opening 71 can pass through the second insulating layer 54, the first insulating layer 52 and the buffer layer 51, and the second insulating layer 54, the first insulating layer 52 and the buffer layer 51 can all be prepared using inorganic insulating materials, such as silicon nitride or silicon oxide, and then the openings of the second insulating layer 54, the first insulating layer 52 and the buffer layer 51 can be formed in the same photomask, that is, a first opening 71 passing through the second insulating layer 54, the first insulating layer 52 and the buffer layer 51 is formed, which can further reduce the number of photomasks and reduce process costs.

[0081] It should be noted that since the first insulating layer 52 and the second insulating layer 54 are both made of inorganic insulating materials, their water vapor blocking effect is better than that of the organic insulating layer 53. Therefore, in the present application, the side wall of the first sub-hole 711 is formed by the second insulating layer 54, which can effectively improve the water vapor blocking effect of the display panel, reduce the probability of the display panel being corroded by water vapor, and increase the service life of the display panel.

[0082] In some embodiments, the second insulating layer 54 includes a first sub-portion located on the side wall of the first sub-hole 711 and a second sub-portion located on the side of the organic insulating layer 53 away from the substrate 10. The thickness of the first sub-portion is less than or equal to the thickness of the second sub-portion. Since the etching gas etches downward and also etches horizontally during the dry etching process of the first opening 71, an etching effect may be produced on the second insulating layer 54 at the side wall of the first sub-hole 711, which may cause the thickness of the second insulating layer 54 at the side wall of the first sub-hole 711 to be less than the thickness of the second insulating layer 54 on the side of the organic insulating layer 53 away from the substrate 10.

[0083] In addition, in some embodiments, the display panel also includes a second opening 72 that passes through the buffer layer 51, the first insulating layer 52, the organic insulating layer 53 and the second insulating layer 54, and at least a portion of the first signal line 23 and at least a portion of the second signal line 62 are arranged corresponding to the second opening 72; the second opening 72 is located in the non-display area 102 and on the side of the first signal line 23 away from the substrate 10, and the second opening 72 can expose a portion of the surface of the first signal line 23 and a portion of the surface of the second signal line 62, and the second signal line 62 is arranged close to the first signal line 23, which is beneficial for the second opening 72 to expose the first signal line 23 and the second signal line 62 at the same time, which is beneficial for reducing the aperture of the second opening 72 and improving the space utilization of the display panel.

[0084] Furthermore, the second conductive layer 40 also includes a transfer line 44 arranged in the non-display area 102 and at least partially located in the second opening 72, and the transfer line 44 is connected between the first signal line 23 and the second signal line 62; and the transfer line 44 can be partially located in the second opening 72 and connected between the first signal line 23 and the second signal line 62, and the other part extends outside the second opening 72 and is located on the side of the second insulating layer 54 away from the substrate 10.

[0085] In one embodiment, the second signal line 62 includes a second surface away from the substrate 10 and a third side surface connected to the second surface, one end of the adapter line 44 covers the second surface and the third side surface, and the other end of the adapter line 44 covers the side of the first signal line 23 away from the substrate 10; that is, the embodiment of the present application is relative to Figure 1 and Figure 2 As for the structure shown in FIG. 1 , since the adapter line 44 can cover the first surface and the first side surface of the second signal line 62 at the same time, the embodiment of the present application can effectively increase the connection area between the second signal line 62 and the first signal line 23, reduce the connection resistance between the adapter line 44, the second signal line 62 and the first signal line 23, and improve the signal transmission efficiency. Furthermore, since the material of the second conductive layer 40 can include ITO material, relative to Figure 2 In the structure shown, conductive semiconductor materials are used for switching. In the embodiment of the present application, the resistance of the switching line 44 is smaller, which can further reduce the connection resistance between the switching line 44, the second signal line 62 and the first signal line 23, thereby improving the signal transmission efficiency.

[0086] In some embodiments, the second opening 72 includes a third sub-hole 721 and a fourth sub-hole 722 that are connected, the fourth sub-hole 722 is located between the third sub-hole 721 and the first signal line 23, the third sub-hole 721 passes through the second insulating layer 54 and the organic insulating layer 53, and the fourth sub-hole 722 passes through the first insulating layer 52 and the buffer layer 51; wherein the sidewall of the third sub-hole 721 is the surface of the second insulating layer 54. In the embodiment of the present application, the second opening 72 can pass through the second insulating layer 54, the first insulating layer 52 and the buffer layer 51, and the second insulating layer 54, the first insulating layer 52 and the buffer layer 51 can all be made of inorganic insulating materials, such as silicon nitride or silicon oxide, and then the openings of the second insulating layer 54, the first insulating layer 52 and the buffer layer 51 can be formed in the same photomask, that is, the first opening 71 and the second opening 72 that pass through the second insulating layer 54, the first insulating layer 52 and the buffer layer 51 are formed in the same photomask, which can further reduce the number of photomasks and reduce the process cost.

[0087] It should be noted that since the first insulating layer 52 and the second insulating layer 54 are both made of inorganic insulating materials, their water vapor blocking effect is better than that of the organic insulating layer 53. Therefore, the side wall of the third sub-hole 721 in the present application is formed by the second insulating layer 54, which can effectively improve the water vapor blocking effect of the display panel, reduce the probability of the display panel being corroded by water vapor, and increase the service life of the display panel.

[0088] In some embodiments, the thickness of the second insulating layer 54 located on the side wall of the third sub-hole 721 is less than or equal to the thickness of the second insulating layer 54 on the side of the organic insulating layer 53 away from the substrate 10. Since the etching gas etches downward and also etches horizontally during the dry etching process of the second opening 72, the second insulating layer 54 at the side wall of the third sub-hole 721 may be etched, which may cause the thickness of the second insulating layer 54 covering the side wall of the third sub-hole 721 to be less than the thickness of the second insulating layer 54 on the side of the organic insulating layer 53 away from the substrate 10.

[0089] In some embodiments, the display panel also includes a third opening 73 passing through the first insulating layer 52, the organic insulating layer 53 and the second insulating layer 54, and the third opening 73 is arranged corresponding to the second contact portion 33, that is, the third opening 73 can be located on the side of the second contact portion 33 away from the substrate 10 and located in the display area 101; one end of the second electrode 42 is located on the side of the second insulating layer 54 away from the organic insulating layer 53, and the other end of the second electrode 42 is connected to the second contact portion 33 through the third opening 73, that is, the second electrode 42 can have the function of a source or a drain.

[0090] It should be noted that, in the embodiment of the present application, the first opening 71, the second opening 72 and the third opening 73 are all formed in the same photomask, therefore, during the dry etching process of the first opening 71, the second opening 72 and the third opening 73, the etching intensity of the etching gas is the same; wherein, the first opening 71 and the second opening 72 both pass through the second insulating layer 54, the organic insulating layer 53, the first insulating layer 52 and the buffer layer 51, and the depth of the third opening 73 is less than that of the first opening 71 and the second opening 72, and the third opening 73 passes through the second insulating layer 54, the organic insulating layer 53 and the first insulating layer 52; in order to prevent the second contact portion 33 from being etched through, the thickness of the second contact portion 33 needs to be greater than or equal to 50 angstroms, that is, the thickness of the active layer 30 needs to be greater than or equal to 50 angstroms, so that the etching of the third opening 73 can stop at the second contact portion 33, to prevent the second contact portion 33 from being etched through and causing the active layer 30 to be unable to connect to the second electrode 42.

[0091] In some embodiments, since the second contact portion 33 may be partially etched during the etching process, the average thickness of the second contact portion 33 may be less than or equal to the average thickness of the first contact portion 32 .

[0092] In some embodiments, the display panel may also include a liquid crystal layer disposed on the side of the second conductive layer 40 away from the substrate 10 and an opposing substrate disposed on the side of the liquid crystal layer away from the second conductive layer 40, and structures such as a color film layer may be disposed on the opposing substrate, that is, in this embodiment, the display panel may be a liquid crystal display panel.

[0093] Among them, the second electrode 42 is a pixel electrode arranged in the display area 101, and the second electrode 42 is electrically connected to the active layer 30, the first electrode 41 and the data line 21 to obtain the data signal in the data line 21, and the second electrode 42 can form an electric field with the common electrode layer 57 to control the deflection of liquid crystal molecules in the liquid crystal layer.

[0094] As mentioned above, in the embodiment of the present application, the first electrode 41 and the second electrode 42 are arranged in the second conductive layer 40, and the second electrode 42 serves as a pixel electrode or an anode and can be directly connected to the second contact portion 33 of the active layer 30, thereby also having the function of a source or a drain. In this embodiment of the present application, the first electrode 41 and the second electrode 42 are located in the same film layer, which is equivalent to using the same photomask to form the first electrode 41, the pixel electrode (or anode) and the source (or drain), which can effectively reduce the number of photomasks in the process of the display panel and reduce the production cost of the display panel; in addition, in the process of forming the first opening 71, the second opening 72 and the third opening 73, the buffer layer 51 can be formed in the same photomask as the first insulating layer 52 and the second insulating layer 54, which can further reduce the number of photomasks in the process of the display panel and reduce the production cost of the display panel.

[0095] Please refer to Figure 4 In another embodiment of the present application, this embodiment is relative to Figure 3 The difference between the illustrated embodiment is that the display panel provided in this embodiment is an organic light emitting diode display panel.

[0096] Specifically, the display panel further includes a pixel definition layer 81 and a light-emitting functional layer 82 arranged on the side of the second conductive layer 40 away from the substrate 10, and a cathode layer 83 arranged on the side of both the pixel definition layer 81 and the light-emitting functional layer 82 away from the second conductive layer 40. The second electrode 42 may be an anode.

[0097] Among them, the pixel definition layer 81 is arranged on the side of the second conductive layer 40 away from the substrate 10 and fills the first opening 71, the second opening 72 and the third opening 73; a plurality of pixel openings are formed in the pixel definition layer 81, and the pixel openings can expose the surface of the second electrode 42. The light-emitting functional layer 82 is at least arranged in each pixel opening and is located on the side of the second electrode 42 away from the second insulating layer 54. The cathode layer 83 covers the pixel definition layer 81 and the surface of the light-emitting functional layer 82 away from the second electrode 42.

[0098] As mentioned above, in the embodiment of the present application, the first electrode 41 and the second electrode 42 are arranged in the second conductive layer 40, and the second electrode 42 serves as a pixel electrode or an anode and can be directly connected to the second contact portion 33 of the active layer 30, thereby also having the function of a source or a drain. In this embodiment of the present application, the first electrode 41 and the second electrode 42 are located in the same film layer, which is equivalent to using the same photomask to form the first electrode 41, the pixel electrode (or anode) and the source (or drain), which can effectively reduce the number of photomasks in the process of the display panel and reduce the production cost of the display panel; in addition, in the process of forming the first opening 71, the second opening 72 and the third opening 73, the buffer layer 51 can be formed in the same photomask as the first insulating layer 52 and the second insulating layer 54, which can further reduce the number of photomasks in the process of the display panel and reduce the production cost of the display panel.

[0099] In addition, please combine Figure 3 , Figure 5 as well as Figures 6 to 9 The present application also provides a method for manufacturing the display panel described in the above embodiment, which comprises:

[0100] S10, forming a first conductive layer on a substrate, wherein a data line is formed in the first conductive layer.

[0101] S20, forming an active layer on a side of the first conductive layer away from the substrate, wherein a channel portion and a first contact portion and a second contact portion connected to opposite sides of the channel portion are formed in the active layer.

[0102] S30, forming a second conductive layer on a side of the active layer away from the first conductive layer, wherein a first electrode and a second electrode are formed in the second conductive layer, wherein the first electrode is connected to the first contact portion and the data line, and the second electrode is connected to the second contact portion, and the second electrode comprises a pixel electrode or an anode.

[0103] Specifically, in step S10 , a first mask process is used to form a patterned first conductive layer 20 on the substrate 10 , and the first conductive layer 20 includes a data line 21 and a light shielding portion 22 in the display area 101 , and a first signal line 23 in the non-display area 102 .

[0104] Next, a buffer layer 51 covering the data line 21 , the light shielding portion 22 and the first signal line 23 is formed on the substrate 10 ; wherein the material of the buffer layer 51 may include an inorganic insulating material, such as silicon nitride or silicon oxide.

[0105] In step S20, a second mask process is used to form an active layer 30 on the side of the buffer layer 51 away from the first conductive layer 20, and the active layer 30 is formed on the side of the shading portion 22 away from the substrate 10; wherein the active layer 30 includes a channel portion 31 and a first contact portion 32 and a second contact portion 33 connected to opposite sides of the channel portion 31, and the shading portion 22 is located between the channel portion 31 and the substrate 10.

[0106] In some embodiments, the material of the active layer 30 may include an oxide semiconductor material, specifically a metal oxide semiconductor material. For example, the material of the active layer 30 may include at least one of indium zinc oxide (IZO), indium gallium oxide (IGO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO) and indium gallium zinc tin oxide (IGZTO).

[0107] Next, a third photomask process is used to form a patterned gate insulating layer and a third conductive layer 60 on the active layer 30 and the buffer layer 51; wherein the gate insulating layer includes a first gate insulating portion 55 forming a channel portion 31 on a side away from the light shielding portion 22 and a second gate insulating portion 56 located in the non-display area 102 and close to the first signal line 23, and the third conductive layer 60 includes a gate 61 formed on a side of the first gate insulating portion 55 away from the channel portion 31 and the first signal line 23 located on a side of the second gate insulating portion 56 away from the buffer layer 51.

[0108] Then, a first insulating layer 52 is formed on the buffer layer 51 to cover the active layer 30 and the third conductive layer 60. Figure 6 As shown; the material of the first insulating layer 52 may include an inorganic insulating material, such as silicon nitride or silicon oxide.

[0109] Next, a fourth photomask process is used to form a patterned organic insulating layer 53 on the first insulating layer 52, wherein the organic insulating layer 53 is provided with a first middle hole 710 corresponding to the data line 21 and the first contact portion 32, a second middle hole 720 corresponding to the first signal line 23 and the second signal line 62, and a third middle hole 730 corresponding to the second contact portion 33. Figure 7 As shown; the material of the organic insulating layer 53 includes an organic insulating material, such as acrylic or polyimide.

[0110] Then, a fifth photomask process is used to form a patterned common electrode layer 57 on a side of the organic insulating layer 53 away from the first insulating layer 52 .

[0111] A second insulating layer 54 covering the common electrode layer 57 is formed on the side of the organic insulating layer 53 away from the first insulating layer 52; wherein the second insulating layer 54 also covers the sidewalls and bottom of the first middle hole 710, the second middle hole 720 and the third middle hole 730, as shown in FIG. Figure 8 As shown; the material of the second insulating layer 54 may include an inorganic insulating material, such as silicon nitride or silicon oxide.

[0112] Since the second insulating layer 54, the first insulating layer 52 and the buffer layer 51 are all made of inorganic materials, for example, silicon nitride material or silicon oxide material, the second insulating layer 54, the first insulating layer 52 and the buffer layer 51 can be etched by the sixth photomask process, and a first opening 71 is formed corresponding to the first middle hole 710, a second opening 72 is formed corresponding to the second middle hole 720, and a third opening 73 is formed corresponding to the third middle hole 730; wherein the first opening 71 passes through the second insulating layer 54, the organic insulating layer 53, the first insulating layer 52 and the buffer layer 51, a portion of the data line 21 and at least a portion of the first contact portion 32 are located in the first opening 71, the second opening 72 passes through the second insulating layer 54, the organic insulating layer 53, the first insulating layer 52 and the buffer layer 51, a portion of the first signal line 23 and a portion of the second signal line 62 are located in the second opening 72, the third opening 73 passes through the second insulating layer 54, the organic insulating layer 53 and the first insulating layer 52, and a portion of the second contact portion 33 is located in the third opening 73, as shown in FIG. Fig. 9 shown.

[0113] A conductive material layer is formed on a side of the second insulating layer 54 away from the organic insulating layer 53 , and the conductive material layer is patterned using a seventh photomask process to form a second conductive layer 40 .

[0114] The second conductive layer 40 includes a first electrode 41 located in the first opening 71 , a connecting line 44 located at least in the second opening 72 , and a second electrode 42 located at least in the third opening 73 .

[0115] Further, the first electrode 41 is connected between the data line 21 and the first contact portion 32 in the first opening 71, one end of the second electrode 42 is connected to the second contact portion 33 in the third opening 73, the other end of the second electrode 42 is located on a surface of the second insulating layer 54 away from the organic insulating layer 53, and the adapter line 44 is connected between the first signal line 23 and the second signal line 62 in the second opening 72, as shown in FIG. Figure 3 shown.

[0116] In summary, the embodiment of the present application arranges the first electrode 41 and the second electrode 42 in the second conductive layer 40, and the second electrode 42 serves as a pixel electrode or an anode, and can be directly connected to the second contact portion 33 of the active layer 30, and thus also has the function of a source or a drain. In this embodiment of the present application, the first electrode 41 and the second electrode 42 are located in the same film layer, which is equivalent to using the same photomask to form the first electrode 41, the pixel electrode (or anode) and the source (or drain). In addition, in the process of forming the first opening 71, the second opening 72 and the third opening 73, the buffer layer 51 can be formed in the same photomask as the first insulating layer 52 and the second insulating layer 54, and thus the embodiment of the present application can be formed using only seven photomask processes. Figure 3 The display panel shown, relative to Figure 1 as well as Figure 2 The structure shown can effectively reduce the number of masks in the manufacturing process of the display panel and reduce the production cost of the display panel.

[0117] In addition, an embodiment of the present application further provides a display device, which includes the display panel described in the above embodiment, or a display panel manufactured by the manufacturing method of the display panel described in the above embodiment.

[0118] In some embodiments, the display device may be a liquid crystal display or an organic light emitting diode display.

[0119] It can be understood that, since the display device includes the display panel described in the above embodiment, the display device has the same beneficial effects as the display panel described in the above embodiment, which will not be described in detail herein.

[0120] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0121] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0122] The embodiments, implementation methods and related technical features of the present application can be combined and replaced with each other without conflict.

[0123] The above are only preferred embodiments of the present application and do not constitute any form of limitation to the present application. However, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. A display panel, characterized in that: include: substrate; A first conductive layer, disposed on the substrate, wherein the first conductive layer includes a data line; An active layer, disposed on a side of the first conductive layer away from the substrate, the active layer comprising a channel portion and a first contact portion and a second contact portion connected to opposite sides of the channel portion; A second conductive layer is disposed on a side of the active layer away from the first conductive layer; The second conductive layer includes a first electrode and a second electrode, the first electrode is connected to the first contact portion and the data line, the second electrode is connected to the second contact portion, and the second electrode includes a pixel electrode or an anode.

2. The display panel according to claim 1, characterized in that: The display panel further includes: A buffer layer, disposed between the first conductive layer and the active layer; a first insulating layer, disposed between the active layer and the second conductive layer; an organic insulating layer, disposed between the first insulating layer and the second conductive layer; a second insulating layer, disposed between the organic insulating layer and the second conductive layer; The display panel also includes a first opening passing through the buffer layer, the first insulating layer, the organic insulating layer and the second insulating layer, the first electrode is located in the first opening, and part of the data line and at least part of the first contact portion are arranged corresponding to the first opening.

3. The display panel according to claim 2, characterized in that: The first opening includes a first sub-hole and a second sub-hole that are connected, the second sub-hole is located between the first sub-hole and the data line, the first sub-hole passes through the second insulating layer and the organic insulating layer, and the second sub-hole passes through the first insulating layer and the buffer layer; Wherein, the side wall of the first sub-hole is the surface of the second insulating layer.

4. The display panel according to claim 3, characterized in that: The second insulating layer includes a first sub-portion located on the sidewall of the first sub-hole and a second sub-portion located on a side of the organic insulating layer away from the substrate, and a thickness of the first sub-portion is less than or equal to a thickness of the second sub-portion.

5. The display panel according to any one of claims 1 to 4, characterized in that: The first contact portion includes a first surface away from the first conductive layer and a first side surface connected to the first surface. One end of the first electrode covers the first surface and the first side surface. The other end of the first electrode covers a side of the data line away from the substrate.

6. The display panel according to claim 5, characterized in that: The first conductive layer further includes a light shielding portion disposed between the channel portion and the substrate, and the light shielding portion is spaced apart from the data line; The data line partially overlaps with the first contact portion along the thickness direction of the display panel, and the data line includes a second side surface arranged away from the light shielding portion, the first side surface is located on a side of the first contact portion away from the channel portion, and the second side surface is located on a side of the first side surface away from the channel portion.

7. The display panel according to claim 2, characterized in that: The display panel further comprises a display area and a non-display area adjacent to the display area, and at least the second electrode is disposed in the display area; The first conductive layer further includes a first signal line disposed on the substrate and located in the non-display area; The display panel further comprises a third conductive layer disposed between the active layer and the first insulating layer, the third conductive layer comprising a gate disposed on a side of the channel portion away from the buffer layer and a second signal line located in the non-display area; The second conductive layer further includes a switching line located in the non-display area; The display panel also includes a second opening that passes through the buffer layer, the first insulating layer, the organic insulating layer and the second insulating layer, at least part of the adapter line is located in the second opening, at least part of the first signal line and at least part of the second signal line are arranged corresponding to the second opening, and the adapter line connects the first signal line and the second signal line.

8. The display panel according to claim 7, characterized in that: The second signal line includes a second surface away from the substrate and a third side connected to the second surface, one end of the adapter covers the second surface and the third side, and the other end of the adapter covers a side of the first signal line away from the substrate.

9. The display panel according to claim 7, characterized in that: The second opening includes a third sub-hole and a fourth sub-hole which are connected to each other, the fourth sub-hole is located between the third sub-hole and the first signal line, the third sub-hole passes through the second insulating layer and the organic insulating layer, and the fourth sub-hole passes through the first insulating layer and the buffer layer; Wherein, the side wall of the third sub-hole is the surface of the second insulating layer.

10. The display panel according to claim 2, characterized in that: The display panel also includes a third opening passing through the first insulating layer, the organic insulating layer and the second insulating layer, the third opening is arranged corresponding to the second contact portion, one end of the second electrode is located on a side of the second insulating layer away from the organic insulating layer, and the other end of the second electrode passes through the third opening and is connected to the second contact portion.

11. The display panel according to claim 1 or 10, characterized in that: The thickness of the active layer is greater than or equal to 50 angstroms.

12. The display panel according to claim 1, characterized in that: The display panel further comprises a liquid crystal layer disposed on a side of the second conductive layer away from the substrate and an opposing substrate disposed on a side of the liquid crystal layer away from the second conductive layer, and the second electrode is the pixel electrode; Alternatively, the display panel further comprises a light-emitting functional layer disposed on a side of the second conductive layer away from the substrate and a cathode layer disposed on a side of the light-emitting functional layer away from the second conductive layer, and the second electrode is the anode.

13. A method for manufacturing a display panel, characterized in that: include: forming a first conductive layer on a substrate, wherein a data line is formed in the first conductive layer; An active layer is formed on a side of the first conductive layer away from the substrate, wherein the active layer has a channel portion and a first contact portion and a second contact portion connected to opposite sides of the channel portion; A second conductive layer is formed on a side of the active layer away from the first conductive layer, a first electrode and a second electrode are formed in the second conductive layer, the first electrode is connected to the first contact portion and the data line, the second electrode is connected to the second contact portion, and the second electrode includes a pixel electrode or an anode.

14. A display device, characterized in that: The display device comprises the display panel according to any one of claims 1 to 12, or a display panel manufactured by the method for manufacturing a display panel according to claim 13.

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