Voltage-adjustable DC-DC power supply circuit

Abstract

The invention relates to the technical field of voltage regulation, in particular to a voltage-adjustable DC-DC power supply circuit. The system comprises an input power supply detection module, a system power supply module, a voltage-adjustable DC-DC power supply module and a main control module, and the voltage-adjustable DC-DC power supply module comprises a DC-DC power supply sub-module, a DAC sub-module, an ADC sub-module and an OVP overvoltage hard alarm sub-module; when the input power supply is powered down, a system power supply power-down detection signal of the input power supply detection module outputs a low level and sends the low level to the main control module, and under the action of a delay circuit of the system power supply module, the main control module can close the output enabling pin within a preset time range and control the DAC sub-module to output the maximum voltage. Therefore, the output voltage of the DC-DC power supply sub-module does not exceed the preset voltage value during the power-off period of different voltage power supplies from the power failure of the input power supply to the power-off period of the system power supply module. According to the invention, high reliability and safety of the voltage-adjustable DC-DC power supply circuit are ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of voltage regulation, and in particular to a voltage-adjustable DC-DC power supply circuit. Background Art

[0002] The DC-DC power supply circuit is also called a DC-to-DC converter, or simply a DC-DC converter. The DC-DC power supply circuit takes a DC input voltage as input and outputs a different DC voltage. The output DC voltage can be higher or lower than the DC input voltage. The DC-DC power supply circuit is generally composed of a control chip, an inductor, a MOS tube, a diode, a resistor, a capacitor, etc. The use of the DC-DC power supply circuit is conducive to simplifying the power supply circuit design, shortening the development cycle, and achieving the best indicators. It is widely used in power electronics, military industry, scientific research and other fields, and has the characteristics of high reliability and easy system upgrade.

[0003] There are two commonly used digital adjustable voltage DC-DC converter design schemes. The first scheme is to use a digital potentiometer to adjust the voltage. Its disadvantage is that it is limited by the full-scale resistance and the number of taps. In particular, the maximum number of taps of the commonly used digital potentiometer is only 1024, which is equivalent to the adjustment accuracy of the 10-bit digital analog converter DAC, and cannot meet the adjustment step of less than 1mV in the range of 30V or even 15V. The second scheme is to use a digital analog converter DAC to adjust the voltage. The advantage is that there are many options for 16-bit digital analog converter DAC, and even 24-bit digital analog converter DAC can be selected, which can achieve high-precision voltage adjustment and make up for the shortcomings of the first scheme; however, when the digital analog converter DAC outputs 0V, the digital adjustable voltage DC-DC power supply circuit outputs the maximum value. Therefore, when the system suddenly loses power or the circuit is abnormal, the digital adjustable voltage DC-DC power supply circuit may output the maximum voltage, causing load damage, such as burning the display screen. Summary of the invention

[0004] Therefore, the technical problem to be solved by the present invention is to overcome the problem in the prior art that when the system suddenly loses power or the circuit is abnormal, the DC-DC power supply circuit may output the maximum voltage, causing load damage.

[0005] In order to solve the above technical problems, the present invention provides a voltage-adjustable DC-DC power supply circuit, comprising:

[0006] The input power detection module includes: an input power failure detection submodule, which is used to detect whether the input power is failed;

[0007] System power module, including:

[0008] The BUCK DC-DC submodule has a voltage input pin connected to the output power supply of the input power detection module, an enable pin connected to the delay circuit, and an output voltage pin outputs power supplies of different voltages, which supply power to different components in the input power detection module, the adjustable voltage DC-DC power supply module, and the main control module;

[0009] Adjustable voltage DC-DC power supply module, including:

[0010] A DC-DC power submodule, whose voltage input pin is connected to the output power of the input power detection module, whose enable pin is connected to the output enable pin of the main control module, whose feedback pin is connected to the DAC submodule, and whose output voltage pin is connected to the ADC submodule;

[0011] A main control module, whose power failure detection pin is connected to the input power failure detection submodule, and is connected to the DAC submodule and the ADC submodule through a serial communication protocol;

[0012] Among them, when the input power power-off detection submodule detects that the input power is off, the input power power-off detection submodule outputs a low level and sends a system power power-off detection signal to the main control module. Under the action of the delay circuit of the system power module, the main control module can turn off the output enable pin within a preset time range and control the DAC submodule to output the maximum voltage, so that during the period from the input power off to the power off of different voltage powers of the system power module, the output voltage of the DC-DC power submodule will not exceed the preset voltage value.

[0013] Preferably, the adjustable voltage DC-DC power supply module further includes:

[0014] OVP overvoltage hard alarm submodule, including:

[0015] An operational amplifier, wherein a non-inverting input port thereof is connected to an output power supply via a first voltage-dividing resistor and a second voltage-dividing resistor, and a reverse input port thereof is connected to a DAC submodule via a first current-limiting resistor;

[0016] An N-channel MOS tube, whose drain is connected to the main control module, whose source is grounded, and whose gate is connected to the output end of the operational amplifier via a second current limiting resistor;

[0017] The pull-up resistor has an input end connected to the N-channel MOS tube power supply output by the system power module, and an output end connected to the drain of the N-channel MOS tube.

[0018] Preferably, the input power detection module further comprises: an inrush current limiting submodule, a power limiting submodule, an undervoltage locking submodule and an overvoltage locking submodule.

[0019] Preferably, the input power detection module includes:

[0020] An LM5069 chip, wherein its input pin is connected to the output end of an input power supply, its undervoltage lockout pin is connected to the output end of a first external resistor voltage divider, its overvoltage lockout pin is connected to the output end of a second external resistor voltage divider, its timer pin is grounded after passing through a timing capacitor, its power limit pin is grounded after passing through a power limit resistor, its ground pin is grounded, its detection pin is connected to the output end of an input power supply through a current detection resistor, its power good detection pin is connected to a power power-off detection pin of a main control module through a third current limiting resistor, its power good detection pin is grounded through a third voltage divider resistor, and its power good detection pin is connected to the output power supply through a fourth voltage divider resistor, wherein the input ends of the first external resistor voltage divider and the second external resistor voltage divider are connected to the output end of the input power supply;

[0021] An external N-channel MOS tube, whose drain is connected to the output terminal of the input power supply, whose gate is connected to the gate drive output pin of the LM5069 chip, and whose source is connected to the output pin of the LM5069 chip;

[0022] A transient voltage suppressor, a cathode of which is connected to the output terminal of the input power supply and an anode of which is grounded;

[0023] An input capacitor, an input terminal of which is connected to the output terminal of the input power supply, and an output terminal of which is grounded;

[0024] A first clamping diode, an anode of which is connected to a power good detection pin of the LM5069 chip, and a cathode of which is connected to a clamping diode power supply output by a system power module;

[0025] A second clamping diode, whose anode is grounded and whose cathode is connected to a power good detection pin of the LM5069 chip;

[0026] An output capacitor with its positive pin connected to the output supply and its negative pin connected to ground.

[0027] Preferably, when the detection pin and the output pin of the LM5069 chip detect that the drain-source voltage of the external NMOS tube is greater than 2.5V, the power good detection pin is controlled to output a low level to the power failure detection pin of the main control module.

[0028] Preferably, the ADC submodule of the adjustable voltage DC-DC power supply module is any one of a 16-bit or higher monitor with output current, voltage and power alarm functions, and a current and voltage monitor circuit composed of a 16-bit or higher analog-to-digital converter and an operational amplifier.

[0029] Preferably, the DC-DC power submodule is any one of a synchronous BUCK DC-DC converter, an asynchronous BUCK DC-DC converter, a BOOST DC-DC converter and a BUCK-BOOST DC-DC converter.

[0030] Preferably, the main control chip used by the main control module is any one of MCU, ARM, FPGA and DSP.

[0031] Preferably, the main control module is connected to the DAC submodule and the ADC submodule via a serial communication protocol, and the serial communication protocol is any one of the SPI or I2C communication protocols.

[0032] Preferably, it comprises a plurality of adjustable voltage DC-DC power supply modules, wherein the plurality of adjustable voltage DC-DC power supply modules comprises n positive power adjustable voltage DC-DC power supply modules and m negative power adjustable voltage DC-DC power supply modules;

[0033] In each negative power adjustable voltage DC-DC power module, the output voltage of the DAC submodule is converted into a negative voltage with reference to the negative output power of the current negative power adjustable voltage DC-DC power module through an instrumentation operational amplifier, and then connected to the feedback pin of the DC-DC power submodule. The enable pin of the DC-DC power submodule receives a negative enable signal output by the output enable pin of the main control module with reference to the negative output power of the current negative power adjustable voltage DC-DC power module.

[0034] The above technical solution of the present invention has the following beneficial effects compared with the prior art:

[0035] An adjustable voltage DC-DC power supply circuit described in the present invention comprises an input power detection module, an adjustable voltage DC-DC power supply module, a main control module, and a system power supply module. When the main control module detects that the system power failure detection signal of the input power detection module outputs a low level, under the action of the delay circuit of the system power supply module, the main control module can turn off the output enable pin within a preset time range and control the DAC submodule to output a maximum voltage, so that during the period from the input power failure to the power failure of different voltage power supplies of the system power supply module, the output voltage of the DC-DC power supply submodule will not exceed the preset voltage value, thereby ensuring the high reliability and safety of the adjustable voltage DC-DC power supply circuit.

[0036] In addition, the adjustable voltage DC-DC power supply module also includes an OVP overvoltage hard alarm submodule. The DAC submodule outputs an overvoltage protection threshold voltage which is connected to the inverting input port of the operational amplifier of the OVP overvoltage hard alarm submodule after passing through a second current limiting resistor. The output power is connected to the non-inverting input port of the operational amplifier of the OVP overvoltage hard alarm submodule after passing through two voltage-dividing resistors. When it is detected that the output power supply voltage is greater than the output power supply voltage threshold, the operational amplifier of the OVP overvoltage hard alarm submodule outputs a high level, which is connected to the gate of the N-channel MOS tube of the OVP overvoltage hard alarm submodule after passing through the first current limiting resistor. The N-channel MOS tube of the OVP overvoltage hard alarm submodule is turned on, and the hard overvoltage alarm signal is pulled low and transmitted back to the main control module. After receiving the hard overvoltage alarm signal, the main control module will immediately perform the relevant shutdown operation. The OVP overvoltage hard alarm submodule provides an efficient and reliable protection means by monitoring and responding to overvoltage conditions. It can monitor the output voltage abnormality in real time and take measures when overvoltage occurs, thereby protecting the adjustable voltage DC-DC power supply module and the load. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to make the content of the present invention more clearly understood, the present invention is further described in detail below according to specific embodiments of the present invention in conjunction with the accompanying drawings, wherein:

[0038] Figure 1 The invention discloses a circuit diagram of a voltage-adjustable DC-DC power supply circuit.

[0039] Figure 2 The present invention is a multi-channel expansion architecture diagram of a voltage-adjustable DC-DC power supply circuit. DETAILED DESCRIPTION

[0040] The present invention is further described below in conjunction with the accompanying drawings and specific embodiments so that those skilled in the art can better understand the present invention and implement it, but the embodiments are not intended to limit the present invention.

[0041] Reference Figure 1 As shown, the first embodiment of the present invention provides an adjustable voltage DC-DC power supply circuit, including:

[0042] The input power detection module includes: an input power failure detection submodule, which is used to detect whether the input power is failed;

[0043] System power module, including:

[0044] The BUCK DC-DC submodule has a voltage input pin connected to the output power supply of the input power detection module, an enable pin connected to the delay circuit, and an output voltage pin outputs power supplies of different voltages, which supply power to different components in the input power detection module, the adjustable voltage DC-DC power supply module, and the main control module;

[0045] Adjustable voltage DC-DC power supply module, including:

[0046] A DC-DC power submodule, whose voltage input pin is connected to the output power of the input power detection module, whose enable pin is connected to the output enable pin of the main control module, whose feedback pin is connected to the DAC submodule, and whose output voltage pin is connected to the ADC submodule;

[0047] A main control module, whose power failure detection pin is connected to the input power failure detection submodule, and is connected to the DAC submodule and the ADC submodule through a serial communication protocol;

[0048] Among them, when the input power power-off detection submodule detects that the input power is off, the input power power-off detection submodule outputs a low level and sends a system power power-off detection signal to the main control module. Under the action of the delay circuit of the system power module, the main control module can turn off the output enable pin within a preset time range and control the DAC submodule to output the maximum voltage, so that during the period from the input power off to the power off of different voltage powers of the system power module, the output voltage of the DC-DC power submodule will not exceed the preset voltage value.

[0049] In this embodiment, preferably, the main control chip used by the main control module is any one of MCU, ARM, FPGA and DSP. MCU usually integrates the processor, memory and peripheral interface on one chip, reducing the complexity and cost of the system; ARM processor usually has high-performance computing capabilities, providing a good balance between performance and power consumption; FPGA can have hardware-level flexibility and parallel processing capabilities, and DSP can efficiently perform complex mathematical operations and has real-time processing capabilities.

[0050] In this embodiment, preferably, the main control module is connected to the DAC sub-module and the ADC sub-module through a serial communication protocol, and the serial communication protocol is any one of the SPI or I2C communication protocols. Using SPI can provide high speed and low latency, and using I2C only requires a simple connection and can provide lower power consumption.

[0051] In this embodiment, preferably, the input power detection module further includes: an inrush current limiting submodule, a power limiting submodule, an undervoltage locking submodule and an overvoltage locking submodule.

[0052] In this embodiment, preferably, the input power detection module includes:

[0053] LM5069 chip, its input pin VIN is connected to the output end VSYS-IN of the input power supply, its undervoltage lockout pin UVLO is connected to the output end of the first external resistor divider, its overvoltage lockout pin OVLO is connected to the output end of the second external resistor divider, its timer pin TIMER is grounded after passing through the timing capacitor Ctimer, its power limit pin PWR is grounded after passing through the power limit resistor Rpwr, its ground pin GND is grounded, its detection pin SENSE is connected to the output end VSYS-IN of the input power supply through the current detection resistor RSNS1, its power good detection pin PGD is connected to the power power failure detection pin VSYS-DETECT of the main control module through the third current limiting resistor R10, its power good detection pin PGD is grounded through the third voltage divider resistor R14, and its power good detection pin PGD is connected to the output power VSYS of the input power detection module through the fourth voltage divider resistor R3, wherein the input ends of the first external resistor divider and the second external resistor divider are connected to the output end VSYS-IN of the input power supply;

[0054] The external N-channel MOS tube has a drain connected to the output terminal VSYS-IN of the input power supply, a gate connected to the gate drive output pin GATE of the LM5069 chip, and a source connected to the output pin OUT of the LM5069 chip;

[0055] The transient voltage suppressor D1 has a cathode connected to the output terminal VSYS-IN of the input power supply and an anode connected to the ground. The transient voltage suppressor D1 is usually selected to have a reverse cutoff voltage about 3V greater than the input power supply VSYS-IN to suppress the large input voltage.

[0056] An input capacitor Cin2, an input end of which is connected to an output end VSYS-IN of an input power source, and an output end of which is grounded;

[0057] A first clamping diode, whose anode is connected to the power good detection pin PGD of the LM5069 chip, and whose cathode is connected to the clamping diode power supply VCC2V5 output by the system power module;

[0058] A second clamping diode, whose anode is grounded and whose cathode is connected to a power good detection pin PGD of the LM5069 chip;

[0059] The output capacitor Cout2 has a positive electrode pin connected to the output power VSYS of the input power detection module and a negative electrode pin connected to the ground.

[0060] In this embodiment, preferably, when the detection pin and the output pin of the LM5069 chip detect that the drain-source voltage of the external NMOS tube is greater than 2.5V, the power good detection pin is controlled to output a low level to the power failure detection pin of the main control module.

[0061] The input power detection module includes functions such as inrush current limiting, power limiting, undervoltage lockout (UVLO) and hysteresis, overvoltage lockout (OVLO) and hysteresis, and input power failure detection.

[0062] A first external resistor divider includes resistors R4 and R12, and sets an overvoltage lockout (OVLO) and hysteresis, and a second external resistor divider includes R5 and R13, and sets an undervoltage lockout (UVLO) and hysteresis;

[0063] The power limiting resistor RSNS1 is used to set the maximum output current limit; the current detection resistor Rpwr is used to set the maximum output power limit; the timing capacitor Ctimer is used to set the soft start time to reduce the output current pulse;

[0064] The input capacitor Cin2 and the output capacitor Cout2 can be matched with capacitors of various types and values ​​according to actual needs. Increasing the total capacitance of the output capacitor Cout2 can increase the delay time of power-off of the subsequent circuit when the input power supply VSYS-IN is shut down or suddenly loses power, so as to ensure that the main control module has enough time to complete a reasonable shutdown sequence;

[0065] The power good detection pin PGD is an open drain output. When the drain-source voltage VDS of the external N-channel MOS tube Q1 drops below 1.25V, the power good detection pin PGD outputs a high level. When the drain-source voltage VDS of the external N-channel MOS tube Q1 is higher than 2.5V, PGD outputs a low level. At the same time, VSYS-DETECT outputs a low level, triggering the system power failure protection.

[0066] D2 is a clamping diode, and a clamping diode model with a forward voltage VF of 0.9V is selected. The forward voltage VF is the voltage across the clamping diode when the clamping diode is in the forward conduction state to prevent the output voltage of the power good detection pin PGD from exceeding 3.4V. At the same time, the third current limiting resistor R10 limits the current to achieve the purpose of protecting the power failure detection pin VSYS-DETECT interface of the main control module.

[0067] The power failure detection pin VSYS-DETECT is a general purpose input and output pin GPIO.

[0068] The system power module includes a BUCK DC-DC power supply and two LDO power supplies. More power supplies can be added according to actual circuit requirements, which are not listed here one by one. Among them, the resistor R19 and the resistor R21 in the delay circuit of the system power module determine the voltage of VCC5-EN. The VCC5-EN voltage is set to be higher than the high threshold of the BUCK DC-DC sub-module enable pin EN. It is also necessary to meet the requirement that when the system power VSYS is powered off to less than 0.5*VSYS, the VCC5-EN voltage will be lower than the high threshold of the BUCKDC-DC sub-module enable pin EN, so as to achieve delayed power-off of VCC5V and its subsequent VCC3V3, VCC2V5, etc., so that the main control module has enough time to detect the system power power-off detection signal and complete the normal shutdown sequence in time, ensuring that the adjustable voltage DC-DC power supply circuit will not output abnormal voltage and signal, and ensuring the safety and reliability of the adjustable voltage DC-DC power supply circuit.

[0069] The system power supply module can output multiple channels of system power supplies with different voltages for use by other modules, including outputting multiple channels of positive power supplies with different voltages and multiple channels of negative power supplies with different voltages, depending on actual circuit design requirements.

[0070] The BUCK DC-DC submodule U3 of the system power module may be an asynchronous BUCK DC-DC or a synchronous BUCK DC-DC.

[0071] In this embodiment, preferably, the DC-DC power submodule is any one of a synchronous BUCK DC-DC converter, an asynchronous BUCK DC-DC converter, a BOOST DC-DC converter and a BUCK-BOOST DC-DC converter. At the same time, both a DC-DC converter that outputs a positive voltage and a DC-DC converter that outputs a negative voltage can be used, and the selection can be made according to actual output requirements.

[0072] In this embodiment, preferably, the ADC submodule of the adjustable voltage DC-DC power module is any one of a 16-bit or higher monitor with output current, voltage and power alarm functions, and a current and voltage monitor circuit composed of a 16-bit or higher analog-to-digital converter and an operational amplifier. When the ADC submodule of the adjustable voltage DC-DC power module is a 16-bit or higher monitor with output current, voltage and power alarm functions, it can be an INA226 chip.

[0073] In the adjustable voltage DC-DC power supply module, the input end of the pull-down resistor R8 of the output enable pin VOUT-EN of the main control module is connected to the output enable pin VOUT-EN of the main control module, and the output end is grounded. The main control module realizes the power-on and power-off timing of the output voltage pin VOUT of the DC-DC power supply submodule by controlling the output enable pin VOUT-EN.

[0074] The output voltage of the output voltage pin VOUT of the DC-DC power submodule is mainly determined by the three resistors R1, R6, and R7 and the fixed voltage reference VFB, and the output voltage DAC-VOUT of the DAC submodule. According to Kirchhoff's current theorem, the output formula is simplified to VOUT=AB*(DAC-VOUT), where A and B are constants composed of resistors R1, R6, R7 and VFB. When the output voltage DAC-VOUT of the DAC submodule is 0V, the output voltage pin VOUT outputs A, that is, the output voltage pin VOUT outputs the maximum voltage.

[0075] Resistor RSNS2 is a current sampling resistor, and resistor R2 is a current limiting resistor for voltage sampling. After the main control module detects the voltage and current of the output power supply VOUT-O through the ADC sub-module, the voltage and current of the output power supply VOUT-O are compared with the preset overvoltage, overcurrent, undervoltage, and undercurrent thresholds. When the voltage or current of the output power supply VOUT-O exceeds the corresponding alarm threshold, the main control module immediately triggers an overvoltage soft alarm, an overcurrent soft alarm, an undervoltage soft alarm, or an undercurrent soft alarm, and performs a corresponding shutdown operation.

[0076] The main control module configures the overcurrent alarm threshold to the ADC sub-module through the I2C interface. After the ADC sub-module detects the current of the output power supply VOUT-O, it compares the current of the output power supply VOUT-O with the preset overcurrent alarm threshold. When the current of the output power supply VOUT-O exceeds the overcurrent alarm threshold, the ADC sub-module immediately triggers an overcurrent hard alarm, pulls the overcurrent hard alarm signal ALERT-VOUT-OCP to a low level and transmits it back to the main control module, and the main control module immediately performs the corresponding shutdown operation.

[0077] The alarm speed of the ADC submodule is usually above 1ms, which is basically sufficient for overcurrent alarm. However, when an abnormal overvoltage occurs, the output may have reached the maximum voltage in 1ms. In order to increase the speed of overvoltage alarm, we simultaneously use high-performance operational amplifiers to build comparators to implement a 1us level OVP overvoltage hard alarm submodule.

[0078] In this embodiment, preferably, the adjustable voltage DC-DC power supply module further includes: an OVP overvoltage hard alarm submodule, including:

[0079] An operational amplifier OP1, whose in-phase input port is connected to the output power supply VOUT-O via a first voltage-dividing resistor R9 and a second voltage-dividing resistor R11, and whose inverting input port is connected to the DAC submodule via a first current-limiting resistor R15;

[0080] N-channel MOS transistor Q2, whose drain is connected to the main control module, whose source is grounded, and whose gate is connected to the output end of the operational amplifier OP1 through the second current limiting resistor R16;

[0081] The pull-up resistor R17 has an input end connected to the power supply VCC3V3 of the N-channel MOS tube Q2 output by the system power module, and an output end connected to the drain of the N-channel MOS tube.

[0082] When abnormal overvoltage occurs, that is, the voltage of the output power supply VOUT-O after being divided by the first voltage-dividing resistor R9 and the second voltage-dividing resistor R11 is greater than the overvoltage protection threshold voltage DAC-OVP-VSET, the operational amplifier OP1 outputs a high level through the second current-limiting resistor R16 to the gate of the N-channel MOS tube Q2. After the N-channel MOS tube Q2 is turned on, the hard overvoltage alarm signal ALERT-VOUT-OVP is pulled low and transmitted to the main control module, and the main control module immediately performs the corresponding shutdown operation.

[0083] The function of the pull-up resistor R17 is to ensure that the hard overvoltage alarm signal ALERT-VOUT-OVP remains at a high level during normal operation. The OVP overvoltage hard alarm submodule provides an efficient and reliable protection method by monitoring and responding to overvoltage conditions. It can monitor output voltage abnormalities in real time and take measures when overvoltage occurs, thereby protecting the adjustable voltage DC-DC power supply module and the load.

[0084] The operational amplifier of the OVP overvoltage hard alarm submodule is any one of OPA192, OPA2197, AD8602, SGM8249, etc., so that the output power supply can achieve the 1us level OVP overvoltage hard alarm function.

[0085] In the above-mentioned adjustable voltage DC-DC power supply circuit, when the detection pin SENSE and the output pin OUT of the LM5069 chip detect that the drain-source voltage VDS of the external NMOS tube is greater than 2.5V, the power good detection pin PGD is controlled to output a low level to the power failure detection pin VSYS-DETECT of the main control module;

[0086] Since the output power supply VSYS of the input power detection module has many large capacitors that need to be discharged, and under the effect of the delay circuit of the system power module, the VCC5V of the system power module and the subsequent VCC3V3, VCC2V5 and other power supplies will delay power-off for a certain period of time, such as more than 30ms;

[0087] The main control module can turn off the output enable pin VOUT-EN within a preset time range and control the DAC sub-module to output the maximum voltage DAC-VOUT, that is, the output voltage of the output voltage pin VOUT is 0V, so that during the period from the input power failure to the power failure of different voltage power supplies of the system power module, the output voltage of the DC-DC power sub-module will not exceed the preset voltage value, thereby ensuring the high reliability and safety of the adjustable voltage DC-DC power supply circuit and ensuring the safe operation of the load.

[0088] like Figure 2 As shown, Figure 2 The multi-channel expansion architecture diagram of the adjustable voltage DC-DC power supply circuit is shown in FIG. In the present embodiment, preferably, an adjustable voltage DC-DC power supply circuit includes a plurality of adjustable voltage DC-DC power supply modules, wherein the plurality of adjustable voltage DC-DC power supply modules include n positive power adjustable voltage DC-DC power supply modules and m negative power adjustable voltage DC-DC power supply modules;

[0089] In each negative power adjustable voltage DC-DC power module, the output voltage of the DAC submodule is converted into a negative voltage with reference to the negative output power of the current negative power adjustable voltage DC-DC power module through an instrumentation operational amplifier, and then connected to the feedback pin of the DC-DC power submodule. The enable pin of the DC-DC power submodule receives a negative enable signal output by the output enable pin of the main control module with reference to the negative output power of the current negative power adjustable voltage DC-DC power module.

[0090] The DC-DC power submodule voltage input pin of each adjustable voltage DC-DC power module is connected to the positive voltage power output by the input power detection module.

[0091] For example, when 7 positive voltage adjustable power supplies and 3 negative voltage adjustable power supplies are needed, then 7 positive voltage adjustable DC-DC power supply modules and 3 negative voltage adjustable DC-DC power supply modules are needed to form the overall circuit architecture;

[0092] The circuits of other modules are then increased according to actual needs. For example, if a negative power adjustable voltage DC-DC power supply module is added, the system power supply module needs to increase the output negative voltage power supply, etc.

[0093] Both SPI and I2C communication protocols can be used to connect multiple slave devices, and they each have different methods to select the corresponding slave device for communication. Among them, the hard overvoltage alarm signal ALERT-VOUT-OVP, the hard overcurrent alarm signal ALERT-VOUT-OCP, the system power failure detection signal VSYS-DETECT, etc. all use the independent GPIO pins of the main control module to realize the corresponding functions.

[0094] Obviously, the above embodiments are merely examples for the purpose of clear explanation and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection of the present invention.

Claims

1. A voltage-adjustable DC-DC power supply circuit, characterized in that: include: The input power detection module includes: an input power failure detection submodule, which is used to detect whether the input power is failed; System power module, including: The BUCK DC-DC submodule has a voltage input pin connected to the output power supply of the input power detection module, an enable pin connected to the delay circuit, and an output voltage pin outputs power supplies of different voltages, which supply power to different components in the input power detection module, the adjustable voltage DC-DC power supply module, and the main control module; Adjustable voltage DC-DC power supply module, including: A DC-DC power submodule, whose voltage input pin is connected to the output power of the input power detection module, whose enable pin is connected to the output enable pin of the main control module, whose feedback pin is connected to the DAC submodule, and whose output voltage pin is connected to the ADC submodule; A main control module, whose power failure detection pin is connected to the input power failure detection submodule, and is connected to the DAC submodule and the ADC submodule through a serial communication protocol; Among them, when the input power power-off detection submodule detects that the input power is off, the input power power-off detection submodule outputs a low level and sends a system power power-off detection signal to the main control module. Under the action of the delay circuit of the system power module, the main control module can turn off the output enable pin within a preset time range and control the DAC submodule to output the maximum voltage, so that during the period from the input power off to the power off of different voltage powers of the system power module, the output voltage of the DC-DC power submodule will not exceed the preset voltage value.

2. The adjustable voltage DC-DC power supply circuit according to claim 1, characterized in that: The adjustable voltage DC-DC power supply module also includes: OVP overvoltage hard alarm submodule, including: An operational amplifier, wherein a non-inverting input port thereof is connected to an output power supply via a first voltage-dividing resistor and a second voltage-dividing resistor, and a reverse input port thereof is connected to a DAC submodule via a first current-limiting resistor; An N-channel MOS tube, whose drain is connected to the main control module, whose source is grounded, and whose gate is connected to the output end of the operational amplifier via a second current limiting resistor; The pull-up resistor has an input end connected to the N-channel MOS tube power supply output by the system power module, and an output end connected to the drain of the N-channel MOS tube.

3. The adjustable voltage DC-DC power supply circuit according to claim 1, characterized in that: The input power detection module further includes: an inrush current limiting submodule, a power limiting submodule, an undervoltage locking submodule and an overvoltage locking submodule.

4. The voltage-adjustable DC-DC power supply circuit according to claim 1, characterized in that: The input power detection module comprises: An LM5069 chip, wherein its input pin is connected to the output end of an input power supply, its undervoltage lockout pin is connected to the output end of a first external resistor voltage divider, its overvoltage lockout pin is connected to the output end of a second external resistor voltage divider, its timer pin is grounded after passing through a timing capacitor, its power limit pin is grounded after passing through a power limit resistor, its ground pin is grounded, its detection pin is connected to the output end of an input power supply through a current detection resistor, its power good detection pin is connected to a power power-off detection pin of a main control module through a third current limiting resistor, its power good detection pin is grounded through a third voltage divider resistor, and its power good detection pin is connected to the output power supply through a fourth voltage divider resistor, wherein the input ends of the first external resistor voltage divider and the second external resistor voltage divider are connected to the output end of the input power supply; An external N-channel MOS tube, whose drain is connected to the output terminal of the input power supply, whose gate is connected to the gate drive output pin of the LM5069 chip, and whose source is connected to the output pin of the LM5069 chip; A transient voltage suppressor, a cathode of which is connected to the output terminal of the input power supply and an anode of which is grounded; An input capacitor, an input terminal of which is connected to the output terminal of the input power supply, and an output terminal of which is grounded; A first clamping diode, an anode of which is connected to a power good detection pin of the LM5069 chip, and a cathode of which is connected to a clamping diode power supply output by a system power module; A second clamping diode, whose anode is grounded and whose cathode is connected to a power good detection pin of the LM5069 chip; An output capacitor with its positive pin connected to the output supply and its negative pin connected to ground.

5. The voltage-adjustable DC-DC power supply circuit according to claim 4, characterized in that: When the detection pin and output pin of the LM5069 chip detect that the drain-source voltage of the external NMOS tube is greater than 2.5V, the power good detection pin is controlled to output a low level to the power failure detection pin of the main control module.

6. The voltage-adjustable DC-DC power supply circuit according to claim 1, characterized in that: The ADC submodule of the adjustable voltage DC-DC power supply module is any one of a 16-bit or higher monitor with output current, voltage and power alarm functions, and a current and voltage monitor circuit composed of a 16-bit or higher analog-to-digital converter and an operational amplifier.

7. The voltage-adjustable DC-DC power supply circuit according to claim 1, characterized in that: The DC-DC power submodule is any one of a synchronous BUCK DC-DC converter, an asynchronous BUCK DC-DC converter, a BOOST DC-DC converter and a BUCK-BOOST DC-DC converter.

8. The voltage-adjustable DC-DC power supply circuit according to claim 1, characterized in that: The main control chip used by the main control module is any one of MCU, ARM, FPGA and DSP.

9. The voltage-adjustable DC-DC power supply circuit according to claim 1, characterized in that: The main control module is connected to the DAC submodule and the ADC submodule via a serial communication protocol, and the serial communication protocol is any one of the SPI or I2C communication protocols.

10. The voltage-adjustable DC-DC power supply circuit according to claim 1, characterized in that: It includes a plurality of adjustable voltage DC-DC power supply modules, wherein the plurality of adjustable voltage DC-DC power supply modules include n positive power adjustable voltage DC-DC power supply modules and m negative power adjustable voltage DC-DC power supply modules; In each negative power adjustable voltage DC-DC power module, the output voltage of the DAC submodule is converted into a negative voltage with reference to the negative output power of the current negative power adjustable voltage DC-DC power module through an instrumentation operational amplifier, and then connected to the feedback pin of the DC-DC power submodule. The enable pin of the DC-DC power submodule receives a negative enable signal output by the output enable pin of the main control module with reference to the negative output power of the current negative power adjustable voltage DC-DC power module.

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