Method for constructing full-rank matrix by FPGA (Field Programmable Gate Array)
By performing segmentation processing and matrix summing of sampling points, the construction and inverse operation of full-rank matrix in FPGA is realized, which solves the problem that non-full-rank matrix cannot be inverted, reduces the circuit complexity and supports MVDR beamformer design.
Patent Information
- Application Number
- CN202411334337.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-24
- Publication Date
- 2024-12-13
AI Technical Summary
When implementing the MVDR beamformer in FPGA, it is necessary to calculate and inverse covariance matrix R, but due to its unknown nature, the number of sampling points must meet specific conditions to ensure reversibility. It is difficult for the prior art to effectively solve the problem that non-full rank matrices cannot be found. The problem of inverse.
By performing segmentation processing of sampling points, self-conjugated multiplication summation matrix summing, we can judge whether the summing times are greater than or equal to the matrix order, and design pipeline logic circuits in FPGA to realize full-rank construction and inverse operation of the matrix. Use RAM to cache and accumulate and sum up data to ensure that the matrix meets the inverse conditions.
It effectively solves the problem that non-full-rank matrix cannot be inverted in array signal processing, saves internal resources of FPGA, reduces circuit complexity, and provides implementation support for the design of MVDR beamformers.
Smart Images
Figure CN119135232A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of wireless communication technology, and in particular to a method for constructing a full-rank matrix using an FPGA. Background Art
[0002] MVDR beamformer is a commonly used signal processing technology. It suppresses interference signals and improves signal reception performance by adjusting the weights of array antennas. Its weight vector can be expressed as:
[0003] To implement the MVDR beamformer in FPGA, it is necessary to calculate and invert the covariance matrix R. In practice, the covariance matrix R is unknown and can be estimated by the spatial correlation matrix of a segment of data sampling points, namely: To ensure Reversible, the number of sampling points needs to satisfy (N represents the number of sampling points, M represents the matrix order). Summary of the invention
[0004] In order to solve the above problems, the present invention provides a method for constructing a full-rank matrix using FPGA, comprising the following steps: S1. segmenting the sampling points, performing self-conjugate multiplication on each point in each segment, and obtaining a single-point matrix in each independent space; S2. summing up the spatial matrices of the same position of each sampling point in each segment; S3. judging whether the number of summations is greater than or equal to the matrix order, and performing a matrix inversion operation.
[0005] Furthermore, the step S1 specifically includes the following sub-steps: constructing a formula according to the autocorrelation matrix: n =
[0006] x(n)x H (n); Get the autocorrelation matrix r of each independent element n : In the above formula, x(n) represents the sample subspace matrix; x H (n) represents the conjugate transpose of the sample subspace matrix; a1, a2, L, a n They are all sampling points in independent spaces.
[0007] Furthermore, the S2 step specifically includes the following sub-steps: S21. Cache the n matrices of the first subspace into the original RAM at one time, and the depth of the RAM is n; S22. When the next subspace matrix collection arrives, read the cached data from the original RAM in advance, and sum it with the current subspace matrix at the same position; S23. Store the summed result into the original RAM in order.
[0008] Furthermore, the step S3 specifically includes the following sub-steps: S31. Repeat step S2 and determine whether the number of summations is greater than or equal to the matrix order; S32. Store the matching result in another RAM and clear the data stored in the original RAM; S33. Perform the next round of cumulative summation operation; S34. Perform matrix inversion operation on the matrix collection stored in another RAM.
[0009] Furthermore, the matrix collection stored in another RAM is specifically: within a period of time, a set of full-rank matrix collections of the total sample data space all satisfy the matrix inversion condition.
[0010] Furthermore, the original RAM is specifically RAM_TmpData; the other RAM is specifically RAM_ResData.
[0011] The present invention provides a method for constructing a full-rank matrix using FPGA, which has the following beneficial effects:
[0012] The present invention is used to construct a full-rank matrix, which solves the problem that a non-full-rank matrix cannot be inverted in array signal processing, and provides implementation support for designing an MVDR beamformer. The pipeline design method is adopted, which greatly saves FPGA internal resources and reduces circuit complexity. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.
[0014] Figure 1 A flow chart for constructing a full rank matrix provided by the present invention;
[0015] Figure 2 This is a schematic diagram of sample space division provided by the present invention. DETAILED DESCRIPTION
[0016] It should be understood that the specific embodiments described herein are only used to explain the present invention, and are not used to limit the present invention.
[0017] The following is a detailed description of the implementation method of the present invention in conjunction with the accompanying drawings. Only some embodiments are described, not all embodiments. For the purpose of clarity, representations and descriptions that are not related to the present invention are omitted in the drawings and descriptions.
[0018] In order to have a clearer understanding of the technical features, purposes and beneficial effects of the present invention, the technical solution of the present invention is now described in detail below. Obviously, the implementation cases described are part of the embodiments of the present invention, not all of the embodiments, and cannot be understood as limiting the scope of the implementation of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work belong to the protection scope of the present invention.
[0019] like Figure 1 , Figure 2 As shown, the present invention is implemented through the following technical solutions: (a) the sampling points are processed in segments, and each point in the segment is self-conjugate multiplied under clock drive to obtain a single-point matrix of each independent space; (b) the spatial matrices of the same position of each sampling point in each segment are summed up respectively, and the data are stored in the RAM space. When the number of summations satisfies N≥M, the data is stored in another RAM space to obtain a full-rank matrix of a set of sample spaces, which can be used for matrix inversion operations.
[0020] Wherein, step (a) comprises the following steps:
[0021] (a1) The total sample data space is represented by X, and the segmented sample space is represented by X N , each sample space contains elements {x1, x2, L, x n}, each independent element contains sample points {a1, a2, L, a n}.
[0022] (a2) Construct the formula based on the autocorrelation matrix:
[0023] r n =N(n)x H (n)
[0024] Get the autocorrelation matrix r of each independent element n :
[0025]
[0026] The matrix obtained at this time is the autocorrelation matrix of each independent element, which does not meet the inversion condition. Therefore, it is necessary to perform the next step through step (b) to complete the construction of the full rank matrix.
[0027] Step (b) comprises the following steps:
[0028] (b1) Through step (a2), the autocorrelation matrix set {r1, r2, L, r n} (n),According to the pipeline form, the n matrices of the first subspace are first cached into RAM_TmpData in sequence, with a RAM depth of n.
[0029] (b2) When the next subspace matrix set {r1, r2, L, r n} (2) When it arrives, the cached data is read out from RAM_TmpData in advance, and summed with the current subspace matrix at the same position, and the summation result is stored in RAM_TmpData again in order.
[0030] (b3) Repeat step (b2) until the number of summations is not less than the matrix order. At this time, the summation result is stored in another RAM_ResData, and the data in RAM_TmpData is cleared to zero, and the next round of cumulative summation operation can be performed. The matrix collection stored in RAM_ResData is a set of full-rank matrices in the total sample data space within a period of time.
[0031] All of them satisfy the matrix inversion conditions.
[0032] The logic circuit design is completed in FPGA according to the above steps to realize the construction of full-rank matrix and achieve the purpose of designing MVDR beamformer.
[0033] Example: Taking the construction of a 4-order full-rank matrix as an example, with 4 accumulations as the minimum requirement, the implementation steps are as follows:
[0034] (a1) The total sample data space is represented by X, and the segmented sample space is represented by X N , each sample space contains elements {x1, x2, L, x 10}, each independent element contains the sample points {a1, a2, a3, a4}.
[0035] (a2) Construct the formula based on the autocorrelation matrix: n =x(n)x H (n); get the autocorrelation matrix r of each independent element n :
[0036] (b1) Through step (a2), the autocorrelation matrix set {r1, r2, L, r 10} (n) , according to the pipeline form, first the n matrices {r1, r2, L, r 10} (1) Cache them into RAM_TmpData in sequence, with a RAM depth of 10.
[0037] (b2) When the next subspace matrix set {r1, r2, L, r 10} (2) When it arrives, the cached data is read out from RAM_TmpData in advance, and summed with the current subspace matrix at the same position, and the summation result is stored in RAM_TmpData again in order.
[0038] (b3) Repeat step (b2) until the summation reaches 4 times, that is, {r1, r2, L, r i0} (4) After the calculation is completed and step (b2) is entered, the summation result is stored in another RAM_ResData, and the data in RAM_TmpData is cleared to zero, and a new round of cumulative summation operation can be performed. The matrix collection stored in RAM_ResData is a set of full-rank matrices of the total sample data space within a period of time, expressed as:
[0039]
[0040] In summary, the present invention can be well implemented.
[0041] The above is only a preferred embodiment of the present invention. It should be understood that the present invention is not limited to the form disclosed herein, and should not be regarded as excluding other embodiments, but can be used in various other combinations, modifications and environments, and can be modified within the scope of the concept described herein through the above teachings or the technology or knowledge of the relevant field. The changes and modifications made by those skilled in the art shall not deviate from the spirit and scope of the present invention, and shall be within the scope of protection of the claims attached to the present invention.
Claims
1. A method for constructing a full-rank matrix using FPGA. It is characterized in that The following steps are involved: S1. Segment the sampling points, perform self-conjugate multiplication on each point in each segment, and obtain a single point matrix in each independent space; S2. sum the spatial matrices of the same position of each sampling point respectively; S3. Determine whether the number of summations is greater than or equal to the matrix order, and perform a matrix inversion operation.
2. The method for constructing a full-rank matrix using FPGA according to claim 1, It is characterized in that The step S1 specifically includes the following sub-steps: constructing a formula according to the autocorrelation matrix: n =x(n)x H (n); Get the autocorrelation matrix r of each independent element n : In the above formula, x(n) represents the sample subspace matrix; x H (n) represents the conjugate transpose of the sample subspace matrix; a 1 , a 2 , L, a n They are all sampling points in independent spaces.
3. The method for constructing a full-rank matrix using FPGA according to claim 1, It is characterized in that The S2 step specifically includes the following sub-steps: S21. cache the n matrices of the first subspace into the original RAM at once, and the depth of the RAM is n; S22. When the next subspace matrix collection arrives, the cache data is read out from the original RAM in advance and summed with the current subspace matrix at the same position; S23. Store the summation results into the original RAM in order.
4. The method for constructing a full-rank matrix using FPGA according to claim 1, It is characterized in that The S3 step specifically includes the following sub-steps: S31. Repeat step S2 and determine whether the number of summations is greater than or equal to the matrix order; S32. The matching result is stored in another RAM, and the data stored in the original RAM is cleared; S33. Perform the next round of cumulative summation operation; S34. Perform matrix inversion operation on the matrix collection stored in another RAM.
5. The method for constructing a full-rank matrix using FPGA according to claim 4, It is characterized in that The matrix collection stored in another RAM is specifically: within a period of time, a set of full-rank matrix collections of the total sample data space all satisfy the matrix inversion condition.
6. The method for constructing a full-rank matrix using FPGA according to claim 5, It is characterized in that The original RAM is specifically RAM_TmpData; the other RAM is specifically RAM_ResData.