Server, network-on-chip system and message processing equipment and method

Abstract

The invention discloses a server, a network-on-chip system and a message processing device and method, and is applied to the technical field of computers, the message processing device is arranged in the network-on-chip system, and the network-on-chip system further comprises a scheduling device and N processor cores serving as N request nodes; the scheduling device is respectively connected with the message processing equipment and the N request nodes; a cache is arranged in each of the N request nodes; n is a positive integer, and the message processing equipment comprises an addressing device, a directory control device, a message loading device, a message processing device and a message generating device, so as to form a five-stage pipeline structure. According to the scheme of the invention, the message processing equipment with a five-stage pipeline structure is arranged, so that the message processing efficiency among the multi-core processors can be effectively improved, the delay is reduced, and meanwhile, the cache consistency is also ensured.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a server, a network-on-chip system, and a message processing device and method. Background Art

[0002] With the continuous development of computer technology, multi-core processors have been widely used to improve the performance of computing systems. Multi-core processors integrate multiple processor cores on the same chip, which can effectively provide higher computing performance and throughput by executing multiple tasks in parallel.

[0003] However, the introduction of multi-core processors has also brought a series of new challenges, one of which is the cache consistency problem. In a multi-core processor, each processor core has its own cache. Since each processor core can modify the data in the cache independently, and these modifications may not be immediately reflected in the cache of other processor cores, data inconsistency will occur. There are some studies on the cache consistency problem in multi-core processors. For example, through the use of commonly customized cache consistency protocols, such as ACE (Advanced Coherent Extensions) protocol and MESI (Modified Exclusive-Shared-Invalid) protocol, these protocols define the communication and cooperation rules between the processor cores in the multi-core processor to ensure cache consistency. However, in the current solution, the message throughput is low and the message processing delay is high.

[0004] In summary, how to effectively improve the message processing efficiency between multi-core processors, reduce latency, and ensure cache consistency is a technical problem that technical personnel in this field urgently need to solve. Summary of the invention

[0005] The object of the present invention is to provide a server, a network-on-chip system, and a message processing device and method, so as to effectively improve the message processing efficiency between multi-core processors, reduce latency, and ensure cache consistency.

[0006] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0007] In a first aspect, the present invention provides a message processing device, the message processing device is arranged in a network-on-chip system, the network-on-chip system further comprises a scheduling device and N processor cores as N request nodes; the scheduling device is respectively connected to the message processing device and the N request nodes; the N request nodes are each provided with a cache; N is a positive integer, and the message processing device comprises:

[0008] an addressing device, configured to load a message used in a read transaction or a write transaction initiated by the requesting node when receiving the message used in the read transaction or the write transaction through the scheduling device, and send the loaded message to the directory control device;

[0009] The directory control device is used for, after receiving any of the messages, recording the address of the message in the address occupation library when the message carries an address and the address of the message is not recorded in the address occupation library of the directory control device, and determining that the address of the message is occupied when the message carries an address and the address of the message is recorded in the address occupation library; and deleting the address of the message recorded in the address occupation library to release the occupation when the read transaction or the write transaction corresponding to the message is completed;

[0010] A message loading device, used for receiving the message sent by the directory control device, and when the address of the message is occupied, sending the message back to the address taking device, otherwise sending the message to the message processing device;

[0011] The message processing device is used to process the received message based on a preset processing rule for maintaining the consistency of the cache and generate corresponding parameter information;

[0012] A message generating device, used for generating a message to be output based on the parameter information and outputting it to a corresponding requesting node through the scheduling device;

[0013] Among them, the addressing device, the directory control device, the message loading device, the message processing device and the message generating device in the message processing device constitute a five-stage pipeline structure.

[0014] On the other hand, the directory control device is also used for:

[0015] After receiving any of the messages, when the message carries an address, obtaining directory information corresponding to the address of the message from the directory stored in itself and sending it to the message processing device;

[0016] Maintaining a directory; wherein the directory is a directory recording data states corresponding to multiple addresses of the cache in each of the requesting nodes;

[0017] The message processing device is specifically used for:

[0018] Based on a preset processing rule for maintaining the consistency of the cache and the directory information sent by the directory control device, the received message is processed to generate corresponding parameter information;

[0019] The directory update information in the parameter information is fed back to the directory control device, so that the directory control device maintains the directory based on the directory update information.

[0020] On the other hand, after receiving any of the messages, when the message carries an address, obtaining directory information corresponding to the address of the message from the directory stored in itself and sending it to the message processing device, including:

[0021] After receiving any of the messages, when the message carries an address, determining whether the address of the message exists in the directory stored in itself;

[0022] If it exists, obtaining directory information corresponding to the address of the message from the directory and sending it to the message processing device;

[0023] If not, directory information indicating that the address does not hit is sent to the message processing device.

[0024] On the other hand, directory maintenance is performed, including:

[0025] After receiving the directory update information, determining whether the address carried in the directory update information exists in the directory stored in itself;

[0026] If so, based on the directory update information, updating the content in the directory corresponding to the address carried in the directory update information;

[0027] If not, determining whether the directory storage space preset for storing the directory is full;

[0028] If the storage space is not full, the remaining space is used to store the directory update information;

[0029] If the directory is full, the directory update information is stored in a data overwrite manner.

[0030] On the other hand, the message processing device also includes a first-in first-out memory;

[0031] When the address of the message is occupied, sending the message back to the address taking device comprises:

[0032] When the address of the message is occupied, the message is sent to a first-in first-out memory, so that the message is sent back to the addressing device through the first-in first-out memory.

[0033] On the other hand, the addressing device is specifically used for:

[0034] When the scheduling device receives the message used in the read transaction or the write transaction initiated by the request node, the message used in the read transaction or the message used in the write transaction is loaded in order according to the preset priority rule, and the loaded message is sent to the directory control device.

[0035] On the other hand, message types include request messages, response messages, listening messages, and data messages;

[0036] The priority rule used by the addressing device is: the response message has the first priority, the data message has the second priority, the message sent by the directory control device has the third priority, and the request message has the fourth priority.

[0037] On the other hand, the directory control device is communicatively connected with the message generating device;

[0038] When the read transaction or write transaction corresponding to the message is completed, the directory control device deletes the recorded address of the message to release the address, including:

[0039] When it is determined based on the release signal sent by the message generation device that the read transaction or the write transaction corresponding to the message is completed, the address of the message recorded in the address occupation library is deleted to release the occupation.

[0040] On the other hand, it also includes: a cache output circuit connected to the message generating device;

[0041] The message generating device is specifically used for:

[0042] Generate a message to be output based on the parameter information;

[0043] Each message to be output is placed into the cache output circuit, so that the cache output circuit is used to gradually output each message to be output to the corresponding request node through the scheduling device.

[0044] On the other hand, it also includes: slave nodes connected to the memory and the scheduling device respectively, so as to realize communication with the message processing device through the scheduling device;

[0045] The message processing device is also used to: read and write the memory through communication with the slave node during processing of the read transaction and the write transaction initiated by each of the requesting nodes.

[0046] On the other hand, when processing a first read transaction directed to a first address initiated by any one of the requesting nodes, the message processing device is specifically configured to:

[0047] Based on the communication with N request nodes, the latest data in the first address is fed back to the request node that initiates the first read transaction, and the data status corresponding to the first address in the cache of the request node is set to an exclusive state, and the data status corresponding to the first address in the cache of the remaining request nodes is set to an invalid state, and the data in the memory is updated.

[0048] On the other hand, when processing a second read transaction directed to a second address initiated by any one of the requesting nodes, the message processing device is specifically configured to:

[0049] Based on the communication with the N requesting nodes, the latest data in the second address is fed back to the requesting node that initiates the second read transaction, the data status corresponding to the second address in the cache of each requesting node is maintained, and the data in the memory is updated.

[0050] On the other hand, when processing a first write transaction initiated by any one of the requesting nodes and directed to a third address, the message processing device is specifically configured to:

[0051] Based on the communication with N request nodes, the latest data is written to the third address of the cache of the request node that sends the first write transaction, and the data status corresponding to the third address in the cache of the request node is set to an exclusive state, and the data status corresponding to the third address in the cache of the remaining request nodes is set to an invalid state.

[0052] On the other hand, when processing a second write transaction directed to a fourth address initiated by any one of the requesting nodes, the message processing device is specifically configured to:

[0053] Based on the communication with the N requesting nodes, the latest data is written to the fourth address of the cache of the requesting node that sends the second write transaction, and the data status corresponding to the fourth address in the cache of each requesting node is maintained.

[0054] In a second aspect, the present invention provides a network-on-chip system, comprising a message processing device as described above, and also comprising a scheduling device and N processor cores serving as N request nodes; the scheduling device is respectively connected to the message processing device and the N request nodes; a cache is provided in each of the N request nodes; and N is a positive integer.

[0055] In a third aspect, the present invention provides a server, comprising the network-on-chip system as described above.

[0056] In a fourth aspect, the present invention provides a message processing method, which is applied to a message processing device, wherein the message processing device is arranged in an on-chip network system, and the on-chip network system further includes a scheduling device and N processor cores as N request nodes; the scheduling device is respectively connected to the message processing device and the N request nodes; a cache is arranged in each of the N request nodes; N is a positive integer, and the message processing method comprises:

[0057] When the addressing device receives the message used in the read transaction or the write transaction initiated by the requesting node through the scheduling device, the addressing device loads the message used in the read transaction or the message used in the write transaction, and sends the loaded message to the directory control device;

[0058] After receiving any of the messages, the directory control device records the address of the message in the address occupation library when the message carries an address and the address of the message is not recorded in the address occupation library of the directory control device; when the message carries an address and the address of the message is recorded in the address occupation library, determines that the address of the message is occupied; when the read transaction or the write transaction corresponding to the message is completed, deletes the address of the message recorded in the address occupation library to release the occupation;

[0059] The message loading device receives the message sent by the directory control device, and when the address of the message is occupied, sends the message back to the address taking device, otherwise sends the message to the message processing device;

[0060] The message processing device processes the received message based on a preset processing rule for maintaining the consistency of the cache, and generates corresponding parameter information;

[0061] The message generating device generates a message to be output based on the parameter information and outputs it to the corresponding requesting node through the scheduling device;

[0062] Among them, the addressing device, the directory control device, the message loading device, the message processing device and the message generating device in the message processing device constitute a five-stage pipeline structure.

[0063] By applying the technical solution provided by the embodiment of the present invention, the message processing efficiency is effectively improved and the consistency of the cache is guaranteed through the message processing device with a five-stage pipeline structure. Specifically, N processor cores can all be used as request nodes to initiate read transactions and write transactions. The scheduling device is connected to the message processing device and the N request nodes respectively, thereby realizing the communication between the message processing device and the N request nodes.

[0064] The message processing device includes an addressing device, a directory control device, a message loading device, a message processing device and a message generating device to realize message processing. Specifically, the addressing device can load messages used in read transactions and messages used in write transactions, and send the loaded messages to the directory control device. In order to avoid access conflicts, the directory control device will perform conflict judgment after receiving any message. Specifically, when the message carries an address and the address of the message is not recorded in the address occupation library of the directory control device, it means that the address can be read / written at present, so the address of the message can be recorded in the address occupation library. Correspondingly, when the message carries an address and the address of the message is recorded in the address occupation library, it is determined that the address of the message is occupied. For this occupied situation, the message loading device will send the message back to the addressing device, and if it is not occupied, the message can be sent to the message processing device. In addition, when the read transaction or write transaction corresponding to the message is executed, the address of the message recorded in the address occupation library can be deleted to release the occupation. In order to ensure the consistency of the cache, the message processing device will process the received message based on the preset processing rules for maintaining the consistency of the cache, generate the corresponding parameter information, and finally the message generation device will generate the message to be output based on the parameter information and output it. It can be seen that the five devices in the message processing device work together to effectively realize the processing of the message, and these five devices can work at the same time, forming a five-level pipeline structure, which can effectively improve the message throughput and reduce the message processing delay.

[0065] In summary, in the solution of the present application, by setting up a message processing device with a five-stage pipeline structure, it is possible to effectively improve the message processing efficiency between multi-core processors, reduce latency, and at the same time ensure cache consistency. BRIEF DESCRIPTION OF THE DRAWINGS

[0066] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0067] Figure 1 A schematic diagram of the structure of a network-on-chip system provided by a specific implementation mode of the present invention;

[0068] Figure 2 A schematic diagram of the structure of a message processing device provided in a specific embodiment of the present invention;

[0069] Figure 3A schematic diagram of the structure of a message processing device provided in another specific embodiment of the present invention;

[0070] Figure 4 A schematic diagram of the structure of a network-on-chip system provided by another specific embodiment of the present invention;

[0071] Figure 5 A schematic diagram of message transmission during the execution of a first read transaction provided by a specific implementation manner of the present invention;

[0072] Figure 6 A schematic diagram of message transmission during the execution of a second read transaction provided by a specific implementation manner of the present invention;

[0073] Figure 7 The present invention is a flowchart of a method for processing a message according to a specific embodiment of the present invention. DETAILED DESCRIPTION

[0074] The core of the present invention is to provide a server, an on-chip network system and a message processing device and method. By setting up a message processing device with a five-stage pipeline structure, the message processing efficiency between multi-core processors can be effectively improved, the delay can be reduced, and at the same time, cache consistency can be guaranteed.

[0075] In order to enable those skilled in the art to better understand the scheme of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0076] Please refer to Figure 1 and Figure 2 , Figure 1 A schematic diagram of the structure of a network-on-chip system provided by a specific embodiment of the present invention is shown in FIG. Figure 2 The present invention provides a structural diagram of a message processing device according to a specific embodiment of the present invention.

[0077] The message processing device 30 of the present application is arranged in the on-chip network system, and the on-chip network system also includes a scheduling device 20 and N processor cores 10 as N request nodes; N is a positive integer usually not less than 2. The scheduling device 20 is connected to the message processing device 30 and the N request nodes respectively to realize the communication between the message processing device 30 and the N request nodes; the N processor cores 10 are all provided with caches, that is, the N request nodes are all provided with caches. In practical applications, the cache consistency of each request node can be maintained by monitoring requests and directory control.

[0078] The message processing device 30 is used to process read transactions and write transactions initiated by each requesting node, and to maintain the consistency of the cache of each requesting node. For example, in practical applications, the message processing device 30 of the present application can be implemented based on devices such as FPGA (Field Programmable Gate Array).

[0079] Specifically, the message processing device 30 includes:

[0080] The addressing device 31 is used to load the message used in the read transaction or the message used in the write transaction when receiving the message used in the read transaction or the message used in the write transaction initiated by the requesting node through the scheduling device 20, and send the loaded message to the directory control device 32;

[0081] The directory control device 32 is used to, after receiving any message, record the address of the message in the address occupation library when the message carries an address and the address of the message is not recorded in the address occupation library of the directory control device 32; when the message carries an address and the address of the message is recorded in the address occupation library, determine that the address of the message is occupied; when the read transaction or write transaction corresponding to the message is completed, delete the address of the message recorded in the address occupation library to release the occupation;

[0082] The message loading device 33 is used to receive the message sent by the directory control device 32, and when the address of the message is occupied, send the message back to the addressing device 31, otherwise send the message to the message processing device 34;

[0083] The message processing device 34 is used to process the received message based on the preset processing rules for maintaining the consistency of the cache and generate corresponding parameter information;

[0084] A message generating device 35, used to generate a message to be output based on the parameter information and output it to the corresponding request node through the scheduling device 20;

[0085] Among them, the addressing device 31, the directory control device 32, the message loading device 33, the message processing device 34 and the message generating device 35 in the message processing device 30 form a five-stage pipeline structure.

[0086] Specifically, in Figure 1 In the example shown in FIG. 4 , four processor cores 10 are shown, that is, N=4. Each processor core 10 can be used as a request node. Figure 1 The four processor cores 10 may also be respectively referred to as request node 1, request node 2, request node 3 and request node 4. The message processing device 30 is used as a master node, that is, the message processing device 30 of the present application may be referred to as a master node.

[0087] For each processor core 10, a cache is provided and cache consistency can be achieved through snooping requests and directory control.

[0088] The scheduling device 20 is connected to the message processing device 30 and the N request nodes respectively to realize the communication between the message processing device 30 and the N request nodes. That is to say, after the message sent by the message processing device 30 arrives at the scheduling device 20, it can be sent by the scheduling device 20 to the designated request node. Similarly, after the message sent by the request node arrives at the scheduling device 20, it can be sent by the scheduling device 20 to the message processing device 30. When the scheduling device 20 receives messages sent by multiple request nodes, it can send them to the message processing device 30 in sequence based on the set scheduling rules. The specific scheduling rules can be set according to actual needs, for example, it can be simply set to send in the order of receiving time.

[0089] The message processing device 30 must not only be able to process read transactions and write transactions initiated by each request node, but also be able to maintain the consistency of the cache of each request node. For example, in one scenario, the message processing device 30 can implement communication and processing messages with N request nodes in accordance with the CHI protocol to ensure cache consistency.

[0090] The CHI (Coherent Hub Interface) protocol provides high scalability and flexibility and can be applied to high-performance multi-core processor systems. The message processing device 30 is responsible for managing cache line status, processing access requests, coordinating data transmission and synchronization operations. Therefore, the design of the message processing device 30 determines the cache coherence management method and data access efficiency of the on-chip network system of the multi-core processor.

[0091] In this regard, the message processing device 30 designed in the present application adopts a five-level pipeline structure consisting of an addressing device 31, a directory control device 32, a message loading device 33, a message processing device 34 and a message generating device 35, which effectively ensures the message processing efficiency. In addition, the on-chip network system of the present application also has good scalability and does not limit the number of request nodes. The scheduling device 20 can connect more request nodes according to actual needs, that is, support more processor cores 10, so that the scalability and flexibility of the present application solution are very high.

[0092] The addressing device 31 is used to load the message used in the read transaction and the message used in the write transaction, and send the loaded message to the directory control device 32. Taking the read transaction as an example, Figure 1The four processor cores in the system can all serve as request nodes (Request Node, RN) for sending read requests, and the addressing device 31 is responsible for processing request messages from any request node.

[0093] Regardless of the specific type of protocol used, there are usually multiple types of messages used in read transactions and messages used in write transactions, using different channels. For example, when using the CHI protocol, messages can be classified into four categories according to the channel, namely request messages (request channel), response messages (response channel), data messages (data channel) and listening messages (listening channel). Figure 3 In FIG. 1 , the input end of the addressing device 31 shows a request channel, a response channel and a data channel.

[0094] In a specific implementation of the present invention, the addressing device 31 can be specifically used for:

[0095] When the scheduling device 20 receives the message used in the read transaction or the write transaction initiated by the requesting node, the message used in the read transaction or the message used in the write transaction is processed, the message order is loaded according to the preset priority rules, and the loaded message is sent to the directory control device 32.

[0096] When the addressing device 31 loads the messages used in the read transaction and the messages used in the write transaction, a simple way is to load them in the order in which the messages arrive. However, this implementation method takes into account that multiple messages are involved in the execution of a read transaction or a write transaction, and when the protocols used are different and the specific read / write types of the read / write transactions are different, the messages involved in the execution process may be different. The addressing device 31 may receive messages belonging to different read / write transactions at the same time. If the messages are loaded in the order in which they arrive, the optimal message processing efficiency may not be achieved.

[0097] In this regard, in this implementation, the order of message loading can be performed according to the preset priority rules, which is conducive to improving processing efficiency and ensuring flexibility. Of course, the specific priority rules can be set and adjusted according to the specific adopted protocol and actual needs to achieve the best message processing efficiency. For example, in one scenario, considering that a certain processor core is set as a processor core that carries important services, the messages originating from this processor core can be processed first.

[0098] In a specific embodiment of the present invention, when the message types include request messages, response messages, monitoring messages and data messages, the priority rules used by the addressing device 31 are specifically: the response message has the first priority, the data message has the second priority, the message sent by the directory control device 32 has the third priority, and the request message has the fourth priority.

[0099] In this implementation, the response message is the first priority, that is, the highest priority, followed by the data message, and the message sent by the directory control device 32, and the lowest priority is the request message. As described above, in the execution process of a read transaction or a write transaction, multiple messages will be involved, and when the specific type of the read / write transaction is different, the messages involved in its execution process are different. The read / write transaction usually starts with a request message and ends with a response message. Therefore, in this implementation, the response message is set as the message with the highest priority, and the request message is set as the message with the lowest priority. For example, in this implementation, the addressing device 31 receives a response message and a request message at the same time. It can be understood that the transaction corresponding to the response message is in the process of execution or is about to end, and the transaction corresponding to the request message has just started to execute. That is to say, the transaction corresponding to the response message occurs first, and the transaction corresponding to the request message occurs later. And because address conflicts need to be avoided when executing transactions, the transaction executed first will occupy the address. Therefore, in this example, the response message should be executed first.

[0100] The priority order of the data message and the message sent by the directory control device 32 can be set as needed. In this implementation, considering that the data message is usually a message that appears near the end of the transaction execution process, the data message is set to a higher second priority.

[0101] Each time the addressing device 31 loads a message, it sends the loaded message to the directory control device 32. In order to avoid address conflicts, after receiving any message, when the message carries an address, the directory control device 32 needs to determine the address conflict situation.

[0102] Specifically, the directory control device 32 will store the currently occupied address, specifically in the address occupation library. Therefore, when the message carries an address and the address of the message is not recorded in the address occupation library of the directory control device 32, it means that the address is not occupied. At this time, it is necessary to record the address of the message in the address occupation library so that other transactions cannot read and write the address before the transaction corresponding to the message is executed.

[0103] Correspondingly, when the message carries an address and the address of the message is recorded in the address occupation library, it means that the address of the message is currently occupied, that is, there is an address conflict. At this time, the message will be sent back to the addressing device 31 by the message loading device 33.

[0104] Furthermore, it is understandable that when a read transaction or a write transaction corresponding to a message is completed, the address of the message recorded in the address occupation database needs to be deleted to release the occupation of the address.

[0105] It should also be noted that not all messages need to carry addresses. For example, when the above-mentioned CHI protocol is used, only request messages carry addresses, and other types of messages do not carry addresses.

[0106] Regardless of whether the address is occupied or not, the directory control device 32 needs to send the message to the message loading device 33. Of course, the information whether the address is occupied also needs to be sent to the message loading device 33. For example, in a specific scenario, the directory control device 32 uses the level state of a specially set address_busy pin to reflect whether there is an address conflict. If a message does not carry an address or the carried address does not conflict with the address occupied library, the level of the address_busy pin is pulled high. Correspondingly, if a message carries an address and conflicts with the address occupied library, the level of the address_busy pin is pulled low.

[0107] After the directory control device 32 sends the message and the judgment result of whether the address of the message is occupied to the message loading device 33, if the address of the message is occupied, the message loading device 33 will send the message back to the addressing device 31. Conversely, if the message does not carry an address or the carried address is not occupied, the message needs to be sent to the message processing device 34.

[0108] In a specific embodiment of the present invention, please refer to Figure 3 , the message processing device 30 also includes a first-in first-out memory 36;

[0109] Correspondingly, when the address of the message is occupied, the message is sent back to the address taking device, specifically including:

[0110] When the address of the message is occupied, the message is sent to the first-in first-out memory 36 so that the message can be sent back to the addressing device 31 through the first-in first-out memory 36 .

[0111] In this implementation, considering that in situations with high concurrency, there may be more messages that need to be sent back to the addressing device 31 by the message loading device 33, in order to avoid the accumulation of messages affecting the operation of the message loading device 33 or the addressing device 31, in this implementation, a first-in-first-out memory 36 is set in the message processing device 30 for temporary storage of messages, and since it is a first-in-first-out memory 36, it can be understood that the message placed first in the first-in-first-out memory 36 will be taken out first.

[0112] Since the FIFO memory 36 is provided in this embodiment, the message loading device 33 can send messages to the FIFO memory 36, which can cope with the possible accumulation of large amounts of messages without affecting the normal operation of the message loading device 33 and the addressing device 31.

[0113] After receiving the message, the message processing device 34 can process the received message, and needs to process the message based on the preset processing rules for maintaining cache consistency. Of course, when the adopted protocol is different and the specific processed message type is different, the parameter information generated after processing will be correspondingly different. For example, after processing the request message, the parameter information generated may include the protocol specified field, the current processing status of the transaction, the input field opcode, the number of nodes that need to output the message for monitoring, etc.

[0114] In a specific embodiment of the present invention, the directory control device 32 is in communication connection with the message generation device 35;

[0115] When the read transaction or write transaction corresponding to the message is completed, the directory control device 32 deletes the address of the recorded message to release the occupation, which specifically includes:

[0116] When it is determined based on the release signal sent by the message generation device 35 that the read transaction or write transaction corresponding to the message has been completed, the address of the message recorded in the address occupation library is deleted to release the occupation.

[0117] As described above, when a read transaction or write transaction corresponding to a message is completed, the directory control device 32 needs to delete the address of the message recorded in the address occupation library to release the occupation of the address. This embodiment takes into account that in specific implementation, the message generation device 35 can inform the directory control device 32 of this situation.

[0118] Specifically, the directory control device 32 is in communication with the message generation device 35. When a read transaction or a write transaction corresponding to a message is completed, the message generation device 35 can send a release signal to the directory control device 32, and the directory control device 32 can determine which address needs to be released based on the release signal, that is, determine which address should be deleted from the address occupation library.

[0119] In a specific embodiment of the present invention, the directory control device 32 is further used for:

[0120] After receiving any message, when the message carries an address, the directory information corresponding to the address of the message is obtained from the directory stored in itself and sent to the message loading device 33;

[0121] Maintaining a directory; wherein the directory is a directory that records data states corresponding to multiple cached addresses in each requesting node;

[0122] The message processing device 34 is specifically used for:

[0123] Based on the preset processing rules for maintaining cache consistency and the directory information sent by the directory control device 32, the received message is processed to generate corresponding parameter information;

[0124] The directory update information in the parameter information is fed back to the directory control device 32, so that the directory control device 32 maintains the directory based on the directory update information.

[0125] As described above, the message processing device 34 needs to process the received message based on the preset processing rules for maintaining the consistency of the cache. This implementation method takes into account that when executing a read / write transaction of a request node while maintaining the consistency of the cache, it often involves the need to monitor the data status of the cache of other nodes. In this regard, in this implementation method, a directory is maintained in the directory control device 32, which is a directory that records the data status of multiple cached addresses in each request node, and is therefore conducive to further improving transaction execution efficiency.

[0126] Specifically, the directory maintained by the directory control device 32 can usually be in the form of a table, where each row corresponds to an address. For example, the content of a row in the table is specifically: address A, request node 1-I state, request node 2-I state, request node 3-SD state, which means that for the cached address A, the data state of the cache of request node 1 at this address is I state, that is, invalid state, the data state of the cache of request node 2 at this address is also I state, that is, invalid state, and the data state of the cache of request node 3 at this address is SD state, that is, dirty state, indicating that for the cached address A, the latest data is in the cache of request node 3.

[0127] For example, in one example, request node 1 sends a request message, specifically, it needs to read the data at address A. It can be seen from the above directory that for address A, the latest data is in request node 3, so it only needs to generate a monitoring message and send it to request node 3, and there is no need to monitor request node 2. If the directory is not set or the directory does not hit, the message processing device 30 does not know the data status in the cached address A of request node 2 and request node 3, so it needs to generate a monitoring message and send it to request nodes 2 and 3 respectively. It can be seen that compared with the latter case, the former case is more conducive to ensuring transaction execution efficiency.

[0128] In addition, it is understandable that, since the storage space of the directory control device 32 is limited, that is, the capacity of the directory is limited, it is not necessarily possible to record the data status corresponding to each cached address in each request node in the directory. Of course, if the capacity allows, the data status corresponding to each cached address in each request node can be recorded, and the directory miss will not occur.

[0129] After receiving any message, if the message carries an address, it means that it is a request type message. Therefore, the directory control device 32 can obtain the directory information corresponding to the address of the message from the directory stored in itself, and then send it to the message processing device 34, so that the message processing device 34 can use the obtained directory information to process the message.

[0130] In addition, it can be understood that, since a directory is set in the directory control device 32 of this embodiment, if the parameter information obtained by the message processing device 34 contains directory update information, the directory update information needs to be fed back to the directory control device 32, so that the directory control device 32 performs directory maintenance based on the directory update information. For example, after executing a certain message, the data status of each request node corresponding to the cached address A in the above example is changed, and the directory update information needs to be fed back to the directory control device 32.

[0131] Further, in a specific embodiment of the present invention, after receiving any message, when the message carries an address, the directory control device 32 obtains directory information corresponding to the address of the message from the directory stored in itself and sends it to the message processing device 34, specifically including:

[0132] After receiving any message, when the message carries an address, determine whether the address of the message exists in the directory stored in itself;

[0133] If it exists, the directory information corresponding to the address of the message is obtained from the directory and sent to the message processing device 34;

[0134] If it does not exist, directory information indicating that the address does not hit is sent to the message processing device 34.

[0135] This implementation takes into account that when sending directory information, due to the limited storage space of the directory control device 32, the data status corresponding to each cached address in each request node may not be recorded in the directory. Therefore, for a message carrying an address, if the address of the message exists in the directory stored by the directory control device 32 itself, the directory information corresponding to the address of the message can be obtained from the directory and sent to the message processing device 34. If it does not exist, it means that the address does not hit the directory. Therefore, in this implementation, directory information indicating that the address does not hit is sent to the message processing device 34, so that the message processing device 34 can clearly understand that the current directory is a missed directory. In addition, in some implementations, if the address does not hit the directory, it can also be selected not to output any directory information, and it can be set according to actual needs.

[0136] In a specific implementation of the present invention, the directory control device 32 performs directory maintenance, which may specifically include:

[0137] After receiving the directory update information, determine whether the address carried in the directory update information exists in the directory stored in itself;

[0138] If it exists, based on the directory update information, update the content in the directory corresponding to the address carried in the directory update information;

[0139] If it does not exist, determining whether the directory storage space preset for storing the directory is full;

[0140] If it is not full, the remaining space is used to store directory update information;

[0141] If the memory is full, the directory update information is stored in a data overwrite manner.

[0142] The directory update information carries an address. In this implementation, after receiving the directory update information, it can be determined whether the address carried in the directory update information exists in the directory stored in itself. If so, it means that the address hits the directory, that is, the directory records the data status corresponding to this cached address in each request node. Therefore, after obtaining the directory update information, it is necessary to update the data status of each request node corresponding to this address in the directory according to the directory update information. For example, in one scenario, the request node 1-I state in address A in the above example is updated to the request node 1-SD state.

[0143] If the address carried in the directory update information does not exist in the directory, it is necessary to determine whether the directory storage space is full. It is understandable that if it is not full, the remaining space can be used to store the directory update information, that is, the directory update information can be written into the directory. If it is full, it is necessary to store the directory update information in a data overwrite manner. For example, in the above example, the directory is stored in the form of a table. For example, a total of 1,000 lines of content can be stored, and each line includes 1 address and the data status of each request node cached at the address. Then one of the lines can be deleted and the directory update information can be stored. In addition, it is understandable that when deleting, you can choose to delete those that have not been used for a long time.

[0144] In a specific implementation of the present invention, it may also include: a cache output circuit 37 connected to the message generating device 35;

[0145] Accordingly, the message generating device 35 is specifically used for:

[0146] Generate a message to be output based on parameter information;

[0147] Each message to be output is placed into the cache output circuit 37, so that the cache output circuit 37 can be used to gradually output each message to be output to the corresponding request node through the scheduling device 20.

[0148] See also Figure 3 ,exist Figure 3In the example, the message generation device 35 can output the corresponding type of message through the request channel, the data channel, the response channel and the monitoring channel, and this implementation method takes into account that the message generation device 35 often generates multiple messages to be output at the same time. If the message generation device 35 outputs these messages to be output one by one, the message generation device 35 will be unable to process the parameter information newly sent by the message processing device 34, which will cause the pipeline to stagnate. Therefore, in this implementation method, the messages to be output generated by the message processing device 34 can be directly placed in the cache output circuit 37, and then the cache output circuit 37 is used to gradually output each message to be output without affecting the work of the message generation device 35, so that the five-stage pipeline structure of the present application can operate continuously. And it can be understood that the cache output circuit 37 can gradually output each cached message to be output according to the first-in-first-out rule.

[0149] In order to facilitate understanding of the five-stage pipeline structure composed of the addressing device 31, directory control device 32, message loading device 33, message processing device 34 and message generating device 35 in the message processing device 30, the following is an example of a request message sent by a request node.

[0150] In the first clock cycle, the message loading device 33 loads the REQ message, i.e., the request message, and sends it to the directory control device 32. In the second clock cycle, the directory control device 32 determines whether the address of the request message is occupied. For example, if the determination result is that the address is not occupied, the directory control device 32 will send the request message and the determination result to the message loading device 33. In the third clock cycle, the message loading device 33 sends the request message to the message processing device 34. In the fourth clock cycle, the message processing device 34 processes the request message. For example, in a specific example, based on whether the directory is hit, it is determined that a listening request needs to be sent to a corresponding number of request nodes, and corresponding parameter information is generated. The parameter information may specifically include the opcode (type) of the listening request to be sent, the number of request nodes to be listened to, and the id of each request node to be listened to, the id of the message processing device 30, the id of the request message, the current transaction status of the request message, the opcode (type) of the request message, and the like. In the fifth clock cycle, the message generating device 35 generates a message to be output and sends it to the cache output circuit 37 .

[0151] Let's take a request node sending a response message as an example for explanation.

[0152] In the first clock cycle, the message loading device 33 loads the RSP message, i.e., the response message, and sends it to the directory control device 32. In the second clock cycle, since the response message does not need to judge the address, the directory control device 32 sends the response message to the message loading device 33. In the third clock cycle, the message loading device 33 sends the response message to the message processing device 34. In the fourth clock cycle, the message processing device 34 processes the response message. For example, in a specific example, it determines whether the response message needs to be processed according to the opcode of the response message, and then generates corresponding parameter information. The parameter information may specifically include: corresponding transaction information extracted from the response message, update information on the number of request nodes to be monitored, data status information of the cache of the monitored request node at the corresponding address, etc. In the fifth clock cycle, the message generating device 35 generates a message to be output and sends it to the cache output circuit 37. For example, in one scenario, in the fifth clock cycle, the message generating device 35 may also send a release signal to the message generating device 35 to release the occupation of the corresponding address.

[0153] Let's take a request node sending a data message as an example for explanation.

[0154] In the first clock cycle, the message loading device 33 loads the data message and sends it to the directory control device 32. In the second clock cycle, since the data message does not need to judge the address, the directory control device 32 sends the data message to the message loading device 33. In the third clock cycle, the message loading device 33 sends the data message to the message processing device 34. In the fourth clock cycle, the message processing device 34 processes the data message. For example, in a specific example, the data message is processed according to the protocol requirements to generate corresponding parameter information. If dirty data is written back, it is also necessary to initiate a write request to the memory. The parameter information may specifically include: corresponding transaction information extracted from the data message, update information on the number of request nodes to be monitored, data status information of the cache of the monitored request node at the corresponding address, etc. In the fifth clock cycle, the message generation device 35 generates a message to be output and sends it to the cache output circuit 37. For example, in one scenario, in the fifth clock cycle, the message generation device 35 can also send a release signal to the message generation device 35 to release the occupation of the corresponding address.

[0155] In a specific embodiment of the present invention, please refer to Figure 4 , may also include: a slave node 40 connected to the memory and the scheduling device 20 respectively, so as to realize communication with the message processing device 30 through the scheduling device 20;

[0156] The message processing device 30 is also used to read and write the memory through communication with the slave node 40 during the process of processing the read transaction and the write transaction initiated by each requesting node.

[0157] This implementation takes into account that the solution of the present application can ensure the consistency of the cache of each requesting node, and in some implementations, when the data in the cache is updated, the relevant data needs to be written to the memory.

[0158] In this implementation, a slave node 40 connected to the memory and the scheduling device 20 is provided. The slave node 40 can communicate with the message processing device 30 through the scheduling device 20, which is equivalent to realizing the communication between the message processing device 30 and the memory.

[0159] Therefore, in this implementation, when processing read transactions and write transactions, the message processing device 30 can perform read operations or write operations on the memory according to actual needs through communication with the slave node 40.

[0160] Further, in a specific implementation of the present invention, when processing a first read transaction directed to a first address initiated by any requesting node, the message processing device 30 is specifically configured to:

[0161] Based on the communication with N request nodes, the latest data in the first address is fed back to the request node that initiates the first read transaction, and the data status corresponding to the first address in the cache of the request node is set to an exclusive state, and the data status corresponding to the first address in the cache of the remaining request nodes is set to an invalid state, and the data in the memory is updated.

[0162] Easy to understand Figure 5 For example, in this embodiment, Figure 5 The first read transaction directed to the first address initiated by the requesting node 1 indicates that the requesting node 1 needs to read the data in the first address of the cache, and after reading, needs to change to exclusive use of the data by itself.

[0163] In this regard, in this implementation, the message processing device 30 can feed back the latest data in the first address to the requesting node that initiates the first read transaction based on the communication with the N requesting nodes, and set the data state corresponding to the first address in the cache of the requesting node to an exclusive state. Since the data content is exclusively occupied by the requesting node 1, the data state corresponding to the first address in the cache of the remaining requesting nodes is set to an invalid state, and the memory needs to be updated.

[0164] For this type of read transaction, Figure 5In the example, request node 1 sends a request message of the ReadUnique type (read and exclusive) to the message processing device 30, and for example hits the directory, and the directory shows that for the first address, request node 2 is in the SC state and request node 3 is in the SD state, which means that the latest data is stored in request node 3. The message processing device 30 needs to send monitoring messages (monitoring channels) to request node 2 and request node 3 respectively. After receiving the monitoring message, request node 2 will modify the data state corresponding to the first address in its own cache from the SC state to the invalid state, i.e., the I state, and reply with a response message. After receiving the monitoring message, request node 3 will modify the data state corresponding to the first address in its own cache from the SD state to the invalid state, i.e., the I state, and reply with a data message, which carries the data that request node 1 needs to read.

[0165] After receiving the feedback from the requesting nodes 2 and 3, the message processing device 30 can send a data message to the requesting node 1 that initiated the first read transaction, and because there is dirty data written back, it is necessary to send a request message to the slave node 40. After the slave node 40 feeds back a response message indicating that the data can be sent, the message processing device 30 will send a data message to the slave node 40 to write the data into the memory. Finally, after receiving the data message sent by the message processing device 30, the requesting node 1 can store the corresponding data at the first address in its own cache, and change the data state corresponding to the first address in its own cache from the I state to the U state, i.e., the exclusive state, and send a response message to the message processing device 30 to indicate the end of the first read transaction.

[0166] In a specific implementation of the present invention, when processing a second read transaction directed to a second address initiated by any requesting node, the message processing device 30 is specifically configured to:

[0167] Based on the communication with N request nodes, the latest data in the second address is fed back to the request node that initiates the second read transaction, the data status corresponding to the second address in the cache of each request node is maintained, and the data in the memory is updated.

[0168] Easy to understand Figure 6 For example, in this embodiment, Figure 6 The second read transaction directed to the second address initiated by the requesting node 1 indicates that the requesting node 1 needs to read the data in the second address of the cache, but does not adjust any data status after the reading.

[0169] In this regard, in this implementation, the message processing device 30 can feed back the latest data in the second address to the request node that initiates the second read transaction based on the communication with N request nodes, maintain the data status corresponding to the second address in the cache of each request node, and update the data in the memory.

[0170] For this type of read transaction, Figure 6 In the example, request node 1 sends a ReadOnce type (read only) request message to message processing device 30. For example, the directory hits, and the directory shows that for the second address, request node 3 is in I state and request node 2 is in SD state, which means that the latest data is stored in request node 2. In this example, no data state adjustment is required, and the latest data is stored in request node 2. Therefore, message processing device 30 only needs to send a monitoring message to request node 2. After receiving it, request node 2 will reply with a data message, which carries the data that request node 1 needs to read.

[0171] After receiving the feedback from the requesting node, the message processing device 30 can send a data message to the requesting node 1 that initiated the second read transaction, and because there is dirty data written back, it needs to send a request message to the slave node 40. After the slave node 40 feeds back a response message indicating that the data can be sent, the message processing device 30 will send a data message to the slave node 40 to write the corresponding data into the memory. Finally, after receiving the data message, the requesting node 1 can obtain the required data, and does not adjust the data state corresponding to the second address in the cache of the requesting node 1, that is, Figure 6 In the example, it is still in state I. And the requesting node 1 will send a response message to the message processing device 30 to indicate that the second read transaction is completed.

[0172] In a specific implementation of the present invention, when processing a first write transaction initiated by any requesting node and directed to a third address, the message processing device 30 is specifically configured to:

[0173] Based on the communication with N request nodes, the latest data is written to the third address of the cache of the request node that sends the first write transaction, and the data status corresponding to the third address in the cache of the request node is set to an exclusive state, and the data status corresponding to the third address in the cache of the remaining request nodes is set to an invalid state.

[0174] In this implementation, the message processing device 30 can write the latest data to the third address of the cache of the request node that sends the first write transaction based on the communication with N request nodes, and set the data status corresponding to the third address in the cache of the request node to an exclusive state. Since it is monopolized by the request node, the data status corresponding to the third address in the cache of each remaining request node needs to be set to an invalid state.

[0175] For this type of write transaction, for example, in one scenario, the request node 1 sends a request message of the WriteUnique type (write and exclusive) to the message processing device 30. The message processing device 30 requires the remaining request nodes to send monitoring messages so that the remaining request nodes set the data state corresponding to the third address in their own cache to the I state, and reply to the response message to the message processing device 30. After the message processing device 30 receives the feedback from all the request nodes, it can send a response message to the request node 1 that initiated the first write transaction, and the request node 1 can send the data to be written to the message processing device 30 in the form of a data message. Subsequently, the message processing device 30 will write the latest data to the third address of the cache of the request node 1, and the data state corresponding to the third address in the cache of the request node 1 needs to be set to the exclusive state. In addition, in some implementation methods, the latest data written can also be written to the memory.

[0176] In a specific implementation of the present invention, when processing a second write transaction initiated by any requesting node and directed to the fourth address, the message processing device 30 is specifically configured to:

[0177] Based on the communication with the N requesting nodes, the latest data is written to the fourth address of the cache of the requesting node that sends the second write transaction, and the data status corresponding to the fourth address in the cache of each requesting node is maintained.

[0178] In this implementation, the message processing device 30 can write the latest data to the fourth address of the cache of the request node that sends the second write transaction based on the communication with the N request nodes, and maintain the data state corresponding to the fourth address in the cache of each request node. It can be understood that since it is necessary to maintain the data state corresponding to the fourth address in the cache of each request node, this type of write transaction can only be initiated by the request node in the U state or SD state. In addition, it can be understood that for this type of write transaction, the message processing device 30 does not need to monitor other request nodes during execution. In addition, in some implementations, the latest data written can also be written to the memory.

[0179] As described above, after receiving the message, the message processing device 34 can process the received message, and needs to process the message based on the preset processing rules for maintaining cache consistency, and when the adopted protocol is different and the specific processed message type is different, the parameter information generated after processing will be correspondingly different.

[0180] In a specific implementation of the present invention, after receiving the request message, the message processing device 34 can record part of the parameter information based on the table entry, so as to facilitate the management of the parameter information and the updating of the relevant parameters.

[0181] Please refer to Table 1, which is a schematic table of items generated in a specific implementation method.

[0182] Table 1:

[0183]

[0184] The transaction status is the transaction status of a read transaction or a write transaction, which occupies 1 bit and is located at bit 0 of the table entry. For example, during the transaction processing, the value of this bit remains 1, and after the entire transaction processing is completed, the value of this bit is 0.

[0185] Bits 1 to 7 represent the transaction type, such as the different types of read / write transactions exemplified above, and it is understandable that in other specific implementations, there may be other types of read / write transactions.

[0186] Bits 8 and 9 indicate the number of request nodes to be monitored, which is 4 at most. In other implementations, if the number of processor cores exceeds 4, more bits are required for this item.

[0187] The 11th to 18th bits represent the data status of the address of the request message in the cache of each request node. Two bits can be used to represent the data status of the address of the request message in the cache of one request node. The 11th to 18th bits correspond to request node 1 to request node 4 respectively.

[0188] Bits 19 to 55 represent the address, that is, the address of the cache pointed to by the read / write transaction, that is, the address carried in the request message. If other transactions need to operate on this address, other transactions cannot operate on this address before this transaction ends.

[0189] By applying the technical solution provided in the embodiment of the present invention, the message processing efficiency is effectively improved through the message processing device 30 with a five-stage pipeline structure, and the consistency of the cache is guaranteed.

[0190] Specifically, N processor cores can all serve as request nodes to initiate read transactions and write transactions. The scheduling device 20 is connected to the message processing device 30 and the N request nodes respectively, thereby realizing communication between the message processing device 30 and the N request nodes.

[0191] The message processing device 30 includes an addressing device 31, a directory control device 32, a message loading device 33, a message processing device 34 and a message generating device 35 to realize message processing. Specifically, the addressing device 31 can load messages used in read transactions and messages used in write transactions, and send the loaded messages to the directory control device 32. In order to avoid access conflicts, the directory control device 32 will perform conflict judgment after receiving any message. Specifically, when the message carries an address and the address of the message is not recorded in the address occupation library of the directory control device 32, it means that the address can be read / written at present, so the address of the message can be recorded in the address occupation library. Correspondingly, when the message carries an address and the address of the message is recorded in the address occupation library, it is determined that the address of the message is occupied. For this occupied situation, the message loading device 33 will send the message back to the addressing device 31, and if it is not occupied, the message can be sent to the message processing device 34. In addition, when the read transaction or write transaction corresponding to the message is completed, the address of the message recorded in the address occupancy library can be deleted to release the occupancy. In order to ensure the consistency of the cache, the message processing device 34 will process the received message based on the preset processing rules for maintaining the consistency of the cache, generate the corresponding parameter information, and finally the message generation device 35 will generate the message to be output based on the parameter information and output it. It can be seen that the five devices in the message processing device 30 work together to effectively realize the processing of the message, and the five devices can work simultaneously to form a five-stage pipeline structure, which can effectively improve the message throughput and reduce the message processing delay.

[0192] In summary, in the solution of the present application, by setting up a message processing device 30 with a five-stage pipeline structure, it is possible to effectively improve the message processing efficiency between multi-core processors, reduce latency, and at the same time ensure cache consistency.

[0193] Corresponding to the above embodiment of the message processing device 30, an embodiment of the present invention also provides an on-chip network system, which may include a message processing device 30 as in any of the above embodiments, and also includes a scheduling device 20 and N processor cores 10 as N request nodes; the scheduling device 20 is respectively connected to the message processing device 30 and the N request nodes; a cache is set in each of the N request nodes; N is a positive integer.

[0194] Corresponding to the above embodiments of the message processing device 30 and the network-on-chip system, the embodiment of the present invention further provides a server, which may include the network-on-chip system in any of the above embodiments, and may be referred to in correspondence with the above.

[0195] Corresponding to the above embodiment of the message processing device 30, the embodiment of the present invention further provides a message processing method, which can be applied to the processing device 30, see Figure 7 , including the following steps:

[0196] Step S701: when the addressing device receives a message used in a read transaction or a write transaction initiated by a requesting node through the scheduling device, the addressing device loads the message used in the read transaction or the message used in the write transaction, and sends the loaded message to the directory control device;

[0197] Step S702: after receiving any message, the directory control device records the address of the message in the address occupation library when the message carries an address and the address of the message is not recorded in the address occupation library of the directory control device; when the message carries an address and the address of the message is recorded in the address occupation library, it is determined that the address of the message is occupied; when the read transaction or write transaction corresponding to the message is executed, the address of the message recorded in the address occupation library is deleted to release the occupation;

[0198] Step S703: the message loading device receives the message sent by the directory control device, and when the address of the message is occupied, sends the message back to the address taking device, otherwise sends the message to the message processing device;

[0199] Step S704: the message processing device processes the received message based on a preset processing rule for maintaining cache consistency, and generates corresponding parameter information;

[0200] Step S705: The message generation device generates a message to be output based on the parameter information and outputs it to the corresponding request node through the scheduling device;

[0201] Among them, the addressing device, directory control device, message loading device, message processing device and message generating device in the message processing device constitute a five-stage pipeline structure.

[0202] In a specific embodiment of the present invention, it also includes:

[0203] After receiving any message, when the message carries an address, the directory control device obtains directory information corresponding to the address of the message from the directory stored in itself and sends it to the message processing device;

[0204] The directory control device performs directory maintenance; wherein the directory is a directory that records the data status corresponding to multiple cached addresses in each request node;

[0205] Step S704 specifically includes:

[0206] The message processing device processes the received message based on the preset processing rules for maintaining cache consistency and the directory information sent by the directory control device to generate corresponding parameter information;

[0207] The message processing device feeds back the directory update information in the parameter information to the directory control device, so that the directory control device maintains the directory based on the directory update information.

[0208] In a specific embodiment of the present invention, after receiving any message, when the message carries an address, the directory control device obtains directory information corresponding to the address of the message from the directory stored in itself and sends it to the message processing device, including:

[0209] After receiving any message, the directory control device determines whether the address of the message exists in the directory stored in itself when the message carries an address;

[0210] If it exists, obtaining directory information corresponding to the address of the message from the directory and sending it to the message processing device;

[0211] If it does not exist, directory information indicating that the address does not hit is sent to the message processing device.

[0212] In a specific implementation of the present invention, the directory control device performs directory maintenance, including:

[0213] After receiving the directory update information, the directory control device determines whether the address carried in the directory update information exists in the directory stored in itself;

[0214] If it exists, based on the directory update information, update the content in the directory corresponding to the address carried in the directory update information;

[0215] If it does not exist, determining whether the directory storage space preset for storing the directory is full;

[0216] If it is not full, the remaining space is used to store directory update information;

[0217] If the memory is full, the directory update information is stored in a data overwrite manner.

[0218] In a specific implementation of the present invention, the message processing device further includes a first-in first-out memory;

[0219] When the address of the message is occupied, sending the message back to the address taking device described in step S703 may specifically include:

[0220] When the address of the message is occupied, the message is sent to the first-in first-out memory, so that the message is sent back to the addressing device through the first-in first-out memory.

[0221] In a specific implementation of the present invention, step S701 specifically includes:

[0222] When a message used in a read transaction or a write transaction initiated by a requesting node is received through the scheduling device, the message used in the read transaction or the message used in the write transaction is loaded in order according to a preset priority rule, and the loaded message is sent to the directory control device.

[0223] In a specific implementation of the present invention, the message types include request messages, response messages, monitoring messages and data messages;

[0224] The priority rule used by the addressing device is: the response message is the first priority, the data message is the second priority, the message sent by the directory control device is the third priority, and the request message is the fourth priority.

[0225] In a specific embodiment of the present invention, the directory control device is communicatively connected with the message generation device;

[0226] When the read transaction or write transaction corresponding to the message described in step S702 is completed, the directory control device deletes the address of the recorded message to release the occupation, including:

[0227] When it is determined based on the release signal sent by the message generating device that the read transaction or the write transaction corresponding to the message has been completed, the address of the message recorded in the address occupation library is deleted to release the occupation.

[0228] In a specific embodiment of the present invention, it also includes: a cache output circuit connected to the message generating device;

[0229] Step S705 specifically includes:

[0230] The message generating device generates a message to be output based on the parameter information;

[0231] The message generation device places each message to be output into the cache output circuit, so as to use the cache output circuit to gradually output each message to be output to the corresponding request node through the scheduling device.

[0232] In a specific embodiment of the present invention, it also includes: slave nodes connected to the memory and the scheduling device respectively, so as to realize communication with the message processing device through the scheduling device;

[0233] The message processing method also includes: the message processing device reads and writes the memory through communication with the slave node during the process of processing the read transaction and the write transaction initiated by each request node.

[0234] In a specific implementation of the present invention, when processing a first read transaction directed to a first address initiated by any requesting node, the message processing device specifically includes:

[0235] Based on the communication with N request nodes, the latest data in the first address is fed back to the request node that initiates the first read transaction, and the data status corresponding to the first address in the cache of the request node is set to an exclusive state, and the data status corresponding to the first address in the cache of the remaining request nodes is set to an invalid state, and the data in the memory is updated.

[0236] In a specific implementation of the present invention, when the message processing device processes a second read transaction directed to a second address initiated by any requesting node, the method specifically includes:

[0237] Based on the communication with N request nodes, the latest data in the second address is fed back to the request node that initiates the second read transaction, the data status corresponding to the second address in the cache of each request node is maintained, and the data in the memory is updated.

[0238] In a specific implementation of the present invention, when the message processing device processes a first write transaction initiated by any requesting node and directed to a third address, the process specifically includes:

[0239] Based on the communication with N request nodes, the latest data is written to the third address of the cache of the request node that sends the first write transaction, and the data status corresponding to the third address in the cache of the request node is set to an exclusive state, and the data status corresponding to the third address in the cache of the remaining request nodes is set to an invalid state.

[0240] In a specific implementation of the present invention, when the message processing device processes the second write transaction initiated by any requesting node and directed to the fourth address, the method specifically includes:

[0241] Based on the communication with the N requesting nodes, the latest data is written to the fourth address of the cache of the requesting node that sends the second write transaction, and the data status corresponding to the fourth address in the cache of each requesting node is maintained.

[0242] It should also be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0243] Professionals may further realize that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to the function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention, and the description of the above embodiments is only used to help understand the technical solution and its core idea of ​​the present invention. It should be pointed out that for ordinary technicians in the technical field, without departing from the principle of the present invention, the present invention can also be improved and modified in a number of ways, and these improvements and modifications also fall within the scope of protection of the present invention.

Claims

1. A message processing device, characterized in that: The message processing device is arranged in a network-on-chip system, and the network-on-chip system further comprises a scheduling device and N processor cores as N request nodes; the scheduling device is connected to the message processing device and the N request nodes respectively; Each of the N request nodes is provided with a cache; N is a positive integer, and the message processing device includes: an addressing device, configured to load a message used in a read transaction or a write transaction initiated by the requesting node when receiving the message used in the read transaction or the write transaction through the scheduling device, and send the loaded message to the directory control device; The directory control device is used for, after receiving any of the messages, recording the address of the message in the address occupation library when the message carries an address and the address of the message is not recorded in the address occupation library of the directory control device, and determining that the address of the message is occupied when the message carries an address and the address of the message is recorded in the address occupation library; and deleting the address of the message recorded in the address occupation library to release the occupation when the read transaction or the write transaction corresponding to the message is completed; A message loading device, used for receiving the message sent by the directory control device, and when the address of the message is occupied, sending the message back to the address taking device, otherwise sending the message to the message processing device; The message processing device is used to process the received message based on a preset processing rule for maintaining the consistency of the cache and generate corresponding parameter information; A message generating device, used for generating a message to be output based on the parameter information and outputting it to a corresponding requesting node through the scheduling device; Among them, the addressing device, the directory control device, the message loading device, the message processing device and the message generating device in the message processing device constitute a five-stage pipeline structure.

2. The message processing device according to claim 1, characterized in that: The directory control device is also used for: After receiving any of the messages, when the message carries an address, obtaining directory information corresponding to the address of the message from the directory stored in itself and sending it to the message processing device; Maintaining a directory; wherein the directory is a directory recording data states corresponding to multiple addresses of the cache in each of the requesting nodes; The message processing device is specifically used for: Based on a preset processing rule for maintaining the consistency of the cache and the directory information sent by the directory control device, the received message is processed to generate corresponding parameter information; The directory update information in the parameter information is fed back to the directory control device, so that the directory control device maintains the directory based on the directory update information.

3. The message processing device according to claim 2, characterized in that: After receiving any of the messages, when the message carries an address, obtaining directory information corresponding to the address of the message from a directory stored in itself and sending the directory information to the message processing device, including: After receiving any of the messages, when the message carries an address, determining whether the address of the message exists in the directory stored in itself; If it exists, obtaining directory information corresponding to the address of the message from the directory and sending it to the message processing device; If not, directory information indicating that the address does not hit is sent to the message processing device.

4. The message processing device according to claim 2, characterized in that: Maintain the directory, including: After receiving the directory update information, determining whether the address carried in the directory update information exists in the directory stored in itself; If so, based on the directory update information, updating the content in the directory corresponding to the address carried in the directory update information; If not, determining whether the directory storage space preset for storing the directory is full; If the storage space is not full, the remaining space is used to store the directory update information; If the directory is full, the directory update information is stored in a data overwrite manner.

5. The message processing device according to claim 1, characterized in that: The message processing device also includes a first-in first-out memory; When the address of the message is occupied, sending the message back to the address taking device comprises: When the address of the message is occupied, the message is sent to a first-in first-out memory, so that the message is sent back to the addressing device through the first-in first-out memory.

6. The message processing device according to claim 1, characterized in that: The addressing device is specifically used for: When the scheduling device receives the message used in the read transaction or the write transaction initiated by the requesting node, the message used in the read transaction or the message used in the write transaction is loaded in order according to the preset priority rule, and the loaded message is sent to the directory control device.

7. The message processing device according to claim 6, characterized in that: Message types include request messages, response messages, monitoring messages, and data messages; The priority rule used by the addressing device is: the response message has the first priority, the data message has the second priority, the message sent by the directory control device has the third priority, and the request message has the fourth priority.

8. The message processing device according to claim 1, characterized in that: The directory control device is communicatively connected with the message generating device; When the read transaction or write transaction corresponding to the message is completed, the directory control device deletes the recorded address of the message to release the address, including: When it is determined based on the release signal sent by the message generating device that the read transaction or the write transaction corresponding to the message is completed, the address of the message recorded in the address occupation library is deleted to release the occupation.

9. The message processing device according to claim 1, characterized in that: Also includes: A cache output circuit connected to the message generating device; The message generating device is specifically used for: Generate a message to be output based on the parameter information; Each message to be output is placed into the cache output circuit, so that the cache output circuit is used to gradually output each message to be output to the corresponding request node through the scheduling device.

10. The message processing device according to any one of claims 1 to 9, characterized in that: Also includes: A slave node connected to the memory and the scheduling device respectively, so as to realize communication with the message processing device through the scheduling device; The message processing device is also used to: read and write the memory through communication with the slave node during processing of the read transaction and the write transaction initiated by each of the requesting nodes.

11. The message processing device according to claim 10, characterized in that: When processing a first read transaction directed to a first address initiated by any one of the requesting nodes, the message processing device is specifically configured to: Based on the communication with N request nodes, the latest data in the first address is fed back to the request node that initiates the first read transaction, and the data status corresponding to the first address in the cache of the request node is set to an exclusive state, and the data status corresponding to the first address in the cache of the remaining request nodes is set to an invalid state, and the data in the memory is updated.

12. The message processing device according to claim 10, characterized in that: When processing a second read transaction directed to a second address initiated by any one of the requesting nodes, the message processing device is specifically configured to: Based on the communication with the N requesting nodes, the latest data in the second address is fed back to the requesting node that initiates the second read transaction, the data status corresponding to the second address in the cache of each requesting node is maintained, and the data in the memory is updated.

13. The message processing device according to claim 10, characterized in that: When processing a first write transaction initiated by any one of the requesting nodes and directed to a third address, the message processing device is specifically configured to: Based on the communication with N request nodes, the latest data is written to the third address of the cache of the request node that sends the first write transaction, and the data status corresponding to the third address in the cache of the request node is set to an exclusive state, and the data status corresponding to the third address in the cache of the remaining request nodes is set to an invalid state.

14. The message processing device according to claim 10, characterized in that: When processing a second write transaction initiated by any one of the requesting nodes and directed to the fourth address, the message processing device is specifically configured to: Based on the communication with the N requesting nodes, the latest data is written to the fourth address of the cache of the requesting node that sends the second write transaction, and the data status corresponding to the fourth address in the cache of each requesting node is maintained.

15. A network-on-chip system, characterized in that: The message processing device according to any one of claims 1 to 14 further comprises a scheduling device and N processor cores as N request nodes; the scheduling device is connected to the message processing device and the N request nodes respectively; and the N request nodes are each provided with a cache; N is a positive integer.

16. A server, characterized in that: The invention comprises the network-on-chip system as claimed in claim 15.

17. A message processing method, characterized in that: Applied to a message processing device, the message processing device is arranged in an on-chip network system, the on-chip network system also includes a scheduling device and N processor cores as N request nodes; the scheduling device is connected to the message processing device and the N request nodes respectively; Each of the N request nodes is provided with a cache; N is a positive integer, and the message processing method includes: When the addressing device receives the message used in the read transaction or the write transaction initiated by the requesting node through the scheduling device, the addressing device loads the message used in the read transaction or the message used in the write transaction, and sends the loaded message to the directory control device; After receiving any of the messages, the directory control device records the address of the message in the address occupation library when the message carries an address and the address of the message is not recorded in the address occupation library of the directory control device; when the message carries an address and the address of the message is recorded in the address occupation library, determines that the address of the message is occupied; when the read transaction or the write transaction corresponding to the message is completed, deletes the address of the message recorded in the address occupation library to release the occupation; The message loading device receives the message sent by the directory control device, and when the address of the message is occupied, sends the message back to the address taking device, otherwise sends the message to the message processing device; The message processing device processes the received message based on a preset processing rule for maintaining the consistency of the cache, and generates corresponding parameter information; The message generating device generates a message to be output based on the parameter information and outputs it to the corresponding requesting node through the scheduling device; Among them, the addressing device, the directory control device, the message loading device, the message processing device and the message generating device in the message processing device constitute a five-stage pipeline structure.

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