A performance data collection system

Abstract

The present invention relates to the field of chip design, and in particular to a performance data acquisition system, the system comprising at least two resource management modules, a register access unit RAU and a target processor, the RAU being connected to the at least two resource management modules; wherein the target processor comprises N functional modules, each functional module comprising a performance counting unit; the RAU receives an access request sent by each of the resource management modules, and when there are at least two access requests with the same unique identification identifier and channel index number of the functional modules being the same, an arbitrator of the RAU authorizes one of the access requests as a target access request, allowing the target access request to access the target processor; an embodiment of the present invention solves the resource competition problem that may occur when the resource management modules send configuration information at the same time through the arbitration mechanism of the RAU.

Description

Technical Field

[0001] The present invention relates to the field of chip design, and in particular to a performance data acquisition system. Background Art

[0002] Performance counters are an important tool for monitoring and diagnosing the operating status of the system. It helps users understand the use of system resources by capturing and recording key performance indicators. Performance counters can track basic information such as processor workload, memory usage, disk I / O activity, etc. For example, the CPU utilization counter can show the proportion of the processor that is busy in a certain time interval, which helps to identify whether there is a CPU bottleneck. Performance counters are not limited to simple resource monitoring. The system also supports advanced counters that can go deep into the hardware level to monitor specific hardware events, such as cache hit rate, branch prediction failure number, etc. These detailed indicators can help developers optimize code execution paths, reduce unnecessary system calls or improve algorithm efficiency.

[0003] However, when two different resource management modules access the performance counters in the same target processor, resource contention may occur. Summary of the invention

[0004] In view of the above technical problems, the technical solution adopted by the present invention is: a performance data acquisition system, the system comprising: at least two resource management modules; a register access unit RAU, connected to the at least two resource management modules, including an arbitrator; a target processor, the target processor comprising N functional modules {module1, module2, ..., module i ,…,module N},module i is the i-th functional module, and the value of i ranges from 1 to N; module i Including performance counter unit PEF i ; The PEF i The PEF is connected to the register access unit RAU through K(i) channels; iThe RAU receives an access request sent by each resource management module, wherein the access request includes at least one set of configuration information, each set of configuration information includes a unique identification of a functional module, an identification of a performance event, and an index number of a channel; when there are at least two access requesting functional modules whose unique identification and channel index numbers are exactly the same, the arbitrator authorizes one of the access requests as a target access request, allowing the target access request to access the target processor; when the unique identification of the target functional module points to module i When the PEF i The performance data of the target performance event is collected according to the identity of the target performance event in the target access request, and the performance data is returned through the target channel.

[0005] The present invention has at least the following beneficial effects:

[0006] The present invention provides a performance data acquisition system, which authorizes access to a target processor through an arbitrator in a register access unit, enables at least two resource management modules to access different performance events in parallel and process data acquisition tasks in parallel, thereby improving the performance of the overall system and solving the resource competition problem that may occur when the resource management modules send configuration information at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0008] Figure 1 A structural block diagram of a performance data acquisition system provided by an embodiment of the present invention;

[0009] Figure 2 PEF provided by the embodiment of the present invention i Schematic diagram of the internal structure. DETAILED DESCRIPTION

[0010] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0011] Unless otherwise defined, all technical and scientific terms used in the embodiments of the present invention have the same meanings as commonly understood by those skilled in the art.

[0012] See also Figure 1 , which shows a structural block diagram of a performance data collection system, the system includes at least two resource management modules, a register access unit RAU and a processor. The register access unit RAU connects the at least two resource management modules. The RAU includes an arbitrator. Figure 1 At least two resource management modules are shown: a first resource management module and a second resource management module.

[0013] The register access unit RAU is used to configure the corresponding performance counting unit according to the received configuration information.

[0014] Further, the target processor includes N functional modules {module1, module2, ..., module i ,…,module N},module i is the i-th functional module, and the value of i ranges from 1 to N; module i Including performance counter unit PEF i ; The PEF i The PEF is connected to the register access unit RAU through K(i) channels; i There are M performance events in it, K(i) and M are greater than 0 respectively;

[0015] Each performance counting unit is used to monitor a functional module, forming a one-to-one mapping relationship.

[0016] Optionally, the target processor is a GPU (Graphics Processing Unit). Other target processors configured with a counter fall within the protection scope of the present invention.

[0017] The target processor includes N functional modules, among which module i PEF in i Includes M performance events. RAU and module i They are connected via K(i) channels, and the performance data of the collected performance events need to be returned to the RAU via the corresponding channels.

[0018] Among them, performance events (Performance Counters) are a set of hardware and software mechanisms used to monitor and measure performance indicators in each functional module. For example, the types of events tracked in hardware include: the number of instructions executed, cache access hits or misses, memory access times, etc.; the performance monitored in software includes the CPU usage of the process, memory usage, and application response time, etc.

[0019] It should be noted that RAU and module i The total number of channels between RAU and module1 is K(1). The total number of channels between the register access unit and different functional modules can be the same or different, without limitation.

[0020] Furthermore, the RAU receives an access request sent by each resource management module, wherein the access request includes at least one set of configuration information, and each set of configuration information includes a unique identification of a functional module, an identification of a performance event, and an index number of a channel; when there are at least two access requests with the same unique identification of the functional module and the same index number of the channel, the arbitrator authorizes one of the access requests as a target access request, allowing the target access request to access the target processor. The arbitration mechanism of the arbitrator solves the problem of competition for the use of multiple resource management modules.

[0021] As a preferred embodiment, when there are at least two access requests with different or not identical unique identifications of the functional modules and index numbers of the channels, the arbitrator authorizes all the access requests as target access requests, allowing each target access request to access the target processor.

[0022] It should be noted that due to the arbitration mechanism of the arbitrator, only one of the two access requests in a competing relationship can be authorized to access, where the two access requests in a competing relationship are: access requests to the same functional module and the same channel at the same time. When the target access request that is allowed to access has collected data and released it, other access requests can access it.

[0023] Optionally, each resource management module is a GPU management module or a CPU (Central Processing Unit), and other types of resource management modules fall within the protection scope of the present invention.

[0024] As a preferred embodiment, when the RAU is connected to two resource management modules, the two resource management modules are respectively a GPU management module and a CPU. Alternatively, both resource management modules are GPU management modules or both are CPUs. Among them, the CPU is responsible for resource management tasks such as memory management and task scheduling to ensure that system resources are reasonably allocated. Among them, the GPU management module is responsible for the allocation and management of GPU resources to ensure that the GPU can efficiently perform graphics processing and parallel computing tasks. Other combinations of other types of resource management modules also fall within the protection scope of the present invention.

[0025] The unique identification of the target function module can uniquely identify the target function module of the group of configuration information. The identification of the target performance event can uniquely identify the target performance event in the currently accessed target function module. The index number of the target channel is used to specify the target channel used to return the performance data of the target performance event.

[0026] Further, when the unique identifier of the target functional module points to module i When the PEF i The performance data of the target performance event is collected according to the identity identifier of the target performance event in the target access request, and the performance data is obtained through the target channel.

[0027] Through the arbitration mechanism of the register access unit, at least two resource management modules can access different performance events in parallel and process data acquisition tasks in parallel, thereby improving the performance of the overall system and solving the resource competition problem that may occur when the resource management modules send configuration information at the same time.

[0028] As an implementation mode, each set of configuration information includes Q(i) for the identity of the target performance event and the index number of the target channel, and the value range of Q(i) is 1 to M. It should be noted that the identity of the target performance event and the target channel are a one-to-one mapping relationship, and the performance data of the collected target performance event is returned to the register access unit through the corresponding target channel.

[0029] As a preferred embodiment, when K(i) is less than Q(i), each resource management module obtains performance data of different target performance events by time-sharing the same target channel; and / or at least two resource management modules obtain performance data of the same or different target performance events by time-sharing the same target channel.

[0030] It should be noted that “and / or” means including only the items before “and / or”, only the items after “and / or”, or both the items before and after “and / or”.

[0031] As an implementation method, when the collection of performance data of performance events is limited by the number of channels, for example, when it is necessary to collect performance data of 10 performance events and the total number of channels is 4, it is necessary to collect the data through time division multiplexing. The same channel can be used to access different performance events in the target functional module in different time slices, thereby making efficient use of resources even when the number of channels is limited.

[0032] As an implementation method, at least two resource management modules can time-share the same target channel, which can also improve resource utilization. At least two resource management modules can use the same channel to access target performance events in different time slices, avoiding competition and conflict between multiple resource management modules.

[0033] As a preferred embodiment, please refer to Figure 2 , Figure 2 PEF i Schematic diagram of the internal structure of PEF i As an example, a schematic diagram of the structure inside the performance counting unit is shown. i Including control unit ctl i and counting unit count i ; the ctl i The module enable signal used to determine whether to start data collection of performance events and the sampling window associated signal of the collection mode, and the count is indicated by the sampling enable signal i Start collecting performance data of performance events; the count i It includes M performance events, which are used to collect performance data of a target performance event according to a sampling enable signal and an identity identifier of the target performance event, and return the collected performance data to the RAU through a target channel.

[0034] Among them, the module enable signal comes from the outside and is used to indicate whether to start the data acquisition process. When the module enable signal is valid, the data acquisition process is started; otherwise, the data acquisition process is not started.

[0035] Optionally, the sampling window associated signal is the start and end time or the interval time of the sampling. Other data used to control the sampling mode all fall within the protection scope of the present invention.

[0036] As a preferred embodiment, the configuration information also includes module i The module enable signal and sampling window association signal, the PEF i The step of collecting the performance data of the target performance event according to the identity identifier of the target performance event and obtaining the performance data through the target channel also includes:

[0037] S100, the ctl i Module that receives the message sent by the RAU i The module enable signal and the sampling window association signal are sent to the count i Send sampling enable signal. In this way, ctl i Ensure accuracy and consistency in the data collection process.

[0038] Among them, the module enable signal comes from the resource management module, and the resource management module starts data collection of performance events as needed.

[0039] The sampling enable signal is used to instruct the counting unit to start collecting performance data of performance events. It is a key signal to control the data collection process and ensure that the count i Collect data at the right time.

[0040] S200, the count i It is used to receive the sampling enable signal and the identity of the target performance event sent by the RAU, and when the sampling enable signal is valid, collect the performance data of the target performance event, and return the collected performance data to the RAU through the target channel. In this way, count i The accuracy and timeliness of the data collection process are ensured, thus supporting effective performance analysis.

[0041] Among them, when ctl i When the sampling enable signal is sent, count i Start recording the current value of performance events. i After receiving the sampling enable signal, count i Access a performance event through the specified target channel and read the current value of the performance event.

[0042] It should be noted that each resource management module configures the performance counting unit corresponding to the target functional module through steps S100-S300 and then accesses the target performance event in the target functional module through the target channel, so as to achieve the purpose of parallel processing of data acquisition tasks by different resource management modules, improve the performance of the overall system, reduce or minimize the impact of resource competition, and solve the resource competition problem that may arise when the resource management modules send configuration information at the same time.

[0043] An embodiment of the present invention also provides a non-transitory computer-readable storage medium, which can be set in an electronic device to store at least one instruction or at least one program related to implementing a method in a method embodiment. The at least one instruction or the at least one program is loaded and executed by the processor to implement the method provided in the above embodiment.

[0044] An embodiment of the present invention further provides an electronic device, comprising a processor and the aforementioned non-transitory computer-readable storage medium.

[0045] An embodiment of the present invention further provides a computer program product, which includes program code. When the program product is run on an electronic device, the program code is used to enable the electronic device to execute the steps of the method according to various exemplary embodiments of the present invention described above in this specification.

[0046] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.

[0047] Although some specific embodiments of the present invention have been described in detail by way of example, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It should also be understood by those skilled in the art that various modifications may be made to the embodiments without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A performance data collection system, characterized in that: The system comprises: At least two resource management modules; A register access unit RAU, connected to the at least two resource management modules, each of which is a GPU management module or a CPU; The system also includes an arbitrator; The target processor includes N functional modules {module1, module2, ..., module i ,…,module N },module i is the i-th functional module, and the value of i ranges from 1 to N; module i Including performance counter unit PEF i ; The PEF i The PEF is connected to the register access unit RAU through K(i) channels; i There are M performance events in it, K(i) and M are greater than 0 respectively; The RAU receives an access request sent by each resource management module, wherein the access request includes at least one set of configuration information, and each set of configuration information includes a unique identification of a functional module, an identification of a performance event, and an index number of a channel; when there are at least two access requests at the same time, and the unique identification of the functional module and the index number of the channel are exactly the same, the arbitrator authorizes one of the access requests as a target access request, and allows the target access request to access the target processor; When the unique identifier of the target function module points to module i When the PEF i The performance data of the target performance event is collected according to the identity identifier of the target performance event in the target access request, and the performance data is returned through the target channel.

2. The system according to claim 1, characterized in that When there are at least two access requests with different or not completely identical unique identifications of the functional modules and index numbers of the channels, the arbitrator authorizes all the access requests as target access requests, allowing each target access request to access the target processor.

3. The system according to claim 1, characterized in that When the RAU is connected to two resource management modules, the two resource management modules are respectively a GPU management module and a CPU; or the two resource management modules are both GPU management modules or both CPUs.

4. The system according to claim 1, characterized in that Each set of configuration information includes Q(i) which is the identity identifier of the target performance event and the index number of the target channel, and the value range of Q(i) is 1 to M.

5. The system according to claim 1, characterized in that When K(i) is less than Q(i), each resource management module obtains performance data of different target performance events by time-division multiplexing the same target channel; and / or At least two resource management modules obtain performance data of the same or different target performance events by time-division multiplexing the same target channel.

6. The system according to claim 1, characterized in that The PEF i Including control unit ctl i and counting unit count i ; The ctl i The module enable signal and acquisition mode used to start data collection of performance events, and indicate the count through the sampling enable signal i Start collecting performance data of performance events; The count i , including M performance events, is used to collect performance data of the target performance event according to the sampling enable signal and the identity identifier of the target performance event, and return the collected performance data to the RAU through the target channel.

7. The system according to claim 6, characterized in that The configuration information also includes module i The module enable signal and the sampling window associated signal of the PEF i The step of collecting the performance data of the target performance event according to the identity identifier of the target performance event and obtaining the performance data through the target channel also includes: S100, the ctl i Module that receives the message sent by the RAU i The module enable signal and the sampling window association signal are sent to the count i Send a sampling enable signal; S200, the count i Used to receive the sampling enable signal and the identity of the target performance event sent by the RAU; when the sampling enable signal is valid, collect performance data of the target performance event, and return the collected performance data to the RAU through the target channel.

8. The system according to claim 7, characterized in that The sampling window associated signal is the start and end time or the interval time of sampling.

9. The system according to claim 1, characterized in that The target processor is the GPU.

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