Capacitor device and forming method thereof

Abstract

The invention discloses a capacitor device and a forming method thereof, and the structure comprises a metal layer structure located on a substrate, the metal layer structure comprises a plurality of stacked first electrode layers, second electrode layers located between the two adjacent first electrode layers, and first dielectric layers located between the adjacent first electrode layers and second electrode layers, each first electrode layer is located on the second region and extends to the first region, and each second electrode layer is located on the second region and extends to the third region; the first conductive plug is located on the first region and comprises a first part and a second part located on the first part, the first part penetrates through the first electrode layers in the normal direction of the surface of the substrate and is connected with the first electrode layers, and a first included angle is formed between the side wall of the first part and the normal direction of the surface of the substrate; a second included angle is formed between the side wall of the second part and the normal direction of the surface of the substrate, and the first included angle is larger than the second included angle, thereby facilitating reduction of contact resistance between the first conductive plug and each first electrode layer, and facilitating improvement of the performance of the capacitor.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, and in particular to a capacitor device and a method for forming the same. Background Art

[0002] In semiconductor integrated circuits, integrated capacitors fabricated on the same chip as transistor circuits are widely used. They are mainly metal-insulator-metal (MIM) capacitors and metal-oxide-metal (MOM) capacitors.

[0003] Among them, MIM capacitors use upper and lower metal layers as capacitor plates. For traditional MIM capacitors, there is only a single dielectric layer between the capacitor plates, and its equivalent capacitance density is limited by the thickness of the dielectric layer and the dielectric constant of the dielectric layer. For this reason, a multi-layer plate capacitor structure is introduced to obtain a higher equivalent capacitance density.

[0004] However, the performance of multi-layer plate capacitor structures still needs to be further improved. Summary of the invention

[0005] The technical problem solved by the present invention is to provide a capacitor device and a method for forming the same, so as to improve the performance of the semiconductor structure.

[0006] In order to solve the above technical problems, the technical solution of the present invention provides a capacitor device, comprising: a substrate, the substrate comprising a first area, a second area and a third area arranged along a first direction, the second area being located between the first area and the third area; a metal layer structure located on the substrate, the metal layer structure comprising a plurality of first electrode layers stacked, a second electrode layer located between two adjacent first electrode layers, and a first dielectric layer located between adjacent first electrode layers and second electrode layers, each first electrode layer being located on the second area and extending to the first area, each second electrode layer being located on the second area and extending to the third area; a first conductive plug located on the first area, the first conductive plug comprising a first portion and a second portion located on the first portion, the first portion passes through each first electrode layer along the normal direction of the substrate surface and connects each first electrode layer, the side wall of the first portion has a first angle with the normal direction of the substrate surface, the side wall of the second portion has a second angle with the normal direction of the substrate surface, and the first angle is greater than the second angle; a second conductive plug located on the third area, the second conductive plug includes a third portion and a fourth portion located on the third portion, the third portion passes through each second electrode layer along the normal direction of the substrate surface and connects each second electrode layer, the side wall of the third portion has a third angle with the normal direction of the substrate surface, the side wall of the fourth portion has a fourth angle with the normal direction of the substrate surface, and the third angle is greater than the fourth angle.

[0007] Optionally, the first angle ranges from 10 degrees to 40 degrees; and the third angle ranges from 10 degrees to 40 degrees.

[0008] Optionally, the substrate further comprises a first lower metal layer located in the first zone and a second lower metal layer located in the third zone; the first conductive plug further comprises a fifth portion, the fifth portion being located between the surface of the first lower metal layer and the first portion, the side wall of the fifth portion having a fifth angle with the normal direction of the substrate surface, and the first angle being greater than the fifth angle; the second conductive plug further comprises a sixth portion, the sixth portion being located between the surface of the second lower metal layer and the third portion, the side wall of the sixth portion having a sixth angle with the normal direction of the substrate surface, and the third angle being greater than the sixth angle.

[0009] Optionally, it also includes: a second dielectric layer located on the metal layer structure, the second part and the fourth part are located in the second dielectric layer; a first upper metal layer and a second upper metal layer that are separate from each other and located on the second dielectric layer, the first conductive plug is also connected to the first upper metal layer, and the second conductive plug is also connected to the second upper metal layer.

[0010] Optionally, the first electrode layer of each upper layer is located on the side wall and part of the top surface of the second electrode layer of the lower layer; the second electrode layer of each upper layer is located on the side wall and part of the top surface of the first electrode layer of the lower layer.

[0011] Optionally, the number of layers of the metal layer structure is odd, and the first electrode layer is located at the bottom layer, and the capacitor device also includes: a dummy electrode layer on the second electrode layer on the top layer on the third zone, and the dummy electrode layer and the first electrode layer are separate from each other; the number of layers of the metal layer structure is odd, and the second electrode layer is located at the bottom layer, and the capacitor device also includes: a dummy electrode layer on the first electrode layer on the top layer on the first zone, and the dummy electrode layer and the second electrode layer are separate from each other.

[0012] Optionally, the material of the first electrode layer includes a combination of one or more of TiN, TaN, Ta, W, TiO, Ti, Pt and Ni; the material of the second electrode layer includes a combination of one or more of TiN, TaN, Ta, W, TiO, Ti, Pt and Ni.

[0013] Optionally, the material of the first dielectric layer includes a combination of one or more of HfO, AlO, ZrO and LaO.

[0014] Optionally, the thickness of the first electrode layer ranges from 300 angstroms to 800 angstroms; the thickness of the second electrode layer ranges from 300 angstroms to 800 angstroms.

[0015] Correspondingly, the technical solution of the present invention also provides a method for forming a capacitor device, comprising: providing a substrate, the substrate comprising a first region, a second region and a third region arranged along a first direction, the second region being located between the first region and the third region; forming a metal layer structure on the substrate, the metal layer structure comprising a plurality of first electrode layers stacked, a second electrode layer located between two adjacent first electrode layers, and a first dielectric layer located between adjacent first electrode layers and second electrode layers, each first electrode layer being located on the second region and extending to the first region, and each second electrode layer being located on the second region and extending to the third region; forming a first conductive plug on the first region, the first conductive plug comprising a first A portion and a second portion located on the first portion, the first portion penetrates each first electrode layer along the normal direction of the substrate surface and connects each first electrode layer, the side wall of the first portion has a first angle with the normal direction of the substrate surface, the side wall of the second portion has a second angle with the normal direction of the substrate surface, and the first angle is greater than the second angle; a second conductive plug is formed on the third area, the second conductive plug includes a third portion and a fourth portion located on the third portion, the third portion penetrates each second electrode layer along the normal direction of the substrate surface and connects each second electrode layer, the side wall of the third portion has a third angle with the normal direction of the substrate surface, the side wall of the fourth portion has a fourth angle with the normal direction of the substrate surface, and the third angle is greater than the fourth angle.

[0016] Optionally, the first angle ranges from 10 degrees to 40 degrees; and the third angle ranges from 10 degrees to 40 degrees.

[0017] Optionally, before forming the first conductive plug and the second conductive plug, a second dielectric layer is formed on the metal layer structure, and the second portion of the first conductive plug and the fourth portion of the second conductive plug are located in the second dielectric layer; the method for forming the first conductive plug and the second conductive plug comprises: using a first etching process to etch a portion of the second dielectric layer located on the first area and the third area until the surface of the metal layer structure is exposed; using a second etching process to etch the exposed metal layer structure until the substrate is exposed, so as to form a first contact hole on the first area and a second contact hole on the third area, wherein the side wall of the first contact hole in the metal layer structure has a first angle with the normal direction of the substrate surface, the side wall of the first contact hole in the second dielectric layer has a second angle with the normal direction of the substrate surface, the side wall of the second contact hole in the metal layer structure has a third angle with the normal direction of the substrate surface, and the side wall of the second contact hole in the second dielectric layer has a fourth angle with the normal direction of the substrate surface; forming the first conductive plug in the first contact hole; and forming the second conductive plug in the second contact hole.

[0018] Optionally, the substrate comprises a first lower metal layer located in the first zone and a second lower metal layer located in the third zone; the first conductive plug further comprises a fifth portion, the fifth portion is located between the surface of the first lower metal layer and the first portion, the side wall of the fifth portion has a fifth angle with the normal direction of the substrate surface, and the first angle is greater than the fifth angle; the second conductive plug further comprises a sixth portion, the sixth portion is located between the surface of the second lower metal layer and the third portion, the side wall of the sixth portion has a sixth angle with the normal direction of the substrate surface, and the third angle is greater than the sixth angle; the first contact hole is also located in the substrate, and the bottom of the first contact hole exposes the first lower metal layer; the second contact hole is also located in the substrate, and the bottom of the second contact hole exposes the second lower metal layer.

[0019] Optionally, the method for forming the first contact hole and the second contact hole further includes: after the second etching process, continuing to etch the exposed substrate using a third etching process until the top surfaces of the first lower metal layer and the second lower metal layer are exposed.

[0020] Optionally, after forming the second dielectric layer, a first upper metal layer and a second upper metal layer are formed separately from each other, the first conductive plug is further connected to the first upper metal layer, and the second conductive plug is further connected to the second upper metal layer; the method for forming the first conductive plug, the second conductive plug, the first upper metal layer and the second upper metal layer also includes: after forming the first contact hole and the second contact hole, forming a conductive material layer on the surface of the second dielectric layer and in the first contact hole and the second contact hole; planarizing the conductive material layer; after the planarization process, etching the conductive material layer until the surface of the second dielectric layer is exposed, forming a first conductive plug and a first upper metal layer located on the first conductive plug, and forming a second conductive plug and a second upper metal layer located on the second conductive plug.

[0021] Optionally, the metal layer structure has an odd number of layers, and the first electrode layer is located at the bottom, and the method also includes: when forming the top first electrode layer, a dummy electrode layer is also formed on the top second electrode layer on the third region, and the dummy electrode layer and the first electrode layer are separate from each other; the metal layer structure has an odd number of layers, and the second electrode layer is located at the bottom, and the method also includes: when forming the top second electrode layer, a dummy electrode layer is also formed on the top first electrode layer on the first region, and the dummy electrode layer and the second electrode layer are separate from each other.

[0022] Optionally, the method for forming adjacent first electrode layers and second electrode layers includes: forming a first electrode material layer on a substrate, or forming a first dielectric layer and a first electrode material layer located on the first dielectric layer on an upper second electrode layer; patterning the first electrode material layer to form a first electrode layer; forming a first dielectric layer and a second electrode material layer located on the first dielectric layer on the first electrode layer; patterning the second electrode material layer to form a second electrode layer.

[0023] Optionally, the first electrode layer of each upper layer is located on the side wall and a portion of the top surface of the second electrode layer of the lower layer; the second electrode layer of each upper layer is located on the side wall and a portion of the top surface of the first electrode layer of the lower layer.

[0024] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0025] In the capacitor device provided by the technical solution of the present invention, the first conductive plug is located on the first region, the first conductive plug includes a first part and a second part located on the first part, the first part penetrates each first electrode layer along the normal direction of the substrate surface and connects each first electrode layer, the side wall of the first part has a first angle with the normal direction of the substrate surface, the side wall of the second part has a second angle with the normal direction of the substrate surface, the first angle is greater than the second angle, so that the contact surface between the first conductive plug and each first electrode layer has a larger inclination, the contact area between the first conductive plug and each first electrode layer is increased, which is beneficial to reducing the contact resistance between the first conductive plug and each first electrode layer, and is beneficial to improving the performance of the capacitor device; similarly, the contact surface between the second conductive plug and each second electrode layer is increased, which is beneficial to improving the performance of the capacitor device.

[0026] In the method for forming a capacitor device provided by the technical solution of the present invention, a first conductive plug is formed on a first region, the first conductive plug includes a first portion and a second portion located on the first portion, the first portion penetrates each first electrode layer along the normal direction of the substrate surface and connects each first electrode layer, the side wall of the first portion has a first angle with the normal direction of the substrate surface, the side wall of the second portion has a second angle with the normal direction of the substrate surface, the first angle is greater than the second angle, so that the contact surface between the first conductive plug and each first electrode layer has a larger inclination, the contact area between the first conductive plug and each first electrode layer is increased, which is beneficial to reducing the contact resistance between the first conductive plug and each first electrode layer, and is beneficial to improving the performance of the capacitor device; similarly, the contact surface between the second conductive plug and each second electrode layer is increased, which is beneficial to improving the performance of the capacitor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a schematic diagram of the structure of a capacitor device;

[0028] Figures 2 to 6 It is a schematic structural diagram corresponding to each step in the method for forming a capacitor device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0029] It should be noted that the terms “surface” and “on” in this specification are used to describe relative positional relationships in space and are not limited to direct contact.

[0030] As the background technology, the performance of the capacitor device formed in the prior art needs to be improved. Now, a capacitor device is described and analyzed.

[0031] Figure 1 It is a structural diagram of a capacitor device.

[0032] Please refer to Figure 1 The capacitor device comprises: a substrate 100, the substrate 100 comprises a first region I, a second region II and a third region III arranged along a first direction X, the second region II is located between the first region I and the third region II, the first region I has a first lower metal layer 101, and the third region III has a second lower metal layer 102; a plurality of first electrode structures and a plurality of second electrode structures stacked on the substrate 100, the first electrode structure comprises a first lead-out terminal 103 located on the first region I and a first electrode layer 104 located on the second region II, the second electrode structure comprises a second lead-out terminal 105 located on the third region III and a second electrode layer 106 located on the second region II, and each first electrode layer 104 on the second region II is located between adjacent second electrode layers 106 ; a first dielectric layer 107 located between the adjacent first electrode layers 104 and the second electrode layers 106; a dummy electrode layer 108 located on the first region I on the plurality of first electrode structures; a second dielectric layer 109 located on the surfaces of the plurality of first electrode structures and the plurality of second electrode structures; a first upper metal layer 110 and a second upper metal layer 111 located separately from each other on the second dielectric layer 109; a first conductive plug 112 located in the second dielectric layer 109, the first conductive plug 112 connecting the first lower metal layer 101, the first upper metal layer 110 and the first lead terminals 103; a second conductive plug 113 located in the second dielectric layer 109, the second conductive plug 113 connecting the second lower metal layer 102, the second upper metal layer 111 and the second lead terminals 105.

[0033] In the above-mentioned MIM capacitor device, each adjacent first electrode layer 104, second electrode layer 106 and the first dielectric layer 107 therebetween constitute a single capacitor, the first conductive plug 112 is connected to each first lead-out end 103 for electrically leading out each first electrode layer 104, and each second lead-out end 105 of the second conductive plug 113 is used to electrically lead out each second electrode layer 106, thereby forming a plurality of parallel capacitors to obtain a larger equivalent capacitance density. However, the first conductive plug 112 is connected to each first lead-out terminal 103 by penetrating each first lead-out terminal 103 from top to bottom, and the side wall of the first conductive plug 112 located in the first lead-out terminal 103 is approximately at a right angle to the bottom surface of the first lead-out terminal 103. The contact surface A between each first lead-out terminal 103 and the first conductive plug 112 is small, resulting in a large contact resistance between the first conductive plug 112 and each first lead-out terminal 103; similarly, the contact resistance between the second conductive plug 113 and each second lead-out terminal 105 is also large, thereby affecting the performance of the capacitor device.

[0034] In order to solve the above problems, the present invention provides a capacitor device and a method for forming the same, wherein a first side wall of a first conductive plug has a first angle with a normal direction of a substrate surface, and a second side wall has a second angle with a normal direction of a substrate surface, and the first angle is greater than the second angle, so that the contact surface between the first conductive plug and each first electrode layer has a larger inclination, thereby increasing the contact area between the first conductive plug and each first electrode layer, which is beneficial to reducing the contact resistance between the first conductive plug and each first electrode layer, and is beneficial to improving the performance of the capacitor device; similarly, the contact surface between the second conductive plug and each second electrode layer is increased, which is beneficial to improving the performance of the capacitor device.

[0035] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0036] Figures 2 to 6 It is a schematic structural diagram corresponding to each step in the method for forming a capacitor device according to an embodiment of the present invention.

[0037] Please refer to Figure 2 , a substrate 200 is provided, the substrate 200 includes a first region I, a second region II and a third region III arranged along a first direction Y, and the second region II is located between the first region I and the third region III.

[0038] In this embodiment, the substrate 200 has a first lower metal layer 201 located in the first region I and a second lower metal layer 202 located in the third region III.

[0039] In this embodiment, the substrate 200 also includes a base (not shown in the figure), a device layer (not shown in the figure) located on the base, and a metal interconnection layer located on the device layer. The metal interconnection layer includes a third dielectric layer (not shown in the figure), a first lower metal layer 201 and a second lower metal layer 202 located in the third dielectric layer, and the metal interconnection layer and the device layer are electrically connected.

[0040] Please refer to Figure 3 A metal layer structure is formed on a substrate 200, wherein the metal layer structure includes a plurality of stacked first electrode layers 203, a second electrode layer 204 located between two adjacent first electrode layers 203, and a first dielectric layer 205 located between adjacent first electrode layers 203 and second electrode layers 204, each first electrode layer 203 is located on the second region II and extends to the first region I, and each second electrode layer 204 is located on the second region II and extends to the third region III.

[0041] In this embodiment, each upper first electrode layer 203 is located on the side wall and part of the top surface of the second electrode layer 204 of the lower layer; each upper second electrode layer 204 is located on the side wall and part of the top surface of the first electrode layer 203 of the lower layer.

[0042] In this embodiment, the method for forming adjacent first electrode layers 203 and second electrode layers 204 includes: forming a first electrode material layer (not shown in the figure) on the substrate 200, or forming a first dielectric layer 205 and a first electrode material layer located on the first dielectric layer 205 on the upper second electrode layer 204; patterning the first electrode material layer to form the first electrode layer 203; forming a first dielectric layer and a second electrode material layer (not shown in the figure) located on the first dielectric layer 205 on the first electrode layer; and patterning the second electrode material layer to form the second electrode layer 204.

[0043] In this embodiment, the process for forming the first electrode material layer includes a physical vapor deposition process; and the process for forming the second electrode material layer includes a physical vapor deposition process.

[0044] In this embodiment, the material of the first electrode layer 203 includes a combination of one or more of TiN, TaN, Ta, W, TiO, Ti, Pt and Ni; the material of the second electrode layer 204 includes a combination of one or more of TiN, TaN, Ta, W, TiO, Ti, Pt and Ni.

[0045] In this embodiment, the material of the first dielectric layer 205 includes one or more of HfO, AlO, ZrO and LaO.

[0046] It should be noted that each first electrode layer 203 and the adjacent second electrode layer 204 and the first dielectric layer 205 therebetween form a single capacitor device. The metal layer structure includes multiple capacitor devices connected in parallel. The materials of the first dielectric layer 205 in each capacitor device can be the same or different.

[0047] In this embodiment, the thickness of the first electrode layer 203 is in a range of 300 angstroms to 800 angstroms; the thickness of the second electrode layer 204 is in a range of 300 angstroms to 800 angstroms.

[0048] In this embodiment, the number of layers of the metal layer structure is odd, and the first electrode layer 203 is located at the bottom, and the method further includes: when forming the top first electrode layer 203, a dummy electrode layer 206 is formed on the top second electrode layer 204 on the third region III, and the dummy electrode layer 206 is separated from the first electrode layer 203. Specifically, the patterned top second electrode material layer is also used to form the dummy electrode layer 206.

[0049] The dummy electrode layer 206 is used to balance the thickness of the metal layer structure on the first region I and the third region III when forming the first contact hole and the second contact hole, thereby reducing the etching difference between the first contact hole and the second contact hole.

[0050] In another embodiment, the metal layer structure has an odd number of layers, and the second electrode layer is located at the bottom. The method also includes: when forming the top second electrode layer, a dummy electrode layer is also formed on the top first electrode layer on the first region, and the dummy electrode layer and the second electrode layer are separate from each other.

[0051] In other embodiments, the number of layers of the metal layer structure is an even number, that is, the thickness of the metal layer structure on the first region is the same as the thickness of the metal layer structure on the third region, and no dummy electrode layer is provided.

[0052] Please refer to Figures 4 to 6 , Figure 5 for Figure 4 A partial enlarged view of the first conductive plug, Figure 6 for Figure 4 1 is a partial enlarged view of the second conductive plug in the embodiment of the present invention, wherein a first conductive plug 207 is formed on the first region I, and the first conductive plug 207 includes a first portion a1 and a second portion a2 located on the first portion a1, wherein the first portion a1 penetrates through each first electrode layer 203 along the normal direction of the surface of the substrate 200 and connects each first electrode layer 203, wherein the side wall of the first portion a1 and the normal direction of the surface of the substrate 200 have a first angle β1, and the side wall of the second portion a2 and the normal direction of the surface of the substrate 200 have a second angle β2, wherein the first angle β1 is greater than the second angle β2. Second angle β2; a second conductive plug 208 is formed on the third region III, the second conductive plug 208 includes a third portion a3 and a fourth portion a4 located on the third portion a3, the third portion a3 penetrates each second electrode layer 204 along the normal direction of the surface of the substrate 200, and connects each second electrode layer 204, the side wall of the third portion a3 has a third angle β3 with the normal direction of the surface of the substrate 200, the side wall of the fourth portion a4 has a fourth angle β4 with the normal direction of the surface of the substrate 200, and the third angle β3 is greater than the fourth angle β4.

[0053] At this point, the side wall of the first part a1 and the normal direction of the substrate 200 surface have a first angle β1, and the side wall of the second part a2 and the normal direction of the substrate 200 surface have a second angle β2, and the first angle β1 is greater than the second angle β2, so that the contact surface between the first conductive plug 207 and each first electrode layer 203 has a larger inclination, which increases the contact area between the first conductive plug 207 and each first electrode layer 203, which is beneficial to reducing the contact resistance between the first conductive plug 207 and each first electrode layer 203, and is beneficial to improving the performance of the capacitor; similarly, the contact surface between the second conductive plug 208 and each second electrode layer 204 is increased, which is beneficial to improving the performance of the capacitor.

[0054] In this embodiment, the first angle β1 ranges from 10 degrees to 40 degrees; the third angle β3 ranges from 10 degrees to 40 degrees.

[0055] In this embodiment, before forming the first conductive plug 207 and the second conductive plug 208 , a second dielectric layer 209 is formed on the metal layer structure, and the second portion a2 of the first conductive plug 207 and the fourth portion a4 of the second conductive plug 208 are located in the second dielectric layer 209 .

[0056] In this embodiment, the method for forming the first conductive plug 207 and the second conductive plug 208 includes: using a first etching process to etch a portion of the second dielectric layer 209 located on the first region I and the third region III until the surface of the metal layer structure is exposed; using a second etching process to etch the exposed metal layer structure until the substrate 200 is exposed, so as to form a first contact hole (not shown in the figure) on the first region I and a second contact hole (not shown in the figure) on the third region III, wherein the sidewall of the first contact hole in the metal layer structure has a first angle β1 with the normal direction of the surface of the substrate 200, the sidewall of the first contact hole in the second dielectric layer 209 has a second angle β2 with the normal direction of the surface of the substrate 200, the sidewall of the second contact hole in the metal layer structure has a third angle β3 with the normal direction of the surface of the substrate 200, and the second contact hole in the second dielectric layer 209 has a fourth angle β4 with the normal direction of the surface of the substrate 200; forming the first conductive plug 207 in the first contact hole; and forming the second conductive plug 208 in the second contact hole.

[0057] In this embodiment, the first conductive plug 207 further includes a fifth portion a5, which is located in the first lower metal layer 201 (eg Figure 2 The side wall of the fifth portion a5 and the normal direction of the substrate 200 surface have a fifth angle β5, and the first angle β1 is greater than the fifth angle β5; the second conductive plug 208 also includes a sixth portion, and the sixth portion is located at the second lower metal layer 202 (as shown in Figure 2 As shown in the figure, between the surface of the sixth part a6 and the third part a3, the side wall of the sixth part a6 has a sixth angle β6 with the normal direction of the surface of the substrate 200, and the third angle β3 is greater than the sixth angle β6; the first contact hole is also located in the substrate 200, and the bottom of the first contact hole exposes the first lower metal layer 201; the second contact hole is also located in the substrate 200, and the bottom of the second contact hole exposes the second lower metal layer 202.

[0058] In this embodiment, the method for forming the first contact hole and the second contact hole further includes: after the second etching process, using a third etching process to continue etching the exposed substrate 200 until the first lower metal layer 201 and the top surface 202 of the second lower metal layer are exposed.

[0059] In this embodiment, after forming the second dielectric layer 209 , a first upper metal layer 210 and a second upper metal layer 211 are formed separately from each other, the first conductive plug 207 is connected to the first upper metal layer 210 , and the second conductive plug 208 is connected to the second upper metal layer 211 .

[0060] In this embodiment, the method for forming the first conductive plug 207, the second conductive plug 208, the first upper metal layer 210 and the second upper metal layer 211 further includes: after forming the first contact hole and the second contact hole, forming a conductive material layer (not shown in the figure) on the surface of the second dielectric layer 209 and in the first contact hole and the second contact hole; planarizing the conductive material layer; after the planarization process, etching the conductive material layer until the surface of the second dielectric layer 209 is exposed, forming the first conductive plug 207 and the first upper metal layer 210 located on the first conductive plug 207, and forming the second conductive plug 208 and the second upper metal layer 211 located on the second conductive plug 208.

[0061] Correspondingly, the embodiment of the present invention also provides a capacitor device formed by the above method, please continue to refer to Figures 4 to 6 , comprising: a substrate 200, the substrate 200 comprising a first region I, a second region II and a third region III arranged along a first direction Y, the second region II being located between the first region I and the third region III; a metal layer structure located on the substrate 200, the metal layer structure comprising a plurality of first electrode layers 203 stacked, a second electrode layer 204 located between two adjacent first electrode layers 203, and a first dielectric layer 205 located between adjacent first electrode layers 203 and second electrode layers 204, each first electrode layer 203 being located on the second region II and extending to the first region I, each second electrode layer 204 being located on the second region II and extending to the third region III; a first conductive plug 207 located on the first region I, the first conductive plug 207 comprising a first portion a1 and a second portion a2 located on the first portion a1, the first portion a2 1 penetrates each first electrode layer 203 along the normal direction of the substrate 200 surface and connects each first electrode layer 203, the side wall of the first portion a1 and the normal direction of the substrate 200 surface have a first angle β1, the side wall of the second portion a2 and the normal direction of the substrate 200 surface have a second angle β2, and the first angle β1 is greater than the second angle β2; a second conductive plug 208 is located on the third region III, the second conductive plug 208 includes a third portion a3 and a fourth portion a4 located on the third portion a3, the third portion a3 penetrates each second electrode layer 204 along the normal direction of the substrate 200 surface and connects each second electrode layer 204, the side wall of the third portion a3 and the normal direction of the substrate 200 surface have a third angle β3, the side wall of the fourth portion a4 and the normal direction of the substrate 200 surface have a fourth angle β4, and the third angle β3 is greater than the fourth angle β4.

[0062] At this point, the side wall of the first part a1 and the normal direction of the substrate 200 surface have a first angle β1, and the side wall of the second part a2 and the normal direction of the substrate 200 surface have a second angle β2, and the first angle β1 is greater than the second angle β2, so that the contact surface between the first conductive plug 207 and each first electrode layer 203 has a larger inclination, which increases the contact area between the first conductive plug 207 and each first electrode layer 203, which is beneficial to reducing the contact resistance between the first conductive plug 207 and each first electrode layer 203, and is beneficial to improving the performance of the capacitor; similarly, the contact surface between the second conductive plug 208 and each second electrode layer 204 is increased, which is beneficial to improving the performance of the capacitor.

[0063] In this embodiment, the first angle β1 ranges from 10 degrees to 40 degrees; the third angle β3 ranges from 10 degrees to 40 degrees.

[0064] In this embodiment, the substrate 200 further includes a first lower metal layer 201 located in the first region I and a second lower metal layer 202 located in the third region III; the first conductive plug 207 further includes a fifth portion a5, the fifth portion a5 is located between the surface of the first lower metal layer 201 and the first portion a1, the side wall of the fifth portion a5 has a fifth angle β5 with the normal direction of the surface of the substrate 200, and the first angle β1 is greater than the fifth angle β5; the second conductive plug 208 further includes a sixth portion a6, the sixth portion a6 is located between the surface of the second lower metal layer 202 and the third portion a3, the side wall of the sixth portion a6 has a sixth angle β6 with the normal direction of the surface of the substrate 200, and the third angle β3 is greater than the sixth angle β6.

[0065] In this embodiment, the capacitor device also includes: a second dielectric layer 209 located on the metal layer structure, the second portion a2 and the fourth portion a4 are located in the second dielectric layer 209; a first upper metal layer 210 and a second upper metal layer 211 that are separate from each other and located on the second dielectric layer 209, the first conductive plug 207 is also connected to the first upper metal layer 210, and the second conductive plug 208 is also connected to the second upper metal layer 211.

[0066] In this embodiment, the capacitor device further includes: each upper first electrode layer 203 is located on the side wall and part of the top surface of the second electrode layer 204 below it; each upper second electrode layer 204 is located on the side wall and part of the top surface of the first electrode layer 203 below it.

[0067] In this embodiment, the metal layer structure has an odd number of layers, and the first electrode layer 203 is located at the bottom layer. The capacitor device also includes: a dummy electrode layer 206 located on the top second electrode layer 204 on the third region III, and the dummy electrode layer 206 is separate from the first electrode layer 203.

[0068] In another embodiment, the metal layer structure has an odd number of layers, and the second electrode layer is located at the bottom. The capacitor device further includes: a dummy electrode layer located on the topmost first electrode layer on the first region, and the dummy electrode layer is separate from the second electrode layer.

[0069] In other embodiments, the number of layers of the metal layer structure is an even number, that is, the thickness of the metal layer structure on the first region is the same as the thickness of the metal layer structure on the third region, and no dummy electrode layer is provided.

[0070] In this embodiment, the material of the first electrode layer 203 includes a combination of one or more of TiN, TaN, Ta, W, TiO, Ti, Pt and Ni; the material of the second electrode layer 204 includes a combination of one or more of TiN, TaN, Ta, W, TiO, Ti, Pt and Ni.

[0071] In this embodiment, the material of the first dielectric layer 205 includes one or more of HfO, AlO, ZrO and LaO.

[0072] In this embodiment, the thickness of the first electrode layer 203 is in a range of 300 angstroms to 800 angstroms; the thickness of the second electrode layer 204 is in a range of 300 angstroms to 800 angstroms.

[0073] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A capacitor device, characterized in that: include: A substrate, the substrate comprising a first region, a second region and a third region arranged along a first direction, wherein the second region is located between the first region and the third region; a metal layer structure located on the substrate, the metal layer structure comprising a plurality of first electrode layers stacked together, a second electrode layer located between two adjacent first electrode layers, and a first dielectric layer located between adjacent first electrode layers and second electrode layers, each of the first electrode layers being located on the second region and extending to the first region, and each of the second electrode layers being located on the second region and extending to the third region; a first conductive plug located on the first region, the first conductive plug comprising a first portion and a second portion located on the first portion, the first portion penetrating through each of the first electrode layers along a normal direction of the substrate surface and connecting each of the first electrode layers, a side wall of the first portion having a first angle with the normal direction of the substrate surface, a side wall of the second portion having a second angle with the normal direction of the substrate surface, and the first angle being greater than the second angle; A second conductive plug is located on the third region, the second conductive plug includes a third portion and a fourth portion located on the third portion, the third portion penetrates each of the second electrode layers along the normal direction of the substrate surface and connects each of the second electrode layers, the side wall of the third portion has a third angle with the normal direction of the substrate surface, the side wall of the fourth portion has a fourth angle with the normal direction of the substrate surface, and the third angle is greater than the fourth angle.

2. The capacitive device according to claim 1, wherein: The first angle ranges from 10 degrees to 40 degrees; the third angle ranges from 10 degrees to 40 degrees.

3. The capacitor device according to claim 1, wherein: The substrate also has a first lower metal layer located in the first area and a second lower metal layer located in the third area; the first conductive plug also includes a fifth portion, the fifth portion is located between the surface of the first lower metal layer and the first portion, the side wall of the fifth portion has a fifth angle with the normal direction of the substrate surface, and the first angle is greater than the fifth angle; the second conductive plug also includes a sixth portion, the sixth portion is located between the surface of the second lower metal layer and the third portion, the side wall of the sixth portion has a sixth angle with the normal direction of the substrate surface, and the third angle is greater than the sixth angle.

4. The capacitive device according to claim 1, wherein: Also includes: a second dielectric layer located on the metal layer structure, wherein the second portion and the fourth portion are located in the second dielectric layer; A first upper metal layer and a second upper metal layer are separated from each other and are located on the second dielectric layer. The first conductive plug is also connected to the first upper metal layer, and the second conductive plug is also connected to the second upper metal layer.

5. The capacitor device according to claim 1, wherein: include: The first electrode layer of each upper layer is located on the side wall and a part of the top surface of the second electrode layer of the lower layer; the second electrode layer of each upper layer is located on the side wall and a part of the top surface of the first electrode layer of the lower layer.

6. The capacitive device according to claim 1, wherein: The number of layers of the metal layer structure is odd, and the first electrode layer is located at the bottom layer. The capacitor device also includes: a dummy electrode layer on the second electrode layer that is the top layer on the third region, and the dummy electrode layer and the first electrode layer are separate from each other; the number of layers of the metal layer structure is odd, and the second electrode layer is located at the bottom layer. The capacitor device also includes: a dummy electrode layer on the first electrode layer that is the top layer on the first region, and the dummy electrode layer and the second electrode layer are separate from each other.

7. The capacitive device according to claim 1, wherein: The material of the first electrode layer includes a combination of one or more of TiN, TaN, Ta, W, TiO, Ti, Pt and Ni; the material of the second electrode layer includes a combination of one or more of TiN, TaN, Ta, W, TiO, Ti, Pt and Ni.

8. The capacitive device according to claim 1, wherein: The material of the first dielectric layer includes one or more of HfO, AlO, ZrO and LaO.

9. The capacitive device according to claim 1, wherein: The thickness of the first electrode layer ranges from 300 angstroms to 800 angstroms; the thickness of the second electrode layer ranges from 300 angstroms to 800 angstroms.

10. A method for forming a capacitor device, characterized in that: include: Providing a substrate, the substrate comprising a first region, a second region and a third region arranged along a first direction, wherein the second region is located between the first region and the third region; forming a metal layer structure on the substrate, the metal layer structure comprising a plurality of stacked first electrode layers, a second electrode layer located between two adjacent first electrode layers, and a first dielectric layer located between adjacent first electrode layers and second electrode layers, each of the first electrode layers being located on the second region and extending to the first region, and each of the second electrode layers being located on the second region and extending to the third region; forming a first conductive plug on the first region, the first conductive plug comprising a first portion and a second portion located on the first portion, the first portion penetrating through each of the first electrode layers along a normal direction of the substrate surface and connecting each of the first electrode layers, a side wall of the first portion having a first angle with the normal direction of the substrate surface, a side wall of the second portion having a second angle with the normal direction of the substrate surface, and the first angle being greater than the second angle; A second conductive plug is formed on the third region, the second conductive plug comprising a third portion and a fourth portion located on the third portion, the third portion penetrates each of the second electrode layers along the normal direction of the substrate surface and connects each of the second electrode layers, the side wall of the third portion has a third angle with the normal direction of the substrate surface, the side wall of the fourth portion has a fourth angle with the normal direction of the substrate surface, and the third angle is greater than the fourth angle.

11. The method for forming a capacitive device according to claim 10, wherein: The first angle ranges from 10 degrees to 40 degrees; the third angle ranges from 10 degrees to 40 degrees.

12. The method for forming a capacitive device according to claim 10, wherein: Before forming the first conductive plug and the second conductive plug, forming a second dielectric layer on the metal layer structure, wherein the second portion of the first conductive plug and the fourth portion of the second conductive plug are located in the second dielectric layer; The method for forming the first conductive plug and the second conductive plug comprises: using a first etching process to etch a portion of the second dielectric layer located on the first area and the third area until the surface of the metal layer structure is exposed; using a second etching process to etch the exposed metal layer structure until the substrate is exposed, so as to form a first contact hole on the first area and a second contact hole on the third area, wherein the side wall of the first contact hole in the metal layer structure has the first angle with the normal direction of the substrate surface, the side wall of the first contact hole in the second dielectric layer has the second angle with the normal direction of the substrate surface, the side wall of the second contact hole in the metal layer structure has the third angle with the normal direction of the substrate surface, and the side wall of the second contact hole in the second dielectric layer has the fourth angle with the normal direction of the substrate surface; forming the first conductive plug in the first contact hole; and forming the second conductive plug in the second contact hole.

13. The method for forming a capacitive device according to claim 12, wherein: The substrate comprises a first lower metal layer located in the first area and a second lower metal layer located in the third area; the first conductive plug further comprises a fifth portion, the fifth portion is located between the surface of the first lower metal layer and the first portion, the side wall of the fifth portion has a fifth angle with the normal direction of the substrate surface, and the first angle is greater than the fifth angle; the second conductive plug further comprises a sixth portion, the sixth portion is located between the surface of the second lower metal layer and the third portion, the side wall of the sixth portion has a sixth angle with the normal direction of the substrate surface, and the third angle is greater than the sixth angle; the first contact hole is also located in the substrate, and the bottom of the first contact hole exposes the first lower metal layer; the second contact hole is also located in the substrate, and the bottom of the second contact hole exposes the second lower metal layer.

14. The method for forming a capacitive device according to claim 13, wherein: The method for forming the first contact hole and the second contact hole further includes: after the second etching process, using a third etching process to continue etching the exposed substrate until the top surfaces of the first lower metal layer and the second lower metal layer are exposed.

15. The method for forming a capacitive device according to claim 12, wherein: After forming the second dielectric layer, a first upper metal layer and a second upper metal layer separated from each other are also formed, the first conductive plug is also connected to the first upper metal layer, and the second conductive plug is also connected to the second upper metal layer; The method for forming the first conductive plug, the second conductive plug, the first upper metal layer and the second upper metal layer also includes: after forming the first contact hole and the second contact hole, forming a conductive material layer on the surface of the second dielectric layer and in the first contact hole and the second contact hole; planarizing the conductive material layer; after the planarization process, etching the conductive material layer until the surface of the second dielectric layer is exposed, forming the first conductive plug and the first upper metal layer located on the first conductive plug, and forming the second conductive plug and the second upper metal layer located on the second conductive plug.

16. The method for forming a capacitive device according to claim 10, wherein: The number of layers of the metal layer structure is odd, and the first electrode layer is located at the bottom. The method also includes: when forming the top first electrode layer, a dummy electrode layer is also formed on the top second electrode layer on the third region, and the dummy electrode layer and the first electrode layer are separate from each other; the number of layers of the metal layer structure is odd, and the second electrode layer is located at the bottom. The method also includes: when forming the top second electrode layer, a dummy electrode layer is also formed on the top first electrode layer on the first region, and the dummy electrode layer and the second electrode layer are separate from each other.

17. The method for forming a capacitive device according to claim 10, wherein: The method for forming adjacent first electrode layers and second electrode layers includes: forming a first electrode material layer on the substrate, or forming the first dielectric layer and the first electrode material layer located on the first dielectric layer on the upper second electrode layer; patterning the first electrode material layer to form the first electrode layer; forming the first dielectric layer and the second electrode material layer located on the first dielectric layer on the first electrode layer; patterning the second electrode material layer to form the second electrode layer.

18. The method for forming a capacitive device according to claim 10, wherein: The first electrode layer of each upper layer is located on the side wall and a part of the top surface of the second electrode layer of the lower layer; the second electrode layer of each upper layer is located on the side wall and a part of the top surface of the first electrode layer of the lower layer.

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