Semiconductor laser chip

By plating multi-layer alternating anti-reflection layers on both sides of the epitaxial layer of the semiconductor laser chip, the complexity of optical wave guidance and mode regulation of nitride semiconductor lasers is solved, and the regulation and efficiency of light field distribution are achieved.

CN119154088APending Publication Date: 2024-12-17GEN SEMICONDUCTOR (ANHUI) CO LTD
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Patent Information

Application Number
CN202411254552.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-09
Publication Date
2024-12-17

AI Technical Summary

Technical Problem

Nitride semiconductor lasers have complexities in optical wave guidance and mode regulation, which limits the improvement of beam quality and is difficult to process technology, resulting in serious waveguide loss and resonant cavity light absorption loss.

Method used

A semiconductor laser chip is designed, and an anti-reflection layer and a high-reflection layer are plated on both sides of the epitaxial layer. The anti-reflection layer is composed of the first, second and third sub-reflection layers arranged alternately in multiple layers. The periodic structure is formed, and the electric field intensity that simulates the light field distribution is a periodic oscillation distribution. The peak electric field intensity from the first sub-pre-reflection layer along the laser exit direction to the outermost second or third sub-pre-reflection layer decreases. trend.

Benefits of technology

Regulate the laser's light field distribution, enhance the light field limit, accelerate the stimulated radiation, reduce the laser's threshold current density and improve the slope efficiency.

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Abstract

The semiconductor laser chip comprises a substrate and an epitaxial layer, the epitaxial layer is arranged on the upper layer of the substrate, the surface of a first cavity surface of the epitaxial layer is plated with an antireflection layer, and the surface of a second cavity surface of the epitaxial layer is plated with a high reflection layer. The antireflection layer comprises a first sub-antireflection layer, a plurality of second sub-antireflection layers and a plurality of third sub-antireflection layers which are sequentially plated on the surface of the first cavity surface, and the plurality of second sub-antireflection layers and the plurality of third sub-antireflection layers are sequentially and alternately arranged to form a periodic structure; the electric field intensity of simulation light field distribution of the antireflection layer is in periodic oscillation distribution, and the peak electric field intensity from the first sub antireflection layer to the second sub antireflection layer or the third sub antireflection layer on the outermost layer in the laser emitting direction is in a decreasing trend. Light field distribution of the laser can be regulated and controlled, light field limitation is enhanced, stimulated radiation is accelerated to exceed spontaneous radiation, threshold current density of the laser is reduced, and slope efficiency is improved.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor optoelectronic devices, and in particular to a semiconductor laser chip. Background Art

[0002] Lasers are widely used in laser display, laser TV, laser projector, communication, medical treatment, weapons, guidance, ranging, spectral analysis, cutting, precision welding, high-density optical storage and other fields. There are many types of lasers, and the classification methods are also diverse, mainly including solid, gas, liquid, semiconductor and dye types of lasers; compared with other types of lasers, all-solid-state semiconductor lasers have the advantages of small size, high efficiency, light weight, good stability, long life, simple and compact structure, and miniaturization.

[0003] There are big differences between lasers and nitride semiconductor light-emitting diodes:

[0004] 1) Laser is generated by stimulated radiation of carriers, the spectrum half-width is small, the brightness is very high, and the output power of a single laser can be in the W level, while nitride semiconductor light-emitting diodes are spontaneously radiated, and the output power of a single light-emitting diode is in the mW level;

[0005] 2) The current density of the laser reaches KA / cm2, which is more than 2 orders of magnitude higher than that of nitride light-emitting diodes, resulting in stronger electron leakage, more serious Auger recombination, stronger polarization effect, more serious electron-hole mismatch, and more serious efficiency attenuation Droop effect;

[0006] 3) The spontaneous transition radiation of the light-emitting diode is incoherent light that transitions from a high energy level to a low energy level without any external influence, while the laser is stimulated transition radiation, and the energy of the induced photon should be equal to the difference in the energy level of the electron transition, producing the same coherent light as the photon and the induced photon;

[0007] 4) Different principles: When an external voltage is applied to a light-emitting diode, electron holes jump to a quantum well or a pn junction to generate radiative recombination light, while a laser can only emit when the lasing conditions are met. The carrier distribution in the active region must be reversed, and the stimulated radiation light oscillates back and forth in the resonant cavity. The propagation in the gain medium amplifies the light, and the threshold condition is met so that the gain is greater than the loss, and finally the laser is output.

[0008] Nitride semiconductor lasers have the following problems: The lateral and transverse guidance mechanism and mode control of light waves are complex, which limits the improvement of beam quality. Ridge waveguide etching, resonant cavity cleavage, cavity surface coating and other process technologies are difficult, resulting in serious waveguide loss and resonant cavity light absorption loss. Summary of the invention

[0009] To solve one of the above technical problems, the present invention provides a semiconductor laser chip.

[0010] An embodiment of the present invention provides a semiconductor laser chip, comprising a substrate and an epitaxial layer, wherein the epitaxial layer is arranged on an upper layer of the substrate, and the left and right sides of the epitaxial layer are respectively a first cavity facet and a second cavity facet, and the first cavity facet is located at a far end of a laser emission direction, and the second cavity facet is located at a near end of the laser emission direction, an anti-reflection layer is plated on a surface of the first cavity facet, and a high-reflection layer is plated on a surface of the second cavity facet, and the anti-reflection layer comprises a first sub-anti-reflection layer, a multi-layer second sub-anti-reflection layer, and a multi-layer third sub-anti-reflection layer sequentially plated on a surface of the first cavity facet, and the multi-layer second sub-anti-reflection layer and the multi-layer third sub-anti-reflection layer are alternately arranged in sequence to form a periodic structure, and the electric field intensity of the simulated light field distribution of the anti-reflection layer is a periodic oscillation distribution, and the peak electric field intensity from the first sub-anti-reflection layer along the laser emission direction to the outermost second sub-anti-reflection layer or the third sub-anti-reflection layer shows a decreasing trend.

[0011] Preferably, the reflectivity of the anti-reflection layer is 60% to 90% when the laser wavelength is 500nm to 535nm, and the reflectivity of the high-reflection layer is 95% to 100% when the laser wavelength is 500nm to 535nm.

[0012] Preferably, the number of anti-reflection layers is 8 to 15.

[0013] Preferably, the first cavity surface includes 1 to 3 peak electric field intensities and 1 to 3 valley electric field intensities, and the anti-reflection layer includes 2 to 8 peak electric field intensities and 2 to 8 valley electric field intensities.

[0014] Preferably, the first sub-anti-reflection layer includes 1 peak electric field intensity, the second sub-anti-reflection layer adjacent to the first sub-anti-reflection layer includes 1 valley electric field intensity, the interface area between each second sub-anti-reflection layer and the third sub-anti-reflection layer adjacent to the outside thereof includes 1 peak electric field intensity, the interface area between each second sub-anti-reflection layer and the third sub-anti-reflection layer adjacent to the inside thereof includes 1 valley electric field intensity, and the interface area between the outermost second sub-anti-reflection layer or the third sub-anti-reflection layer and the air includes 1 peak electric field intensity.

[0015] Preferably, when the number of layers of the anti-reflection layer is 8, the thicknesses from the first sub-anti-reflection layer to the outermost second sub-anti-reflection layer are 15 nm to 35 nm, 35 nm to 65 nm, 45 nm to 75 nm, 70 nm to 90 nm, 40 nm to 70 nm, 50 nm to 80 nm, 50 nm to 80 nm, and 10 nm to 40 nm, respectively;

[0016] When the number of layers of the anti-reflection layer is 10, the thicknesses from the first sub-anti-reflection layer to the outermost second sub-anti-reflection layer are 45nm to 65nm, 70nm to 85nm, 80nm to 90nm, 60nm to 70nm, 80nm to 90nm, 60nm to 75nm, 80nm to 90nm, 55nm to 75nm, 75nm to 95nm, and 50nm to 85nm, respectively;

[0017] When the number of layers of the anti-reflection layer is 11, the thicknesses from the first sub-anti-reflection layer to the outermost third sub-anti-reflection layer are 45nm to 65nm, 70nm to 85nm, 80nm to 90nm, 60nm to 70nm, 80nm to 90nm, 60nm to 75nm, 80nm to 90nm, 55nm to 75nm, 75nm to 95nm, 50nm to 85nm, and 1nm to 30nm, respectively.

[0018] Preferably, the first sub-anti-reflection layer is AlON, and the second sub-anti-reflection layer is SiN x The third sub-anti-reflection layer is SiN x or SiO2;

[0019] Alternatively, the first sub-anti-reflection layer is AlON, the second sub-anti-reflection layer is SiO2, and the third sub-anti-reflection layer is Ta2O5 or SiO2.

[0020] Preferably, when the number of layers of the anti-reflection layer is 8, the second sub-anti-reflection layer is SiO2, and the third sub-anti-reflection layer is Ta2O5, the quarter wavelength from the first sub-anti-reflection layer to the outermost second sub-anti-reflection layer is 0.3 to 0.5, 0.4 to 0.8, 0.8 to 1.3, 0.8 to 1.2, 0.8 to 1.2, 0.6 to 1.0, 0.9 to 1.4, 0.1 to 0.5;

[0021] When the number of anti-reflection layers is 10, the second sub-anti-reflection layer is SiN x , when the third sub-anti-reflection layer is SiO2, the quarter wavelengths from the first sub-anti-reflection layer to the outermost second sub-anti-reflection layer are 0.75 to 0.85, 1.0 to 2.0, 0.9 to 1.3, 0.9 to 1.3, 0.8 to 1.2, 0.9 to 1.3, 0.8 to 1.2, 0.9 to 1.3, 0.8 to 1.2, 1.0 to 1.5;

[0022] When the number of anti-reflection layers is 11, the second sub-anti-reflection layer is SiN xWhen the third sub-anti-reflection layer is SiO2, the quarter wavelength from the first sub-anti-reflection layer to the outermost third sub-anti-reflection layer is 0.75 to 0.85, 1.0 to 2.0, 0.9 to 1.3, 0.9 to 1.3, 0.8 to 1.2, 0.9 to 1.3, 0.8 to 1.2, 0.9 to 1.3, 0.8 to 1.2, 1.0 to 1.5, and 0.005 to 0.2 respectively.

[0023] Preferably, the epitaxial layer includes a lower confinement layer, a lower waveguide layer, an active layer, an upper waveguide layer, an electron blocking layer and an upper confinement layer, which are arranged in sequence from bottom to top, and the epitaxial layer is any one or any combination of GaN, InGaN, InN, AlInN, AlGaN, AlInGaN, AlN, GaAs, GaP, InP, AlGaAs, AlInGaAs, AlGaInP, InGaAs, InGaAsN, AlInAs, AlInP, AlGaP, InGaP, GaSb, InSb, InAs, InAsSb, AlGaSb, AlSb, InGaSb, AlGaAsSb, InGaAsSb, SiC, Ga2O3, BN, and diamond.

[0024] Preferably, the substrate comprises sapphire, silicon, Ge, SiC, AlN, GaN, GaAs, InP, InAs, GaSb, sapphire / SiO2 composite substrate, Mo, TiW, CuW, Cu, sapphire / AlN composite substrate, diamond, graphene, sapphire / SiN x , Sapphire / SiO2 / SiN x Composite substrate, sapphire / SiN x Any one of a / SiO2 composite substrate, a magnesium aluminum spinel MgAl2O4, MgO, ZnO, ZrB2, LiAlO2 and LiGaO2 composite substrate.

[0025] The beneficial effects of the present invention are as follows: the present invention is provided with an anti-reflection layer and a high-reflection layer on the cavity surfaces on both sides of the epitaxial layer of the semiconductor laser chip. The anti-reflection layer includes a first sub-anti-reflection layer, a multi-layer second sub-anti-reflection layer and a multi-layer third sub-anti-reflection layer sequentially plated on the surface of the first cavity surface, and the multi-layer second sub-anti-reflection layer and the multi-layer third sub-anti-reflection layer are alternately arranged in sequence to form a periodic structure, and the electric field intensity of the simulated light field distribution of the anti-reflection layer is a periodic oscillation distribution, and the peak electric field intensity from the first sub-anti-reflection layer along the laser emission direction to the outermost second sub-anti-reflection layer or the third sub-anti-reflection layer shows a downward trend. The present invention can regulate the light field distribution of the laser, enhance the light field confinement, accelerate the stimulated radiation to exceed the spontaneous radiation, reduce the threshold current density of the laser and improve the slope efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0027] Figure 1 A schematic diagram of the structure of a semiconductor laser chip according to an embodiment of the present invention;

[0028] Figure 2 Schematic diagram of the structure of the anti-reflection layer according to an embodiment of the present invention, with 8 layers;

[0029] Figure 3 Schematic diagram of the structure of the anti-reflection layer according to an embodiment of the present invention, with 10 layers;

[0030] Figure 4 Schematic diagram of the structure of the anti-reflection layer according to an embodiment of the present invention, with 11 layers;

[0031] Figure 5 This is an electric field intensity distribution diagram of a simulated light field distribution of a semiconductor laser chip according to an embodiment of the present invention, and the number of anti-reflection layers is 10;

[0032] Figure 6 This is an electric field intensity distribution diagram of a simulated light field distribution of a semiconductor laser chip according to an embodiment of the present invention, and the number of anti-reflection layers is 8;

[0033] Figure 7 This is an electric field intensity distribution diagram of a simulated light field distribution of a semiconductor laser chip according to an embodiment of the present invention, and the number of anti-reflection layers is 11;

[0034] Figure 8 A reflectivity diagram of a simulated light field distribution of a semiconductor laser chip according to an embodiment of the present invention;

[0035] Fig. 9 This is a reflectivity diagram of a simulated light field distribution of a semiconductor laser chip according to an embodiment of the present invention, and the number of anti-reflection layers is 8;

[0036] Fig.10 This is a reflectivity diagram of a simulated light field distribution of a semiconductor laser chip according to an embodiment of the present invention, and the number of anti-reflection layers is 11;

[0037] Fig.11 It is a schematic diagram of the structure of the epitaxial layer described in an embodiment of the present invention.

[0038] Reference numerals:

[0039] 100, substrate, 101, epitaxial layer, 102, anti-reflection layer, 103, high reflection layer;

[0040] 1011, first cavity surface, 1012, second cavity surface;

[0041] 1021, a first sub-anti-reflection layer, 1022, a second sub-anti-reflection layer, 1023, a third sub-anti-reflection layer. DETAILED DESCRIPTION

[0042] In order to make the technical solutions and advantages in the embodiments of the present application more clearly understood, the exemplary embodiments of the present application are further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than an exhaustive list of all the embodiments. It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other without conflict.

[0043] like Figure 1 As shown, this embodiment proposes a semiconductor laser chip, including a substrate 100 and an epitaxial layer 101. The epitaxial layer 101 is arranged on the upper layer of the substrate 100. The left and right sides of the epitaxial layer 101 are respectively a first cavity surface 1011 and a second cavity surface 1012. Among them, the first cavity surface 1011 is located at the far end of the laser emission direction, and the second cavity surface 1012 is located at the near end of the laser emission direction. An anti-reflection layer 102 is plated on the surface of the first cavity surface 1011. A high reflection layer 103 is plated on the surface of the second cavity surface 1012.

[0044] Specifically, in this embodiment, the anti-reflection layer 102 on the surface of the first cavity surface 1011 includes a first sub-anti-reflection layer 1021, a multi-layer second sub-anti-reflection layer 1022, and a multi-layer third sub-anti-reflection layer 1023 sequentially plated on the surface of the first cavity surface 1011. The multi-layer second sub-anti-reflection layer 1022 and the multi-layer third sub-anti-reflection layer 1023 are alternately arranged in sequence to form a periodic structure, such as Figure 2 The structure schematic diagram of the anti-reflection layer 102 formed by alternately arranging four layers of the second anti-reflection sub-layer 1022 and three layers of the third anti-reflection sub-layer 1023 is shown (the figure is only a schematic diagram and does not represent the actual size). In the anti-reflection layer 102, the electric field intensity presents a periodic oscillation distribution, and the peak electric field intensity from the first anti-reflection sub-layer 1021 along the laser emission direction to the outermost second anti-reflection sub-layer 1022 or the third anti-reflection sub-layer 1023 presents a downward trend.

[0045] In this embodiment, an anti-reflection layer 102 and a high-reflection layer 103 are respectively plated on the cavity surfaces on both sides of the epitaxial layer 101 of the semiconductor laser chip. The anti-reflection layer 102 includes a first sub-anti-reflection layer 1021, a multi-layer second sub-anti-reflection layer 1022 and a multi-layer third sub-anti-reflection layer 1023, which are sequentially plated on the surface of the first cavity surface 1011, and the multi-layer second sub-anti-reflection layer 1022 and the multi-layer third sub-anti-reflection layer 1023 are alternately arranged in sequence to form a periodic structure, and the electric field intensity of the anti-reflection layer 102 is a periodic oscillation distribution, and the peak electric field intensity from the first sub-anti-reflection layer 1021 along the laser emission direction to the outermost second sub-anti-reflection layer 1022 or the third sub-anti-reflection layer 1023 shows a downward trend. The present invention can regulate the light field distribution of the laser, enhance the light field confinement, accelerate the stimulated radiation to exceed the spontaneous radiation, reduce the threshold current density of the laser and improve the slope efficiency.

[0046] In some optional embodiments, the number of layers of the anti-reflection layer 102 can be designed to be 8 to 15 layers. Among them, the first sub-anti-reflection layer 1021 is fixed to 1 layer, and the number of the second sub-anti-reflection layer 1022 and the third sub-anti-reflection layer 1023 can be determined according to the total number of layers of the anti-reflection layer 102. If the number of layers of the anti-reflection layer 102 is 8, then the first sub-anti-reflection layer 1021 is 1 layer, the second sub-anti-reflection layer 1022 is 4 layers, and the third sub-anti-reflection layer 1023 is 3 layers, and the second sub-anti-reflection layer 1022 and the third sub-anti-reflection layer 1023 are alternately arranged in sequence, such as Figure 2 If the number of layers of the anti-reflection layer 102 is 10, then the first sub-anti-reflection layer 1021 is 1 layer, the second sub-anti-reflection layer 1022 is 5 layers, and the third sub-anti-reflection layer 1023 is 4 layers, and the second sub-anti-reflection layer 1022 and the third sub-anti-reflection layer 1023 are alternately arranged in sequence, as shown in FIG. Figure 3 If the number of layers of the anti-reflection layer 102 is 11, then the first sub-anti-reflection layer 1021 is 1 layer, the second sub-anti-reflection layer 1022 is 5 layers, and the third sub-anti-reflection layer 1023 is 5 layers, and the second sub-anti-reflection layer 1022 and the third sub-anti-reflection layer 1023 are alternately arranged in sequence, as shown in FIG. Figure 4 shown.

[0047] In this embodiment, the electric field intensity distribution on the anti-reflection layer 102 is different according to the number of anti-reflection layers 102 .

[0048] Specifically, the first cavity surface 1011 of the epitaxial layer 101 includes 1 to 3 peak electric field strengths and 1 to 3 valley electric field strengths. The anti-reflection layer 102 may include 2 to 8 peak electric field strengths and 2 to 8 valley electric field strengths. Among them, the first sub-anti-reflection layer 1021 includes 1 peak electric field strength, and the second sub-anti-reflection layer 1022 adjacent to the first sub-anti-reflection layer 1021 includes 1 valley electric field strength. The interface region between each second sub-anti-reflection layer 1022 and the third sub-anti-reflection layer 1023 adjacent to the outside includes 1 peak electric field strength. The interface region between each second sub-anti-reflection layer 1022 and the third sub-anti-reflection layer 1023 adjacent to the inside includes 1 valley electric field strength. The interface region between the outermost second sub-anti-reflection layer 1022 or the third sub-anti-reflection layer 1023 and the air includes 1 peak electric field strength.

[0049] For example, the number of anti-reflection layers 102 is 10. Figure 5As shown, on the first cavity surface 1011 of the epitaxial layer 101, there are 1 peak electric field intensity and 1 valley electric field intensity, which are respectively recorded as the first peak electric field intensity 104 and the first valley electric field intensity 111. In the first sub-anti-reflection layer 1021, there is 1 peak electric field intensity, which is recorded as the second peak electric field intensity 105. In the first second sub-anti-reflection layer 1022 adjacent to the first sub-anti-reflection layer 1021, there is 1 valley electric field intensity, which is recorded as the second valley electric field intensity 112. The interface region between the first second sub-anti-reflection layer 1022 and the first third sub-anti-reflection layer 1023 adjacent to it includes 1 peak electric field intensity, which is recorded as the third peak electric field intensity 106. Similarly, the interface region between the first third sub-anti-reflection layer 1023 and the second second sub-anti-reflection layer 1022 includes 1 valley electric field intensity, which is recorded as the third valley electric field intensity 113. The interface region between the second second sub-anti-reflection layer 1022 and the second third sub-anti-reflection layer 1023 includes a peak electric field intensity, which is recorded as the fourth peak electric field intensity 107. The interface region between the second third sub-anti-reflection layer 1023 and the third second sub-anti-reflection layer 1022 includes a valley electric field intensity, which is recorded as the fourth valley electric field intensity 114. The interface region between the third second sub-anti-reflection layer 1022 and the third third sub-anti-reflection layer 1023 includes a peak electric field intensity, which is recorded as the fifth peak electric field intensity 108. The interface region between the third third sub-anti-reflection layer 1023 and the fourth second sub-anti-reflection layer 1022 includes a valley electric field intensity, which is recorded as the fifth valley electric field intensity 115. The interface region between the fourth second sub-anti-reflection layer 1022 and the fourth third sub-anti-reflection layer 1023 includes a peak electric field intensity, which is recorded as the sixth peak electric field intensity 109. The interface region between the fourth third anti-reflection sub-layer 1023 and the fifth second anti-reflection sub-layer 1022 includes one valley electric field intensity, recorded as the sixth valley electric field intensity 116. The interface region between the fifth second anti-reflection sub-layer 1022 and air includes one peak electric field intensity, recorded as the seventh peak electric field intensity 110.

[0050] In this embodiment, since the electric field intensity of the anti-reflection layer 102 is a periodic oscillation distribution, and the peak electric field intensity from the first sub-anti-reflection layer 1021 along the laser emission direction to the outermost second sub-anti-reflection layer 1022 or the third sub-anti-reflection layer 1023 is in a downward trend. Therefore, all the above peak electric field intensities and valley electric field intensities have the following relationship:

[0051] The second peak electric field strength 105 ≥ the third peak electric field strength 106 ≥ the fourth peak electric field strength 107 ≥ the fifth peak electric field strength 108 ≥ the sixth peak electric field strength 109 ≥ the seventh peak electric field strength 110;

[0052] The sixth valley electric field strength 116 ≥ the fifth valley electric field strength 115 ≥ the fourth valley electric field strength 114 ≥ the third valley electric field strength 113 ≥ the second valley electric field strength 112 ≥ the first valley electric field strength 111 .

[0053] Furthermore, the ratio of the second peak electric field strength 105 divided by the third peak electric field strength 106 is a: 1≤a≤2.5; the ratio of the second peak electric field strength 105 divided by the fourth peak electric field strength 107 is b: 1.5≤b≤3; the ratio of the second peak electric field strength 105 divided by the fifth peak electric field strength 108 is c: 3≤c≤6; the ratio of the second peak electric field strength 105 divided by the sixth peak electric field strength 109 is d: 6≤d≤10; the ratio of the second peak electric field strength 105 divided by the seventh peak electric field strength 110 is e: 10≤e≤1000; wherein: 1≤a≤b≤3≤c≤6≤d≤10≤e≤1000.

[0054] This embodiment reduces the optical damage of the laser cavity surface, improves the COD optical catastrophe threshold current density, and regulates the light absorption loss of the interface, reduces the aging damage of the interface, and reduces the light decay and dead light ratio during the aging process by designing the interface electric field intensity distribution of the anti-reflection layer 102 and the position and intensity distribution of the peak electric field intensity and the valley electric field intensity in the anti-reflection layer 102.

[0055] This embodiment also provides a schematic diagram of the electric field intensity distribution when the number of anti-reflection layers 102 is 8, as shown in FIG. Figure 6 The electric field intensity distribution rule when the number of anti-reflection layers 102 is 8 is the same as the electric field intensity distribution rule when the number of anti-reflection layers 102 is 10, and this embodiment will not be elaborated in detail.

[0056] In some optional embodiments, when the number of layers of the anti-reflection layer 102 is different, the thicknesses corresponding to the first sub-anti-reflection layer 1021, the second sub-anti-reflection layer 1022 and the third sub-anti-reflection layer 1023 are also different. This embodiment is specifically described by taking the number of layers of the anti-reflection layer 102 as 8, 10 and 11 as examples.

[0057] When the number of layers of the anti-reflection layer 102 is 8, the thicknesses from the first sub-anti-reflection layer 1021 to the outermost second sub-anti-reflection layer 1022 are 15nm to 35nm, 35nm to 65nm, 45nm to 75nm, 70nm to 90nm, 40nm to 70nm, 50nm to 80nm, 50nm to 80nm, and 10nm to 40nm, respectively.

[0058] When the number of layers of the anti-reflection layer 102 is 10, the thicknesses from the first sub-anti-reflection layer 1021 to the outermost second sub-anti-reflection layer 1022 are 45nm to 65nm, 70nm to 85nm, 80nm to 90nm, 60nm to 70nm, 80nm to 90nm, 60nm to 75nm, 80nm to 90nm, 55nm to 75nm, 75nm to 95nm, and 50nm to 85nm, respectively.

[0059] When the number of layers of the anti-reflection layer 102 is 11, the thicknesses from the first sub-anti-reflection layer 1021 to the outermost third sub-anti-reflection layer 1023 are 45nm to 65nm, 70nm to 85nm, 80nm to 90nm, 60nm to 70nm, 80nm to 90nm, 60nm to 75nm, 80nm to 90nm, 55nm to 75nm, 75nm to 95nm, 50nm to 85nm, and 1nm to 30nm, respectively.

[0060] When the number of layers of the anti-reflection layer 102 is 11, the thickness of the outermost third sub-anti-reflection layer 1023 is relatively small. Therefore, the seventh peak electric field intensity 110 may also appear in the interface region between the third sub-anti-reflection layer 1023 and the air. Figure 7 shown.

[0061] In some optional embodiments, the reflectivity of the anti-reflection layer 102 is 60% to 90% when the laser wavelength is 500nm to 535nm, and the reflectivity of the high-reflection layer 103 is 95% to 100% when the laser wavelength is 500nm to 535nm.

[0062] Specifically, Figure 8 FIG. 1 shows the reflectivity of the semiconductor laser chip simulated square distribution after being coated with the anti-reflection layer 102 and the high-reflection layer 103. When the number of layers of the anti-reflection layer 102 is specifically limited, for example, when the anti-reflection layer 102 is 8 layers, the reflectivity of the semiconductor laser chip simulated square distribution is as follows: Fig. 9 As shown, when the anti-reflection layer 102 has 11 layers, the reflectivity of the simulated square distribution of the semiconductor laser chip is as follows Fig.10 shown.

[0063] In some optional embodiments, the first sub-anti-reflection layer 1021 is AlON, and the second sub-anti-reflection layer 1022 is SiN x The third sub-anti-reflection layer 1023 is SiN x or SiO2;

[0064] Alternatively, the first sub-anti-reflection layer 1021 is AlON, the second sub-anti-reflection layer 1022 is SiO2, and the third sub-anti-reflection layer 1023 is Ta2O5 or SiO2.

[0065] Specifically, each material has a refractive index η. The refractive index η is the ratio of the speed of light in a vacuum to the speed of light in a medium. The wavelength of light in a medium is given by the equation λ=λ0 / η, where λ0 is the wavelength of light in a vacuum. QWOT=λ0 / 4η is used to determine a quarter wavelength in a layer of a medium. Therefore, in this embodiment, the quarter wavelength QWOT of the first sub-anti-reflection layer 102, the second sub-anti-reflection layer 1022, and the third sub-anti-reflection layer 1023 made of different materials will also be different. This embodiment is still specifically described by taking the number of layers of the anti-reflection layer 102 as 8 layers, 10 layers, and 11 layers as examples.

[0066] When the number of layers of the anti-reflection layer 102 is 8, the second sub-anti-reflection layer 1022 is SiO2, and the third sub-anti-reflection layer 1023 is Ta2O5, the quarter wavelength QWOT from the first sub-anti-reflection layer 1021 to the outermost second sub-anti-reflection layer 1022 is 0.3 to 0.5, 0.4 to 0.8, 0.8 to 1.3, 0.8 to 1.2, 0.8 to 1.2, 0.6 to 1.0, 0.9 to 1.4, and 0.1 to 0.5;

[0067] When the number of anti-reflection layers 102 is 10, the second sub-anti-reflection layer 1022 is SiN x , when the third sub-anti-reflection layer 1023 is SiO2, the quarter wavelength QWOT from the first sub-anti-reflection layer 1021 to the outermost second sub-anti-reflection layer 1022 is 0.75 to 0.85, 1.0 to 2.0, 0.9 to 1.3, 0.9 to 1.3, 0.8 to 1.2, 0.9 to 1.3, 0.8 to 1.2, 0.9 to 1.3, 0.8 to 1.2, 1.0 to 1.5;

[0068] When the number of anti-reflection layers 102 is 11, the second sub-anti-reflection layer 1022 is SiN x , when the third sub-anti-reflection layer 1023 is SiO2, the quarter wavelength QWOT from the first sub-anti-reflection layer 1021 to the outermost third sub-anti-reflection layer 1023 is 0.75 to 0.85, 1.0 to 2.0, 0.9 to 1.3, 0.9 to 1.3, 0.8 to 1.2, 0.9 to 1.3, 0.8 to 1.2, 0.9 to 1.3, 0.8 to 1.2, 1.0 to 1.5, and 0.005 to 0.2 respectively.

[0069] In some optional embodiments, the epitaxial layer 101 includes a lower confinement layer, a lower waveguide layer, an active layer, an upper waveguide layer, an electron blocking layer and an upper confinement layer arranged in sequence from bottom to top, such as Fig.11The epitaxial layer 101 is any one or any combination of GaN, InGaN, InN, AlInN, AlGaN, AlInGaN, AlN, GaAs, GaP, InP, AlGaAs, AlInGaAs, AlGaInP, InGaAs, InGaAsN, AlInAs, AlInP, AlGaP, InGaP, GaSb, InSb, InAs, InAsSb, AlGaSb, AlSb, InGaSb, AlGaAsSb, InGaAsSb, SiC, Ga2O3, BN, and diamond.

[0070] In some optional embodiments, the substrate 100 includes sapphire, silicon, Ge, SiC, AlN, GaN, GaAs, InP, InAs, GaSb, sapphire / SiO2 composite substrate, Mo, TiW, CuW, Cu, sapphire / AlN composite substrate, diamond, graphene, sapphire / SiN x , Sapphire / SiO2 / SiN x Composite substrate, sapphire / SiN x Any one of a / SiO2 composite substrate, a magnesium aluminum spinel MgAl2O4, MgO, ZnO, ZrB2, LiAlO2 and LiGaO2 composite substrate.

[0071] The following table is a parameter comparison between a conventional semiconductor laser chip and the semiconductor laser chip proposed in this embodiment, including COD optical catastrophe current density, slope efficiency, threshold current density, 1000H aging light decay, aging dead light probability, and interface light absorption loss, showing the difference between the conventional semiconductor laser chip and the semiconductor laser chip proposed in this embodiment:

[0072]

[0073] It can be seen that the semiconductor laser chip proposed in this embodiment improves the COD optical catastrophe current density and slope efficiency, reduces the threshold current density, 1000H aging light decay, aging dead light probability and interface light absorption loss compared with traditional semiconductor laser chips, and has obvious advantages over traditional semiconductor laser chips.

[0074] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A semiconductor laser chip, comprising a substrate and an epitaxial layer, wherein the epitaxial layer is arranged on an upper layer of the substrate, characterized in that: The left and right sides of the epitaxial layer are respectively the first cavity surface and the second cavity surface, and the first cavity surface is located at the far end of the laser emission direction, and the second cavity surface is located at the near end of the laser emission direction. The surface of the first cavity surface is plated with an anti-reflection layer, and the surface of the second cavity surface is plated with a high reflection layer. The anti-reflection layer includes a first sub-anti-reflection layer, a multi-layer second sub-anti-reflection layer, and a multi-layer third sub-anti-reflection layer sequentially plated on the surface of the first cavity surface, and the multi-layer second sub-anti-reflection layer and the multi-layer third sub-anti-reflection layer are alternately arranged in sequence to form a periodic structure. The electric field intensity of the simulated light field distribution of the anti-reflection layer is a periodic oscillation distribution, and the peak electric field intensity from the first sub-anti-reflection layer along the laser emission direction to the outermost second sub-anti-reflection layer or the third sub-anti-reflection layer shows a downward trend.

2. The semiconductor laser chip according to claim 1, characterized in that: The reflectivity of the anti-reflection layer is 60% to 90% when the laser wavelength is 500nm to 535nm, and the reflectivity of the high-reflection layer is 95% to 100% when the laser wavelength is 500nm to 535nm.

3. The semiconductor laser chip according to claim 1, characterized in that: The number of layers of the anti-reflection layer is 8 to 15.

4. The semiconductor laser chip according to claim 3, characterized in that: The first cavity surface includes 1 to 3 peak electric field intensities and 1 to 3 valley electric field intensities, and the anti-reflection layer includes 2 to 8 peak electric field intensities and 2 to 8 valley electric field intensities.

5. The semiconductor laser chip according to claim 4, characterized in that: The first sub-anti-reflection layer includes 1 peak electric field intensity, the second sub-anti-reflection layer adjacent to the first sub-anti-reflection layer includes 1 valley electric field intensity, the interface area between each second sub-anti-reflection layer and the third sub-anti-reflection layer adjacent to the outside thereof includes 1 peak electric field intensity, the interface area between each second sub-anti-reflection layer and the third sub-anti-reflection layer adjacent to the inside thereof includes 1 valley electric field intensity, and the interface area between the outermost second sub-anti-reflection layer or the third sub-anti-reflection layer and the air includes 1 peak electric field intensity.

6. The semiconductor laser chip according to claim 3, characterized in that: When the number of layers of the anti-reflection layer is 8, the thicknesses from the first sub-anti-reflection layer to the outermost second sub-anti-reflection layer are 15nm to 35nm, 35nm to 65nm, 45nm to 75nm, 70nm to 90nm, 40nm to 70nm, 50nm to 80nm, 50nm to 80nm, and 10nm to 40nm, respectively; When the number of layers of the anti-reflection layer is 10, the thicknesses from the first sub-anti-reflection layer to the outermost second sub-anti-reflection layer are 45nm to 65nm, 70nm to 85nm, 80nm to 90nm, 60nm to 70nm, 80nm to 90nm, 60nm to 75nm, 80nm to 90nm, 55nm to 75nm, 75nm to 95nm, and 50nm to 85nm, respectively; When the number of layers of the anti-reflection layer is 11, the thicknesses from the first sub-anti-reflection layer to the outermost third sub-anti-reflection layer are 45nm to 65nm, 70nm to 85nm, 80nm to 90nm, 60nm to 70nm, 80nm to 90nm, 60nm to 75nm, 80nm to 90nm, 55nm to 75nm, 75nm to 95nm, 50nm to 85nm, and 1nm to 30nm, respectively.

7. The semiconductor laser chip according to claim 3, characterized in that: The first sub-anti-reflection layer is AlON, and the second sub-anti-reflection layer is SiN x The third sub-anti-reflection layer is SiN x or SiO2; Alternatively, the first sub-anti-reflection layer is AlON, the second sub-anti-reflection layer is SiO2, and the third sub-anti-reflection layer is Ta2O5 or SiO2.

8. The semiconductor laser chip according to claim 7, characterized in that: When the number of layers of the anti-reflection layer is 8, the second sub-anti-reflection layer is SiO2, and the third sub-anti-reflection layer is Ta2O5, the quarter wavelength from the first sub-anti-reflection layer to the outermost second sub-anti-reflection layer is 0.3 to 0.5, 0.4 to 0.8, 0.8 to 1.3, 0.8 to 1.2, 0.8 to 1.2, 0.6 to 1.0, 0.9 to 1.4, and 0.1 to 0.5, respectively; When the number of anti-reflection layers is 10, the second sub-anti-reflection layer is SiN x , when the third sub-anti-reflection layer is SiO2, the quarter wavelengths from the first sub-anti-reflection layer to the outermost second sub-anti-reflection layer are 0.75 to 0.85, 1.0 to 2.0, 0.9 to 1.3, 0.9 to 1.3, 0.8 to 1.2, 0.9 to 1.3, 0.8 to 1.2, 0.9 to 1.3, 0.8 to 1.2, 1.0 to 1.5; When the number of anti-reflection layers is 11, the second sub-anti-reflection layer is SiN x When the third sub-anti-reflection layer is SiO2, the quarter wavelength from the first sub-anti-reflection layer to the outermost third sub-anti-reflection layer is 0.75 to 0.85, 1.0 to 2.0, 0.9 to 1.3, 0.9 to 1.3, 0.8 to 1.2, 0.9 to 1.3, 0.8 to 1.2, 0.9 to 1.3, 0.8 to 1.2, 1.0 to 1.5, and 0.005 to 0.2 respectively.

9. The semiconductor laser chip according to claim 1, characterized in that: The epitaxial layer includes a lower confinement layer, a lower waveguide layer, an active layer, an upper waveguide layer, an electron blocking layer and an upper confinement layer which are arranged in sequence from bottom to top, and the epitaxial layer is any one or any combination of GaN, InGaN, InN, AlInN, AlGaN, AlInGaN, AlN, GaAs, GaP, InP, AlGaAs, AlInGaAs, AlGaInP, InGaAs, InGaAsN, AlInAs, AlInP, AlGaP, InGaP, GaSb, InSb, InAs, InAsSb, AlGaSb, AlSb, InGaSb, AlGaAsSb, InGaAsSb, SiC, Ga2O3, BN, and diamond.

10. The semiconductor laser chip according to claim 1, characterized in that: The substrate includes sapphire, silicon, Ge, SiC, AlN, GaN, GaAs, InP, InAs, GaSb, sapphire / SiO2 composite substrate, Mo, TiW, CuW, Cu, sapphire / AlN composite substrate, diamond, graphene, sapphire / SiN x , Sapphire / SiO2 / SiN x Composite substrate, sapphire / SiN x Any one of a / SiO2 composite substrate, a magnesium aluminum spinel MgAl2O4, MgO, ZnO, ZrB2, LiAlO2 and LiGaO2 composite substrate.