Solar charging circuit

Abstract

The invention relates to the technical field of solar charging, and discloses a solar charging circuit, which comprises an input interface, a DCDC conversion unit, a voltage sampling unit, a current sampling unit, an output voltage sampling unit, an MPPT control unit and a first operational amplification unit, and is characterized in that the MPPT control unit comprises a controller and a control voltage generation unit; in actual use, the DC-DC conversion unit can carry out voltage conversion on the photovoltaic panel with the output voltage within the input requirement range of the DC-DC conversion unit, so that voltage conversion can be carried out on the photovoltaic panels of various specifications, in addition, storage batteries of various specifications can be charged by adjusting the output voltage of the DC-DC conversion unit, and the applicability is high; in addition, the controller can know the output power of the photovoltaic panel through the voltage sampling unit and the current sampling unit, and can adjust the magnitude of the output voltage of the DCDC conversion unit by controlling the duty ratio of the PWM control signal so as to prevent the charging current from being too large, so that the output power of the photovoltaic panel can be accurately controlled.

Description

Technical Field

[0001] The invention relates to the technical field of solar charging, and in particular to a solar charging circuit. Background Art

[0002] Solar energy, an inexhaustible clean energy, is increasingly used in people's lives, and solar energy storage is one of its important applications. Solar energy storage is a technology that uses the photovoltaic effect on the surface of semiconductors to convert solar energy into electrical energy, and uses solar charging circuits to charge batteries with electrical energy.

[0003] When charging a battery, the charging voltage needs to be greater than the battery's own voltage. In addition, the battery's charging current is closely related to the charging voltage. If you want to increase the charging current, you must increase the voltage difference between the charging voltage and the battery voltage. However, when the output current of the photovoltaic panel reaches a certain value, its output voltage will drop sharply, making it impossible to charge the battery.

[0004] In order to improve the utilization rate of photovoltaic panels in different seasons, different temperatures and different environments, MPPT (Maximum Power Point Tracking) technology is applied in existing solar charging circuits. The MPPT technology is used to track the output voltage of the photovoltaic panels in real time and control the output current, so that the output voltage of the photovoltaic panels is always kept near the sharp drop point, thereby increasing the charging power by 20-50%.

[0005] For existing solar charging circuits, the types of photovoltaic panels and batteries supported by the MPPT controllers used therein are strictly limited, resulting in poor applicability. Summary of the invention

[0006] In view of the shortcomings of the background technology, the present invention provides a solar charging circuit, and the technical problem to be solved is that the applicability of the existing solar charging circuit is poor and cannot be compatible with more photovoltaic panels and batteries.

[0007] To solve the above technical problems, the present invention provides the following technical solutions: a solar charging circuit, comprising an input interface, a DCDC conversion unit, a voltage sampling unit, a current sampling unit, an output voltage sampling unit, an MPPT control unit and a first operational amplifier unit, wherein the MPPT control unit comprises a controller and a control voltage generating unit;

[0008] The input interface is configured to be electrically connected to a voltage output interface of the photovoltaic panel;

[0009] The DCDC conversion unit is electrically connected to the input interface, and is used to perform DC conversion on the voltage at the input interface and output a charging voltage; the DCDC conversion unit includes an output voltage setting terminal, and the charging voltage is adjusted based on the voltage of the output voltage setting terminal;

[0010] The voltage sampling unit is used to detect the voltage input to the input interface and send the voltage detection result to the controller;

[0011] The current sampling unit is used to detect the magnitude of the current input to the input interface, and send the current detection result to the controller and the positive input terminal of the first operational amplifier unit respectively;

[0012] The output voltage sampling unit is used to collect the output voltage of the DCDC conversion unit and send the second voltage detection result to the controller;

[0013] The controller inputs a PWM control signal to the control voltage generating unit based on the input voltage detection result and the current detection result;

[0014] The control voltage generating unit inputs a control voltage to the negative input terminal of the first operational amplifier unit based on the input PWM control signal, and the control voltage is positively correlated with the duty cycle of the PWM control signal;

[0015] The output terminal of the first operational amplifier unit is electrically connected to the output voltage setting terminal.

[0016] In a certain embodiment, the present invention further comprises a linear voltage stabilizing unit, which is electrically connected to the controller and is used to convert the output voltage of the photovoltaic panel into an operating voltage of the controller.

[0017] In a certain embodiment, the input interface includes a positive input terminal and a negative input terminal, the voltage sampling unit includes a first sampling resistor and a second sampling resistor, one end of the first sampling resistor is electrically connected to the positive input terminal, the other end of the first sampling resistor is electrically connected to one end of the second sampling resistor and the controller respectively, and the other end of the second sampling resistor is electrically connected to the negative input interface.

[0018] In a certain embodiment, the current sampling unit includes a third sampling resistor and a second operational amplifier unit, one end of the third sampling resistor is electrically connected to the negative input end, the third sampling resistor is grounded, the second operational amplifier unit is used to amplify the voltage across the third sampling resistor, and the output end of the second operational amplifier unit is electrically connected to the positive input end of the first operational amplifier unit and the controller respectively.

[0019] In a certain embodiment, the control voltage generating unit includes a resistor R1, a resistor R2, a resistor R4 and a capacitor C1, one end of the resistor R1 is electrically connected to the controller to receive the PWM control signal, the other end of the resistor R1 is electrically connected to one end of the resistor R2, one end of the resistor R4 and one end of the capacitor C1 respectively, the other end of the resistor R2 and the other end of the capacitor C1 are both grounded, and the other end of the resistor R4 is electrically connected to the negative input end of the first operational amplifier unit.

[0020] In a certain embodiment, the first operational amplifier unit includes a first operational amplifier, a resistor R6, a resistor R7, a capacitor C2, a capacitor C3, a capacitor C4 and a diode D1, the negative end of the first operational amplifier is electrically connected to the other end of the resistor R4, one end of the capacitor C3 and one end of the capacitor C4, respectively, the other end of the capacitor C3 is electrically connected to one end of the resistor R7, the other end of the resistor R7 is electrically connected to the other end of the capacitor C4, the output end of the first operational amplifier and the positive electrode of the diode D1, the negative electrode of the diode D1 is electrically connected to one end of the capacitor C2 and one end of the resistor R6, respectively, the other end of the capacitor C2 is grounded, and the other end of the resistor R6 is electrically connected to the output voltage setting end.

[0021] In a certain embodiment, the DCDC conversion unit includes a buck-boost chip U20 of model FD180A and a buck-boost circuit; the output voltage sampling unit includes a resistor R19 and a resistor R20;

[0022] Pin No. 1 of the buck-boost chip U20 is grounded via resistor R52 and capacitor C50;

[0023] The second pin of the buck-boost chip U20 is electrically connected to one end of the resistor R91 and the capacitor C57 respectively, the other end of the resistor R91 is grounded through the capacitor C59, and the other end of the capacitor C67 is grounded;

[0024] The third pin of the buck-boost chip U20 is grounded;

[0025] The fourth pin of the buck-boost chip U20 is electrically connected to the output end of the first operational amplifier unit, one end of the resistor R89, one end of the resistor R90, one end of the capacitor C58, and one end of the capacitor C60, respectively. The other end of the resistor R89 ​​and the other end of the capacitor C58 are connected, and the other end of the capacitor C60 is electrically connected to one end of the resistor R90, the fifth pin of the buck-boost chip U20, the sixth pin of the buck-boost chip U20, and the seventh pin of the buck-boost chip U20;

[0026] Pin 8 of the buck-boost chip U20 is grounded via a resistor R92;

[0027] The ninth pin of the buck-boost chip U20 is electrically connected to one end of the capacitor C61 and one end of the resistor R93, respectively, and the other end of the resistor R93 is grounded;

[0028] Pin 10 of the buck-boost chip U20 is electrically connected to the other end of the capacitor C61 and one end of the resistor R94 respectively;

[0029] The 12th pin of the buck-boost chip U20 is electrically connected to the 14th pin of the buck-boost chip U20 and the cathode of the diode D6 through the capacitor C62, and the anode of the diode D6 is used to input the power supply VCC;

[0030] Pin 16 of the buck-boost chip U20 is grounded;

[0031] Pin 17 of the buck-boost chip U20 is used to input power supply VCC and is grounded through capacitor C63;

[0032] Pin 19 of the buck-boost chip U20 is electrically connected to one end of the capacitor C52 and the cathode of the diode D5, respectively, and the anode of the diode D5 is used to input the power supply VCC;

[0033] Pin 21 of the buck-boost chip U20 is electrically connected to one end of the resistor R54;

[0034] Pin 23 of the buck-boost chip U20 is electrically connected to the power interface and grounded through capacitor C51;

[0035] Pin 24 of the buck-boost chip U20 is grounded via a resistor R53;

[0036] Pin 25 of the buck-boost chip U20 is grounded;

[0037] The buck-boost circuit includes a MOS tube Q2, the drain of the MOS tube Q2 is electrically connected to the input interface, the gate of the MOS tube Q2 is electrically connected to the 20th pin of the buck-boost chip U20, the source of the MOS tube Q2 is electrically connected to one end of the resistor R300, one end of the inductor L1, the other end of the resistor R54, the other end of the capacitor C52 and the drain of the MOS tube Q3, the gate of the MOS tube Q3 is electrically connected to the 18th pin of the buck-boost chip U20, the source of the MOS tube Q3 is electrically connected to one end of the resistor R17, the source of the MOS tube Q13 and the other end of the resistor R94, the other end of the resistor R17 is grounded, the gate of the MOS tube Q13 is electrically connected to the 15th pin of the buck-boost chip U20, the source of the MOS tube Q13 is electrically connected to the other end of the inductor L1, one end of the resistor R301, the 12th pin of the buck-boost chip U20 and the source of the MOS tube Q4, and the other end of the resistor R301 is grounded through the capacitor C301 The gate of the MOS tube Q4 is electrically connected to the 13th pin of the buck-boost chip U20. The source of the MOS tube Q4 is electrically connected to one end of the capacitor C20, one end of the capacitor C21, one end of the capacitor C24, one end of the resistor R19, one end of the capacitor C28, the 6th pin of the buck-boost chip U20 and the drain of the MOS tube Q15. The other end of the capacitor C20, the other end of the capacitor C21, the other end of the capacitor C24 and the other end of the capacitor C28 are all grounded. The other end of the resistor R19 is respectively connected to One end of the resistor R20 and one end of the capacitor C25 are electrically connected to the controller, the other end of the capacitor C25 and the other end of the resistor R20 are both grounded, the source of the MOS transistor Q15 is electrically connected to the gate of the MOS transistor Q15 and the collector of the triode Q25 through the resistor R28, the base of the triode Q25 is electrically connected to one end of the resistor R33 and one end of the resistor R35, the other end of the resistor R35 is electrically connected to the controller, and the other end of the resistor R33 and the emitter of the triode Q25 are both grounded.

[0038] In some implementations, the controller simultaneously calculates the maximum output power of the photovoltaic panel using a disturbance observation algorithm and a conductance increment algorithm.

[0039] Compared with the prior art, the present invention has the following beneficial effects:

[0040] The DCDC conversion unit can be used to convert the voltage of photovoltaic panels whose output voltage is within the input requirement range of the DCDC conversion unit, so that the voltage of photovoltaic panels of various specifications can be converted. In addition, by adjusting the output voltage of the DCDC conversion unit, batteries of various specifications can be charged, which has strong applicability.

[0041] In addition, the controller can know the output power of the photovoltaic panel through the voltage sampling unit and the current sampling unit, and can adjust the output voltage of the DCDC conversion unit by controlling the duty cycle of the PWM control signal to avoid excessive charging current, thereby accurately controlling the output power of the photovoltaic panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 It is a schematic diagram of the structure of the present invention in an embodiment;

[0043] Figure 2 is a schematic diagram of the structure of the input interface, the linear voltage stabilization unit, the voltage sampling unit and the current sampling unit in the embodiment;

[0044] Figure 3 is a circuit diagram of a controller in an embodiment;

[0045] Figure 4 is a circuit diagram of a control voltage generating unit, a first operational amplifying unit, and a second operational amplifying unit in an embodiment;

[0046] Figure 5 is a circuit diagram of a buck-boost chip in an embodiment;

[0047] Figure 6 is a circuit diagram of a buck-boost circuit in an embodiment. DETAILED DESCRIPTION

[0048] The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, which only illustrate the basic structure of the present invention in a schematic manner, and therefore only show the components related to the present invention.

[0049] like Figure 1 As shown, the solar charging circuit includes an input interface 1, a DCDC conversion unit 2, a linear voltage stabilization unit 3, a voltage sampling unit 5, a current sampling unit 4, an output voltage sampling unit 7, an MPPT control unit 6 and a first operational amplifier unit CMP, and the MPPT control unit 6 includes a controller 60 and a control voltage generating unit 61;

[0050] The input interface 1 is configured to be electrically connected to the voltage output interface of the photovoltaic panel;

[0051] The linear voltage stabilizing unit 3 is electrically connected to the input interface 1 and is used to convert the output voltage of the photovoltaic panel into an operating voltage, which is input to the controller 60 for power supply;

[0052] The DCDC conversion unit 2 is electrically connected to the input interface 1, and is used to perform DC conversion on the voltage at the input interface 1 and output a charging voltage; the DCDC conversion unit 2 includes an output voltage setting terminal FB, and the charging voltage is adjusted based on the voltage of the output voltage setting terminal FB; in addition, a filter capacitor Ci1 and a filter capacitor Ci2 are provided on the connection loop between the input interface 1 and the DCDC conversion unit 2, a filter capacitor Ci3 is provided on the output loop of the DCDC conversion unit 2, and the output voltage setting terminal FB is also grounded through a capacitor Ci4;

[0053] The voltage sampling unit 5 is used to detect the voltage input to the input interface 1 and input the voltage detection result to the controller 60;

[0054] The current sampling unit 4 is used to detect the magnitude of the current input to the input interface 1, and input the current detection result to the controller 6 and the positive input terminal of the first operational amplifier unit CMP respectively;

[0055] The output voltage sampling unit 7 is used to collect the output voltage of the DCDC conversion unit 2 and input the second voltage detection result to the controller 60;

[0056] The controller 60 calculates the output power of the photovoltaic panel based on the input voltage detection result and the current detection result, and inputs a PWM control signal to the control voltage generation unit 61 based on the output power of the photovoltaic panel;

[0057] The control voltage generating unit 61 inputs a control voltage to the negative input terminal of the first operational amplifier unit CMP based on the input PWM control signal, and the control voltage is positively correlated with the duty cycle of the PWM control signal;

[0058] The output terminal of the first operational amplifier unit CMP is electrically connected to the output voltage setting terminal FB.

[0059] In actual use, as long as the output voltage of the photovoltaic panel is within the input voltage range of the DCDC conversion unit 2, the photovoltaic panel can be connected to the present invention, and as long as the charging voltage of the battery BT1 is within the output voltage range of the DCDC conversion unit 2, the battery BT1 can be connected to the present invention, so that it has strong applicability; the controller 60 sets the voltage of the negative end of the first operational amplifier unit CMP by inputting a PWM control signal to the control voltage generation unit 61. When the charging current is large, the voltage output by the current sampling unit 4 becomes larger. At this time, the output voltage of the output voltage setting end FB is increased by the output voltage of the first operational amplifier unit CMP, thereby reducing the output voltage of the DCDC conversion unit 2 and reducing the charging current. Therefore, the output power of the charging circuit can be controlled by controlling the duty cycle of the PWM control signal, and then when the environment changes the output power of the photovoltaic panel, the output power of the charging circuit can be prevented from not matching the output power of the photovoltaic panel, and the output power of the photovoltaic panel can be prevented from dropping sharply due to the excessive output power of the charging circuit.

[0060] Specifically, in Figure 2 In the embodiment, the linear voltage stabilizing unit 3 includes a voltage stabilizing chip U2 of model FD6203E, which can convert an input voltage between 3V and 100V into a 3.3V voltage.

[0061] Specifically, in Figure 2 and 3In the figure, the input interface 1 includes a positive input terminal V+ and a negative input terminal V-, the voltage sampling unit 5 includes a first sampling resistor R11 and a second sampling resistor R12, one end of the first sampling resistor R11 is electrically connected to the positive input terminal V+, the other end of the first sampling resistor R11 is electrically connected to one end of the second sampling resistor R12 and pin 10 of the controller 60, and the other end of the second sampling resistor R12 is electrically connected to the negative input interface V-.

[0062] In actual use, the model of the controller 60 is F1135. The controller 60 performs analog-to-digital conversion on the voltage detection signal to know the output voltage of the photovoltaic panel.

[0063] exist Figure 1 and Figure 2 In the figure, the current sampling unit 4 includes a third sampling resistor R14 and a second operational amplifier unit OP, one end of the third sampling resistor R14 is electrically connected to the negative input terminal V-, and the other end of the third sampling resistor R14 is grounded. The second operational amplifier unit OP is used to amplify the voltage across the third sampling resistor, and the output end of the second operational amplifier unit OP is electrically connected to the positive input end of the first operational amplifier unit CMP and the controller 60 respectively.

[0064] In this embodiment, the operational amplifier used in the first operational amplifier unit CMP and the operational amplifier used in the second operational amplifier unit are integrated in the same operational amplifier chip U12, and the specific circuit diagram thereof is as follows: Figure 4 As shown, pins 1, 2 and 3 of the operational amplifier chip U12 are two input terminals and one output terminal of the operational amplifier of the second operational amplifier unit OP, and pins 5, 6 and 7 of the operational amplifier chip U12 are two input terminals and one output terminal of the operational amplifier of the first operational amplifier unit CMP.

[0065] exist Figure 3 and Figure 4 In the figure, one end of the resistor R303 electrically connected to the capacitor C201 is electrically connected to pin 3 of the controller 60; in addition, the control voltage generating unit 61 includes a resistor R1, a resistor R2, a resistor R4 and a capacitor C1, one end of the resistor R1 is electrically connected to pin 6 of the controller 60 to receive the PWM control signal, the other end of the resistor R1 is electrically connected to one end of the resistor R2, one end of the resistor R4 and one end of the capacitor C1 respectively, the other end of the resistor R2 and the other end of the capacitor C1 are both grounded, and the other end of the resistor R4 is electrically connected to the negative input terminal of the first operational amplifier unit CMP.

[0066] Assuming that the voltage inputted to the negative input terminal of the first operational amplifier unit CMP by the control voltage generating unit 61 is Vcmp-, and the duty cycle of the PWM control signal is Dut, Vcmp-=Dut*3.3*R2 / (R1+R2).

[0067] exist Figure 4 In the embodiment, the first operational amplifier unit CMP includes a first operational amplifier, a resistor R6, a resistor R7, a capacitor C2, a capacitor C3, a capacitor C4 and a diode D1, the negative end of the first operational amplifier is electrically connected to the other end of the resistor R4, one end of the capacitor C3 and one end of the capacitor C4 respectively, the other end of the capacitor C3 is electrically connected to one end of the resistor R7, the other end of the resistor R7 is electrically connected to the other end of the capacitor C4, the output end of the first operational amplifier and the positive electrode of the diode D1 respectively, the negative electrode of the diode D1 is electrically connected to one end of the capacitor C2 and one end of the resistor R6 respectively, the other end of the capacitor C2 is grounded, and the other end of the resistor R6 is electrically connected to the output voltage setting end FB.

[0068] In this embodiment, Figure 5 and 6 As shown, the DCDC conversion unit 2 includes a buck-boost chip U20 of model FD180A and a buck-boost circuit; the output voltage sampling unit 7 includes a resistor R19 and a resistor R20;

[0069] Pin 1 of the buck-boost chip U20 is connected to ground through resistor R52 and capacitor C50 respectively;

[0070] The second pin of the buck-boost chip U20 is electrically connected to one end of the resistor R91 and the capacitor C57 respectively, the other end of the resistor R91 is grounded through the capacitor C59, and the other end of the capacitor C67 is grounded;

[0071] Pin 3 of the buck-boost chip U20 is grounded;

[0072] The fourth pin of the buck-boost chip U20 is electrically connected to the output end of the first operational amplifier unit, one end of the resistor R89, one end of the resistor R90, one end of the capacitor C58, and one end of the capacitor C60, respectively. The other end of the resistor R89 ​​and the other end of the capacitor C58 are connected, and the other end of the capacitor C60 is electrically connected to one end of the resistor R90, the fifth pin of the buck-boost chip U20, the sixth pin of the buck-boost chip U20, and the seventh pin of the buck-boost chip U20;

[0073] Pin 8 of the buck-boost chip U20 is grounded through resistor R92;

[0074] The ninth pin of the buck-boost chip U20 is electrically connected to one end of the capacitor C61 and one end of the resistor R93, respectively, and the other end of the resistor R93 is grounded;

[0075] Pin 10 of the buck-boost chip U20 is electrically connected to the other end of the capacitor C61 and one end of the resistor R94 respectively;

[0076] The 12th pin of the buck-boost chip U20 is electrically connected to the 14th pin of the buck-boost chip U20 and the cathode of the diode D6 through the capacitor C62, and the anode of the diode D6 is used for inputting the power supply VCC;

[0077] Pin 16 of the buck-boost chip U20 is grounded;

[0078] Pin 17 of the buck-boost chip U20 is used to input the power supply VCC and is grounded through capacitor C63;

[0079] Pin 19 of the buck-boost chip U20 is electrically connected to one end of the capacitor C52 and the cathode of the diode D5, respectively. The anode of the diode D5 is used to input the power supply VCC.

[0080] Pin 21 of the buck-boost chip U20 is electrically connected to one end of the resistor R54;

[0081] Pin 23 of the buck-boost chip U20 is electrically connected to the power interface and is grounded through capacitor C51;

[0082] Pin 24 of the buck-boost chip U20 is grounded through resistor R53;

[0083] Pin 25 of the buck-boost chip U20 is grounded;

[0084] The buck-boost circuit includes a MOS tube Q2, a drain of the MOS tube Q2 is electrically connected to the positive input terminal V+ of the input interface 1, a gate of the MOS tube Q2 is electrically connected to the No. 20 pin of the buck-boost chip U20, a source of the MOS tube Q2 is electrically connected to one end of the resistor R300, one end of the inductor L1, the other end of the resistor R54, the other end of the capacitor C52 and the drain of the MOS tube Q3, a gate of the MOS tube Q3 is electrically connected to the No. 18 pin of the buck-boost chip U20, a source of the MOS tube Q3 is electrically connected to one end of the resistor R17, a source of the MOS tube Q13 and the other end of the resistor R94, the other end of the resistor R17 is grounded, a gate of the MOS tube Q13 is electrically connected to the No. 15 pin of the buck-boost chip U20, a source of the MOS tube Q13 is electrically connected to the other end of the inductor L1, one end of the resistor R301, the No. 12 pin of the buck-boost chip U20 and the source of the MOS tube Q4, the other end of the resistor R301 is grounded through the capacitor C301, The gate of the MOS tube Q4 is electrically connected to the 13th pin of the buck-boost chip U20. The source of the MOS tube Q4 is electrically connected to one end of the capacitor C20, one end of the capacitor C21, one end of the capacitor C24, one end of the resistor R19, one end of the capacitor C28, the 6th pin of the buck-boost chip U20 and the drain of the MOS tube Q15. The other ends of the capacitors C20, C21, C24 and C28 are all grounded. The other ends of the resistors R19 are connected to the One end of the resistor R20 and one end of the capacitor C25 are electrically connected to the controller, the other end of the capacitor C25 and the other end of the resistor R20 are both grounded, the source of the MOS transistor Q15 is electrically connected to the gate of the MOS transistor Q15 and the collector of the triode Q25 through the resistor R28, the base of the triode Q25 is electrically connected to one end of the resistor R33 and one end of the resistor R35, the other end of the resistor R35 is electrically connected to the controller, and the other end of the resistor R33 and the emitter of the triode Q25 are both grounded.

[0085] In this embodiment, the DCDC conversion unit 2 can support the connection of a photovoltaic panel with an output voltage within the range of 2.8V-100V, and can charge the battery BT1 with a charging voltage within the range of 1V to 100V.

[0086] In actual use, the on-off of the MOS tube Q15 can be controlled by controlling the on-off of the triode Q25, and whether the present invention outputs a charging voltage can be controlled by controlling the on-off of the MOS tube Q15.

[0087] The above is based on the present invention as an inspiration. Through the above description, relevant staff can make various changes and modifications without departing from the technical idea of ​​this invention. The technical scope of this invention is not limited to the content in the specification, and its technical scope must be determined according to the scope of the claims.

Claims

1. Solar charging circuit, It is characterized in that It includes an input interface, a DCDC conversion unit, a voltage sampling unit, a current sampling unit, an output voltage sampling unit, an MPPT control unit and a first operational amplifier unit, wherein the MPPT control unit includes a controller and a control voltage generating unit; The input interface is configured to be electrically connected to a voltage output interface of the photovoltaic panel; The DCDC conversion unit is electrically connected to the input interface, and is used to perform DC conversion on the voltage at the input interface and output a charging voltage; the DCDC conversion unit includes an output voltage setting terminal, and the charging voltage is adjusted based on the voltage of the output voltage setting terminal; The voltage sampling unit is used to detect the voltage input to the input interface and send the voltage detection result to the controller; The current sampling unit is used to detect the magnitude of the current input to the input interface, and send the current detection result to the controller and the positive input terminal of the first operational amplifier unit respectively; The output voltage sampling unit is used to collect the output voltage of the DCDC conversion unit and send the second voltage detection result to the controller; The controller inputs a PWM control signal to the control voltage generating unit based on the input voltage detection result and the current detection result; The control voltage generating unit inputs a control voltage to the negative input terminal of the first operational amplifier unit based on the input PWM control signal, and the control voltage is positively correlated with the duty cycle of the PWM control signal; The output terminal of the first operational amplifier unit is electrically connected to the output voltage setting terminal.

2. The solar charging circuit according to claim 1, It is characterized in that It also includes a linear voltage stabilizing unit, which is electrically connected to the controller and is used to convert the output voltage of the photovoltaic panel into an operating voltage of the controller.

3. The solar charging circuit according to claim 1, It is characterized in that The input interface includes a positive input terminal and a negative input terminal, the voltage sampling unit includes a first sampling resistor and a second sampling resistor, one end of the first sampling resistor is electrically connected to the positive input terminal, the other end of the first sampling resistor is electrically connected to one end of the second sampling resistor and a controller respectively, and the other end of the second sampling resistor is electrically connected to the negative input interface.

4. The solar charging circuit according to claim 3, It is characterized in that The current sampling unit includes a third sampling resistor and a second operational amplifier unit, one end of the third sampling resistor is electrically connected to the negative input end, the third sampling resistor is grounded, the second operational amplifier unit is used to amplify the voltage across the third sampling resistor, and the output end of the second operational amplifier unit is electrically connected to the positive input end of the first operational amplifier unit and the controller respectively.

5. The solar charging circuit according to any one of claims 1 to 4, It is characterized in that The control voltage generating unit includes a resistor R1, a resistor R2, a resistor R4 and a capacitor C1, one end of the resistor R1 is electrically connected to the controller to receive the PWM control signal, the other end of the resistor R1 is electrically connected to one end of the resistor R2, one end of the resistor R4 and one end of the capacitor C1 respectively, the other end of the resistor R2 and the other end of the capacitor C1 are both grounded, and the other end of the resistor R4 is electrically connected to the negative input end of the first operational amplifier unit.

6. The solar charging circuit according to claim 5, It is characterized in that The first operational amplifier unit includes a first operational amplifier, a resistor R6, a resistor R7, a capacitor C2, a capacitor C3, a capacitor C4 and a diode D1, the negative end of the first operational amplifier is electrically connected to the other end of the resistor R4, one end of the capacitor C3 and one end of the capacitor C4 respectively, the other end of the capacitor C3 is electrically connected to one end of the resistor R7, the other end of the resistor R7 is electrically connected to the other end of the capacitor C4, the output end of the first operational amplifier and the positive electrode of the diode D1 respectively, the negative electrode of the diode D1 is electrically connected to one end of the capacitor C2 and one end of the resistor R6 respectively, the other end of the capacitor C2 is grounded, and the other end of the resistor R6 is electrically connected to the output voltage setting end.

7. The solar charging circuit according to claim 1, It is characterized in that The DCDC conversion unit includes a buck-boost chip U20 of model FD180A and a buck-boost circuit; the output voltage sampling unit includes a resistor R19 and a resistor R20; Pin No. 1 of the buck-boost chip U20 is grounded via resistor R52 and capacitor C50; The second pin of the buck-boost chip U20 is electrically connected to one end of the resistor R91 and the capacitor C57 respectively, the other end of the resistor R91 is grounded through the capacitor C59, and the other end of the capacitor C67 is grounded; The third pin of the buck-boost chip U20 is grounded; The fourth pin of the buck-boost chip U20 is electrically connected to the output end of the first operational amplifier unit, one end of the resistor R89, one end of the resistor R90, one end of the capacitor C58, and one end of the capacitor C60, respectively. The other end of the resistor R89 ​​and the other end of the capacitor C58 are connected, and the other end of the capacitor C60 is electrically connected to one end of the resistor R90, the fifth pin of the buck-boost chip U20, the sixth pin of the buck-boost chip U20, and the seventh pin of the buck-boost chip U20; Pin 8 of the buck-boost chip U20 is grounded via a resistor R92; The ninth pin of the buck-boost chip U20 is electrically connected to one end of the capacitor C61 and one end of the resistor R93, respectively, and the other end of the resistor R93 is grounded; Pin 10 of the buck-boost chip U20 is electrically connected to the other end of the capacitor C61 and one end of the resistor R94 respectively; The 12th pin of the buck-boost chip U20 is electrically connected to the 14th pin of the buck-boost chip U20 and the cathode of the diode D6 through the capacitor C62, and the anode of the diode D6 is used to input the power supply VCC; Pin 16 of the buck-boost chip U20 is grounded; Pin 17 of the buck-boost chip U20 is used to input power supply VCC and is grounded through capacitor C63; Pin 19 of the buck-boost chip U20 is electrically connected to one end of the capacitor C52 and the cathode of the diode D5, respectively, and the anode of the diode D5 is used to input the power supply VCC; Pin 21 of the buck-boost chip U20 is electrically connected to one end of the resistor R54; Pin 23 of the buck-boost chip U20 is electrically connected to the power interface and grounded through capacitor C51; Pin 24 of the buck-boost chip U20 is grounded via a resistor R53; Pin 25 of the buck-boost chip U20 is grounded; The buck-boost circuit includes a MOS tube Q2, the drain of the MOS tube Q2 is electrically connected to the input interface, the gate of the MOS tube Q2 is electrically connected to the 20th pin of the buck-boost chip U20, the source of the MOS tube Q2 is electrically connected to one end of the resistor R300, one end of the inductor L1, the other end of the resistor R54, the other end of the capacitor C52 and the drain of the MOS tube Q3, the gate of the MOS tube Q3 is electrically connected to the 18th pin of the buck-boost chip U20, the source of the MOS tube Q3 is electrically connected to one end of the resistor R17, the source of the MOS tube Q13 and the other end of the resistor R94, the other end of the resistor R17 is grounded, the gate of the MOS tube Q13 is electrically connected to the 15th pin of the buck-boost chip U20, the source of the MOS tube Q13 is electrically connected to the other end of the inductor L1, one end of the resistor R301, the 12th pin of the buck-boost chip U20 and the source of the MOS tube Q4, and the other end of the resistor R301 is grounded through the capacitor C301 The gate of the MOS tube Q4 is electrically connected to the 13th pin of the buck-boost chip U20. The source of the MOS tube Q4 is electrically connected to one end of the capacitor C20, one end of the capacitor C21, one end of the capacitor C24, one end of the resistor R19, one end of the capacitor C28, the 6th pin of the buck-boost chip U20 and the drain of the MOS tube Q15. The other end of the capacitor C20, the other end of the capacitor C21, the other end of the capacitor C24 and the other end of the capacitor C28 are all grounded. The other end of the resistor R19 is respectively connected to One end of the resistor R20 and one end of the capacitor C25 are electrically connected to the controller, the other end of the capacitor C25 and the other end of the resistor R20 are both grounded, the source of the MOS transistor Q15 is electrically connected to the gate of the MOS transistor Q15 and the collector of the triode Q25 through the resistor R28, the base of the triode Q25 is electrically connected to one end of the resistor R33 and one end of the resistor R35, the other end of the resistor R35 is electrically connected to the controller, and the other end of the resistor R33 and the emitter of the triode Q25 are both grounded.

8. The solar charging circuit according to claim 1, It is characterized in that The controller simultaneously calculates the maximum output power of the photovoltaic panel through a disturbance observation algorithm and a conductance increment algorithm.

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