A low power consumption and low noise amplifier circuit with temperature compensation

Abstract

The present invention discloses a low-power low-noise amplifier circuit with temperature compensation, which belongs to the field of radio frequency amplifiers. The amplifier circuit includes a temperature compensation bias module and an amplifier main unit. The temperature compensation bias module includes first to third enhanced transistors, first to eighth resistors, and the amplifier main unit includes an input matching circuit, a fourth enhanced transistor, an inter-stage matching circuit, a fifth enhanced transistor, a sixth enhanced transistor, and an output matching circuit; the temperature compensation bias module outputs a first bias voltage applied to the gate of the fourth enhanced transistor, outputs a second bias voltage applied to the gate of the fifth enhanced transistor, and outputs a third bias voltage applied to the gate of the sixth enhanced transistor. The input end of the input matching circuit receives a radio frequency signal, and the output end of the output matching circuit outputs the amplified radio frequency signal. The present invention can solve the problem that the gain of a low-noise amplifier varies greatly under low power consumption conditions due to temperature.

Description

Technical Field

[0001] The invention belongs to the field of radio frequency amplifiers, and in particular relates to a low-power and low-noise amplifier circuit with temperature compensation. Background Art

[0002] In the receiver system, the low-noise amplifier at the front stage plays a decisive role in the performance of the entire receiving system. It suppresses the noise of the receiver's subsequent circuits through its own extremely low noise and high gain, thereby improving the signal-to-noise ratio of the receiving system. In a low-power state, transistors can easily obtain better noise performance, but when the ambient temperature changes, the bias point is more easily affected and drifts, resulting in important performance indicators such as gain and noise being affected. The HMET gain of transistors made of compound GaAs materials decreases with increasing temperature. In system applications, it is hoped that the high-temperature gain is basically consistent with the normal temperature to ensure that there is a sufficiently high gain to suppress the subsequent noise. At the same time, the gain fluctuation range at low temperatures is also as small as possible. Therefore, temperature compensation is required to achieve a low-power low-noise amplifier. Summary of the invention

[0003] The purpose of the present invention is to provide a low-power low-noise amplifier circuit with temperature compensation, which can solve the problem that the gain of the low-noise amplifier varies greatly due to temperature under low-power conditions.

[0004] In order to achieve the above object, one aspect of the present invention provides a low-power and low-noise amplifier circuit with temperature compensation, comprising a temperature compensation bias module and an amplifier main unit.

[0005] The temperature compensation bias module includes a first enhancement mode transistor, a second enhancement mode transistor, a third enhancement mode transistor, a first resistor to an eighth resistor, and the amplifier main unit includes an input matching circuit, a fourth enhancement mode transistor, an inter-stage matching circuit, a fifth enhancement mode transistor, a sixth enhancement mode transistor and an output matching circuit;

[0006] The source of the first enhancement transistor is connected to one end of the first resistor, the other end of the first resistor is grounded, the gate of the first enhancement transistor is connected to the source of the third transistor, and the drain of the first enhancement transistor is connected to one end of the second resistor; the gate and drain of the second enhancement transistor are connected, and the source of the second enhancement transistor is connected to the other end of the second resistor; the gate of the third enhancement transistor is connected to the gate and drain of the second enhancement transistor, the drain of the third enhancement transistor is connected to the external bias voltage, and the source of the third enhancement transistor is connected to the gate of the first enhancement transistor; one end of the sixth resistor is connected to the gate of the first enhancement transistor, and the other end outputs the first bias voltage applied to the gate of the fourth enhancement transistor; one end of the seventh resistor is connected to one end of the third resistor and one end of the fourth resistor, and the other end outputs the second bias voltage applied to the gate of the fifth enhancement transistor; one end of the eighth resistor is connected to the other end of the fourth resistor and one end of the fifth resistor, and the other end outputs the third bias voltage applied to the gate of the sixth enhancement transistor; the other end of the third resistor is connected to the gate and drain of the second enhancement transistor, and the other end of the fifth resistor is connected to the drain of the third enhancement transistor;

[0007] The fourth enhancement transistor is the first-stage signal amplifier of the amplifier main unit, the fifth enhancement transistor is the second-stage signal amplifier of the amplifier main unit, and the sixth enhancement transistor is the third-stage signal amplifier of the amplifier main unit; the input end of the input matching circuit receives the radio frequency signal, the output end is connected to the gate of the fourth enhancement transistor, the drain of the fourth enhancement transistor is connected to the inter-stage matching circuit, and the source of the fourth enhancement transistor is grounded through a negative feedback inductor; the first-stage amplified signal output by the drain of the fourth enhancement transistor enters the gate of the fifth enhancement transistor through the inter-stage matching circuit, the second-stage amplified signal output by the drain of the fifth enhancement transistor enters the source of the sixth enhancement transistor through the seventh inductor, the third-stage amplified signal output by the drain of the sixth enhancement transistor enters one end of the output matching circuit, and the other end of the output matching circuit outputs the amplified radio frequency signal.

[0008] Preferably, the input matching circuit comprises a first capacitor, a first inductor, a second inductor and a second capacitor;

[0009] One end of the first capacitor receives the radio frequency signal, and the other end is connected to one end of the first inductor and one end of the second inductor; the other end of the first inductor receives the first bias voltage; one end of the second capacitor is connected between the first bias voltage and the first inductor, and the other end of the second capacitor is grounded; the other end of the second inductor is connected to the gate of the fourth enhancement transistor.

[0010] Preferably, the inter-stage matching circuit includes a third capacitor to a fifth capacitor and a fourth inductor to a sixth inductor;

[0011] One end of the third capacitor is connected to the drain of the fourth enhancement transistor, and the other end is connected to the gate of the fifth enhancement transistor; one end of the fourth inductor is connected to the drain of the fourth enhancement transistor, and the other end is connected to the fifth inductor and one end of the fourth capacitor; the other ends of the fifth inductor and the fourth capacitor are connected to the fifth capacitor and one end of the sixth inductor, the other end of the fifth capacitor is grounded, and the other end of the sixth inductor is connected to the source of the fifth enhancement transistor.

[0012] Preferably, the output matching circuit includes an eighth inductor to an eleventh inductor, an eighth capacitor and a ninth capacitor, a tenth resistor, an eleventh resistor and a tenth capacitor;

[0013] One end of the eighth inductor is connected to the drain of the sixth enhancement-mode transistor, and the other end is connected to one end of the ninth inductor, the other end of the ninth inductor is connected to the external working voltage and one end of the tenth capacitor, the other end of the tenth capacitor is connected to the eleventh resistor, and the other end of the eleventh resistor is grounded; one end of the tenth inductor is connected to the other end of the eighth inductor and one end of the ninth inductor, and the other end is connected to one end of the eighth capacitor; the other end of the eighth capacitor is connected to one end of the eleventh inductor, the other end of the eleventh inductor is connected to one end of the tenth resistor, and the other end of the tenth resistor is grounded; one end of the ninth capacitor is connected to the other end of the eighth capacitor and one end of the eleventh inductor, and the other end outputs the amplified RF signal.

[0014] Preferably, the amplifier main unit also includes a feedback circuit unit, which includes a seventh capacitor and a ninth resistor, one end of the seventh capacitor is connected to the other end of the eighth inductor and one end of the ninth inductor, the other end is connected to one end of the ninth resistor and the other end of the seventh resistor, and the other end of the ninth resistor is connected to the gate of the fifth enhancement transistor.

[0015] The low-power low-noise amplifier circuit with temperature compensation according to the above aspect of the present invention can solve the problem that the gain of the low-noise amplifier varies greatly due to the influence of temperature under low-power conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solution of the present invention, the following briefly introduces the drawings used in the description of the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work:

[0017] Figure 1 A structural block diagram of a low-power and low-noise amplifier circuit with temperature compensation according to an embodiment of the present invention;

[0018] Figure 2 The circuit diagram is a low-power and low-noise amplifier circuit with temperature compensation according to an embodiment of the present invention. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0020] An embodiment of the present invention provides a low power consumption and low noise amplifier circuit with temperature compensation, such as Figure 1 and Figure 2 As shown, the low-power consumption and low-noise amplifier circuit with temperature compensation according to an embodiment of the present invention includes a temperature compensation bias module and an amplifier main unit.

[0021] The temperature compensation bias module includes a first enhancement transistor M1, a second enhancement transistor M2, a third enhancement transistor M3, and a first resistor R1 to an eighth resistor R8, wherein the first resistor R1 is a temperature compensation resistor, the second resistor R2 to the fifth resistor R5 are voltage dividing resistors, and the sixth resistor R6 to the eighth resistor R8 are current limiting resistors.

[0022] The source of the first enhancement transistor M1 is connected to one end of the first resistor R1, the other end of the first resistor R1 is grounded, the gate of the first enhancement transistor M1 is connected to the source of the third transistor M3, and the drain of the first enhancement transistor M1 is connected to one end of the second resistor R2; the gate and drain of the second enhancement transistor M2 are connected, and the source of the second enhancement transistor M2 is connected to the other end of the second resistor R2; the gate of the third enhancement transistor M3 is connected to the gate and drain of the second enhancement transistor M2, the drain of the third enhancement transistor M3 is connected to the external bias voltage VC, and the source of the third enhancement transistor M3 is connected to the gate of the first enhancement transistor M1.

[0023] One end of the sixth resistor R6 is connected to the gate of the first enhancement transistor M1, and the other end outputs a first bias voltage applied to the gate of the fourth enhancement transistor M4 of the first-stage signal amplifier tube of the amplifier main unit; one end of the seventh resistor R7 is connected to one end of the third resistor R3 and one end of the fourth resistor R4, and the other end outputs a second bias voltage applied to the gate of the fifth enhancement transistor M5 of the second-stage signal amplifier tube of the amplifier main unit; one end of the eighth resistor R8 is connected to the other end of the fourth resistor R4 and one end of the fifth resistor R5, and the other end outputs a third bias voltage applied to the gate of the sixth enhancement transistor M6 of the third-stage signal amplifier tube of the amplifier main unit.

[0024] The other end of the third resistor R3 is connected to the gate and drain of the second enhancement mode transistor M2 , and the other end of the fifth resistor R5 is connected to the drain of the third enhancement mode transistor M3 .

[0025] The principle of the temperature compensation bias module to adjust the gain change when the temperature changes is:

[0026] When the temperature rises, the increase in the carrier concentration of the transistor causes the threshold voltage to drop, thereby increasing the leakage current. For the DC path composed of R1, R2, R3, R4, R5 and M1, M2, the current Ib1 increases, the voltage drop on R3, R4, R5 increases, and the drain voltage drop of M2 decreases. At the same time, at high temperatures, the transistor transconductance decreases due to the decrease in electron mobility, and the variable resistance of M2, which is equivalent to the reciprocal of the transistor transconductance Gm, increases, and the drain voltage of M1 decreases, further reducing the current, and the gate voltage of transistors M5 and M6 output to the amplifier main unit is controlled. For the DC path composed of R1, M1, and M3, the current Ib2 increases and the output voltage increases. The M2 drain voltage drop decreases, that is, the M3 gate voltage decreases, so that the current Ib2 decreases, and the increase in the output voltage is controlled. The opposite is true when the temperature decreases. In addition, the resistance of resistors R1 and R2 and the size of transistors M1, M2, and M3 can be adjusted to control the intensity of the feedback.

[0027] Compared with the traditional temperature compensation bias structure, the improved control means of the embodiment of the present invention is more flexible and more effective. When using the traditional temperature compensation bias structure, within the temperature range of -55°C to 125°C, the gain change of the output gain of the amplifier main unit is close to 7dB at 12GHz, while using the improved temperature compensation bias module of the present invention, the gain change is only 2dB at 12GHz, and the high and low temperature gain change is optimized by about 70%. Under the supply voltage of 3.3V, the current of this low-power amplifier is only 7mA.

[0028] The amplifier main unit includes an input matching circuit, a fourth enhanced transistor M4, an inter-stage matching circuit, a fifth enhanced transistor M5, a sixth enhanced transistor M6 and an output matching circuit. The fourth enhanced transistor M4 is a first-stage signal amplifying tube of the amplifier main unit, the fifth enhanced transistor M5 is a second-stage signal amplifying tube of the amplifier main unit, and the sixth enhanced transistor M6 is a third-stage signal amplifying tube of the amplifier main unit.

[0029] The input end of the input matching circuit receives the radio frequency signal RFin, and the output end is connected to the gate of the fourth enhancement transistor M4. The drain of the fourth enhancement transistor M4 is connected to the inter-stage matching circuit to output the first stage amplified signal. The source of the fourth enhancement transistor M4 is grounded through the negative feedback inductor L3. One end of the output matching circuit is connected to the drain of the sixth enhancement transistor M6, and the other end outputs the amplified radio frequency signal RFout. The gate of the sixth enhancement transistor M6 is also grounded through the sixth capacitor C6.

[0030] The input matching circuit includes a first capacitor C1, a first inductor L1, a second inductor L2 and a second capacitor C2, wherein the first capacitor C1 is a DC blocking capacitor and the second capacitor C2 is a gate bias filter capacitor. One end of the first capacitor C1 receives the radio frequency signal RFin, and the other end is connected to one end of the first inductor L1 and one end of the second inductor L2; the other end of the first inductor L1 receives the first bias voltage output by the temperature compensation bias module; one end of the second capacitor C2 is connected between the first bias voltage and the first inductor L1, and the other end of the second capacitor C2 is grounded. The second capacitor C2 is a filter capacitor; the other end of the second inductor L2 is connected to the gate of the fourth enhancement transistor M4. The input matching circuit matches the input end of the amplifier main unit well with the external input signal source, and achieves the best noise matching at the same time.

[0031] The inter-stage matching circuit includes a third capacitor C3 to a fifth capacitor C5, a fourth inductor L4 to a sixth inductor L6, wherein the third capacitor C3 to the fifth capacitor C5 are coupling capacitors. One end of the third capacitor C3 is connected to the drain of the fourth enhancement transistor M4, and the other end is connected to the gate of the fifth enhancement transistor M5; one end of the fourth inductor L4 is connected to the drain of the fourth enhancement transistor M4, and the other end is connected to the fifth inductor L5 and one end of the fourth capacitor C4; the other end of the fifth inductor L5 and the fourth capacitor C4 is connected to one end of the fifth capacitor C5 and the sixth inductor L6, the other end of the fifth capacitor C5 is grounded, and the other end of the sixth inductor L6 is connected to the source of the fifth enhancement transistor M5.

[0032] The fourth inductor L4 to the sixth inductor L6 and the fourth capacitor C4 and the fifth capacitor C5 form a direct current path of the fourth enhancement mode transistor M4 and are also a part of the inter-stage matching circuit.

[0033] The output matching circuit includes an eighth inductor L8 to an eleventh inductor L11, an eighth capacitor C8 and a ninth capacitor C9, a tenth resistor R10, an eleventh resistor R11 and a tenth capacitor C10, wherein the ninth inductor L9 is a choke inductor. One end of the eighth inductor L8 is connected to the drain of the sixth enhancement transistor M6, and the other end is connected to one end of the ninth inductor L9. The other end of the ninth inductor L9 is connected to the operating voltage VDD provided by the external system and one end of the tenth capacitor C10. The tenth capacitor C10 is a filter capacitor. The other end of the tenth capacitor C10 is connected to the eleventh resistor R11, and the other end of the eleventh resistor R11 is grounded; one end of the tenth inductor L10 is connected to the other end of the eighth inductor L8 and one end of the ninth inductor L9, and the other end is connected to one end of the eighth capacitor C8; the other end of the eighth capacitor C8 is connected to one end of the eleventh inductor L11, and the other end of the eleventh inductor L11 is connected to one end of the tenth resistor R10, and the other end of the tenth resistor R10 is grounded; one end of the ninth capacitor C9 is connected to the other end of the eighth capacitor C8 and one end of the eleventh inductor L11, and the other end outputs the amplified radio frequency signal RFout.

[0034] In one embodiment, the amplifier main unit further includes a feedback circuit unit, which includes a seventh capacitor C7 and a ninth resistor R9, wherein the seventh capacitor C7 is a DC blocking capacitor. One end of the seventh capacitor C7 is connected to the other end of the eighth inductor L8 and one end of the ninth inductor L9, and the other end is connected to one end of the ninth resistor R9 and the other end of the seventh resistor R7, and the other end of the ninth resistor R9 is connected to the gate of the fifth enhancement transistor M5. The feedback circuit unit increases the stability of the amplifier main unit and adjusts the gain flatness.

[0035] The first-stage amplified signal outputted from the drain of the fourth enhanced transistor M4 as the first-stage signal amplifier enters the gate of the fifth enhanced transistor M5 as the second-stage signal amplifier through the inter-stage matching circuit, and the fourth enhanced transistor M4 and the fifth enhanced transistor M5 constitute a two-stage current multiplexing structure; the second-stage amplified signal outputted from the drain of the fifth enhanced transistor M5 enters the source of the sixth enhanced transistor M6 as the third-stage signal amplifier through the seventh inductor L7, and the third-stage amplified signal outputted from the drain of the sixth enhanced transistor M6 enters one end of the output matching circuit, and the other end of the output matching circuit outputs the amplified RF signal. The fifth enhanced transistor M5 and the sixth enhanced transistor M6 constitute a common source and common gate amplification structure, and the addition of the seventh inductor L7 weakens the influence of the parasitic capacitance of the transistor and optimizes the high-frequency bandwidth. The current multiplexing structure is also a common source structure with lower noise performance, and the common source and common gate structure has a higher output impedance, which can improve the dynamic range of the amplifier.

[0036] The third inductor L3 to the ninth inductor L9 and the fourth capacitor C4 and the fifth capacitor C5 constitute a common DC power supply path for the fourth enhancement transistor M4 of the first-stage signal amplifier tube, the fourth enhancement transistor M5 of the second-stage signal amplifier tube, and the fourth enhancement transistor M6 of the third-stage signal amplifier tube, thereby achieving a low-power amplification effect.

[0037] The low-power and low-noise amplifier circuit with temperature compensation in the above embodiment of the present invention has extremely low power consumption based on low-noise amplification and provides a relatively stable gain within the temperature range of -55°C to 125°C.

[0038] The above description is only by way of illustration of certain exemplary embodiments of the present invention. It is undoubted that those skilled in the art can modify the described embodiments in various ways without departing from the spirit and scope of the present invention. Therefore, the above drawings and descriptions are illustrative in nature and should not be construed as limiting the scope of protection of the claims of the present invention.

Claims

1. A low-power and low-noise amplifier circuit with temperature compensation, characterized in that: Includes temperature compensation bias module and amplifier main unit, The temperature compensation bias module includes a first enhancement mode transistor, a second enhancement mode transistor, a third enhancement mode transistor, a first resistor to an eighth resistor, and the amplifier main unit includes an input matching circuit, a fourth enhancement mode transistor, an inter-stage matching circuit, a fifth enhancement mode transistor, a sixth enhancement mode transistor and an output matching circuit; The source of the first enhancement mode transistor is connected to one end of the first resistor, the other end of the first resistor is grounded, the gate of the first enhancement mode transistor is connected to the source of the third transistor, and the drain of the first enhancement mode transistor is connected to one end of the second resistor; the gate and the drain of the second enhancement mode transistor are connected, and the source of the second enhancement mode transistor is connected to the other end of the second resistor; the gate of the third enhancement mode transistor is connected to the gate and the drain of the second enhancement mode transistor, the drain of the third enhancement mode transistor is connected to the external bias voltage, and the source of the third enhancement mode transistor is connected to the gate of the first enhancement mode transistor; One end of the sixth resistor is connected to the gate of the first enhancement mode transistor, and the other end thereof outputs a first bias voltage applied to the gate of the fourth enhancement mode transistor; One end of the seventh resistor is connected to one end of the third resistor and one end of the fourth resistor, and the other end outputs a second bias voltage applied to the gate of the fifth enhancement mode transistor; One end of the eighth resistor is connected to the other end of the fourth resistor and one end of the fifth resistor, and the other end outputs a third bias voltage applied to the gate of the sixth enhancement mode transistor; the other end of the third resistor is connected to the gate and drain of the second enhancement mode transistor, and the other end of the fifth resistor is connected to the drain of the third enhancement mode transistor; The fourth enhancement transistor is the first-stage signal amplifier of the amplifier main unit, the fifth enhancement transistor is the second-stage signal amplifier of the amplifier main unit, and the sixth enhancement transistor is the third-stage signal amplifier of the amplifier main unit; the input end of the input matching circuit receives the radio frequency signal, the output end is connected to the gate of the fourth enhancement transistor, the drain of the fourth enhancement transistor is connected to the inter-stage matching circuit, and the source of the fourth enhancement transistor is grounded through a negative feedback inductor; the first-stage amplified signal output by the drain of the fourth enhancement transistor enters the gate of the fifth enhancement transistor through the inter-stage matching circuit, the second-stage amplified signal output by the drain of the fifth enhancement transistor enters the source of the sixth enhancement transistor through the seventh inductor, the third-stage amplified signal output by the drain of the sixth enhancement transistor enters one end of the output matching circuit, and the other end of the output matching circuit outputs the amplified radio frequency signal.

2. The low power consumption and low noise amplifier circuit with temperature compensation as claimed in claim 1, characterized in that: The input matching circuit includes a first capacitor, a first inductor, a second inductor and a second capacitor; One end of the first capacitor receives the radio frequency signal, and the other end is connected to one end of the first inductor and one end of the second inductor; the other end of the first inductor receives the first bias voltage; one end of the second capacitor is connected between the first bias voltage and the first inductor, and the other end of the second capacitor is grounded; the other end of the second inductor is connected to the gate of the fourth enhancement transistor.

3. The low power consumption and low noise amplifier circuit with temperature compensation according to claim 1 or 2, characterized in that: The inter-stage matching circuit includes a third capacitor to a fifth capacitor and a fourth inductor to a sixth inductor; One end of the third capacitor is connected to the drain of the fourth enhancement transistor, and the other end is connected to the gate of the fifth enhancement transistor; one end of the fourth inductor is connected to the drain of the fourth enhancement transistor, and the other end is connected to the fifth inductor and one end of the fourth capacitor; the other ends of the fifth inductor and the fourth capacitor are connected to the fifth capacitor and one end of the sixth inductor, the other end of the fifth capacitor is grounded, and the other end of the sixth inductor is connected to the source of the fifth enhancement transistor.

4. The low power consumption and low noise amplifier circuit with temperature compensation according to claim 1 or 2, characterized in that: The output matching circuit includes an eighth inductor to an eleventh inductor, an eighth capacitor and a ninth capacitor, a tenth resistor, an eleventh resistor and a tenth capacitor; One end of the eighth inductor is connected to the drain of the sixth enhancement-mode transistor, and the other end is connected to one end of the ninth inductor, the other end of the ninth inductor is connected to the external working voltage and one end of the tenth capacitor, the other end of the tenth capacitor is connected to the eleventh resistor, and the other end of the eleventh resistor is grounded; one end of the tenth inductor is connected to the other end of the eighth inductor and one end of the ninth inductor, and the other end is connected to one end of the eighth capacitor; the other end of the eighth capacitor is connected to one end of the eleventh inductor, the other end of the eleventh inductor is connected to one end of the tenth resistor, and the other end of the tenth resistor is grounded; one end of the ninth capacitor is connected to the other end of the eighth capacitor and one end of the eleventh inductor, and the other end outputs the amplified RF signal.

5. The low power consumption and low noise amplifier circuit with temperature compensation according to claim 1 or 2, characterized in that: The amplifier main unit also includes a feedback circuit unit, which includes a seventh capacitor and a ninth resistor, one end of the seventh capacitor is connected to the other end of the eighth inductor and one end of the ninth inductor, the other end is connected to one end of the ninth resistor and the other end of the seventh resistor, and the other end of the ninth resistor is connected to the gate of the fifth enhancement transistor.

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