Power electronic pulse width modulation control method and system

By adding auxiliary circuits and comparators behind PWM circuits, identifying the light load state and processing light load signals, the electromagnetic interference problems caused by high power consumption and frequency changes of PWM circuits under light load conditions are solved, and the circuit response speed is improved. Accuracy, optimized circuit logic.

CN119154849APending Publication Date: 2024-12-17HEFEI XINPU INSTR TECH CO LTD
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Patent Information

Application Number
CN202411293465.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-14
Publication Date
2024-12-17

AI Technical Summary

Technical Problem

The prior art under light load conditions, high power consumption of PWM circuits and frequency changes lead to electromagnetic interference, difficult model switching and noise and delay, affecting the normal operation of the circuit.

Method used

After the PWM generation circuit is added, the light load state is identified through rising edge detection, and the comparator cycle is generated to control the comparator cycle, so as to realize the processing of the light load signal and pulse width signal mutation detection.

Benefits of technology

Reduces additional power consumption of PWM circuits under light load conditions, improves circuit response speed and accuracy, optimizes circuit logic, and reduces noise and delay.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention belongs to the field of microelectronic devices, and provides a power electronic pulse width modulation control method and system, and the method comprises the steps: pulse width programming information collection, original pulse width signal generation, critical point voltage value extraction, auxiliary circuit output and enable signal acquisition, enable control comparator analysis and low-pass filtering. According to the invention, the auxiliary circuit and the comparator are added behind the PWM generation circuit, so that light load state identification and light load signal processing are realized, and the problem of extra power consumption caused by overturning of the light load of the PWM circuit in each period is solved; the detection of the sudden change signal of the original pulse width signal is realized through rising edge detection, so that the response speed of the circuit is higher and more accurate; and an enabling end is generated through the auxiliary circuit, so that the period control of the enabling control comparator is realized, and the whole circuit logic is more reasonable.
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Description

Technical Field

[0001] The invention relates to the field of microelectronic devices, and in particular to a power electronic pulse width modulation control method and system. Background Art

[0002] Pulse width modulation, abbreviated as PWM in English, is a commonly used modulation technology; it controls the transmission of electric energy and the operation of equipment by changing the width of the pulse. PWM is widely used in motor control, LED dimming, power supply regulation and audio signal processing. PWM adjusts the duty cycle by changing the pulse width at a fixed switching frequency. Therefore, PWM has stronger anti-electromagnetic interference ability, smaller output voltage ripple, faster dynamic response speed, and simpler design structure. However, PWM still performs switching operations in each cycle under light load conditions, resulting in switching losses of the power tube. Pulse frequency modulation is a modulation technology with constant pulse width and variable frequency. Due to its variable frequency characteristics, its power consumption is lower under light load conditions. Therefore, the prior art usually adopts the method of simultaneously designing PWM, pulse frequency modulation and model switching modules to solve the problem of excessive power consumption of PWM under light load.

[0003] However, it is difficult to switch models accurately and quickly. The frequency variation characteristics of pulse frequency modulation will also cause electromagnetic interference, and the pulse frequency modulation filter load and peripheral device selection are difficult. In addition, the circuit will also generate noise and delay when switching models, which may have a negative impact on the normal operation of the circuit in scenarios with long periods of time or frequent model switching. Summary of the invention

[0004] In order to overcome the deficiencies of the prior art, the purpose of the present invention is to provide a power electronic pulse width modulation control method and system, which realizes the recognition of the light load state and the processing of the light load signal by adding an auxiliary circuit and a comparator after the PWM generation circuit, so as to solve the extra power consumption generated by the flipping of the light load of the PWM circuit in each cycle; realizes the detection of the mutation signal of the original pulse width signal through the rising edge detection, so that the circuit response speed is faster and more accurate; and realizes the cycle control of the enable control comparator through the auxiliary circuit to make the whole circuit logic more reasonable.

[0005] To achieve the above object, the present invention provides the following solutions:

[0006] A power electronic pulse width modulation control method, comprising:

[0007] Collect pulse width programming information;

[0008] Inputting the pulse width programming information into a PWM generating circuit to obtain an original pulse width signal;

[0009] When the auxiliary circuit detects the rising edge of the original pulse width signal, after a preset delay, the critical point voltage value of the original pulse width signal is collected;

[0010] When the critical point voltage value is at a low level, controlling the auxiliary circuit to output a low level and an enable signal;

[0011] When the enable control comparator receives the enable signal, the original pulse width signal and the output voltage of the auxiliary circuit are collected to obtain a first input voltage value and a second input voltage value;

[0012] When the first input voltage value and the second input voltage value are both at a high level, controlling the enable control comparator to output a high level;

[0013] When only one of the first input voltage value and the second input voltage value is at a high level, controlling the enable control comparator to output a low level;

[0014] The output of the enable control comparator is input into a second-order RC low-pass filter for filtering to obtain a target level output.

[0015] Preferably, the calculation formula of the preset delay is: d =t(p i *w i ≥p0*w0) min ;t d is the preset delay; t() min Calculate the minimum pulse width under the preset conditions; p i is the occurrence frequency corresponding to the i-th type of pulse width; w i is the power consumption value generated by the occurrence of the i-th type of pulse width word; p0 is the maximum allowed occurrence frequency; w0 is the maximum allowed low power consumption value.

[0016] Preferably, the pulse width programming information is input into a PWM generating circuit to obtain an original pulse width signal, including:

[0017] Calculating the voltage difference between the voltage value corresponding to the pulse width programming information and the reference voltage using an error amplifier to obtain an error output;

[0018] Generate a fixed frequency triangle wave signal using the circuit crystal oscillator signal;

[0019] The error output and the triangular wave signal are input into a basic comparator to obtain the original pulse width signal.

[0020] Preferably, when the auxiliary circuit detects the rising edge of the original pulse width signal, after a preset delay, the critical point voltage value of the original pulse width signal is collected, including:

[0021] When the rising edge trigger detects that the original pulse width signal changes from a low level to a high level, the control counter counts the circuit crystal oscillator; the calculation formula of the counting times of the counter is: c is the number of times the counter counts; f n is the natural frequency of the circuit crystal;

[0022] When the counter completes counting, it outputs the output voltage of the rising edge trigger to obtain the critical point voltage value.

[0023] Preferably, the process of determining the parameters of the second-order RC low-pass filter includes:

[0024] Determining the standard range of each component in the second-order RC low-pass filter;

[0025] Set the number of simulation nodes for each device;

[0026] Performing Monte Carlo simulation on the second-order RC low-pass filter according to the standard range and the number of simulation nodes to obtain a simulation data set;

[0027] Determining an optimal range for each device in the second-order RC low-pass filter based on the simulation data set;

[0028] Resetting the fine simulation step size of each device according to the optimal range;

[0029] Performing Monte Carlo simulation on the second-order RC low-pass filter according to the optimal range and the fine simulation step to obtain fine simulation data;

[0030] The parameters of each device are screened according to the detailed simulation data to obtain the optimal parameter configuration.

[0031] Preferably, a power electronic pulse width modulation control system comprises: the PWM generation circuit, the auxiliary circuit, the enable control comparator and the filter;

[0032] The output end of the PWM generating circuit is connected to the input end of the auxiliary circuit and the enable control comparator; the output end and the enable end of the auxiliary circuit are respectively connected to the input end and the control end of the enable control comparator; the output end of the enable control comparator is connected to the input end of the filter;

[0033] The PWM generating circuit is used to generate an original pulse width signal according to the pulse width programming information; the auxiliary circuit is used to detect the load state; the enable control comparator is used to couple the outputs of the PWM generating circuit and the auxiliary circuit; and the filter is used to convert the output of the enable control comparator into a DC level.

[0034] Preferably, the PWM generating circuit comprises: an error amplifier, a basic comparator, a crystal oscillator generator and a triangle wave generator;

[0035] The input end of the error amplifier is connected to the pulse width programming end and the reference voltage respectively; the input end of the triangular wave generator is connected to the crystal oscillator generator; the input end of the basic comparator is connected to the output end of the error amplifier and the triangular wave generator respectively;

[0036] The error amplifier is used to extract the error signal of the pulse width programming information and the reference voltage; the crystal oscillator generator is used to generate a circuit crystal oscillator signal; the triangular wave generator is used to generate a triangular wave signal according to the circuit crystal oscillator signal; the basic comparator is used to generate an original pulse width signal according to the error signal and the triangular wave signal.

[0037] Preferably, the auxiliary circuit comprises: a rising edge trigger, a counter and an enable generator;

[0038] The output end of the rising edge trigger is connected to the input end of the counter; the output end of the counter is connected to the enable generator;

[0039] The rising edge trigger is used to detect the rising edge of the original pulse width signal; the counter is used to count the circuit crystal oscillator signal; and the enable generator is used to send an enable signal to the enable control comparator when the counter calculation is completed.

[0040] The present invention discloses the following technical effects:

[0041] The present invention provides a power electronic pulse width modulation control method and system. By adding an auxiliary circuit and a comparator behind a PWM generation circuit, the extra power consumption generated by the flipping of the PWM circuit in each light load cycle is solved, and the light load state recognition and light load signal processing are realized; the enable terminal is generated by the auxiliary circuit, and the control problem of the enable control comparator is solved, and the cycle control of the working state of the enable control comparator is realized; through rising edge detection, the problem of identifying the starting point of the original pulse width signal cycle is solved, and the detection of the sudden change position of the original pulse width signal is realized. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0043] Figure 1A schematic diagram of a power electronic pulse width modulation control process provided by an embodiment of the present invention;

[0044] Figure 2 A schematic diagram of the structure of a power electronic pulse width modulation control system provided by an embodiment of the present invention;

[0045] Figure 3 A schematic diagram of the structure of a PWM generation circuit provided in an embodiment of the present invention;

[0046] Figure 4 A schematic diagram of the power electronic pulse width modulation control effect provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0047] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0048] The purpose of the present invention is to provide a power electronic pulse width modulation control method and system, which realizes the recognition of light load state and the processing of light load signal by adding an auxiliary circuit and a comparator behind the PWM generation circuit, so as to solve the extra power consumption generated by the flipping of the light load of the PWM circuit in each cycle; realizes the detection of the mutation signal of the original pulse width signal by rising edge detection, so that the circuit response speed is faster and more accurate; and realizes the cycle control of the enable control comparator by generating an enable terminal through the auxiliary circuit, so that the logic of the whole circuit is more reasonable.

[0049] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0050] Figure 1 A schematic diagram of a power electronic pulse width modulation control process provided by an embodiment of the present invention, such as Figure 1 As shown, the present invention provides a power electronic pulse width modulation control method, comprising:

[0051] Step 100: Collect pulse width programming information (Vp);

[0052] Step 200: inputting the pulse width programming information into a PWM generating circuit to obtain an original pulse width signal;

[0053] Step 300: After the auxiliary circuit detects the rising edge of the original pulse width signal, after a preset delay, the critical point voltage value of the original pulse width signal is collected;

[0054] Step 400: When the critical point voltage value is at a low level, controlling the auxiliary circuit to output a low level and an enable signal;

[0055] Step 500: After the enable control comparator receives the enable signal, the original pulse width signal and the output voltage of the auxiliary circuit are collected to obtain a first input voltage value and a second input voltage value;

[0056] Step 600: When the first input voltage value and the second input voltage value are both at a high level, controlling the enable control comparator to output a high level;

[0057] Step 700: When only one of the first input voltage value and the second input voltage value is at a high level, controlling the enable control comparator to output a low level;

[0058] Step 800: Input the output of the enable control comparator into a second-order RC low-pass filter for filtering to obtain a target level output.

[0059] Specifically, the calculation formula of the preset delay is: d =t(p i *w i ≥p0*w0) min ;t d is the preset delay; t() min Calculate the minimum pulse width under the preset conditions; p i is the occurrence frequency corresponding to the i-th type of pulse width; w i is the power consumption value generated by the occurrence of the i-th type of pulse width word; p0 is the maximum allowed occurrence frequency; w0 is the maximum allowed low power consumption value.

[0060] Optionally, the design of the preset delay needs to be selected according to actual conditions.

[0061] Furthermore, the pulse width programming information is input into a PWM generating circuit to obtain an original pulse width signal, including:

[0062] Calculating the voltage difference between the voltage value corresponding to the pulse width programming information and the reference voltage (Vref) by using an error amplifier to obtain an error output;

[0063] Generate a fixed frequency triangle wave signal using the circuit crystal oscillator signal;

[0064] The error output and the triangular wave signal are input into a basic comparator to obtain the original pulse width signal.

[0065] Optionally, when the auxiliary circuit detects the rising edge of the original pulse width signal, after a preset delay, the critical point voltage value of the original pulse width signal is collected, including:

[0066] When the rising edge trigger detects that the original pulse width signal changes from a low level to a high level, the control counter counts the circuit crystal oscillator; the calculation formula of the counting times of the counter is: c is the number of times the counter counts; f n is the natural frequency of the circuit crystal;

[0067] When the counter completes counting, it outputs the output voltage of the rising edge trigger to obtain the critical point voltage value.

[0068] Preferably, the process of determining the parameters of the second-order RC low-pass filter includes:

[0069] Determining the standard range of each component in the second-order RC low-pass filter;

[0070] Set the number of simulation nodes for each device;

[0071] Performing Monte Carlo simulation on the second-order RC low-pass filter according to the standard range and the number of simulation nodes to obtain a simulation data set;

[0072] Determining an optimal range for each device in the second-order RC low-pass filter based on the simulation data set;

[0073] Resetting the fine simulation step size of each device according to the optimal range;

[0074] Performing Monte Carlo simulation on the second-order RC low-pass filter according to the optimal range and the fine simulation step to obtain fine simulation data;

[0075] The parameters of each device are screened according to the detailed simulation data to obtain the optimal parameter configuration.

[0076] Figure 2 A schematic diagram of the structure of a power electronic pulse width modulation control system provided by an embodiment of the present invention is shown in FIG. Figure 3 As shown, the present invention provides a power electronic pulse width modulation control system, comprising: the PWM generation circuit, the auxiliary circuit, the enable control comparator and the filter;

[0077] The output end of the PWM generating circuit is connected to the input end of the auxiliary circuit and the enable control comparator; the output end and the enable end of the auxiliary circuit are respectively connected to the input end and the control end of the enable control comparator; the output end of the enable control comparator is connected to the input end of the filter;

[0078] The PWM generating circuit is used to generate an original pulse width signal according to the pulse width programming information; the auxiliary circuit is used to detect the load state; the enable control comparator is used to couple the outputs of the PWM generating circuit and the auxiliary circuit; and the filter is used to convert the output of the enable control comparator into a DC level.

[0079] Figure 3 A schematic diagram of the PWM generation circuit structure provided by an embodiment of the present invention is shown in FIG. Figure 3 As shown, the PWM generation circuit includes: an error amplifier, a basic comparator, a crystal oscillator generator and a triangle wave generator;

[0080] The input end of the error amplifier is connected to the pulse width programming end and the reference voltage respectively; the input end of the triangular wave generator is connected to the crystal oscillator generator; the input end of the basic comparator is connected to the output end of the error amplifier and the triangular wave generator respectively;

[0081] The error amplifier is used to extract the error signal of the pulse width programming information and the reference voltage; the crystal oscillator generator is used to generate a circuit crystal oscillator signal; the triangular wave generator is used to generate a triangular wave signal according to the circuit crystal oscillator signal; the basic comparator is used to generate an original pulse width signal according to the error signal and the triangular wave signal.

[0082] Alternatively, a triangle wave generator is an electronic device or circuit used to generate a triangle waveform signal with a specific frequency and characteristics. This type of waveform is widely used in various electronic applications, such as audio synthesis, test measurement, communication systems, and control systems. The triangle wave generator can stably and accurately generate a continuous triangle wave signal through a reasonably designed circuit structure and parameter setting, providing an important tool for electronic engineers and researchers. The working principle of the triangle wave generator is based on a specific circuit design built by integrated circuits or discrete components. A typical triangle wave generator uses a combination of an integrator and a comparator to generate a triangle wave output by periodically integrating a square wave signal. The comparator is used to compare the integration result with the threshold and trigger the inversion operation, thereby forming a periodic triangle wave waveform. The basic circuit structure of the triangle wave generator includes the following main components: Integrator: The integrator integrates the input signal and outputs the integration result. In the triangle wave generator, the integrator plays the role of converting the square wave signal into a ramp-shaped waveform. Comparator: The comparator is used to compare the integration result with the set threshold and decide when to invert the output signal, thereby forming a periodic triangle wave waveform. Feedback network: The feedback network plays an important role in the triangle wave generator, which can adjust the oscillation frequency, amplitude and stability. By properly designing the feedback network, the desired waveform characteristics and frequency range can be achieved. The performance of the triangle wave generator depends on the settings of a series of parameters, including: Frequency: The frequency refers to the number of cycles of the triangle wave waveform oscillation per second. The frequency of the triangle wave can be controlled by adjusting the time constant of the integration circuit and the threshold of the comparator. Generally, the frequency is affected by factors such as circuit component parameters, feedback network design and input signal frequency. Amplitude: The output amplitude of the triangle wave generator depends on the gain of the integration operator and the setting of the feedback network. The amplitude range of the triangle wave can be controlled by adjusting the gain of the feedback circuit and the amplification factor of the output stage. Waveform symmetry: Waveform symmetry refers to whether the slope of the rising and falling parts of the triangle wave waveform is equal. By properly designing the parameters of the integration circuit and the threshold of the comparator, a symmetrical triangle wave output can be achieved. The triangle wave generator has the following characteristics: Stability: The triangle wave generator can produce a stable signal with high accuracy in frequency and amplitude. Adjustability: Users can change the frequency and amplitude of the triangle wave by adjusting the circuit parameters to achieve flexible applications. Simplicity: The triangle wave generator usually has a simple circuit structure, which is easy to implement and debug. Accuracy: Through careful design and calibration, the triangle wave generator can provide a highly accurate output signal. Reliability: The triangle wave generator is stable and reliable in long-term operation and is suitable for various working environments.

[0083] Specifically, the auxiliary circuit includes: a rising edge trigger, a counter and an enable generator;

[0084] The output end of the rising edge trigger is connected to the input end of the counter; the output end of the counter is connected to the enable generator;

[0085] The rising edge trigger is used to detect the rising edge of the original pulse width signal; the counter is used to count the circuit crystal oscillator signal; and the enable generator is used to send an enable signal to the enable control comparator when the counter calculation is completed.

[0086] Specifically, the counter circuit is a basic digital circuit that is widely used in digital systems. It records the number of input pulse signals by periodically changing the output state, and sends an indication signal when the predetermined count value is reached. The graphic symbol of the counter circuit can be represented by a rectangle. Its input end receives a trigger pulse signal provided by an external signal source, and the output end generates a code stream. Counter circuits are usually divided into two types: synchronous and asynchronous. The synchronous counter triggers the clock pulse synchronously, while the asynchronous counter works according to its own timing. The core of the counter circuit is the register, followed by the trigger. The register stores a binary code, and the trigger controls the change of the binary code. When a "trigger" signal arrives, the counter starts working and outputs the corresponding digital signal. In order to realize the cumulative counting from high to low, a cascade of multiple triggers is usually used to form a counter. There are many types of counters. According to the different counting carry systems, they can be divided into binary, decimal and N-base counters; according to the increase and decrease of the value in the counter, they can be divided into adder counters, subtractor counters, and reversible counters; according to the different state conversion moments of each trigger in the counter, they can be divided into synchronous counters and asynchronous counters. In this embodiment, a synchronous counter is selected as the counter of the auxiliary circuit.

[0087] Optionally, the rising edge trigger designed in this embodiment will generate a high level signal to drive the counter to count after detecting the rising edge of the original pulse width signal.

[0088] Optionally, the comparator has two analog inputs and a binary output that remains constant as the difference between the input voltages increases or decreases. From this perspective, the comparator can also be viewed as a 1-bit analog-to-digital converter. Nanoamp-power comparators are available in space-saving chip-scale packages (UCSPs) with supply currents as low as 1μA, such as the MAX9025-MAX9098 series, which are ideal for ultra-low-power systems. The MAX9117-MAX9120 single comparator series, which uses a 5-pin SC70 package, has a supply current as low as 600nA and provides two outputs for users to choose from: push-pull or open-drain. The output state of the comparator changes when the voltage between the two inputs crosses zero. Since the inputs are often superimposed with small fluctuations, the differential voltage generated by these fluctuations causes the comparator output to change continuously. To avoid output oscillation, new comparators usually have a hysteresis voltage of several mV. The presence of the hysteresis voltage changes the comparator's switching points to two: one for detecting rising voltages and one for detecting falling voltages. The difference between the high voltage threshold (VTRIP+) and the low voltage threshold (VTRIP-) is equal to the hysteresis voltage (VHYST). The offset voltage (VOS) of the hysteresis comparator is the average of VTRIP+ and VTRIP-. The input voltage switching point of a comparator without hysteresis is the input offset voltage, not the zero voltage of an ideal comparator. The offset voltage (i.e., the switching voltage) generally changes with temperature and power supply voltage. This effect is usually measured by the power supply rejection ratio (PSRR), which indicates the effect of changes in the nominal voltage on the offset voltage. The input impedance of an ideal comparator is infinite, so theoretically it has no effect on the input signal, but the input impedance of an actual comparator cannot be infinite. There is current at the input through the internal resistance of the signal source and flows into the comparator, thereby generating an additional voltage difference. The bias current (IBIAS) is defined as the median of the two comparator input currents and is used to measure the impact of the input impedance. For example, the maximum bias current of the MAX917 and MAX9117 series comparators in the entire operating temperature range is only 2nA, and the bias current at room temperature (TA = +25°C) is less than 1nA. Therefore, designers can choose the appropriate comparator for circuit design according to actual needs.

[0089] Figure 4 A schematic diagram of the power electronic pulse width modulation control effect provided by an embodiment of the present invention, such as Figure 4 As shown, the desired effect of this embodiment is to filter out the sudden change signal generated by the flipping in each cycle during the PWM low power operation.

[0090] Specifically, PWM is widely used in the field of mechanical operation and control, and the application of PWM to DC voltage is becoming more and more popular. In order to realize the conversion of PWM to DC voltage, the PWM waveform needs to be filtered. The currently preferred solution is a second-order RC low-pass filter. The parameter selection of the resistance and capacitance of the second-order RC circuit can be determined according to the actual application, but R or C cannot be too small. For example, when R is very large, C must be small. At this time, due to the parasitic effects of the circuit, the final equivalent capacitance increases a lot, which will affect the filtering effect. The second-order RC circuit is composed of two first-order RC circuits in series; the cutoff frequency of the first RC circuit is: The cutoff frequency of the second RC circuit is: Therefore, the cutoff frequency of the second-order RC circuit is f c1 is the cutoff frequency of the first RC circuit; f c2 is the cut-off frequency of the second RC circuit; R1 is the resistance of the first RC circuit; R2 is the resistance of the second RC circuit; C1 is the capacitance of the first RC circuit; C2 is the capacitance of the second RC circuit.

[0091] Furthermore, in order to determine the optimal values ​​of the resistor and capacitor in the second-order RC circuit, simulation is required. In this embodiment, Candence's ADEL and ADEXL are used to perform basic simulation and Monte Carlo simulation respectively. The simulation process is as follows:

[0092] Load the device library; this embodiment uses the TSMC 0.18um device library;

[0093] Build a second-order RC circuit and set an ideal PWM waveform generating component as the excitation source at the input end of the circuit;

[0094] Select transient simulation in the ADEL menu to ensure that the circuit connection relationship is correct;

[0095] Set the frequency and other parameters for the PWM waveform generator, select AC simulation in the ADEL menu, ensure that the circuit function design is correct, and basically determine the approximate parameter range of each component;

[0096] Import the circuit part into the ADEXL window, open the simulation condition setting window, design parameters such as temperature range, power supply voltage and parameter range of each device, set the simulation step size of each parameter, and perform Monte Carlo simulation;

[0097] The simulation results are converted into a curve graph, and the parameters with the best performance are selected as the device parameters of the second-order RC circuit of this embodiment.

[0098] Specifically, the ideal PWM waveform generation components can be written using HDL, C language, etc., and then packaged locally. The following is a sample code for implementing PWM in C language:

[0099] u16A=0; / / define variables

[0100] u16 Speed;

[0101] void Time0Init() / / Initialize timer

[0102] {

[0103] TMOD|=0x01; / / Configure timer 1

[0104] TH0 = (65536-1000) / 256; / / Configure 1ms timing

[0105] TL0 = (65536 - 1000) % 256;

[0106] TR0=1;

[0107] ET0=1; / / enable timer interrupt

[0108] EA=1; / / Open the general interrupt

[0109]

[0110] {

[0111] Speed ​​= 999;

[0112] }

[0113] }

[0114] The beneficial effects of the present invention are as follows:

[0115] The present invention realizes the recognition of light load state and the processing of light load signal by adding an auxiliary circuit and a comparator behind the PWM generating circuit, thereby solving the extra power consumption caused by the flipping of the PWM circuit under light load in each cycle; the detection of the mutation signal of the original pulse width signal is realized through the rising edge detection, so that the circuit response speed is faster and more accurate; the enabling terminal is generated by the auxiliary circuit, so that the cycle control of the enabling control comparator is realized, so that the logic of the whole circuit is more reasonable.

[0116] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0117] The principles and implementation methods of the present invention are described in this article using specific examples. The description of the above embodiments is only used to help understand the method and core idea of ​​the present invention. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A power electronic pulse width modulation control method, characterized in that: include: Collect pulse width programming information; Inputting the pulse width programming information into a PWM generating circuit to obtain an original pulse width signal; When the auxiliary circuit detects the rising edge of the original pulse width signal, after a preset delay, the critical point voltage value of the original pulse width signal is collected; When the critical point voltage value is at a low level, controlling the auxiliary circuit to output a low level and an enable signal; When the enable control comparator receives the enable signal, the original pulse width signal and the output voltage of the auxiliary circuit are collected to obtain a first input voltage value and a second input voltage value; When the first input voltage value and the second input voltage value are both at a high level, controlling the enable control comparator to output a high level; When only one of the first input voltage value and the second input voltage value is at a high level, controlling the enable control comparator to output a low level; The output of the enable control comparator is input into a second-order RC low-pass filter for filtering to obtain a target level output.

2. A power electronic pulse width modulation control method according to claim 1, characterized in that: The calculation formula of the preset delay is: d =t(p i *w i ≥p0*w0) min ;t d is the preset delay; t() min Calculate the minimum pulse width under the preset conditions; p i is the occurrence frequency corresponding to the i-th type of pulse width; w i is the power consumption value generated by the occurrence of the i-th type of pulse width word; p0 is the maximum allowed occurrence frequency; w0 is the maximum allowed low power consumption value.

3. A power electronic pulse width modulation control method according to claim 1, characterized in that: Inputting the pulse width programming information into the PWM generating circuit to obtain the original pulse width signal includes: Calculating the voltage difference between the voltage value corresponding to the pulse width programming information and the reference voltage using an error amplifier to obtain an error output; Generate a fixed frequency triangle wave signal using the circuit crystal oscillator signal; The error output and the triangular wave signal are input into a basic comparator to obtain the original pulse width signal.

4. A power electronic pulse width modulation control method according to claim 1, characterized in that: When the auxiliary circuit detects the rising edge of the original pulse width signal, after a preset delay, the critical point voltage value of the original pulse width signal is collected, including: When the rising edge trigger detects that the original pulse width signal changes from a low level to a high level, the control counter counts the circuit crystal oscillator; the calculation formula of the counting times of the counter is: c is the number of times the counter counts; f n is the natural frequency of the circuit crystal; When the counter completes counting, it outputs the output voltage of the rising edge trigger to obtain the critical point voltage value.

5. A power electronic pulse width modulation control method according to claim 1, characterized in that: The process of determining the parameters of the second-order RC low-pass filter includes: Determining the standard range of each component in the second-order RC low-pass filter; Set the number of simulation nodes for each device; Performing Monte Carlo simulation on the second-order RC low-pass filter according to the standard range and the number of simulation nodes to obtain a simulation data set; Determining an optimal range for each device in the second-order RC low-pass filter based on the simulation data set; Resetting the fine simulation step size of each device according to the optimal range; Performing Monte Carlo simulation on the second-order RC low-pass filter according to the optimal range and the fine simulation step to obtain fine simulation data; The parameters of each device are screened according to the detailed simulation data to obtain the optimal parameter configuration.

6. A power electronic pulse width modulation control system, applied to a power electronic pulse width modulation control method according to claim 1, the system comprising: The PWM generating circuit, the auxiliary circuit, the enable control comparator and the filter; The output end of the PWM generating circuit is connected to the input end of the auxiliary circuit and the enable control comparator; the output end and the enable end of the auxiliary circuit are respectively connected to the input end and the control end of the enable control comparator; the output end of the enable control comparator is connected to the input end of the filter; The PWM generating circuit is used to generate an original pulse width signal according to the pulse width programming information; the auxiliary circuit is used to detect the load state; the enable control comparator is used to couple the outputs of the PWM generating circuit and the auxiliary circuit; and the filter is used to convert the output of the enable control comparator into a DC level.

7. A power electronic pulse width modulation control system according to claim 6, characterized in that: The PWM generating circuit comprises: an error amplifier, a basic comparator, a crystal oscillator generator and a triangle wave generator; The input end of the error amplifier is connected to the pulse width programming end and the reference voltage respectively; the input end of the triangular wave generator is connected to the crystal oscillator generator; the input end of the basic comparator is connected to the output end of the error amplifier and the triangular wave generator respectively; The error amplifier is used to extract the error signal of the pulse width programming information and the reference voltage; the crystal oscillator generator is used to generate a circuit crystal oscillator signal; the triangular wave generator is used to generate a triangular wave signal according to the circuit crystal oscillator signal; the basic comparator is used to generate an original pulse width signal according to the error signal and the triangular wave signal.

8. A power electronic pulse width modulation control system according to claim 6, characterized in that: The auxiliary circuit includes: a rising edge trigger, a counter and an enable generator; The output end of the rising edge trigger is connected to the input end of the counter; the output end of the counter is connected to the enable generator; The rising edge trigger is used to detect the rising edge of the original pulse width signal; the counter is used to count the circuit crystal oscillator signal; and the enable generator is used to send an enable signal to the enable control comparator when the counter calculation is completed.