Apparatus for manufacturing display device

Abstract

The invention relates to an apparatus for manufacturing a display device. According to one embodiment, a manufacturing apparatus includes: a main production line for manufacturing a display device; and a sub-line connected to the main production line, in which the main production line is provided with: a pretreatment unit; a line-type first vapor deposition device having a plurality of vapor deposition chambers for sequentially forming an organic layer, an upper electrode, and a cap layer on the lower electrode; a first CVD device for forming a first inorganic insulating layer of a sealing layer on the capping layer; a dry etching device for reducing the thickness of the first inorganic insulating layer; and a second CVD device for forming a second inorganic insulating layer of a sealing layer on the first inorganic insulating layer, the sub-line forming a bypass path different from the main production line as a transport path for transporting the substrate to be processed, and the main production line and the sub-line forming an annular transport path.

Description

[0001] Cross-references to related applications

[0002] This application claims the priority based on Japanese Patent Application No. 2023-099287 for which it applied on June 16, 2023, and cites all the contents described in the Japanese application. Technical Field

[0003] An embodiment of the present invention relates to an apparatus for manufacturing a display device. Background Art

[0004] In recent years, display devices using organic light-emitting diodes (OLEDs) as display elements have become practical. The display element includes a pixel circuit including a thin film transistor, a lower electrode connected to the pixel circuit, an organic layer covering the lower electrode, and an upper electrode covering the organic layer. In addition to the light-emitting layer, the organic layer also includes functional layers such as a hole transport layer and an electron transport layer.

[0005] In a manufacturing apparatus for manufacturing such a display device, it is required to suppress a decrease in manufacturing yield. Summary of the invention

[0006] An object of the embodiment is to provide a manufacturing apparatus for a display device capable of suppressing a decrease in manufacturing yield.

[0007] According to one embodiment, a manufacturing apparatus for a display device includes:

[0008] A main production line, which manufactures a display device while conveying a processed substrate formed with a lower electrode; and a subline, which is connected to the above-mentioned main production line, wherein the above-mentioned main production line comprises: a pre-processing section, which performs pre-processing on the above-mentioned processed substrate; an in-line first vapor deposition device, which has a plurality of vapor deposition chambers located on the downstream side along the conveying direction of the above-mentioned processed substrate relative to the above-mentioned pre-processing section and is used to sequentially form an organic layer, an upper electrode and a cover layer on the above-mentioned lower electrode; at least one first CVD device located on the downstream side of the above-mentioned first vapor deposition device and is used to form a first inorganic insulating layer as a sealing layer on the above-mentioned cover layer; at least one dry etching device located on the downstream side of the above-mentioned first CVD device and is used to reduce the thickness of the above-mentioned first inorganic insulating layer; and at least one second CVD device located on the downstream side of the above-mentioned dry etching device and is used to form a second inorganic insulating layer as a sealing layer on the above-mentioned first inorganic insulating layer, wherein the above-mentioned subline forms a detour path different from the above-mentioned main production line as a conveying path for conveying the above-mentioned processed substrate, and the above-mentioned main production line and the above-mentioned subline form a ring-shaped conveying path.

[0009] According to the embodiment, it is possible to provide a display device manufacturing apparatus capable of suppressing a decrease in manufacturing yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 This is a diagram showing an example of the configuration of a DSP of a display device.

[0011] Figure 2 This is a diagram showing an example of the layout of sub-pixels SP1 , SP2 , and SP3 .

[0012] Figure 3 It is along Figure 2 A schematic cross-sectional view of the display device DSP taken along line AB in FIG.

[0013] Figure 4 It is a diagram for explaining a method of manufacturing the display device DSP.

[0014] Figure 5 It is a diagram for explaining a method of manufacturing the display device DSP.

[0015] Figure 6 It is a diagram for explaining a method of manufacturing the display device DSP.

[0016] Figure 7 It is a diagram for explaining a method of manufacturing the display device DSP.

[0017] Figure 8 It is a diagram for explaining a method of manufacturing the display device DSP.

[0018] Fig. 9 It is a diagram for explaining a method of manufacturing the display device DSP.

[0019] Fig.10 It is a diagram for explaining a method of manufacturing the display device DSP.

[0020] Fig.11 It is a diagram showing a configuration example of the display element 20 .

[0021] Fig.12 It is a diagram showing a configuration example of the manufacturing apparatus 100 .

[0022] Fig.13 This is a diagram showing a configuration example of a vapor deposition device ID1.

[0023] Fig.14 This is a diagram showing another configuration example of the vapor deposition device ID1.

[0024] Fig.15 It is a diagram showing the outline of a CVD apparatus and a dry etching apparatus.

[0025] Fig.16 It is a diagram showing another configuration example of the manufacturing apparatus 100 . DETAILED DESCRIPTION

[0026] One embodiment will be described with reference to the drawings.

[0027] The disclosed content is only an example, and for those skilled in the art, the content that can be easily thought of with respect to appropriate changes that maintain the gist of the invention is of course included in the scope of the present invention. In addition, in order to make the description clearer, the width, thickness, shape, etc. of each part are sometimes schematically shown in the drawings compared with the actual method, but this is only an example and does not limit the interpretation of the present invention. In addition, in this specification and each figure, the same reference numerals are sometimes used to mark the constituent elements that perform the same or similar functions as the constituent elements described above with respect to the figures that have appeared, and repeated detailed descriptions are appropriately omitted.

[0028] It should be noted that, in the accompanying drawings, as needed, mutually orthogonal X-axis, Y-axis and Z-axis are recorded for easy understanding. The direction along the X-axis is called the first direction X, the direction along the Y-axis is called the second direction Y, and the direction along the Z-axis is called the third direction Z. Observing various elements parallel to the third direction Z is called top view. It should be noted that terms such as top, above, between, and opposite to each other that represent the positional relationship between two or more constituent elements include not only the situation where two or more constituent elements of an object are in direct contact, but also the situation where they are separated from each other by gaps or other constituent elements. In addition, the positive direction of the Z-axis is called top or above.

[0029] The display device of this embodiment is an organic electroluminescent display device having an organic light emitting diode (OLED) as a display element, and can be mounted on a television, a personal computer, an in-vehicle device, a tablet terminal, a smartphone, a mobile phone terminal, and the like.

[0030] Figure 1 This is a diagram showing an example of the configuration of a DSP of a display device.

[0031] The display device DSP includes a display panel PNL having a display area DA for displaying an image and a peripheral area SA outside the display area DA on an insulating substrate 10. The substrate 10 may be glass or a flexible resin film.

[0032] In the present embodiment, the shape of the substrate 10 when viewed from above is a rectangle. However, the shape of the substrate 10 when viewed from above is not limited to a rectangle, and may be other shapes such as a square, a circle, or an ellipse.

[0033] The display area DA includes a plurality of pixels PX arranged in a matrix in a first direction X and a second direction Y. The pixel PX includes a plurality of sub-pixels SP. In an example, the pixel PX includes a sub-pixel SP1 of a first color, a sub-pixel SP2 of a second color, and a sub-pixel SP3 of a third color. The first color, the second color, and the third color are mutually different colors. It should be noted that the pixel PX may include a sub-pixel SP of another color such as white together with the sub-pixels SP1, SP2, and SP3, or instead of any of the sub-pixels SP1, SP2, and SP3. It should be noted that the combination of sub-pixels may be composed of a combination of two elements instead of three elements, or may be composed of four or more elements such as a sub-pixel SP4 in addition to the sub-pixels SP1 to SP3.

[0034] The sub-pixel SP includes a pixel circuit 1 and a display element 20 driven by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a driving transistor 3, and a capacitor 4. The pixel switch 2 and the driving transistor 3 are switching elements composed of, for example, thin film transistors.

[0035] The gate electrode of the pixel switch 2 is connected to the scanning line GL. One of the source electrode and the drain electrode of the pixel switch 2 is connected to the signal line SL, and the other is connected to the gate electrode of the driving transistor 3 and the capacitor 4. In the driving transistor 3, one of the source electrode and the drain electrode is connected to the power line PL and the capacitor 4, and the other is connected to the anode of the display element 20.

[0036] It should be noted that the configuration of the pixel circuit 1 is not limited to the illustrated example. For example, the pixel circuit 1 may include more thin film transistors and capacitors.

[0037] The display element 20 is an organic light emitting diode (OLED) which is a light emitting element, and is sometimes referred to as an organic EL element.

[0038] Although not described in detail, terminals for connecting an IC chip or a flexible printed circuit board are provided in the peripheral area SA.

[0039] Figure 2 This is a diagram showing an example of the layout of sub-pixels SP1 , SP2 , and SP3 .

[0040] exist Figure 2 In the example of FIG. 1 , the sub-pixel SP2 and the sub-pixel SP3 are arranged in the second direction Y. The sub-pixel SP1 and the sub-pixel SP2 are arranged in the first direction X, and the sub-pixel SP1 and the sub-pixel SP3 are arranged in the first direction X.

[0041] When the sub-pixels SP1, SP2, and SP3 are arranged in this way, columns of sub-pixels SP2 and SP3 arranged alternately in the second direction Y and columns of sub-pixels SP1 arranged in the second direction Y are formed in the display area DA. These columns are arranged alternately in the first direction X.

[0042] It should be noted that the layout of the sub-pixels SP1, SP2, and SP3 is not limited to Figure 2 As another example, the sub-pixels SP1, SP2, and SP3 in each pixel PX may also be arranged in the first direction X in sequence.

[0043] The inorganic insulating layer 5 and the partition 6 are arranged in the display area DA. The inorganic insulating layer 5 has openings AP1, AP2, and AP3 in the sub-pixels SP1, SP2, and SP3, respectively. The inorganic insulating layer 5 having these openings AP1, AP2, and AP3 is sometimes called a rib.

[0044] The partition 6 overlaps with the inorganic insulating layer 5 in a plan view. The partition 6 is formed in a lattice shape surrounding the openings AP1, AP2, and AP3. It can be said that the partition 6 has openings in the sub-pixels SP1, SP2, and SP3 similarly to the inorganic insulating layer 5.

[0045] The sub-pixels SP1 , SP2 , and SP3 include display elements 201 , 202 , and 203 as the display elements 20 , respectively.

[0046] The display element 201 of the sub-pixel SP1 includes a lower electrode LE1, an upper electrode UE1, and an organic layer OR1, which overlap with the opening AP1 respectively. The peripheral portion of the lower electrode LE1 is covered by the inorganic insulating layer 5. The display element 201 including the lower electrode LE1, the organic layer OR1, and the upper electrode UE1 is surrounded by the partition wall 6 when viewed from above. The peripheral portions of the organic layer OR1 and the upper electrode UE1 overlap with the inorganic insulating layer 5 when viewed from above. The organic layer OR1 includes, for example, a light-emitting layer that emits light in a blue wavelength region.

[0047] The display element 202 of the sub-pixel SP2 includes a lower electrode LE2, an upper electrode UE2, and an organic layer OR2, which overlap with the opening AP2 respectively. The peripheral portion of the lower electrode LE2 is covered by the inorganic insulating layer 5. The display element 202 including the lower electrode LE2, the organic layer OR2, and the upper electrode UE2 is surrounded by the partition wall 6 when viewed from above. The peripheral portions of the organic layer OR2 and the upper electrode UE2 overlap with the inorganic insulating layer 5 when viewed from above. The organic layer OR2 includes, for example, a light-emitting layer that emits light in the green wavelength region.

[0048] The display element 203 of the sub-pixel SP3 includes a lower electrode LE3, an upper electrode UE3, and an organic layer OR3, which overlap with the opening AP3 respectively. The peripheral portion of the lower electrode LE3 is covered by the inorganic insulating layer 5. The display element 203 including the lower electrode LE3, the organic layer OR3, and the upper electrode UE3 is surrounded by the partition wall 6 when viewed from above. The peripheral portions of the organic layer OR3 and the upper electrode UE3 overlap with the inorganic insulating layer 5 when viewed from above. The organic layer OR3 includes, for example, a light-emitting layer that emits light in the red wavelength region.

[0049] exist Figure 2 In the example, the outer shapes of the lower electrodes LE1, LE2, LE3 are indicated by dotted lines, and the outer shapes of the organic layers OR1, OR2, OR3 and the upper electrodes UE1, UE2, UE3 are indicated by single-dot chain lines. It should be noted that the outer shapes of the lower electrodes, organic layers, and upper electrodes shown in the figure are not limited to reflecting accurate shapes.

[0050] The lower electrodes LE1, LE2, and LE3 correspond to, for example, anodes of the display element, and the upper electrodes UE1, UE2, and UE3 correspond to cathodes or common electrodes of the display element.

[0051] The lower electrode LE1 is connected to the pixel circuit 1 (refer to Figure 1 The lower electrode LE2 is connected to the pixel circuit 1 of the sub-pixel SP2 through the contact hole CH2. The lower electrode LE3 is connected to the pixel circuit 1 of the sub-pixel SP3 through the contact hole CH3.

[0052] exist Figure 2 In the example, the area of ​​the opening AP1, the area of ​​the opening AP2, and the area of ​​the opening AP3 are different from each other. The area of ​​the opening AP1 is larger than the area of ​​the opening AP2, and the area of ​​the opening AP2 is larger than the area of ​​the opening AP3. In other words, the area of ​​the lower electrode LE1 exposed from the opening AP1 is larger than the area of ​​the lower electrode LE2 exposed from the opening AP2, and the area of ​​the lower electrode LE2 exposed from the opening AP2 is larger than the area of ​​the lower electrode LE3 exposed from the opening AP3.

[0053] Figure 3 It is along Figure 2 A schematic cross-sectional view of the display device DSP taken along line AB in FIG.

[0054] The circuit layer 11 is disposed on the substrate 10. The circuit layer 11 includes Figure 1 The circuit layer 11 is covered with an insulating layer 12 , which is an organic insulating layer that flattens the unevenness generated in the circuit layer 11 .

[0055] The lower electrodes LE1, LE2, and LE3 are arranged on the insulating layer 12 and are separated from each other. The inorganic insulating layer 5 is arranged on the insulating layer 12 and the lower electrodes LE1, LE2, and LE3. The opening AP1 of the inorganic insulating layer 5 overlaps with the lower electrode LE1, the opening AP2 overlaps with the lower electrode LE2, and the opening AP3 overlaps with the lower electrode LE3. The peripheral portions of the lower electrodes LE1, LE2, and LE3 are covered by the inorganic insulating layer 5. Between the lower electrodes LE1, LE2, and LE3 that are adjacent to each other, the insulating layer 12 is covered by the inorganic insulating layer 5. The lower electrodes LE1, LE2, and LE3 are connected to the pixel circuits 1 of the sub-pixels SP1, SP2, and SP3 respectively through contact holes provided in the insulating layer 12. It should be noted that the contact holes of the insulating layer 12 are provided in Figure 3 is omitted, but is equivalent to Figure 2 CH1, CH2, CH3.

[0056] The partition wall 6 includes a conductive lower portion (stem) 61 disposed on the inorganic insulating layer 5 and an upper portion (shade) 62 disposed on the lower portion 61. The lower portion 61 of the partition wall 6 shown on the right side of the figure is located between the opening AP1 and the opening AP2. The lower portion 61 of the partition wall 6 shown on the left side of the figure is located between the opening AP2 and the opening AP3. The upper portion 62 has a greater width than the lower portion 61. Both ends of the upper portion 62 protrude from the side surfaces of the lower portion 61. Such a shape of the partition wall 6 is called a cantilever.

[0057] The organic layer OR1 contacts the lower electrode LE1 through the opening AP1 , covers the lower electrode LE1 exposed from the opening AP1 , and has its peripheral portion located on the inorganic insulating layer 5 . The upper electrode UE1 covers the organic layer OR1 and contacts the lower portion 61 .

[0058] The organic layer OR2 contacts the lower electrode LE2 through the opening AP2 , covers the lower electrode LE2 exposed from the opening AP2 , and its peripheral portion is located on the inorganic insulating layer 5 . The upper electrode UE2 covers the organic layer OR2 and contacts the lower portion 61 .

[0059] The organic layer OR3 contacts the lower electrode LE3 through the opening AP3 , covers the lower electrode LE3 exposed from the opening AP3 , and its peripheral portion is located on the inorganic insulating layer 5 . The upper electrode UE3 covers the organic layer OR3 and contacts the lower portion 61 .

[0060] exist Figure 3 In the example, sub-pixel SP1 has cap layer CP1 and sealing layer SE1, sub-pixel SP2 has cap layer CP2 and sealing layer SE2, and sub-pixel SP3 has cap layer CP3 and sealing layer SE3. Cap layers CP1, CP2, and CP3 respectively function as optical adjustment layers for improving the extraction efficiency of light emitted from organic layers OR1, OR2, and OR3.

[0061] The cap layer CP1 is disposed on the upper electrode UE1 .

[0062] The cap layer CP2 is disposed on the upper electrode UE2.

[0063] The cap layer CP3 is disposed on the upper electrode UE3.

[0064] The sealing layer SE1 is disposed on the cap layer CP1 and in contact with the partition wall 6 , and continuously covers each member of the sub-pixel SP1 .

[0065] The sealing layer SE2 is disposed on the cap layer CP2 and in contact with the partition wall 6 , and continuously covers each member of the sub-pixel SP2 .

[0066] The sealing layer SE3 is disposed on the cap layer CP3 and in contact with the partition wall 6 , and continuously covers each component of the sub-pixel SP3 .

[0067] exist Figure 3 In the example, a portion of each of the organic layer OR1, the upper electrode UE1 and the cover layer CP1 is located on the partition wall 6 around the sub-pixel SP1. These portions are separated from the portions of the organic layer OR1, the upper electrode UE1 and the cover layer CP1 located at the opening AP1 (the portions constituting the display element 201).

[0068] Similarly, portions of the organic layer OR2, the upper electrode UE2 and the cover layer CP2 are each located on the partition wall 6 around the subpixel SP2, and these portions are separated from portions of the organic layer OR2, the upper electrode UE2 and the cover layer CP2 located in the opening AP2 (portions constituting the display element 202).

[0069] Similarly, portions of the organic layer OR3, the upper electrode UE3 and the cover layer CP3 are respectively located on the partition wall 6 around the sub-pixel SP3, and these portions are separated from portions of the organic layer OR3, the upper electrode UE3 and the cover layer CP3 located in the opening AP3 (portions constituting the display element 203).

[0070] It should be noted that on the partition wall 6, the organic layer OR1, the upper electrode UE1, the cap layer CP1, the organic layer OR2, the upper electrode UE2, the cap layer CP2, the organic layer OR3, the upper electrode UE3 and the cap layer CP3 may not exist.

[0071] The ends of the sealing layers SE1, SE2, and SE3 are located on the partition walls 6. Figure 3 In the example, the ends of the sealing layers SE1 and SE2 located on the partition wall 6 between the sub-pixels SP1 and SP2 are separated from each other, and the ends of the sealing layers SE2 and SE3 located on the partition wall 6 between the sub-pixels SP2 and SP3 are separated from each other.

[0072] The sealing layers SE1 , SE2 , and SE3 are covered with a resin layer 13 . The resin layer 13 is covered with a sealing layer 14 . The sealing layer 14 is covered with a resin layer 15 .

[0073] The inorganic insulating layer 5 , the sealing layers SE1 , SE2 , SE3 , and the sealing layer 14 are formed of an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al 2 O 3 ).

[0074] The lower portion 61 of the partition wall 6 is formed of a conductive material and is electrically connected to the upper electrodes UE1, UE2, and UE3. The upper portion 62 of the partition wall 6 is formed of a conductive material, for example, but may also be formed of an insulating material. The lower portion 61 is formed of a material different from that of the upper portion 62.

[0075] The lower electrodes LE1 , LE2 , and LE3 are, for example, a multilayer body including a transparent electrode formed of an oxide conductive material such as indium tin oxide (ITO) and a metal electrode formed of a metal material such as silver.

[0076] The organic layer OR1 includes a light-emitting layer EM1. The organic layer OR2 includes a light-emitting layer EM2. The organic layer OR3 includes a light-emitting layer EM3. The light-emitting layer EM1, the light-emitting layer EM2, and the light-emitting layer EM3 are formed of different materials. In one example, the light-emitting layer EM1 is formed of a material that emits light in a blue wavelength region, the light-emitting layer EM2 is formed of a material that emits light in a green wavelength region, and the light-emitting layer EM3 is formed of a material that emits light in a red wavelength region.

[0077] In addition, each of the organic layers OR1, OR2, and OR3 includes a plurality of functional layers such as a hole injection layer, a hole transport layer, an electron blocking layer, a hole blocking layer, an electron transport layer, and an electron injection layer.

[0078] The upper electrodes UE1 , UE2 , and UE3 are formed of a metal material such as an alloy of magnesium and silver (MgAg).

[0079] The cap layers CP1, CP2, and CP3 are multilayer bodies of multiple thin films. The multiple thin films are all transparent and have different refractive indices. It should be noted that at least one of the cap layers CP1, CP2, and CP3 can be omitted.

[0080] Next, refer to Figures 4 to 10 The manufacturing method of the display device DSP is described. Figures 4 to 10 In the figure, the lower part of the insulating layer 12 is omitted.

[0081] First, if Figure 4As shown, the substrate SUB is prepared for processing. The process of preparing the substrate SUB includes: forming the lower electrode LE1 of the sub-pixel SP1, the lower electrode LE2 of the sub-pixel SP2, and the lower electrode LE3 of the sub-pixel SP3 on the insulating layer 12; forming the inorganic insulating layer 5 having the openings AP1, AP2, and AP3 overlapping with the lower electrodes LE1, LE2, and LE3 respectively; and forming the partition wall 6 including the lower portion 61 located on the inorganic insulating layer 5 and the upper portion 62 located on the lower portion 61 and protruding from the side of the lower portion 61. It should be noted that the partition wall 6 can be formed after the openings AP1, AP2, and AP3 are formed in the inorganic insulating layer 5, and the openings AP1, AP2, and AP3 can also be formed after the partition wall 6 is formed.

[0082] Next, the display element 201 is formed.

[0083] First, a processing substrate SUB is carried into an inline type vapor deposition device described later. Figure 5 As shown, using the partition wall 6 as a mask, materials for forming the hole injection layer, hole transport layer, electron blocking layer, light-emitting layer (EM1), hole blocking layer, electron transport layer, electron injection layer and other layers are sequentially evaporated on the lower electrode LE1 to form an organic layer OR1.

[0084] Then, a mixture of magnesium and silver is deposited on the organic layer OR1 using the partition wall 6 as a mask to form an upper electrode UE1 . The upper electrode UE1 covers the organic layer OR1 and is in contact with the lower portion 61 .

[0085] Then, using the partition wall 6 as a mask, a high refractive index material for forming the first transparent layer TL1 and a low refractive index material for forming the second transparent layer TL2 are sequentially deposited on the upper electrode UE1 to form a cap layer CP1.

[0086] The organic layer OR1 , the upper electrode UE1 , and the cap layer CP1 are continuously formed while maintaining a vacuum environment.

[0087] Then, the processing substrate SUB is carried into a CVD (Chemical-Vapor Deposition) apparatus described later, and then, a sealing layer SE1 is formed so as to continuously cover the cap layer CP1 and the partition wall 6 .

[0088] The organic layer OR1 , the upper electrode UE1 , the cap layer CP1 and the sealing layer SE1 are formed at least in the entire display area DA and are arranged not only in the sub-pixel SP1 but also in the sub-pixels SP2 and SP3 .

[0089] When the organic layer OR1, the upper electrode UE1, and the cap layer CP1 are formed by evaporation, respectively, the material released from the evaporation source is blocked by the upper portion 62. Therefore, a portion of the organic layer OR1, the upper electrode UE1, and the cap layer CP1 is stacked on the upper portion 62. The organic layer OR1, the upper electrode UE1, and the cap layer CP1 located on the upper portion 62 are separated from the organic layer OR1, the upper electrode UE1, and the cap layer CP1 located directly above the lower electrode LE1.

[0090] The sealing layer SE1 covers the cap layer CP1 just above the bank 6 , covers the cap layer CP1 just above the lower electrode LE1 , and is in contact with the bank 6 .

[0091] Here, refer to Figure 6 The process of forming the sealing layer SE1 is further described. Figure 6 , a cross section of the processing substrate covering the sub-pixel SP1 and the sub-pixel SP2 is shown.

[0092] First, if Figure 6 As shown in the upper part of , the first inorganic insulating layer IL1 is formed in a CVD device. The first inorganic insulating layer IL1 is formed of silicon nitride.

[0093] If the first inorganic insulating layer IL1 located in the sub-pixel SP1 is focused, the first inorganic insulating layer IL1 is in contact with the cap layer CP1, is in contact with the side surface of the lower portion 61 of the partition wall 6, and is in contact with the upper portion 62 of the partition wall 6. In addition, the first inorganic insulating layer IL1 has a closed gap V below the upper portion 62. Directly above the lower electrode LE1, the first inorganic insulating layer IL1 has a thickness T101.

[0094] Then, if Figure 6 As shown in the middle section of , in the dry etching device, anisotropic dry etching of the entire first inorganic insulating layer IL1 is performed without the aid of a resist. In anisotropic dry etching, side etching is difficult to perform compared to isotropic dry etching. Therefore, the thickness of the first inorganic insulating layer IL1 located directly above the lower electrodes LE1 and LE2 is reduced, and the thickness of the first inorganic insulating layer IL1 located directly above the upper portion 62 of the partition 6 is reduced. In addition, the first inorganic insulating layer IL1 on the front end side of the gap V is removed, and the gap V is opened. The first inorganic insulating layer IL1 after anisotropic dry etching has a thickness T102 directly above the lower electrode LE1. The thickness T102 is smaller than the thickness T101.

[0095] Note that the first inorganic insulating layer IL1 located below the upper portion 62 of the partition 6 is hardly removed. That is, after the anisotropic dry etching, the first inorganic insulating layer IL1 covers the side surfaces of the lower portion 61 of the partition 6 and the bottom surface of the upper portion 62 of the partition 6 .

[0096] Then, if Figure 6 As shown in the lower part of FIG. 1 , in a CVD device, a second inorganic insulating layer IL2 is formed on the first inorganic insulating layer IL1. The second inorganic insulating layer IL2 is formed of the same material as the first inorganic insulating layer IL1. That is, the second inorganic insulating layer IL2 is formed of silicon nitride. When the first inorganic insulating layer IL1 and the second inorganic insulating layer IL2 are formed of the same material, the interface between the two is almost not recognizable. That is, Figure 6 The sealing layer SE1 shown is a laminate of the first inorganic insulating layer IL1 and the second inorganic insulating layer IL2 , but can be regarded as a single layer, so that undesired reflection and scattering of light inside the sealing layer SE1 are suppressed.

[0097] In the example shown in the figure, the sealing layer SE1 does not include a void below the upper portion 62. Thus, since the sealing layer SE1 does not include a void, cracks starting from the void can be prevented. Figure 6 The gap V shown in the upper section is a small gap.

[0098] Then, if Figure 7 As shown in FIG. 1 , a resist RS patterned into a predetermined shape is formed on the sealing layer SE1 . The resist RS overlaps the sub-pixel SP1 and a part of the partition wall 6 around it.

[0099] Then, if Figure 8 As shown, the sealing layer SE1, the cap layer CP1, the upper electrode UE1 and the organic layer OR1 exposed from the resist RS are sequentially removed by etching using the resist RS as a mask, thereby exposing the lower electrode LE2 of the sub-pixel SP2 and the lower electrode LE3 of the sub-pixel SP3.

[0100] Then, the resist RS is removed. Thus, the display element 201 is formed in the sub-pixel SP1.

[0101] Then, if Fig. 9 As shown, the display element 202 is formed. The steps of forming the display element 202 are the same as the steps of forming the display element 201. That is, an organic layer OR2 including a light-emitting layer EM2, an upper electrode UE2, a cover layer CP2, and a sealing layer SE2 are sequentially formed on the lower electrode LE2. Then, a resist is formed on the sealing layer SE2, and the sealing layer SE2, the cover layer CP2, the upper electrode UE2, and the organic layer OR2 are patterned in sequence by etching using the resist as a mask. After the patterning, the resist is removed. Thus, the display element 202 is formed in the sub-pixel SP2, and the lower electrode LE3 of the sub-pixel SP3 is exposed.

[0102] Then, if Fig.10As shown, the display element 203 is formed. The steps of forming the display element 203 are the same as the steps of forming the display element 201. That is, an organic layer OR3 including a light-emitting layer EM3, an upper electrode UE3, a cap layer CP3, and a sealing layer SE3 are sequentially formed on the lower electrode LE3. Then, a resist is formed on the sealing layer SE3, and the sealing layer SE3, the cap layer CP3, the upper electrode UE3, and the organic layer OR3 are patterned in sequence by etching using the resist as a mask. After the patterning, the resist is removed. Thus, the display element 203 is formed in the sub-pixel SP3.

[0103] Then, form Figure 3 The resin layer 13, the sealing layer 14 and the resin layer 15 are shown. Thus, the display device DSP is completed.

[0104] It should be noted that in the above manufacturing process, it is assumed that the display element 201 is formed first, the display element 202 is formed next, and the display element 203 is formed last, but the formation order of the display elements 201, 202, and 203 is not limited to this example.

[0105] Next, a configuration example of the display element 20 will be described.

[0106] Fig.11 It is a diagram showing a configuration example of the display element 20 .

[0107] Fig.11 The display element 20 shown may correspond to any one of the display elements 201 , 202 , and 203 described above.

[0108] It should be noted that, here, the case where the lower electrode LE corresponds to the anode and the upper electrode UE corresponds to the cathode is described as an example.

[0109] The display element 20 includes an organic layer OR ( OR1 , OR2 , OR3 ) between the lower electrode LE ( LE1 , LE2 , LE3 ) and the upper electrode UE ( UE1 , UE2 , UE3 ).

[0110] In the organic layer OR, a hole injection layer HIL, a hole transport layer HTL, an electron blocking layer EBL, a light emitting layer EML, a hole blocking layer HBL, an electron transport layer ETL, and an electron injection layer EIL are sequentially stacked.

[0111] It should be noted that the organic layer OR may include other functional layers such as a carrier generation layer in addition to the above functional layers as required, and at least one of the above functional layers may be omitted.

[0112] The light-emitting layer EML is equivalent to Figure 3 Any of the light-emitting layers EM1, EM2, EM3 shown.

[0113] The cover layer CP (CP1, CP2, CP3) includes a first transparent layer TL1 and a second transparent layer TL2. The first transparent layer TL1 is arranged on the upper electrode UE. The first transparent layer TL1 is a high refractive index layer having a higher refractive index than the upper electrode UE. The second transparent layer TL2 is arranged on the first transparent layer TL1. The second transparent layer TL2 is a low refractive index layer having a smaller refractive index than the first transparent layer TL1. The sealing layer SE (SE1, SE2, SE3) is arranged on the second transparent layer TL2. It should be noted that the cover layer CP can be omitted.

[0114] It should be noted that the structure of the organic layer OR is not limited to the structure in which the organic layer OR includes one light-emitting layer EML as shown in the figure, and the organic layer OR may include a plurality of light-emitting layers.

[0115] Next, a manufacturing apparatus 100 for the display device DSP will be described.

[0116] Fig.12 1 is a diagram showing a configuration example of the manufacturing apparatus 100. It should be noted that the straight arrows shown in the figure indicate the conveyance direction of the processed substrate.

[0117] The manufacturing apparatus 100 includes a main line 101 and sub-lines 102 and 103 connected to the main line 101. In the main line 101, a substrate to be processed is conveyed from the left side to the right side of the figure.

[0118] The main production line 101 includes a pre-processing unit PRE, in-line vapor deposition devices ID1 and ID2, CVD devices CVD1, CVD2, CVD3, CVD4, CVD5, CVD6, CVD7 and CVD8, and dry etching devices DRY1, DRY2, DRY3 and DRY4.

[0119] The pre-processing unit PRE is connected to a substrate cassette station CAS.

[0120] The vapor deposition devices ID1 and ID2 are located on the downstream side of the pre-processing unit PRE along the conveyance direction of the substrate to be processed.

[0121] CVD devices CVD1 to CVD4 are located on the downstream side with respect to vapor deposition devices ID1 and ID2.

[0122] The dry etching apparatuses DRY1 to DRY4 are located on the downstream side with respect to the CVD apparatuses CVD1 to CVD4 .

[0123] The CVD apparatuses CVD5 to CVD8 are located on the downstream side with respect to the dry etching apparatuses DRY1 to DRY4 .

[0124] It should be noted that, in the main production line 101, in order to manufacture the display device, it is only necessary to set up one vapor deposition device ID1, one CVD device CVD1, one dry etching device DRY1 and one CVD device CVD5.

[0125] The substrate cassette station CAS stores a plurality of processed substrates ( Figure 4 The processing substrate SUB shown).

[0126] The pre-processing unit PRE includes a load lock chamber LL1 connected to the substrate cassette station CAS, a plurality of baking chambers BK1, BK2, BK3 for baking the processed substrates, a plurality of plasma chambers PL1, PL2, PL3 for plasma processing the processed substrates, and a transfer robot chamber RB1.

[0127] The transfer robot chamber RB1 is connected to the load lock chamber LL1 , the baking chambers BK1 to BK3 , and the plasma chambers PL1 to PL3 , and includes a robot for transferring a substrate to be processed in a horizontal posture.

[0128] The evaporation devices ID1 and ID2 have the same structure and are provided with a plurality of evaporation chambers for forming the organic layer OR, the upper electrode UE and the cover layer CP respectively. As described in detail later, in each of the evaporation devices ID1 and ID2, the plurality of evaporation chambers are arranged in one direction. For example, each of the evaporation devices ID1 and ID2 is formed Figure 5 The organic layer OR1, the upper electrode UE1 and the cover layer CP1 are constructed in the manner shown.

[0129] CVD devices CVD1 to CVD4 are all of the same configuration, for example, to form Figure 6 The first inorganic insulating layer IL1 is configured as shown.

[0130] All of the dry etching devices DRY1 to DRY4 have the same configuration, and are configured to reduce the thickness of the first inorganic insulating layer IL1 .

[0131] CVD devices CVD5 to CVD8 are all of the same configuration, for example, to form Figure 6 The second inorganic insulating layer IL2 is configured as shown.

[0132] In the example shown in the figure, the main production line 101 further includes a posture change chamber VCS1, rotation chambers ROT1, ROT2, ROT3, ROT4, ROT5, ROT6, transfer chambers TRF1, TRF2, TRF3, TRF4, a posture change chamber VCS2, a transfer robot chamber RB2, and a load lock chamber LL2.

[0133] The posture change chamber VCS1 is connected between the pre-processing unit PRE and the rotation chamber ROT1. The posture change chamber VCS1 has a mechanism for rotating the processing substrate conveyed in a horizontal posture in the pre-processing unit PRE by 90 degrees to change the posture of the processing substrate to a vertical posture. In addition, the posture change chamber VCS1 also has a mechanism for fixing the processing substrate to a dedicated carrier by an electrostatic chuck. The posture of the processing substrate SUB conveyed into the rotation chamber ROT1 is a vertical posture.

[0134] The rotation chambers ROT1 to ROT6 are all of the same structure and are equipped with a rotation mechanism. The rotation mechanism holds the processed substrate carried in a vertical posture and is configured to be able to rotate around a rotation axis orthogonal to the normal line of the processed substrate. The rotation angle of the rotation mechanism is, for example, 90°, 180°, 270°, or other angles.

[0135] The rotation chamber ROT1 is connected to the posture changing chamber VCS1 and is connected to the upstream side of the vapor deposition devices ID1 and ID2.

[0136] The rotary chamber ROT2 is connected to the downstream side of the vapor deposition devices ID1 and ID2.

[0137] The rotation chamber ROT3 is connected to a plurality of CVD devices CVD1 to CVD4.

[0138] The spin chamber ROT4 is connected to a plurality of dry etching devices DRY1 to DRY4 .

[0139] The rotation chamber ROT5 is connected to a plurality of CVD devices CVD5 to CVD8.

[0140] The whirling chamber ROT6 is located on the downstream side of the whirling chamber ROT5.

[0141] The transfer chambers TRF1 to TRF4 include a transfer mechanism for transferring a substrate to be processed in a vertical posture in one direction.

[0142] The transfer chamber TRF1 connects the rotation chamber ROT2 and the rotation chamber ROT3.

[0143] The transfer chamber TRF2 connects the rotation chamber ROT3 and the rotation chamber ROT4.

[0144] The transfer chamber TRF3 connects the rotation chamber ROT4 and the rotation chamber ROT5.

[0145] The transfer chamber TRF4 connects the rotation chamber ROT5 and the rotation chamber ROT6.

[0146] In the main line 101 , a substrate to be processed is transferred in a vertical posture through vapor deposition apparatuses ID1 and ID2 , CVD apparatuses CVD1 to CVD8 , dry etching apparatuses DRY1 to DRY4 , spin chambers ROT1 to ROT6 , and transfer chambers TRF1 to TRF4 .

[0147] The attitude change chamber VCS2 is connected to the rotation chamber ROT6. The attitude change chamber VCS2 has a mechanism for rotating the processing substrate conveyed in the rotation chamber ROT6 in a vertical attitude by 90 degrees and changing the attitude of the processing substrate to a horizontal attitude. In addition, the attitude change chamber VCS2 also has a mechanism for releasing the fixation based on the electrostatic chuck and removing the processing substrate from the carrier.

[0148] The transfer robot room RB2 is connected to the attitude change room VCS2 and the load lock room LL2, and is provided with a robot for transferring the processed substrate in a horizontal attitude. The load lock room LL2 is connected to the substrate cassette station CAS.

[0149] The sub-line 102 includes rotation chambers ROT11, ROT12, ROT13, ROT14, ROT15, and ROT16, transfer chambers TRF11, TRF12, TRF13, TRF14, TRF15, TRF16, TRF17, and TRF18, and posture change chambers VCS11 and VCS12.

[0150] The sub-line 102 is connected to a plurality of CVD devices CVD1 and CVD3, to a plurality of dry etching devices DRY1 and DRY3, and to a plurality of CVD devices CVD5 and CVD7. In addition, the sub-line 102 is connected to the main production line 101 between the pre-processing unit PRE and the evaporation device ID1 and between the pre-processing unit PRE and the evaporation device ID2. In addition, the sub-line 102 is connected to the main production line 101 between the evaporation device ID1 and the CVD devices CVD1 to CVD4 and between the evaporation device ID2 and the CVD devices CVD1 to CVD4.

[0151] All of the spin chambers ROT11 to ROT16 have the same configuration, and similarly to the spin chamber ROT1 and the like, they include a rotation mechanism capable of rotating the processed substrate while maintaining the substrate in a vertical posture.

[0152] The rotation chamber ROT13 is connected to a plurality of CVD devices CVD1 and CVD3.

[0153] The spin chamber ROT14 is connected to a plurality of dry etching devices DRY1 and DRY3.

[0154] The rotation chamber ROT15 is connected to a plurality of CVD devices CVD5 and CVD7.

[0155] The transfer chambers TRF11 to TRF18 include a transfer mechanism capable of bidirectionally transferring a processed substrate in a vertical posture.

[0156] The transfer chamber TRF11 connects the rotation chamber ROT11 and the rotation chamber ROT12.

[0157] The transfer chamber TRF12 connects the rotation chamber ROT12 and the rotation chamber ROT13 .

[0158] The transfer chamber TRF13 connects the rotation chamber ROT13 and the rotation chamber ROT14.

[0159] The transfer chamber TRF14 connects the rotation chamber ROT14 and the rotation chamber ROT15 .

[0160] The transfer chamber TRF15 connects the rotation chamber ROT15 and the rotation chamber ROT16 .

[0161] The transfer chamber TRF16 connects the rotation chamber ROT1 and the rotation chamber ROT11.

[0162] The transfer chamber TRF17 connects the rotation chamber ROT2 and the rotation chamber ROT12.

[0163] The transfer chamber TRF18 connects the rotation chamber ROT6 and the rotation chamber ROT16 .

[0164] The posture change chamber VCS11 is connected to the rotation chamber ROT12. The posture change chamber VCS12 is connected to the rotation chamber ROT16. The posture change chambers VCS11 and 12 have a mechanism for changing the posture of the processed substrate conveyed in a vertical posture to a horizontal posture. In addition, the posture change chambers VCS11 and 12 also have a mechanism for releasing the fixation by the electrostatic chuck and removing the processed substrate from the carrier.

[0165] The sub-line 103 includes rotation chambers ROT21 , ROT22 , ROT23 , ROT24 , ROT25 , and ROT26 , transfer chambers TRF21 , TRF22 , TRF23 , TRF24 , TRF25 , TRF26 , TRF27 , and TRF28 , and posture change chambers VCS21 and VCS22 .

[0166] The sub-line 103 is connected to a plurality of CVD devices CVD2 and CVD4, to a plurality of dry etching devices DRY2 and DRY4, and to a plurality of CVD devices CVD6 and CVD8. In addition, the sub-line 103 is connected to the main production line 101 between the pre-processing unit PRE and the evaporation device ID1 and between the pre-processing unit PRE and the evaporation device ID2. In addition, the sub-line 103 is connected to the main production line 101 between the evaporation device ID1 and the CVD devices CVD1 to CVD4 and between the evaporation device ID2 and the CVD devices CVD1 to CVD4.

[0167] All of the spin chambers ROT21 to ROT26 have the same configuration and are provided with a rotation mechanism capable of rotating the processed substrate while maintaining the substrate in a vertical posture, similarly to the spin chamber ROT1 and the like.

[0168] The rotation chamber ROT23 is connected to a plurality of CVD devices CVD2 and CVD4.

[0169] The spin chamber ROT24 is connected to a plurality of dry etching devices DRY2 and DRY4.

[0170] The rotation chamber ROT25 is connected to a plurality of CVD devices CVD6 and CVD8.

[0171] The transfer chambers TRF21 to TRF28 include a transfer mechanism capable of bidirectionally transferring a processed substrate in a vertical posture.

[0172] The transfer chamber TRF21 connects the rotation chamber ROT21 and the rotation chamber ROT22.

[0173] The transfer chamber TRF22 connects the rotation chamber ROT22 and the rotation chamber ROT23.

[0174] The transfer chamber TRF23 connects the rotation chamber ROT23 and the rotation chamber ROT24.

[0175] The transfer chamber TRF24 connects the rotation chamber ROT24 and the rotation chamber ROT25.

[0176] The transfer chamber TRF25 connects the rotation chamber ROT25 and the rotation chamber ROT26.

[0177] The transfer chamber TRF26 connects the rotation chamber ROT1 and the rotation chamber ROT21.

[0178] The transfer chamber TRF27 connects the rotation chamber ROT2 and the rotation chamber ROT22.

[0179] The transfer chamber TRF28 connects the rotation chamber ROT6 and the rotation chamber ROT26 .

[0180] The posture change chamber VCS21 is connected to the rotation chamber ROT22. The posture change chamber VCS22 is connected to the rotation chamber ROT26. The posture change chambers VCS21 and 22 are provided with a mechanism for changing the posture of the processed substrate conveyed in a vertical posture to a horizontal posture. In addition, the posture change chambers VCS21 and 22 are also provided with a mechanism for releasing the fixation by the electrostatic chuck and removing the processed substrate from the carrier.

[0181] Although not described in detail, the posture change chambers VCS11, VCS12, VCS21, and VCS22 are connected to the transfer robot chamber RB, respectively. Each transfer robot chamber RB is connected to a load lock chamber connected to the substrate cassette station CAS.

[0182] Such sub-lines 102 and 103 form a detour path different from the main line 101 as a transport path for transporting processed substrates. By connecting such sub-lines 102 and 103 to the main line 101, the main line 101 and sub-lines 102 and 103 form a looped transport path.

[0183] In addition, in the example shown in the figure, the manufacturing apparatus 100 includes two sub-lines 102 and 103 , but as long as at least one sub-line 102 is provided, a loop-shaped transport path can be formed.

[0184] exist Fig.12 In the configuration example shown, for example, vapor deposition device ID1 corresponds to the first vapor deposition device, and vapor deposition device ID2 corresponds to the second vapor deposition device. CVD devices CVD1 to CVD4 correspond to the first CVD device, and CVD devices CVD5 to CVD8 correspond to the second CVD device.

[0185] In addition, the rotation chamber ROT1 is equivalent to the 1st rotation chamber, the rotation chamber ROT2 is equivalent to the 2nd rotation chamber, the rotation chamber ROT3 is equivalent to the 3rd rotation chamber, the rotation chamber ROT4 is equivalent to the 4th rotation chamber, the rotation chamber ROT5 is equivalent to the 5th rotation chamber, the rotation chamber ROT6 is equivalent to the 6th rotation chamber, the rotation chamber ROT11 is equivalent to the 7th rotation chamber, the rotation chamber ROT12 is equivalent to the 8th rotation chamber, the rotation chamber ROT13 is equivalent to the 9th rotation chamber, the rotation chamber ROT14 is equivalent to the 10th rotation chamber, the rotation chamber ROT15 is equivalent to the 11th rotation chamber, and the rotation chamber ROT16 is equivalent to the 12th rotation chamber.

[0186] In addition, transfer chamber TRF1 is equivalent to the 1st transfer chamber, transfer chamber TRF2 is equivalent to the 2nd transfer chamber, transfer chamber TRF3 is equivalent to the 3rd transfer chamber, transfer chamber TRF4 is equivalent to the 4th transfer chamber, transfer chamber TRF11 is equivalent to the 5th transfer chamber, transfer chamber TRF12 is equivalent to the 6th transfer chamber, transfer chamber TRF13 is equivalent to the 7th transfer chamber, transfer chamber TRF14 is equivalent to the 8th transfer chamber, transfer chamber TRF15 is equivalent to the 9th transfer chamber, transfer chamber TRF16 is equivalent to the 10th transfer chamber, transfer chamber TRF17 is equivalent to the 11th transfer chamber, and transfer chamber TRF18 is equivalent to the 12th transfer chamber.

[0187] According to such a manufacturing apparatus 100, a plurality of baking chambers and a plurality of plasma chambers are provided in the pre-processing section PRE, and pre-processing of a plurality of substrates to be processed can be performed simultaneously.

[0188] In addition, in the vapor deposition apparatuses ID1 and ID2, the organic layer OR, the upper electrode UE, and the cap layer CP can be formed on a plurality of substrates to be processed simultaneously.

[0189] In addition, in the CVD apparatuses CVD1 to CVD4 , the first inorganic insulating layer IL1 can be formed simultaneously on a plurality of substrates to be processed.

[0190] In addition, in the dry etching apparatuses DRY1 to DRY4 , the thickness of the first inorganic insulating layer IL1 can be reduced simultaneously on a plurality of substrates to be processed.

[0191] In addition, in the CVD apparatuses CVD5 to CVD8 , the second inorganic insulating layer IL2 can be formed simultaneously on a plurality of substrates to be processed.

[0192] Therefore, the manufacturing yield can be improved.

[0193] Furthermore, since the manufacturing apparatus 100 includes a plurality of apparatuses that perform the same process, even when a failure occurs in some of the apparatuses or maintenance is performed on some of the apparatuses, the main production line 101 can be continuously operated without stopping the manufacturing.

[0194] Fig.13 This is a diagram showing a configuration example of a vapor deposition device ID1.

[0195] The vapor deposition device ID1 includes a plurality of vapor deposition chambers EV1, EV2, EV3, EV4, EV5, EV6, EV7, EV8, EV9, and EV10. These vapor deposition chambers EV1 to EV10 are arranged in one direction.

[0196] The vapor deposition chamber EV1 includes a vapor deposition source S1. The vapor deposition source S1 is configured to radiate a material for forming the hole injection layer HIL.

[0197] The vapor deposition chamber EV2 includes a vapor deposition source S2. The vapor deposition source S2 is configured to radiate a material for forming the hole transport layer HTL.

[0198] The vapor deposition chamber EV3 includes a vapor deposition source S3. The vapor deposition source S3 is configured to emit a material for forming the electron blocking layer EBL.

[0199] The vapor deposition chamber EV4 includes a vapor deposition source S4. The vapor deposition source S4 is configured to radiate a material for forming the light emitting layer EML.

[0200] The vapor deposition chamber EV5 includes a vapor deposition source S5. The vapor deposition source S5 is configured to radiate a material for forming the hole blocking layer HBL.

[0201] The vapor deposition chamber EV6 includes a vapor deposition source S6. The vapor deposition source S6 is configured to emit a material for forming the electron transport layer ETL.

[0202] The vapor deposition chamber EV7 includes a vapor deposition source S7. The vapor deposition source S7 is configured to emit a material for forming the electron injection layer EIL.

[0203] The vapor deposition chamber EV8 includes a vapor deposition source S8. The vapor deposition source S8 is configured to radiate a material for forming the upper electrode UE.

[0204] The vapor deposition chamber EV9 includes a vapor deposition source S9. The vapor deposition source S9 is configured to radiate a material for forming the first transparent layer TL1.

[0205] The vapor deposition chamber EV10 includes a vapor deposition source S10. The vapor deposition source S10 is configured to radiate a material for forming the second transparent layer TL2.

[0206] The processing substrate SUB before being carried into the vapor deposition device ID1 is transported in a horizontal posture and fixed to the carrier CR in the posture change chamber VCS1. In addition, in the posture change chamber VCS1, the posture of the processing substrate SUB is changed to a vertical posture. The processing substrate SUB in the vertical posture is carried into the vapor deposition device ID1. In the vapor deposition device ID1, while the processing substrate SUB is transported in a vertical posture, each material is sequentially vapor-deposited in each vapor deposition chamber.

[0207] exist Fig.13 In the configuration example shown, for example, the vapor deposition chamber EV1 is equivalent to the first vapor deposition chamber, the vapor deposition chamber EV2 is equivalent to the second vapor deposition chamber, the vapor deposition chamber EV3 is equivalent to the third vapor deposition chamber, the vapor deposition chamber EV4 is equivalent to the fourth vapor deposition chamber, the vapor deposition chamber EV5 is equivalent to the fifth vapor deposition chamber, the vapor deposition chamber EV6 is equivalent to the sixth vapor deposition chamber, the vapor deposition chamber EV7 is equivalent to the seventh vapor deposition chamber, the vapor deposition chamber EV8 is equivalent to the eighth vapor deposition chamber, the vapor deposition chamber EV9 is equivalent to the ninth vapor deposition chamber, and the vapor deposition chamber EV10 is equivalent to the tenth vapor deposition chamber.

[0208] Fig.14 This is a diagram showing another configuration example of the vapor deposition device ID1.

[0209] The vapor deposition device ID1 includes a plurality of vapor deposition chambers EV1, EV2, EV3, EV4, EV5, EV6, EV7, EV8, EV9, EV10, EV11, and EV12. These vapor deposition chambers EV1 to EV12 are arranged in one direction.

[0210] The vapor deposition chamber EV1 includes a vapor deposition source S1. The vapor deposition source S1 is configured to radiate a material for forming the hole injection layer HIL.

[0211] The vapor deposition chamber EV2 includes a vapor deposition source S2. The vapor deposition source S2 is configured to radiate a material for forming the hole transport layer HTL.

[0212] The vapor deposition chamber EV3 includes a vapor deposition source S3. The vapor deposition source S3 is configured to emit a material for forming the electron blocking layer EBL.

[0213] The vapor deposition chamber EV4 includes a vapor deposition source S4. The vapor deposition source S4 is configured to radiate a material for forming the light emitting layer EM1.

[0214] The vapor deposition chamber EV5 includes a vapor deposition source S5. The vapor deposition source S5 is configured to radiate a material for forming the light emitting layer EM2.

[0215] The vapor deposition chamber EV6 includes a vapor deposition source S6. The vapor deposition source S6 is configured to emit a material for forming the light emitting layer EM3.

[0216] The materials emitted from the respective vapor deposition sources S4 , S5 , and S6 are light-emitting materials that emit light of colors different from each other.

[0217] The vapor deposition chamber EV7 includes a vapor deposition source S7. The vapor deposition source S7 is configured to radiate a material for forming the hole blocking layer HBL.

[0218] The vapor deposition chamber EV8 includes a vapor deposition source S8. The vapor deposition source S8 is configured to emit a material for forming the electron transport layer ETL.

[0219] The vapor deposition chamber EV9 includes a vapor deposition source S9. The vapor deposition source S9 is configured to emit a material for forming the electron injection layer EIL.

[0220] The vapor deposition chamber EV10 includes a vapor deposition source S10. The vapor deposition source S10 is configured to radiate a material for forming the upper electrode UE.

[0221] The vapor deposition chamber EV11 includes a vapor deposition source S11. The vapor deposition source S11 is configured to radiate a material for forming the first transparent layer TL1.

[0222] The vapor deposition chamber EV12 includes a vapor deposition source S12. The vapor deposition source S12 is configured to radiate a material for forming the second transparent layer TL2.

[0223] The processed substrate SUB before being carried into the vapor deposition apparatus ID1 is carried in a horizontal posture and fixed to the carrier CR in the posture change chamber VCS1. In addition, the posture of the processed substrate SUB is changed to a vertical posture in the posture change chamber VCS1. The processed substrate SUB in the vertical posture is carried into the vapor deposition apparatus ID1.

[0224] In such a vapor deposition device ID1, when forming the display element 201, the processing substrate SUB is transported in a vertical posture while the various materials are sequentially vapor-deposited in the vapor deposition chambers EV1 to EV4. Then, in the vapor deposition chambers EV5 and EV6, the processing substrate SUB is transported in a manner that no material is vapor-deposited. Then, in the vapor deposition chambers EV7 to EV12, the various materials are sequentially vapor-deposited.

[0225] When forming the display element 202, the processing substrate SUB is transported in a vertical posture while each material is sequentially vapor-deposited in the vapor deposition chambers EV1 to EV3. Then, in the vapor deposition chamber EV4, the processing substrate SUB is transported in a manner that no material is vapor-deposited. Then, in the vapor deposition chamber EV5, the material is vapor-deposited. Then, in the vapor deposition chamber EV6, the processing substrate SUB is transported in a manner that no material is vapor-deposited. Then, in the vapor deposition chambers EV7 to EV12, each material is sequentially vapor-deposited.

[0226] When forming the display element 203, the processing substrate SUB is transported in a vertical posture while each material is sequentially deposited in the deposition chambers EV1 to EV3. Then, in the deposition chambers EV4 and EV5, the processing substrate SUB is transported without being deposited with a material. Then, in the deposition chambers EV6 to EV12, each material is sequentially deposited.

[0227] exist Fig.14 In the configuration example shown, for example, the vapor deposition chamber EV1 is equivalent to the first vapor deposition chamber, the vapor deposition chamber EV2 is equivalent to the second vapor deposition chamber, the vapor deposition chamber EV3 is equivalent to the third vapor deposition chamber, the vapor deposition chamber EV4 is equivalent to the fourth vapor deposition chamber, the vapor deposition chamber EV5 is equivalent to the fifth vapor deposition chamber, the vapor deposition chamber EV6 is equivalent to the sixth vapor deposition chamber, the vapor deposition chamber EV7 is equivalent to the seventh vapor deposition chamber, the vapor deposition chamber EV8 is equivalent to the eighth vapor deposition chamber, the vapor deposition chamber EV9 is equivalent to the ninth vapor deposition chamber, the vapor deposition chamber EV10 is equivalent to the tenth vapor deposition chamber, the vapor deposition chamber EV11 is equivalent to the eleventh vapor deposition chamber, and the vapor deposition chamber EV12 is equivalent to the twelfth vapor deposition chamber. In addition, the light-emitting layer EM1 is equivalent to the first light-emitting layer, the light-emitting layer EM2 is equivalent to the second light-emitting layer, and the light-emitting layer EM3 is equivalent to the third light-emitting layer.

[0228] according to Fig.14 In the illustrated configuration example, the vapor deposition apparatus ID1 can be used to form all of the display elements 201 to 203. That is, a separate main production line 101 for forming each of the display elements 201 to 203 is not required, and the scale of the manufacturing apparatus 100 can be reduced.

[0229] It should be noted that the detailed description of the vapor deposition device ID2 is omitted here, but the vapor deposition device ID2 is Fig.13 or Fig.14 The vapor deposition device ID1 shown is constructed in the same manner.

[0230] Fig.15 It is a diagram showing the outline of a CVD apparatus and a dry etching apparatus.

[0231] Each of the CVD devices CVD1 to CVD4 includes a counter electrode CEC facing the processing substrate SUB. The counter electrode CEC is an electrode to which a voltage required for converting the source gas into plasma is applied between the counter electrode CEC and the processing substrate SUB.

[0232] If we focus on the CVD devices CVD1 and CVD3, the CVD devices CVD1 and CVD3 each have a gate connected to the spin chamber ROT3 and a gate connected to the spin chamber ROT13. Therefore, the CVD devices CVD1 and CVD3 can carry in and carry out the processed substrate SUB to and from the spin chamber ROT3, and can carry in and carry out the processed substrate SUB to and from the spin chamber ROT13.

[0233] In addition, in each of the CVD apparatuses CVD1 and CVD3 , the counter electrode CEC is provided outside the transport path of the processing substrate SUB.

[0234] The CVD apparatuses CVD2 and CVD4 can carry in and carry out the processed substrate SUB with the spin chamber ROT3 , and can carry in and carry out the processed substrate SUB with the spin chamber ROT23 .

[0235] Each of the dry etching devices DRY1 to DRY4 includes a counter electrode CED facing the processing substrate SUB. The counter electrode CED is an electrode to which a voltage required for converting the etching gas into plasma is applied between the counter electrode CED and the processing substrate SUB.

[0236] If we focus on the dry etching apparatuses DRY1 and DRY3, the dry etching apparatuses DRY1 and DRY3 each have a grid connected to the spin chamber ROT4 and a grid connected to the spin chamber ROT14. Therefore, the dry etching apparatuses DRY1 and DRY3 can carry in and carry out the processed substrate SUB between the spin chamber ROT4 and the spin chamber ROT14, respectively.

[0237] In addition, in each of the dry etching apparatuses DRY1 and DRY3 , the counter electrode CED is provided outside the conveyance path of the processing substrate SUB.

[0238] The dry etching apparatuses DRY2 and DRY4 can carry in and carry out the processed substrate SUB to and from the spin chamber ROT4 , respectively, and can carry in and carry out the processed substrate SUB to and from the spin chamber ROT24 .

[0239] In the main production line 101, the transport chambers TRF1, TRF2, and TRF3 respectively have a transport path for transporting the processed substrate SUB transported from the evaporation device ID1 in one direction and a transport path for transporting the processed substrate SUB transported from the evaporation device ID2 in one direction. In the transport chamber TRF1, etc., the carrier CR is located on the inner side of the transport path, and the processed substrate SUB is located on the outer side of the transport path. The rotation chamber ROT3 has a rotating mechanism RT that can rotate around the rotation axis AX. As shown by the arrows in the figure, the rotating mechanism RT can rotate in two directions, right and left. The rotation chamber ROT4 is also constructed in the same way as the rotation chamber ROT3. In the rotation chamber ROT3, etc., the carrier CR faces the rotation axis AX.

[0240] In the sub-line 102, the transfer chambers TRF11, TRF12, and TRF13 each have two transfer paths for bidirectionally transferring the processed substrate SUB. The spin chambers ROT13 and ROT14 are configured similarly to the spin chamber ROT3.

[0241] In the sub-line 103, the transfer chambers TRF21, TRF22, and TRF23 each have two transfer paths for bidirectionally transferring the processed substrate SUB. The spin chambers ROT23 and ROT24 are configured similarly to the spin chamber ROT3.

[0242] Here, return again Fig.12 , the process of processing a substrate when manufacturing a display device DSP in the manufacturing device 100 is described.

[0243] First, the flow of processing a substrate in a normal mode will be described.

[0244] The processed substrate taken out from the substrate cassette station CAS is carried into the load lock chamber LL1. Then, the processed substrate is carried into any one of the baking chambers BK1 to BK3 for baking treatment. Then, the processed substrate is carried into any one of the plasma chambers PL1 to PL3 for plasma treatment.

[0245] Then, the processing substrate is carried into the attitude change chamber VCS1 in a horizontal posture and fixed to the carrier. In addition, the attitude of the processing substrate is changed to a vertical attitude. Then, the processing substrate is carried into the evaporation device ID1 or the evaporation device ID2 via the rotation chamber ROT1. In the evaporation device ID1 or the evaporation device ID2, an organic layer OR, an upper electrode UE, and a cap layer CP are sequentially formed on the processing substrate.

[0246] Then, the processed substrate is carried into the spin chamber ROT3 via the spin chamber ROT2 and the transfer chamber TRF1. In the spin chamber ROT3, the rotation mechanism holding the processed substrate is rotated 90 degrees. Then, the processed substrate is carried into any one of the CVD devices CVD1 to CVD4. In the CVD devices CVD1 to CVD4, the first inorganic insulating layer IL1 is formed on the processed substrate.

[0247] Then, the processed substrate is moved into the spin chamber ROT3 again. In the spin chamber ROT3, the rotating mechanism holding the processed substrate is rotated 90°. Then, the processed substrate is moved into the spin chamber ROT4 via the transfer chamber TRF2. In the spin chamber ROT4, the rotating mechanism holding the processed substrate is rotated 90°. Then, the processed substrate is moved into any one of the dry etching devices DRY1 to DRY4. In the dry etching devices DRY1 to 4, the thickness of the first inorganic insulating layer IL1 is reduced.

[0248] Then, the processed substrate is moved into the spin chamber ROT4 again. In the spin chamber ROT4, the rotating mechanism holding the processed substrate is rotated 90°. Then, the processed substrate is moved into the spin chamber ROT5 via the transfer chamber TRF3. In the spin chamber ROT5, the rotating mechanism holding the processed substrate is rotated 90°. Then, the processed substrate is moved into any one of the CVD devices CVD5 to CVD8. In the CVD devices CVD5 to CVD8, the second inorganic insulating layer IL2 is formed on the processed substrate.

[0249] Then, the processed substrate is moved into the rotation chamber ROT5 again. In the rotation chamber ROT5, the rotation mechanism holding the processed substrate is rotated 90°. Then, the processed substrate is moved into the attitude change chamber VCS2 in a vertical posture via the transfer chamber TRF4 and the rotation chamber ROT6, and is released from the carrier. In addition, the attitude of the processed substrate is changed to a horizontal attitude. Then, after being moved into the load lock chamber LL2, the processed substrate is moved into the substrate cassette station CAS.

[0250] Next, several cases will be described with respect to a detour mode for bypassing a processed substrate when a malfunction occurs in a part of the devices constituting the manufacturing apparatus 100 .

[0251] (Case 1) Dry etching equipment DRY1 to DRY4 cannot be used

[0252] For example, the processed substrate carried out from the vapor deposition apparatus ID1 is collected in the substrate cassette station CAS via the spin chamber ROT2 , the transfer chamber TRF27 , the spin chamber ROT22 , and the attitude change chamber VCS21 .

[0253] The processed substrate carried out from the vapor deposition apparatus ID2 is collected in the substrate cassette station CAS via the spin chamber ROT2 , the transfer chamber TRF17 , the spin chamber ROT12 , and the attitude change chamber VCS11 .

[0254] The processed substrate processed by the CVD apparatuses CVD1 and CVD3 is collected to the substrate cassette station CAS via the spin chamber ROT13 , the transfer chamber TRF12 , the spin chamber ROT12 , and the attitude conversion chamber VCS11 .

[0255] The processed substrate processed by the CVD apparatus CVD2 and CVD4 is collected to the substrate cassette station CAS via the spin chamber ROT23 , the transfer chamber TRF22 , the spin chamber ROT22 , and the attitude conversion chamber VCS21 .

[0256] In this way, the processed substrate in the manufacturing process can be quickly recovered, and the time until recovery can be shortened.

[0257] (Case 2-1) CVD devices CVD5 to CVD8 cannot be used

[0258] The processed substrate processed by the dry etching apparatuses DRY1 and DRY3 is collected to the substrate cassette station CAS via the spin chamber ROT14 , the transfer chamber TRF14 , the spin chamber ROT15 , the transfer chamber TRF15 , the spin chamber ROT16 , and the attitude conversion chamber VCS12 .

[0259] The processed substrate processed by the dry etching apparatuses DRY2 and DRY4 is collected to the substrate cassette station CAS via the spin chamber ROT24 , the transfer chamber TRF24 , the spin chamber ROT25 , the transfer chamber TRF25 , the spin chamber ROT26 , and the attitude conversion chamber VCS22 .

[0260] In this way, the processed substrate in the manufacturing process can be quickly recovered, and the time until recovery can be shortened.

[0261] (Case 2-2) CVD devices CVD5 to CVD8 cannot be used

[0262] The processed substrate processed by the dry etching apparatus DRY1 and DRY3 is carried into any one of the CVD apparatuses CVD1 and CVD3 via the spin chamber ROT14, the transfer chamber TRF13, and the spin chamber ROT13. Then, in any one of the CVD apparatuses CVD1 and CVD3, the second inorganic insulating layer IL2 is formed on the processed substrate. That is, the CVD apparatuses CVD1 to CVD4 replace the CVD apparatuses CVD5 to CVD8.

[0263] Therefore, even if a malfunction occurs in a part of the manufacturing equipment, it is possible to continue manufacturing the display device.

[0264] (Case 3) Rotation chamber ROT4 cannot be used

[0265] The processed substrate processed by the CVD apparatus CVD1, CVD3 is carried into any one of the dry etching apparatuses DRY1, DRY3 via the spin chamber ROT13, the transfer chamber TRF13, and the spin chamber ROT14. The processed substrate processed by the dry etching apparatus DRY1, DRY3 is carried into any one of the CVD apparatuses CVD5, CVD7 via the spin chamber ROT14, the transfer chamber TRF14, and the spin chamber ROT15.

[0266] That is, even when any of the transport systems of the main line 101 cannot be used, the display device can be continued by transporting the processed substrates via the sub-lines 102 and 103 .

[0267] (Case 4) Confirmation of the deposited layer

[0268] Before starting the normal mode, in a mode for confirming the state of the vapor deposition layer (organic layer OR, upper electrode UE and cover layer CP) formed using the vapor deposition device ID1, the processed substrate unloaded from the vapor deposition device ID1 is recovered to the substrate box station CAS via the rotation chamber ROT2, the transfer chamber TRF27, the rotation chamber ROT22 and the posture change chamber VCS21.

[0269] Thereby, the state of the vapor-deposited layer can be checked without being affected by other layers.

[0270] (Case 5) Confirmation of the thickness of the sealing layer

[0271] Before starting the normal mode, in a mode for checking the thickness of the first inorganic insulating layer IL1 formed by the CVD apparatuses CVD1 and CVD3, the processed substrate unloaded from the spin chamber ROT1 is loaded into any one of the CVD apparatuses CVD1 and CVD3 via the transfer chamber TRF16, the spin chamber ROT11, the transfer chamber TRF11, the spin chamber ROT12, the transfer chamber TRF12, and the spin chamber ROT13. In the CVD apparatuses CVD1 and CVD3, the processed substrate on which the first inorganic insulating layer IL1 is formed is recovered to the substrate cassette station CAS via the spin chamber ROT13, the transfer chamber TRF12, the spin chamber ROT12, and the attitude change chamber VCS11.

[0272] Thereby, the thickness of the first inorganic insulating layer IL1 can be confirmed without being affected by other layers.

[0273] Next, another configuration example of the manufacturing apparatus 100 will be described.

[0274] Fig.16 1 is a diagram showing another configuration example of the manufacturing apparatus 100. Fig.16 , a section from the pre-processing unit PRE to the CVD apparatuses CVD1 to CVD4 in the manufacturing apparatus 100 is shown, and illustration of apparatuses on the downstream side of the dry etching apparatuses DRY1 to DRY4 is omitted.

[0275] Fig.16 The configuration example shown is Fig.12 The illustrated configuration example is different in that sub-lines 102 and 103 are connected to the middle portions of vapor deposition devices ID1 and ID2, respectively.

[0276] The main line 101 includes a rotation chamber ROT1 - 1 located in the middle of the vapor deposition apparatus ID1 and the middle of the vapor deposition apparatus ID2 .

[0277] The vapor deposition device ID1 includes a chamber group ID1-1 in which a plurality of vapor deposition chambers are arranged, and a chamber group ID1-2 in which a plurality of vapor deposition chambers are arranged. Fig.13 The vapor deposition chambers EV1 to EV5 shown in the figure are composed of the chamber group ID1-2. Fig.13 The vapor deposition chambers EV6 to EV10 shown are configured.

[0278] The vapor deposition device ID2 includes a chamber group ID2 - 1 in which a plurality of vapor deposition chambers are arranged, and a chamber group ID2 - 2 in which a plurality of vapor deposition chambers are arranged.

[0279] The rotation chamber ROT1 - 1 is connected between the chamber group ID1 - 1 and the chamber group ID1 - 2 , and is also connected between the chamber group ID2 - 1 and the chamber group ID2 - 2 . The rotation chamber ROT1 - 1 is also connected to the secondary lines 102 and 103 .

[0280] The sub-line 102 includes transfer chambers TRF11 - 1 and TRF11 - 2 , the transfer chamber ROT11 - 1 , and the transfer chamber TRF16 - 1 between the transfer chambers ROT11 and ROT12 .

[0281] The transfer chamber TRF11 - 1 connects the rotation chamber ROT11 and the rotation chamber ROT11 - 1 .

[0282] The transfer chamber TRF11 - 2 connects the rotation chamber ROT11 - 1 and the rotation chamber ROT12 .

[0283] The transfer chamber TRF16-1 connects the rotation chamber ROT1-1 and the rotation chamber ROT11-1.

[0284] The sub-line 103 includes transfer chambers TRF21 - 1 and TRF21 - 2 , the transfer chamber ROT21 - 1 , and the transfer chamber TRF26 - 1 between the rotation chambers ROT21 and ROT22 .

[0285] The transfer chamber TRF21 - 1 connects the rotation chamber ROT21 and the rotation chamber ROT21 - 1 .

[0286] The transfer chamber TRF21 - 2 connects the rotation chamber ROT21 - 1 and the rotation chamber ROT22 .

[0287] The transfer chamber TRF26-1 connects the rotation chamber ROT1-1 and the rotation chamber ROT21-1.

[0288] exist Fig.16 In the illustrated configuration example, for example, the whirling chamber ROT1 - 1 corresponds to the thirteenth whirling chamber.

[0289] In such a configuration example, the same effects as those of the above-described configuration example can be obtained.

[0290] Furthermore, when some of the vapor deposition chambers of the vapor deposition devices ID1 and ID2 are out of use, it is possible to quickly recover the processed substrates in the manufacturing process.

[0291] Alternatively, when a part of the vapor deposition chambers of chamber group ID1-1 cannot be used, chamber group ID2-1 can replace chamber group ID1-1. Similarly, when a part of the vapor deposition chambers of chamber group ID2-2 cannot be used, chamber group ID1-2 can replace chamber group ID2-2. Therefore, even if a part of the vapor deposition chambers fails, the display device can be manufactured continuously.

[0292] As described above, according to the present embodiment, it is possible to provide a display device manufacturing apparatus and a display device manufacturing method that can suppress a decrease in manufacturing yield.

[0293] Based on the manufacturing apparatus and manufacturing method described above as the embodiments of the present invention, all manufacturing apparatuses and manufacturing methods that can be implemented by those skilled in the art with appropriate design changes also belong to the scope of the present invention as long as they include the gist of the present invention.

[0294] Within the scope of the concept of the present invention, those skilled in the art can think of various variations, which also belong to the scope of the present invention. For example, embodiments obtained by adding, deleting or designing the above-mentioned embodiments appropriately by those skilled in the art, or embodiments obtained by adding, omitting or changing the conditions of the processes are included in the scope of the present invention as long as they have the gist of the present invention.

[0295] In addition, regarding other effects brought about by the methods described in the above-mentioned embodiments, regarding the effects that are clear based on the records in this specification, or the effects that can be appropriately thought of by those skilled in the art, it is of course understood that they are the effects brought about by the present invention.

Claims

1. A manufacturing device for a display device, comprising: a main production line that manufactures a display device while conveying a processing substrate on which a lower electrode is formed; and A secondary line, which is connected to the main production line, The main production line has: A pre-processing unit, which performs pre-processing on the processing substrate; A first in-line vapor deposition device having a plurality of vapor deposition chambers located downstream of the pre-processing section along the conveying direction of the processed substrate and used to sequentially form an organic layer, an upper electrode and a cap layer on the lower electrode; at least one first CVD device located downstream of the first evaporation device and used to form a first inorganic insulating layer of a sealing layer on the cap layer; at least one dry etching device located downstream of the first CVD device and used to reduce the thickness of the first inorganic insulating layer; and at least one second CVD device located downstream of the dry etching device and used to form a second inorganic insulating layer as a sealing layer on the first inorganic insulating layer, The secondary line forms a detour path different from the main production line as a transport path for transporting the processed substrate. The main production line and the sub-line form a loop-shaped conveying path.

2. The manufacturing device of a display device according to claim 1, wherein: The first CVD device, the dry etching device, and the second CVD device are connected to the sub-line.

3. The manufacturing device of a display device according to claim 1, wherein: The sub-line is connected to the main production line between the pre-processing section and the first vapor deposition device and between the first vapor deposition device and the first CVD device.

4. The manufacturing device of a display device according to claim 1, wherein: The main production line also has: a second in-line vapor deposition device having a plurality of vapor deposition chambers for forming the organic layer, the upper electrode, and the cap layer on the lower electrode; a first rotating chamber connected to the upstream side of the first vapor deposition device and the second vapor deposition device and connected to the secondary line; and The second rotation chamber is connected to the downstream side of the first vapor deposition device and the second vapor deposition device and is connected to the sub-line.

5. The manufacturing device of a display device according to claim 4, wherein: The main production line also has: a third rotating chamber connected to the first CVD device; a fourth rotation chamber connected to the dry etching device; and The fifth spin chamber is connected to the second CVD device.

6. The manufacturing device of a display device according to claim 5, wherein: The main production line also has: a first transfer chamber connecting the second rotation chamber and the third rotation chamber; a second transfer chamber connecting the third rotation chamber and the fourth rotation chamber; a third transfer chamber connecting the fourth rotation chamber and the fifth rotation chamber; Rotation Room 6; and The fourth transfer chamber connects the fifth rotation chamber and the sixth rotation chamber.

7. The manufacturing device of a display device according to claim 4, wherein: The main production line also has: an attitude conversion chamber connected between the pre-processing section and the first rotation chamber, and converting the attitude of the processed substrate conveyed in a horizontal attitude in the pre-processing section into a vertical attitude, The processed substrate is conveyed in a vertical posture among the first vapor deposition apparatus, the first CVD apparatus, the dry etching apparatus, and the second CVD apparatus.

8. The manufacturing device of a display device according to claim 6, wherein: The secondary line has: Rotation Room 7; Rotation Room 8; a ninth rotating chamber connected to the first CVD device; a tenth rotation chamber connected to the dry etching device; an 11th rotating chamber connected to the second CVD device; Rotation Room No. 12; a fifth transfer chamber connecting the seventh rotation chamber and the eighth rotation chamber; a sixth transfer chamber connecting the eighth rotation chamber and the ninth rotation chamber; a seventh transfer chamber connecting the ninth rotation chamber and the tenth rotation chamber; an eighth transfer chamber connecting the tenth rotation chamber and the eleventh rotation chamber; a ninth transfer chamber connecting the eleventh rotation chamber and the twelfth rotation chamber; a tenth transfer chamber connecting the first rotation chamber and the seventh rotation chamber; an 11th transfer chamber connecting the second rotation chamber and the eighth rotation chamber; and The 12th transfer chamber connects the 6th rotation chamber and the 12th rotation chamber.

9. The manufacturing apparatus of a display device according to claim 1, wherein: The first vapor deposition device comprises: The first to seventh evaporation chambers are used to form a hole injection layer, a hole transport layer, an electron blocking layer, a light emitting layer, a hole blocking layer, an electron transport layer and an electron injection layer as the organic layer respectively; an eighth evaporation chamber, which is used to form the upper electrode; and The ninth and tenth vapor deposition chambers are used to form a first transparent layer and a second transparent layer as the cover layer, respectively.

10. The manufacturing apparatus of a display device according to claim 1, wherein: The first vapor deposition device comprises: The first to ninth evaporation chambers are used to form a hole injection layer, a hole transport layer, an electron blocking layer, a first light-emitting layer, a second light-emitting layer, a third light-emitting layer, a hole blocking layer, an electron transport layer and an electron injection layer as the organic layer, respectively; a tenth evaporation chamber, which is used to form the upper electrode; and The 11th and 12th vapor deposition chambers are used to form a first transparent layer and a second transparent layer as the cover layer, respectively. The fourth vapor deposition chamber, the fifth vapor deposition chamber, and the sixth vapor deposition chamber include vapor deposition sources that emit light-emitting materials different from each other.

11. The manufacturing device of a display device according to claim 8, wherein: A plurality of the first CVD devices are connected to the ninth rotation chamber, A plurality of the dry etching devices are connected to the tenth rotation chamber, The plurality of the second CVD devices are connected to the 11th spin chamber.

12. The manufacturing device of a display device according to claim 8, wherein: The main production line further includes a 13th rotating chamber in the middle of the first vapor deposition device. The secondary line is connected to the 13th rotation chamber.

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