Module power consumption determination method and device, storage medium and electronic equipment

Abstract

The embodiment of the invention provides a module power consumption determination method and device, a storage medium and electronic equipment, and the method comprises the steps: obtaining a unit library of a module of a target chip, and determining target leakage power consumption and target internal power consumption corresponding to each unit according to a time sequence library corresponding to each unit; determining the total power consumption of each unit according to the target leakage power consumption and the target internal power consumption corresponding to each unit; and determining the module total power consumption of the modules of the target chip according to the total power consumption of each unit. According to the embodiment of the invention, the problem that the mode of determining the module power consumption of the chip is relatively simple and the module power consumption cannot be accurately evaluated in the related technology is solved.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of computers, and more specifically, to a method and device for determining module power consumption, a storage medium, and an electronic device. Background Art

[0002] Integrated circuits have been developing rapidly since their birth. In the past, the integrated circuit design process had a low integration level and power consumption was not a prominent issue. With the advancement of process technology, the process size has been continuously reduced, the integration and complexity of chips have been further improved, the number of transistors integrated per unit area of ​​the chip has increased dramatically, and the power consumption density of the chip has increased dramatically, facing greater challenges in power consumption analysis and optimization. The sharp increase in power consumption leads to an increase in circuit temperature, which reduces the reliability of the integrated circuit and also leads to a significant increase in chip packaging costs. The power consumption problem has become a prominent issue in integrated circuit design.

[0003] For each cell in the cell library, a good gate circuit should have a faster speed and lower power consumption. Therefore, when evaluating the timing after logic synthesis, it is generally necessary to evaluate the power consumption synchronously to analyze whether the power consumption meets expectations, so as to determine whether the design needs to be optimized in terms of power consumption.

[0004] The current method of evaluating the power consumption of standard units is a rough calculation method, namely:

[0005] P std_cell =m·P gate ; Where m is the number of gates of the standard cell in the design, which is actually an equivalent number of gates, just a rough estimate, not an exact value. For simplicity, engineers generally use the area of ​​a 2-input NAND gate cell (nand2) with double the driving capability as an equivalent reference, that is, the area of ​​one gate, so the number of gates of a standard cell is approximately the total area of ​​all standard cells divided by the area of ​​a 2-input NAND gate cell with double the driving capability under the process. gate is the power consumption of a gate. The power consumption of a 2-input NAND gate unit (na nd2) with double the driving capability is used as an equivalent reference.

[0006] The above calculation method is relatively simple and convenient, but it is only a rough estimate and cannot most accurately reflect the total power consumption of the standard unit, and further cannot accurately determine the total power consumption of the chip.

[0007] Regarding the related technology, the method of determining the module power consumption of the chip is relatively simple, but cannot accurately evaluate the problem of module power consumption, and no effective solution has been proposed yet.

[0008] Therefore, it is necessary to improve the related technology to overcome the above-mentioned defects in the related technology. Summary of the invention

[0009] The embodiments of the present application provide a method and device for determining module power consumption, a storage medium, and an electronic device, so as to at least solve the problem that the method for determining the module power consumption of a chip in the related art is relatively simple and cannot accurately evaluate the module power consumption.

[0010] According to one embodiment of the present application, a method for determining module power consumption is provided, comprising: obtaining a unit library of a module of a target chip, and determining a target leakage power consumption and a target internal power consumption corresponding to each unit according to a timing library corresponding to each unit; determining a total power consumption of each unit according to the target leakage power consumption and the target internal power consumption corresponding to each unit; and determining a total module power consumption of the module of the target chip according to the total power consumption of each unit.

[0011] In an exemplary embodiment, determining a target leakage power consumption and a target internal power consumption corresponding to each unit according to a timing library corresponding to each unit includes: determining a unit type of each unit, wherein the unit type includes one of the following: a single-input unit and a multi-input unit; when the unit type of the unit is a single-input unit, obtaining multiple leakage power consumptions corresponding to the unit and multiple internal power consumptions of an output pin corresponding to the unit in the timing library corresponding to the unit; determining the target leakage power consumption and the target internal power consumption corresponding to the unit according to the multiple leakage power consumptions corresponding to the unit and the multiple internal power consumptions of the output pin;

[0012] In the case where the unit type of the unit is a multi-input unit, multiple leakage power consumptions corresponding to the unit and multiple internal power consumptions corresponding to multiple output pins of the unit are obtained in a timing library corresponding to the unit; and a target leakage power consumption and a target internal power consumption corresponding to the unit are determined according to the multiple leakage power consumptions corresponding to the unit and the multiple internal power consumptions corresponding to the multiple output pins.

[0013] In an exemplary embodiment, a target leakage power consumption and a target internal power consumption corresponding to the unit are determined based on multiple leakage power consumptions corresponding to the unit and multiple internal power consumptions of the output pins, including: determining an average value of the multiple leakage power consumptions, and determining a maximum internal power consumption among the multiple internal power consumptions of the output pins; determining the average value as the target leakage power consumption, and determining the maximum internal power consumption as the target internal power consumption.

[0014] In an exemplary embodiment, a target leakage power consumption and a target internal power consumption corresponding to the unit are determined based on multiple leakage power consumptions corresponding to the unit and multiple internal power consumptions corresponding to the multiple output pins, including: determining an average value of the multiple leakage power consumptions, and determining a maximum internal power consumption among the multiple internal power consumptions of each output pin; calculating a first sum value of the maximum internal power consumption corresponding to each output pin; determining the average value as the target leakage power consumption, and determining the first sum value as the target internal power consumption.

[0015] In an exemplary embodiment, determining the total power consumption of each unit according to the target leakage power consumption and the target internal power consumption corresponding to each unit includes: determining a second sum of the target leakage power consumption and the target internal power consumption corresponding to each unit, and determining the second sum as the total power consumption.

[0016] In an exemplary embodiment, before determining the leakage power consumption and internal power consumption corresponding to each unit in the timing library corresponding to each unit, the method further includes: determining the unit name of each unit and the process voltage and temperature conditions of the target chip; and determining the timing library corresponding to each unit according to the unit name and the process voltage and temperature conditions.

[0017] In an exemplary embodiment, after determining the total module power consumption of the modules of the target chip according to the total power consumption of each unit, the method further includes: determining the size relationship between the total module power consumption and the preset power consumption; when the size relationship indicates that the total module power consumption is less than or equal to the preset power consumption, sending a first notification message to the terminal device, wherein the first notification message is used to indicate that the module of the target chip meets the preset requirements; when the size relationship indicates that the total module power consumption is greater than the preset power consumption, sending a second notification message to the terminal device, wherein the second notification message is used to indicate that the module of the target chip does not meet the preset requirements.

[0018] According to another embodiment of the present application, a device for determining module power consumption is provided, including: an acquisition module, used to acquire a unit library of a module of a target chip, and determine a target leakage power consumption and a target internal power consumption corresponding to each unit according to a timing library corresponding to each unit; a first determination module, used to determine the total power consumption of each unit according to the target leakage power consumption and the target internal power consumption corresponding to each unit; and a second determination module, used to determine the total module power consumption of the module of the target chip according to the total power consumption of each unit.

[0019] According to another embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when run.

[0020] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0021] According to another embodiment of the present application, a computer program product is provided, including a computer program, and when the computer program is executed by a processor, the steps in any of the above method embodiments are implemented.

[0022] Through this application, the unit library of the module of the target chip is obtained, and the target leakage power consumption and target internal power consumption corresponding to each unit are determined according to the timing library corresponding to each unit; the total power consumption of each unit is determined according to the target leakage power consumption and target internal power consumption corresponding to each unit; the total module power consumption of the module of the target chip is determined according to the total power consumption of each unit. That is, a list of target units is obtained, and then the specific values ​​of the leakage power consumption and internal power consumption of each unit are obtained from the timing library of each unit in turn, and finally the most accurate power consumption is obtained by statistics. Therefore, the problem in the related art that the method of determining the module power consumption of the chip is relatively simple and the module power consumption cannot be accurately evaluated can be solved. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a hardware structure block diagram of a computer device of a method for determining module power consumption in an embodiment of the present application;

[0024] Figure 2 is a flow chart of a method for determining module power consumption according to an embodiment of the present application;

[0025] Figure 3 is a flow chart of a method for determining module power consumption according to an optional embodiment of the present application;

[0026] Figure 4 is a flow chart of a method for determining power consumption of a unit according to an optional embodiment of the present application;

[0027] Figure 5 is a flow chart of obtaining power consumption of units under different pvt conditions according to an optional embodiment of the present application;

[0028] Figure 6 It is a structural block diagram of a device for determining module power consumption according to an embodiment of the present application. DETAILED DESCRIPTION

[0029] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0030] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0031] The method embodiments provided in the embodiments of the present application can be executed in a computer device or a similar computing device. Taking running on a computer device as an example, Figure 1 1 is a hardware structure block diagram of a computer device for determining a module power consumption according to an embodiment of the present application. Figure 1 As shown, the computer device may include one or more ( Figure 1 Only one is shown in the figure) a processor 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, wherein the above-mentioned computer device may also include a transmission device 106 for communication functions and an input and output device 108. It can be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above-mentioned computer device. Figure 1 More or fewer components as shown, or with Figure 1 Different configurations are shown.

[0032] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the method for determining the module power consumption in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, to implement the above method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include a memory remotely arranged relative to the processor 102, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0033] The transmission device 106 is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of the computer device. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0034] In this embodiment, a method for determining module power consumption is provided. Figure 2 is a flow chart of a method for determining module power consumption according to an embodiment of the present application, such as Figure 2 As shown, the process includes the following steps:

[0035] Step S202, obtaining a unit library of a module of a target chip, and determining a target leakage power consumption and a target internal power consumption corresponding to each unit according to a timing library corresponding to each unit;

[0036] Optionally, the unit library of the module of the target chip refers to a collection of functional units corresponding to a module in a specific chip design, including basic elements such as various logic gates, registers, storage units, and library files of specific functional modules. The unit library can help designers quickly build and verify various functional modules during the chip design process, improving design efficiency and accuracy. In an embodiment of the present application, the power consumption of the units in the chip can be quickly determined.

[0037] The above leakage power consumption can also be understood as static power consumption, which refers to the power consumption generated by leakage current when the circuit is in a waiting or inactive state. leakage It can be calculated by the following formula: leakage =V DD I leakage , where: V DD ——The supply voltage of the transistor, I leakage is the leakage current.

[0038] Dynamic power consumption P dynamic It refers to the power consumption generated when the chip is in operation and the transistor is in a jump state. It is mainly caused by the dynamic switching current. SW (also called jump power consumption) and short-circuit power consumption P generated by short-circuit current SC It consists of two parts. As shown in the following formula: dynamic =P SW +P SC ;

[0039] Dynamic switching power consumption PsW It is the power consumption generated in the switching event of the logic gate, that is, when the output node voltage of the CMOS logic gate produces a logic transition, the power consumption generated by the power supply charging the output node capacitance. SC When the CMOS logic gate is driven by an input voltage with a limited rising and falling edge, the PMOS and NMOS transistors will be turned on synchronously in a short time during the switching process, thus forming a DC path between the power supply and the ground. The analysis of dynamic power consumption by EDA tools is also based on these two parts, but in actual applications, the dynamic switching power consumption P SW Divided into device power consumption P device and network cable load power consumption P net It consists of two parts.

[0040] Device power consumption P device It is divided into two parts: leakage power and internal power. Where n is the minimum number of design units used in the design.

[0041] The above P internal That is the dynamic switching power consumption P SW The relevant parts of the device and the short-circuit power consumption P SC . Leakage power consumption P leakage and internal power consumption P internal All of them can be obtained from the definition of power consumption in the timing library of the standard cells used in the design. The timing library is the main library file that describes the timing information of each cell in the cell library.

[0042] Step S204, determining the total power consumption of each unit according to the target leakage power consumption and the target internal power consumption corresponding to each unit;

[0043] Step S206 , determining the total power consumption of the modules of the target chip according to the total power consumption of each unit.

[0044] Through the above steps, the unit library of the module of the target chip is obtained, and the target leakage power consumption and target internal power consumption corresponding to each unit are determined according to the timing library corresponding to each unit; the total power consumption of each unit is determined according to the target leakage power consumption and target internal power consumption corresponding to each unit; the total module power consumption of the module of the target chip is determined according to the total power consumption of each unit. That is, the target unit list is obtained, and then the specific values ​​of the leakage power consumption and internal power consumption of each unit are obtained from the timing library of each unit in turn, and finally the most accurate power consumption size is obtained by statistics. Therefore, the problem that the method of determining the module power consumption of the chip in the related art is relatively simple and cannot accurately evaluate the module power consumption can be solved.

[0045] The execution subject of the above steps may be a computer terminal, a mobile terminal, etc., but is not limited thereto.

[0046] Optionally, in order to better understand the above step S202 of “determining the target leakage power consumption and target internal power consumption corresponding to each unit according to the timing library corresponding to each unit”, an embodiment of the present application provides an implementation method, including: determining the unit type of each unit, wherein the unit type includes one of the following: a single-input unit and a multi-input unit; when the unit type of the unit is a single-input unit, obtaining multiple leakage power consumptions corresponding to the unit and multiple internal power consumptions of the output pin corresponding to the unit in the timing library corresponding to the unit; determining the target leakage power consumption and target internal power consumption corresponding to the unit according to the multiple leakage power consumptions corresponding to the unit and the multiple internal power consumptions of the output pin;

[0047] In the case where the unit type of the unit is a multi-input unit, multiple leakage power consumptions corresponding to the unit and multiple internal power consumptions corresponding to multiple output pins of the unit are obtained in a timing library corresponding to the unit; and a target leakage power consumption and a target internal power consumption corresponding to the unit are determined according to the multiple leakage power consumptions corresponding to the unit and the multiple internal power consumptions corresponding to the multiple output pins.

[0048] It should be noted that there are two types of units: multi-input units and single-input units. A single-input unit has only one input terminal and receives one input signal; a multi-input unit has multiple input terminals and can receive multiple input signals at the same time. At the same time, a multi-input unit usually has multiple output pins, each of which corresponds to a different input signal or a different processing result. This can achieve multi-channel parallel processing or a combination of multiple functions. For example, a multi-input logic gate can have multiple output pins, each of which corresponds to a different logic operation result.

[0049] The methods of calculating the corresponding target leakage power consumption and target internal power consumption for different types of units are also different. Specifically: for a single-input unit, the target leakage power consumption and target internal power consumption corresponding to the unit are determined based on the multiple leakage power consumptions corresponding to the unit and the multiple internal power consumptions of the output pins; for a multi-input unit, the target leakage power consumption and target internal power consumption corresponding to the unit are determined based on the multiple leakage power consumptions corresponding to the unit and the multiple internal power consumptions corresponding to the multiple output pins.

[0050] In the embodiment of the present application, different power consumption calculation methods are used for different units to improve the accuracy and efficiency of power consumption management. At the same time, dynamically adjusting the power consumption of different units according to actual needs can better meet user needs and improve the response speed and performance of the system. Therefore, the technical solution of using different power consumption calculation methods for different units can optimize power consumption management, improve the overall performance of the system, etc.

[0051] Optionally, for a single-input unit, a method for determining the target leakage power consumption and target internal power consumption corresponding to the unit based on multiple leakage power consumptions corresponding to the unit and multiple internal power consumptions of the output pins includes: determining an average value of the multiple leakage power consumptions, and determining the maximum internal power consumption among the multiple internal power consumptions of the output pins; determining the average value as the target leakage power consumption, and determining the maximum internal power consumption as the target internal power consumption.

[0052] That is to say, for a single-input unit, there is only one input and output, and the internal power consumption of the single-input unit is defined at the output end. Therefore, the target internal power consumption takes the maximum value of the internal power consumption of the output pin in its timing library; the leakage power consumption of the single-input unit takes the average value of all leakage power consumption in its timing library.

[0053] In the embodiment of the present application, the internal power consumption and leakage power consumption are both obtained from the timing library. Therefore, the accurate internal power consumption and leakage power consumption of a single input unit can be obtained, thereby improving the accuracy of determining the power consumption of the module. By calculating the power consumption of a single input unit, the power consumption of the single input unit can be effectively evaluated, and design engineers can be guided to optimize power consumption during the design phase, thereby improving the energy efficiency performance of the chip.

[0054] Optionally, for a multi-input unit, a method for determining a target leakage power consumption and a target internal power consumption corresponding to the unit based on multiple leakage power consumptions corresponding to the unit and multiple internal power consumptions corresponding to the multiple output pins respectively includes: determining an average value of the multiple leakage power consumptions, and determining a maximum internal power consumption among the multiple internal power consumptions of each output pin; calculating a first sum value of the maximum internal power consumption corresponding to each output pin; determining the average value as the target leakage power consumption, and determining the first sum value as the target internal power consumption.

[0055] That is to say, for a multi-input unit, there are multiple inputs and outputs. The internal power consumption of the multi-input unit is defined at the output end. Therefore, the target internal power consumption is the sum of the internal power consumption of all output pins in its timing library, and the internal power consumption of each output pin is still the maximum value of the internal power consumption of the output pin; the leakage power consumption of the multi-input unit is calculated in the same way as the leakage power consumption of the single-output unit, and both take the average value of all leakage power consumption in its timing library.

[0056] In the embodiment of the present application, the internal power consumption and leakage power consumption are both obtained from the timing library. Therefore, the accurate internal power consumption and leakage power consumption of the multi-input unit can be obtained, thereby improving the accuracy of determining the power consumption of the module. By calculating the power consumption of the multi-input unit, the power consumption of the multi-input unit can be effectively evaluated, and the design engineers can be guided to optimize the power consumption during the design stage, thereby improving the energy efficiency performance of the chip.

[0057] Optionally, determining the total power consumption of each unit according to the target leakage power consumption and the target internal power consumption corresponding to each unit includes: determining a second sum of the target leakage power consumption and the target internal power consumption corresponding to each unit, and determining the second sum as the total power consumption.

[0058] That is, the sum of the target leakage power consumption and the target internal power consumption corresponding to each unit is taken as the total power consumption of each unit.

[0059] Optionally, before determining the leakage power consumption and internal power consumption corresponding to each unit in the timing library corresponding to each unit, the following scheme needs to be executed: determine the unit name of each unit and the process voltage and temperature conditions of the target chip; determine the timing library corresponding to each unit based on the unit name and the process voltage and temperature conditions.

[0060] That is to say, for each unit, there are different timing libraries for power consumption under different process voltage and temperature (process-temperature-voltage, referred to as PVT) conditions. The most common ones are the timing libraries under three PVT conditions, namely, the best or fastest (BC / best case, fast), the worst or slow (WC / worst case, slow), and the typical or normal (TC / typical case, normal). Taking these three PVT conditions as an example, open the best case, worst case, and typical case timing libraries of all units in turn, and obtain the target leakage power consumption and target internal power consumption under these three conditions respectively.

[0061] In an embodiment of the present application, obtaining the power consumption value of a unit under different process voltage and temperature conditions can help the target object (e.g., a researcher) better understand the performance of the chip under different working conditions. By analyzing the power consumption value, the performance and stability of the chip can be evaluated, the circuit design can be optimized, and the efficiency and reliability of the circuit can be improved. In addition, by studying the power consumption value, it can also help optimize the power supply management and heat dissipation design of the chip and extend the service life of the chip. That is, obtaining the power consumption value of a unit under different process voltage and temperature conditions can provide an important reference for chip design and application.

[0062] Optionally, after determining the total module power consumption of the modules of the target chip according to the total power consumption of each unit, the method further includes: determining the size relationship between the total module power consumption and the preset power consumption; when the size relationship indicates that the total module power consumption is less than or equal to the preset power consumption, sending a first notification message to the terminal device, wherein the first notification message is used to indicate that the module of the target chip meets the preset requirements; when the size relationship indicates that the total module power consumption is greater than the preset power consumption, sending a second notification message to the terminal device, wherein the second notification message is used to indicate that the module of the target chip does not meet the preset requirements.

[0063] That is to say, in the embodiment of the present application, it is possible to automatically check whether the power consumption of the chip meets the preset requirements. When the verification is completed, the verification result is automatically sent to the terminal device so that the target object corresponding to the terminal device can optimize or further develop the chip accordingly.

[0064] Obviously, the above-described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. In order to better understand the above-mentioned method for determining the power consumption of the module, the above-mentioned process is described below in conjunction with the embodiments, but it is not intended to limit the technical solution of the embodiments of the present invention, specifically:

[0065] In an alternative embodiment, Figure 3 : is a flow chart of a method for determining module power consumption according to an optional embodiment of the present application, and the specific steps are as follows:

[0066] Step S301: obtaining a unit list after logic synthesis (equivalent to the unit library in the above embodiment);

[0067] Step S302: Obtain the names and unit quantity a of all units (equivalent to the units in the above embodiment);

[0068] Step S303: Initially set total power consumption P_total=0, i=1;

[0069] Step S304: Determine whether i is greater than a. If i is greater than a, execute step 10; otherwise, execute step S305;

[0070] Step S305: Obtain the timing library file of the unit according to the name of the i-th unit;

[0071] Step S306: Obtain the leakage power consumption P_leakage and internal power consumption P_interna of the i-th unit in the timing library;

[0072] Step S307: determining the total power consumption Pi of the ith unit according to the leakage power consumption P_leakage and the internal power consumption P_interna of the ith unit;

[0073] Step S308: Update total power consumption: P_total=P1+P2+...+Pi;

[0074] Step S309: i=i+1, continue to execute steps S304-308;

[0075] Step S310: outputting the final total power consumption P_total.

[0076] That is, the leakage power consumption and internal power consumption of the unit are added together to obtain the power consumption value Pi of the unit. The process is cycled a times to obtain the power consumption values ​​of all units in turn, that is, the power consumption values ​​of a units, and the power consumption values ​​of all units are added together to obtain the total power consumption value P_total.

[0077] Optionally, an embodiment of the present application provides a method for determining the power consumption of a unit. Figure 4 : is a flow chart of a method for determining power consumption of a unit according to an optional embodiment of the present application, which is as follows:

[0078] For single-input and multi-input cells, the leakage power consumption is the average value of all leakage power consumption in the timing library. For a single-input cell, there is only one input and output, and its internal power consumption is defined at the output pin. Therefore, the maximum value of the internal power consumption of the output pin in the timing library is taken. For multi-input cells, the internal power consumption is the sum of the internal power consumption of all output pins in the timing library. The internal power consumption of each output pin is still the maximum value of the internal power consumption of the output pin.

[0079] In the embodiment of the present application, a method for obtaining the power consumption of units under different pvt conditions is also provided. Figure 5 This is a flow chart of obtaining the power consumption of units under different PVT conditions according to an optional embodiment of the present application, which is as follows:

[0080] Get the timing library files of different pvt conditions of the unit according to the unit name. The most common ones are the timing libraries under three pvt conditions, namely the best or fastest (BC / best case, fast), the worst or slowest (WC / worst case, sloW), and the typical or normal (TC / typical case, normal). Take these three pvt conditions as an example, Figure 5 As shown, open the best case, W rst case, and typical case timing libraries of all units in turn, and obtain the leakage power consumption values ​​and internal power consumption values ​​under these three conditions respectively. Figure 4 The total power consumption under three PVT conditions is obtained by using the method.

[0081] The embodiment of the present application can obtain the leakage power consumption and internal power consumption of the unit from the timing library, and process it according to engineering experience to obtain the power consumption of the single-input unit and the multi-input unit. The whole process can be processed automatically by scripts, reducing the process of manual calculation and data acquisition, and is less prone to errors. Obtaining data directly from the timing library is more accurate than estimated data, and can make a more accurate judgment on the power consumption of the design. At the same time, the power consumption under different PVT conditions is obtained according to the needs, making the power consumption analysis more comprehensive, thereby determining whether it is necessary to optimize the design for power consumption.

[0082] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0083] In this embodiment, a device for determining module power consumption is also provided, which is used to implement the above embodiments and preferred implementation modes, and will not be repeated hereafter. As used below, the term "module" may implement a combination of software and / or hardware of a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0084] Figure 6 is a structural block diagram of a device for determining module power consumption according to an embodiment of the present application, such as Figure 6 As shown, the device comprises:

[0085] An acquisition module 62 is used to acquire a unit library of a module of a target chip, and determine a target leakage power consumption and a target internal power consumption corresponding to each unit according to a timing library corresponding to each unit;

[0086] A first determining module 64, configured to determine the total power consumption of each unit according to the target leakage power consumption and the target internal power consumption corresponding to each unit;

[0087] The second determining module 66 is configured to determine the total power consumption of the modules of the target chip according to the total power consumption of each unit.

[0088] Through the above device, the unit library of the module of the target chip is obtained, and the target leakage power consumption and target internal power consumption corresponding to each unit are determined according to the timing library corresponding to each unit; the total power consumption of each unit is determined according to the target leakage power consumption and target internal power consumption corresponding to each unit; the total module power consumption of the module of the target chip is determined according to the total power consumption of each unit. That is, the target unit list is obtained, and then the specific values ​​of the leakage power consumption and internal power consumption of each unit are obtained from the timing library of each unit in turn, and finally the most accurate power consumption size is obtained by statistics. Therefore, the problem that the method of determining the module power consumption of the chip in the related art is relatively simple and cannot accurately evaluate the module power consumption can be solved.

[0089] In an exemplary embodiment, the acquisition module 62 is used to determine the unit type of each unit, wherein the unit type includes one of the following: a single-input unit and a multi-input unit; when the unit type of the unit is a single-input unit, a plurality of leakage power consumptions corresponding to the unit and a plurality of internal power consumptions of an output pin corresponding to the unit are acquired in a timing library corresponding to the unit; a target leakage power consumption and a target internal power consumption corresponding to the unit are determined according to the plurality of leakage power consumptions corresponding to the unit and the plurality of internal power consumptions of the output pin;

[0090] In the case where the unit type of the unit is a multi-input unit, multiple leakage power consumptions corresponding to the unit and multiple internal power consumptions corresponding to multiple output pins of the unit are obtained in a timing library corresponding to the unit; and a target leakage power consumption and a target internal power consumption corresponding to the unit are determined according to the multiple leakage power consumptions corresponding to the unit and the multiple internal power consumptions corresponding to the multiple output pins.

[0091] In an exemplary embodiment, the acquisition module 62 is used to determine an average value of the multiple leakage power consumptions and determine a maximum internal power consumption among multiple internal power consumptions of the output pin; determine the average value as the target leakage power consumption, and determine the maximum internal power consumption as the target internal power consumption.

[0092] In an exemplary embodiment, the acquisition module 62 is used to determine the average value of the multiple leakage power consumptions and determine the maximum internal power consumption among the multiple internal power consumptions of each output pin; calculate the first sum value of the maximum internal power consumption corresponding to each output pin; determine the average value as the target leakage power consumption, and determine the first sum value as the target internal power consumption.

[0093] In an exemplary embodiment, the first determination module 64 is configured to determine a second sum of the target leakage power consumption and the target internal power consumption corresponding to each unit, and determine the second sum as the total power consumption.

[0094] In an exemplary embodiment, the acquisition module 62 is used to determine the unit name of each unit and the process voltage and temperature conditions of the target chip; and determine the timing library corresponding to each unit according to the unit name and the process voltage and temperature conditions.

[0095] In an exemplary embodiment, the above-mentioned device also includes: a sending module, used to determine the size relationship between the total power consumption of the module and the preset power consumption; when the size relationship indicates that the total power consumption of the module is less than or equal to the preset power consumption, sending a first notification message to the terminal device, wherein the first notification message is used to indicate that the module of the target chip meets the preset requirements; when the size relationship indicates that the total power consumption of the module is greater than the preset power consumption, sending a second notification message to the terminal device, wherein the second notification message is used to indicate that the module of the target chip does not meet the preset requirements.

[0096] It should be noted that the above modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0097] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps in any of the above method embodiments when running, specifically:

[0098] S1, obtaining a unit library of a module of a target chip, and determining a target leakage power consumption and a target internal power consumption corresponding to each unit according to a timing library corresponding to each unit;

[0099] S2, determining the total power consumption of each unit according to the target leakage power consumption and the target internal power consumption corresponding to each unit;

[0100] S3, determining the total power consumption of the modules of the target chip according to the total power consumption of each unit.

[0101] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0102] An embodiment of the present application further provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to perform the steps in any one of the above method embodiments, specifically:

[0103] S1, obtaining a unit library of a module of a target chip, and determining a target leakage power consumption and a target internal power consumption corresponding to each unit according to a timing library corresponding to each unit;

[0104] S2, determining the total power consumption of each unit according to the target leakage power consumption and the target internal power consumption corresponding to each unit;

[0105] S3, determining the total power consumption of the modules of the target chip according to the total power consumption of each unit.

[0106] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0107] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any one of the above method embodiments are implemented.

[0108] An embodiment of the present application further provides another computer program product, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above method embodiments are implemented.

[0109] The embodiment of the present application further provides a computer program, which includes computer instructions, which are stored in a computer-readable storage medium; a processor of a computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device performs the steps in any of the above method embodiments, specifically:

[0110] S1, obtaining a unit library of a module of a target chip, and determining a target leakage power consumption and a target internal power consumption corresponding to each unit according to a timing library corresponding to each unit;

[0111] S2, determining the total power consumption of each unit according to the target leakage power consumption and the target internal power consumption corresponding to each unit;

[0112] S3, determining the total power consumption of the modules of the target chip according to the total power consumption of each unit.

[0113] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.

[0114] Obviously, those skilled in the art should understand that the above modules or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0115] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method for determining module power consumption, characterized in that: include: Obtain a unit library of a module of a target chip, and determine a target leakage power consumption and a target internal power consumption corresponding to each unit according to a timing library corresponding to each unit; The total power consumption of each unit is determined according to the target leakage power consumption and the target internal power consumption corresponding to each unit; and the total module power consumption of the module of the target chip is determined according to the total power consumption of each unit.

2. The method according to claim 1, characterized in that Determining a target leakage power consumption and a target internal power consumption corresponding to each unit according to a timing library corresponding to each unit includes: Determining a unit type of each unit, wherein the unit type includes one of the following: a single-input unit, a multi-input unit; In the case where the unit type of the unit is a single-input unit, obtaining multiple leakage power consumptions corresponding to the unit and multiple internal power consumptions of output pins corresponding to the unit in a timing library corresponding to the unit; Determine a target leakage power consumption and a target internal power consumption corresponding to the unit according to a plurality of leakage power consumptions corresponding to the unit and a plurality of internal power consumptions of the output pin; In the case where the unit type of the unit is a multi-input unit, obtaining multiple leakage power consumptions corresponding to the unit and multiple internal power consumptions corresponding to multiple output pins corresponding to the unit in a timing library corresponding to the unit; The target leakage power consumption and the target internal power consumption corresponding to the unit are determined according to the multiple leakage power consumptions corresponding to the unit and the multiple internal power consumptions respectively corresponding to the multiple output pins.

3. The method according to claim 2, characterized in that Determining a target leakage power consumption and a target internal power consumption corresponding to the unit according to a plurality of leakage power consumptions corresponding to the unit and a plurality of internal power consumptions of the output pins includes: determining an average value of the plurality of leakage power consumptions, and determining a maximum internal power consumption among the plurality of internal power consumptions of the output pin; The average value is determined as the target leakage power consumption, and the maximum internal power consumption is determined as the target internal power consumption.

4. The method according to claim 2, characterized in that: Determining a target leakage power consumption and a target internal power consumption corresponding to the unit according to a plurality of leakage power consumptions corresponding to the unit and a plurality of internal power consumptions respectively corresponding to the plurality of output pins, comprising: determining an average value of the plurality of leakage power consumptions, and determining a maximum internal power consumption among a plurality of internal power consumptions of each output pin; Calculate a first sum value of the maximum internal power consumption corresponding to each output pin; The average value is determined as the target leakage power consumption, and the first sum value is determined as the target internal power consumption.

5. The method according to claim 1, characterized in that Determining the total power consumption of each unit according to the target leakage power consumption and the target internal power consumption corresponding to each unit includes: A second sum of the target leakage power consumption and the target internal power consumption corresponding to each unit is determined, and the second sum is determined as the total power consumption.

6. The method according to claim 1, characterized in that Before determining the leakage power consumption and internal power consumption corresponding to each unit in the timing library corresponding to each unit, the method further includes: Determine the unit name of each unit and the process voltage and temperature conditions of the target chip; The timing library corresponding to each unit is determined according to the unit name and the process voltage and temperature conditions.

7. The method according to claim 1, characterized in that After determining the total power consumption of the modules of the target chip according to the total power consumption of each unit, the method further includes: Determine the relationship between the total power consumption of the module and the preset power consumption; When the size relationship indicates that the total power consumption of the module is less than or equal to the preset power consumption, sending a first notification message to the terminal device, wherein the first notification message is used to indicate that the module of the target chip meets the preset requirement; In a case where the size relationship indicates that the total power consumption of the module is greater than the preset power consumption, a second notification message is sent to the terminal device, wherein the second notification message is used to indicate that the module of the target chip does not meet the preset requirement.

8. A device for determining module power consumption, characterized in that: include: An acquisition module, used to acquire a unit library of a module of a target chip, and determine a target leakage power consumption and a target internal power consumption corresponding to each unit according to a timing library corresponding to each unit; A first determining module, configured to determine the total power consumption of each unit according to the target leakage power consumption and the target internal power consumption corresponding to each unit; The second determining module is used to determine the total module power consumption of the modules of the target chip according to the total power consumption of each unit.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method described in any one of claims 1 to 7 when executed by a processor.

10. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method described in any one of claims 1 to 7 are implemented.

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