Phase shift attenuation circuit, phase shift attenuation network and radio frequency microwave system

Abstract

The invention discloses a phase shift attenuation circuit, a phase shift attenuation network and a radio frequency microwave system. The phase shift attenuation circuit comprises a plurality of first differential circuits which are electrically connected in sequence; the electric connection mode between two adjacent first differential circuits comprises direct connection and / or connection through an attenuator unit; wherein the phase shift attenuation circuit realizes 8-bit stepping attenuation through the attenuator unit; 7-bit stepping attenuation included in the 8-bit stepping attenuation is used for realizing a phase shift function, and the 8-bit stepping attenuation is used for realizing phase shift and attenuation functions. The phase shift attenuation circuit disclosed by the invention is constructed based on a differential circuit architecture, and the same circuit can simultaneously realize phase shift and attenuation functions.

Description

Technical Field

[0001] The present application relates to the field of wireless communications, and in particular to a high-precision, ultra-wideband phase-shift attenuation circuit, and a phase-shift attenuation network and a radio frequency microwave system having the phase-shift attenuation circuit. Background Art

[0002] Modern communication systems (5G MIMO communication, low-orbit satellite communication, etc.) have very high requirements for digitally controlled phase shifters and digitally controlled attenuators. Digitally controlled attenuators need to have low insertion loss in the band and high attenuation accuracy, while digitally controlled shifters need to have low insertion loss in the band and high shift accuracy, and also need to be small in size. The existing implementation methods of digitally controlled phase shifters and digitally controlled attenuators cannot be compatible with the requirements of modern communication systems for these two devices at the same time. Summary of the invention

[0003] In order to solve the above problems, the present application discloses a phase-shift attenuation circuit, a phase-shift attenuation network having the phase-shift attenuation circuit, and a radio frequency microwave system using the phase-shift attenuation circuit or the phase-shift attenuation network. The phase-shift attenuation circuit is designed based on a differential circuit architecture and has the characteristics of small size and high bandwidth. The phase shift and attenuation functions are realized by a digital attenuator unit, and the logic control is simple. In addition, based on the characteristics of the differential circuit, smaller insertion loss, higher bandwidth, and better performance can be achieved.

[0004] The first aspect of the present application discloses a phase-shift attenuation circuit, which may include: a plurality of first differential circuits electrically connected in sequence; the electrical connection between two adjacent first differential circuits includes a direct connection and / or a connection through an attenuator unit; wherein the phase-shift attenuation circuit implements 8-bit step attenuation through the attenuator unit; the 7-bit step attenuation included in the 8-bit step attenuation is used to implement a phase shift function, and the 8-bit step attenuation is used to implement a phase shift and attenuation function.

[0005] According to some embodiments of the present application, the first differential circuit may include: one or more first differential input ports, one or more first differential output ports, and a plurality of switch cores; a switch core is connected between the positive and negative interfaces of each first differential input port and the positive and negative interfaces of each first differential output port; the conduction or closing between the first differential input port and the first differential output port is realized by the switch core to select the electrical connection method between two adjacent first differential circuits.

[0006] According to some embodiments of the present application, the multiple first differential circuits are the same and / or different.

[0007] According to some embodiments of the present application, the attenuation range of the 7-bit step attenuation is 31.75dB, which is used to achieve phase shift within the range of 0deg-90deg; the attenuation range of the 8-bit attenuation is 63.75dB, which is used to achieve phase shift and amplitude attenuation within the range of 0-90deg.

[0008] On the other hand, the present application provides a phase-shift attenuation network, which may include the phase-shift attenuation circuit as described above.

[0009] According to some embodiments of the present application, the phase-shift attenuation network also includes: a first node circuit; a second node circuit; and a first signal channel and a second signal channel coupled between the first node circuit and the second node circuit; wherein the first node circuit and the second node circuit both include the phase-shift attenuation circuit.

[0010] According to some embodiments of the present application, the first node circuit and the second node circuit both also include a quadrant transformation circuit electrically connected to the phase shift and attenuation circuit; the quadrant transformation circuit is constructed based on a second differential circuit, and the second differential circuit realizes quadrant transformation of the phase by turning on or off the positive and negative interfaces of the second differential input port and the positive and negative interfaces of the second differential output port, and combines with the phase shift and attenuation circuit to realize a wide range of phase movement.

[0011] According to some embodiments of the present application, the phase shift range of the first node circuit or the second node circuit is 0deg-360deg.

[0012] According to some embodiments of the present application, the second node circuit includes a third differential circuit, including: an input differential network, including: a first port and a second port; an input differential unit, including: an input differential coupling line; an output differential unit, including: a first coupling line and a second coupling line; and an output differential network, including: a first output differential port and a second output differential port; the positive electrode of the input end of the input differential coupling line is connected to the first port, and the negative electrode of the input end is connected to the second port; the positive electrode of the input end of the first coupling line is connected to the positive electrode of the output end of the input differential coupling line, and the negative electrode of the input end of the second coupling line is connected to the positive electrode of the output end of the input differential coupling line The first output differential port and the second output differential port of the output differential network are connected to the negative electrode of the output terminal of the first coupling line; the negative electrode of the input terminal of the first coupling line is connected to the positive electrode of the input terminal of the second coupling line; the positive electrode interface of the first output differential port is connected to the positive electrode of the output terminal of the first coupling line, and the negative electrode interface is connected to the negative electrode of the output terminal of the second coupling line; the positive electrode interface of the second output differential port is connected to the positive electrode of the output terminal of the second coupling line, and the negative electrode interface is connected to the negative electrode of the output terminal of the first coupling line; the first output differential port and the second output differential port of the output differential network are used to receive the first phase-shifted signal and the second phase-shifted signal respectively, and the input differential network is used to output the synthesized signal.

[0013] On the other hand, the present application provides a radio frequency microwave system, including the phase-shift attenuation circuit or phase-shift attenuation network as described above.

[0014] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The present application will be further described in the form of exemplary embodiments, which will be described in detail by way of the accompanying drawings. These embodiments are not restrictive, and in these embodiments, the same number represents the same structure, wherein:

[0016] Figure 1 is an exemplary structural diagram of a phase shift attenuation circuit according to some embodiments of the present application;

[0017] Figure 2 is an exemplary structural diagram of a differential circuit according to some embodiments of the present application;

[0018] Figure 3 is another exemplary structural diagram of a differential circuit according to some embodiments of the present application;

[0019] Figure 4 is another exemplary structural diagram of a phase shift attenuation circuit according to some embodiments of the present application;

[0020] Figure 5is an exemplary structural diagram of a phase shift attenuation network according to some embodiments of the present application;

[0021] Figure 6 is an exemplary structural diagram of a first node circuit according to some embodiments of the present application;

[0022] Figure 7 is an exemplary structural diagram of a quadrant selection circuit according to some embodiments of the present application;

[0023] Figure 8 is an exemplary schematic diagram of a connection state of a differential circuit constituting a quadrant selection circuit according to some embodiments of the present application;

[0024] Fig. 9 is an exemplary schematic diagram of corresponding characteristics of the connectivity states of quadrants and differential circuits according to some embodiments of the present application;

[0025] Fig.10 is an exemplary schematic diagram of the amplitude-phase correspondence relationship shown in some embodiments of the present application;

[0026] Fig.11 is an exemplary schematic diagram of different amplitudes according to some embodiments of the present application;

[0027] Fig.12 is an exemplary schematic diagram of S parameters of different phases at the same amplitude according to some embodiments of the present application;

[0028] Fig.13 is an exemplary schematic diagram of S parameters of different phases at the same amplitude according to some embodiments of the present application;

[0029] Fig.14 is an exemplary schematic diagram of S parameters of different phases at the same amplitude according to some embodiments of the present application;

[0030] Fig.15 is an exemplary schematic diagram of a second node circuit according to some embodiments of the present application;

[0031] Fig.16 is another exemplary structural diagram of a differential circuit according to some embodiments of the present application;

[0032] Fig.17 is an exemplary structural diagram of a radio frequency / microwave transmission system according to some embodiments of the present application;

[0033] Fig.18 It is an exemplary structural diagram of a radio frequency / microwave receiving system according to some embodiments of the present application. DETAILED DESCRIPTION

[0034] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.

[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art to which the present application belongs. The terms used herein in the specification of the present application are only for the purpose of describing specific embodiments and are not intended to limit the present application. The words "include" or "comprises" and the like used herein mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. The terms "and / or" or "and / or" used herein include any and all combinations of one or more related listed items.

[0036] The terms "first", "second", etc. used in this application are used to distinguish similar objects, rather than to describe or indicate a specific order or sequence, and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of this application, unless otherwise specified, "multiple" means two or more. In addition, unless otherwise clearly specified and limited, the terms "connected" and "connected" should be understood in a broad sense, for example, it can be directly connected, it can also be indirectly connected through an intermediate medium, and it can be the internal connection of two elements. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to the specific circumstances.

[0037] Digitally controlled phase shifters and digitally controlled attenuators are widely used in the field of wireless communications. Digitally controlled phase shifters perform phase modulation on the transmitted or received signal, and digitally controlled attenuators perform amplitude modulation on the transmitted or received signal. For example, 5G MIMO communications and low-orbit satellite communications. The attenuation range of the digitally controlled attenuator directly affects the dynamic range of the wireless communication signal, and the shift range of the digitally controlled phase shifter directly affects the phase modulation accuracy of the wireless communication signal.

[0038] There are two ways to realize digital phase shifters. The first is to use a single-ended switch to switch the transmission line to shift the unit network. The performance of this type of digital phase shifter deteriorates significantly at high frequencies (frequencies greater than 8GHz), mainly because as the frequency increases (especially in the millimeter wave band), the switch insertion loss is too large, and the shift unit insertion loss is too large, especially when the phase is 180 degrees; the second is to use inductors to achieve the shift function. This form is also difficult to achieve at high frequencies, mainly because as the frequency increases (especially in the millimeter wave band), the inductor loss increases, and the parasitic capacitance has a significant impact on the performance.

[0039] The existing implementation method of digital controlled attenuators is roughly as follows: using a single-ended switch to switch the resistor attenuation network. The performance of this type of digital controlled attenuator deteriorates significantly at high frequencies (frequencies greater than 8 GHz), mainly because as the frequency increases (especially in the millimeter wave band), the switch insertion loss is relatively large. When encountering a large attenuation value (such as 16 dB attenuation), it is necessary to increase the number of switch stacks to select the channel, which requires a larger size to implement, and also increases the switch insertion loss again.

[0040] Existing digitally controlled phase shifters and digitally controlled attenuators use independent architectures, such as a circuit that independently implements the digitally controlled phase shifting function and a circuit that independently implements the digitally controlled attenuation function. For the system, the loss of the entire link is the sum of the losses of the two devices. At the same time, the number of control bits will be relatively large, which is more complicated on the application side.

[0041] The phase shift attenuation circuit disclosed in the present application is constructed based on a differential circuit architecture, and can realize phase shift and attenuation functions simultaneously, and can also be miniaturized and have high performance.

[0042] Some preferred embodiments of the present application are described below. It should be noted that the following description is for the purpose of illustration and is not intended to limit the scope of protection of the present application. The steps involved in the present application can be performed accurately in sequence, or various steps can be processed in reverse order or simultaneously. At the same time, other operations can also be added to these processes, or one or more operations can be removed from these processes.

[0043] The present application discloses a phase shift attenuation circuit, such as Figure 1 As shown, the phase shift attenuation circuit 100 may include a plurality of first differential circuits 110-1, 110-2, ..., and 110-n electrically connected in sequence. Any two adjacent first differential circuits may be directly connected and / or connected through attenuator units (including 120-1, ..., 120-m).

[0044] The above first differential circuit may include one or more first differential input ports, one or more first differential output ports, and a number of switch cores. A switch core is connected between the positive and negative interfaces of each first differential input port and the positive and negative interfaces of each first differential output port. For the convenience of explanation, taking the first differential circuit having a first differential input port and a first differential output port as an example, the first differential input port may include a first positive interface and a first negative interface, and the first differential output port may include a second positive interface and a second negative interface. Then a switch core is respectively connected between the first positive interface and the second positive interface and the second negative interface, and a switch core is also respectively connected between the first negative interface and the second positive interface and the second negative interface, for a total of 4 switch cores. Of course, as the number of first differential input ports and first differential output ports increases or decreases, the number of switch cores also changes accordingly. The switch core can realize the conduction or closing between the first differential input port and the first differential output port to select the electrical connection method between two adjacent first differential circuits. Such as Figure 1 As shown, the first first differential circuit 110-1 has a first differential input port and two first differential output ports. By opening and closing the switch core, it can be realized that the signal is output from the first differential output port located at the top to enter the attenuator unit 120-1 for amplitude attenuation and then output to the second first differential circuit 120-2, or output from the first differential output port located at the bottom to directly input to the second first differential circuit 120-2.

[0045] The first differential circuit is exemplarily described below.

[0046] like Figure 2The first differential circuit 200 provided by the present application as shown in the figure includes a first differential input port (composed of a positive electrode interface IN1+ and a negative electrode interface IN1-) and two first differential output ports, respectively composed of a positive electrode interface OUT1+ and a negative electrode interface OUT1-, and a positive electrode interface OUT2+ and a negative electrode interface OUT2-. Switch cores are connected between the positive and negative electrode interfaces of the first differential input port and the positive and negative electrode interfaces of the first differential output port, including a first switch core T1, a second switch core T2, a third switch core T3, a fourth switch core T4, a fifth switch core T5, a sixth switch core T6, a seventh switch core T7 and an eighth switch core T8. The input ends of the first switch core T1, the fourth switch core T4, the fifth switch core T5 and the eighth switch core T8 are coupled and commonly connected to the interface IN1+; the input ends of the second switch core T2, the third switch core T3, the sixth switch core T6 and the seventh switch core T7 are coupled and commonly connected to the interface IN1-. The output ends of the first switch die T1 and the second switch die T2 are coupled and connected to the interface OUT1+; the output ends of the third switch die T3 and the fourth switch die T4 are coupled and connected to the interface OUT1-; the output ends of the fifth switch die T5 and the sixth switch die T6 are coupled and connected to the interface OUT2+; the output ends of the seventh switch die T7 and the eighth switch die T8 are coupled and connected to the interface OUT2-.

[0047] In the above first differential circuit 200, by setting the power supply voltage of each switch die, the conduction or closing between the positive and negative interfaces of the first differential input port and the first differential output port can be realized, thereby selecting whether the electrical connection mode between adjacent differential circuits is direct or through the attenuator unit. Exemplarily, the power supply voltage of the first switch die T1 and the third switch die T3 is selected as V1, and the power supply voltage of the second switch die T2, the fourth switch die T4, the fifth switch die T5, the sixth switch die T6, the seventh switch die T7 and the eighth switch die T8 is -V1; then, when V1 is a positive voltage (V1>Vth, Vth is the gate threshold voltage), the interface IN1+ to the interface OUT1+ is turned on, the interface IN1- to the interface OUT1- is turned on, the interface IN1+ to the interface OUT2+ is turned off, and the interface IN1- to the interface OUT2- is turned off. Select the power supply voltage of the fifth switch die T5 and the seventh switch die T7 as V1, then the power supply voltage of the first switch die T1, the second switch die T2, the third switch die T3, the fourth switch die T4, the sixth switch die T6, and the eighth switch die T8 is -V1; then when V1 is a positive voltage (V1>Vth), the interface IN1+ to the interface OUT2+ is turned on, the interface IN1- to the interface OUT2- is turned on, the interface IN1+ to the interface OUT1+ is turned off, and the interface IN1- to the interface OUT11 is turned off.

[0048] Based on this, when an input signal (e.g., a differential signal) is input from interfaces IN1+ and IN1-, the signal can be output from interfaces OUT1+ and OUT1-, or OUT2+ and OUT2- by setting the power supply voltage of the switch die. Assuming that the first differential circuit 200 is the first first differential circuit 110-1 of the phase-shift attenuation circuit 100, interfaces OUT1+ and OUT1- are followed by an attenuator unit 120-1, and interfaces OUT2+ and OUT2- are followed by a second first differential circuit 120-2, providing the switch die with the aforementioned voltage can cause the differential signal to be output from interfaces OUT1+ and OUT1- to pass through the attenuator unit 120-1 so that the electrical connection between the first differential circuit 110-1 and the adjacent second first differential circuit 110-2 is through the attenuator unit, or output from interfaces OUT2+ and OUT2- to directly input the next differential circuit so that the electrical connection between the first differential circuit 110-1 and the adjacent second first differential circuit 110-2 is through connection.

[0049] The first differential circuit 200 can also adjust the insertion loss and isolation by adjusting the size of the switch core and the resistance of each pole. Adjusting the size of the switch core can be adjusting the R on After the switch core is turned on, the insertion loss of the switch core is R on Value and R ds (drain to source resistance) value is jointly determined, that is, R on Parallel R ds . R gs (gate-to-source resistance) affects the voltage of the switch field effect tube, that is, the insertion loss of the switch is different under different voltages. Therefore, the problem of insertion loss and device size can be taken into account by adjusting the size of the switch core and the resistance of each pole. At the same time, the smaller the switch off capacitance, the smaller the size, and the better the isolation. The isolation of the differential circuit can be adjusted by adjusting the size of the switch core. Therefore, the above first differential circuit 200 can be set to have the characteristics of high isolation and low insertion loss, so that the device can take into account the advantages of small size, high isolation and low insertion loss, thereby making the phase shift have higher accuracy.

[0050] The first differential circuit 200 can also reduce the return loss by connecting a matching circuit. Exemplarily, the matching circuit may include an input matching circuit and an output matching circuit, which can respectively connect the first differential input port and the first differential output port through coupling line matching. The return loss of the first differential input port and the first differential output port can be adjusted by adjusting one or more of the even-mode impedance, odd-mode impedance or electrical length that characterizes the coupling line. Adjusting the even-mode impedance and odd-mode impedance is essentially adjusting the differential impedance of the port. The port impedance affects the return loss, thereby achieving the effect of adjusting the return loss. At radio frequency and microwave frequencies, different electrical lengths exhibit different impedances. The effect of adjusting the port impedance is achieved by changing the electrical length.

[0051] refer to Figure 3As shown in another first differential circuit 300 provided by the present application, the first differential input port may include two, respectively consisting of a positive interface IN2+ and a negative interface IN2-, and a positive interface IN3+ and a negative interface IN3-. The first differential output port may also include two, respectively consisting of a positive interface OUT3+ and a negative interface OUT3-, and a positive interface OUT4+ and a negative interface OUT4-. Switch cores are connected between the positive and negative interfaces of the first differential input port and the positive and negative interfaces of the first differential output port, including a ninth switch core T9, a tenth switch core T10, an eleventh switch core T11, a twelfth switch core T12, a thirteenth switch core T13, a fourteenth switch core T14, a fifteenth switch core T15, a sixteenth switch core T16, a seventeenth switch core T17, an eighteenth switch core T18, a nineteenth switch core T19, a twentieth switch core T20, a twenty-first switch core T21, a twenty-second switch core T22, a twenty-third switch core T23 and a twenty-fourth switch core T24. The input ends of the ninth switch die T9, the twelfth switch die T12, the thirteenth switch die T13 and the sixteenth switch die T16 are coupled and connected to the interface IN2+; the input ends of the tenth switch die T10, the eleventh switch die T11, the fourteenth switch die T14 and the fifteenth switch die T15 are coupled and connected to the interface IN2-; the input ends of the seventeenth switch die T17, the twentieth switch die T20, the twenty-first switch die T21 and the twenty-fourth switch die T24 are coupled and connected to the interface IN3+; the input ends of the eighteenth switch die T18, the nineteenth switch die T19, the twenty-second switch die T22 and the twenty-third switch die T23 are coupled and connected to the interface IN3-; The output ends of the ninth switch die T9, the tenth switch die T10, the seventeenth switch die T17, and the eighteenth switch die T18 are coupled and connected to the interface OUT3+; the output ends of the eleventh switch die T11, the twelfth switch die T12, the nineteenth switch die T19, and the twentieth switch die T20 are coupled and connected to the interface OUT3-; the output ends of the thirteenth switch die T13, the fourteenth switch die T14, the twenty-first switch die T21, and the twenty-second switch die T22 are coupled and connected to the interface OUT4+; the output ends of the fifteenth switch die T15, the sixteenth switch die T16, the twenty-third switch die T23, and the twenty-fourth switch die T24 are coupled and connected to the interface OUT4-.

[0052] In the above first differential circuit 300, by setting the power supply voltage of each switch core, the conduction or closing between the positive and negative interfaces of the first differential input port and the first differential output port can be achieved, thereby selecting whether the electrical connection between adjacent differential circuits is direct or through the attenuator unit. Exemplarily, the power supply voltage of the ninth switch die T9, the eleventh switch die T11, the twenty-first switch die T21, and the twenty-third switch die T23 is selected as V2, then the power supply voltage of the tenth switch die T10, the twelfth switch die T12 to the twentieth switch die T20, the twenty-second switch die T22, and the twenty-fourth switch die T24 is -V3; then, when V3 is a positive voltage (V3>Vth), the interface IN2+ to the interface OUT3+ is turned on, the interface IN2- to the interface OUT3- is turned on, the interface IN3+ to the interface OUT4+ is turned on, the interface IN3- to the interface OUT4- is turned on, the interface IN2+ to the interface OUT4+ is turned off, the interface IN2- to the interface OUT4- is turned off, the interface IN3+ to the interface OUT3+ is turned off, and the interface IN3- to the interface OUT3- is turned off; the thirteenth switch die T13, The power supply voltage of the fifteenth switch die T15, the seventeenth switch die T17, and the nineteenth switch die T19 is V3, and the power supply voltage of the tenth switch die T10, the eleventh switch die T11, the twelfth switch die T12, the fourteenth switch die T14, the sixteenth switch die T16, the eighteenth switch die T18, and the twentieth switch die T20 to the twenty-fourth switch die T24 is -V3; then, when V3 is a positive voltage (V3>Vth), the interface IN2+ to the interface OUT4+ is turned on, the interface IN2- to the interface OUT4- is turned on, the interface IN3+ to the interface OUT3+ is turned on, the interface IN3- to the interface OUT3- is turned on, the interface IN2+ to the interface OUT3+ is turned off, the interface IN2- to the interface OUT3- is turned off, the interface IN3+ to the interface OUT4+ is turned off, and the interface IN3- to the interface OUT4- is turned off.

[0053] Based on this, when the input signal (e.g., differential signal) is input from interfaces IN2+ and IN2- or IN3+ and IN3- (e.g., input from the previous first differential circuit through direct pass or after attenuation by the attenuator unit), the signal can be output from interfaces OUT3+ and OUT3-, or OUT4+ and OUT4- by setting the power supply voltage of the switch die. Assuming that the first differential circuit 300 is the second first differential circuit 110-2 of the phase-shift attenuation circuit 100, interfaces IN2+ and IN2- can be connected to the attenuator unit 120-1, and interfaces IN3+ and IN3- can be connected to the first first differential circuit 110-1 to receive the input differential signal. Which interface receives the differential signal is selected based on the output of the previous first differential circuit 110-1, and reference can be made to the previous description. The interfaces OUT3+ and OUT3- are connected to an attenuator unit, and the interfaces OUT4+ and OUT4- are connected to a third first differential circuit. Providing the aforementioned voltage to the switch die can allow the differential signal to be output from the interfaces OUT3+ and OUT3- to pass through the attenuator unit, or to be directly input from the interfaces OUT4+ and OUT4- to the next differential circuit.

[0054] The same or similar first differential circuit 300 can also adjust the isolation and insertion loss of the circuit by adjusting the size of the switch core and the resistance of each pole. The high isolation and low insertion loss of the first differential circuit 300 can also be achieved. The device using it can also take into account the advantages of small size, high isolation and low insertion loss, thereby making the phase shift have higher accuracy. In addition, the first differential circuit 300 can also reduce the return loss by connecting a matching circuit. For details, please refer to the description of the first differential circuit 200, which will not be repeated here.

[0055] The phase-shift attenuation circuit 100 can implement 8-bit step attenuation through the attenuator unit. Among them, the lower 7-bit step attenuation can realize the phase shift function. For example, the 8th bit selects the pass-through, and the first 7 bits realize the phase shift by controlling the attenuation value of the amplitude. The 8-bit step attenuation can be used to realize phase shift and attenuation. For example, the first 7 bits realize the phase shift by controlling the attenuation value of the amplitude, and the 8th bit can realize the amplitude attenuation while keeping the phase unchanged. The attenuation range of the 7-bit step attenuation is 0-31.75dB. Adding one bit of attenuation (for example, 32dB) reaches 8-bit step attenuation, and the attenuation range is 0-63.75dB. Reference Figure 4The phase shift attenuation circuit 400 provided by the present application shown may include two first differential circuits 200 and seven first differential circuits 300. Among them, the seven first differential circuits 300 are connected in sequence between the two first differential circuits 200. An attenuator unit will be provided between two adjacent first differential circuits, with a total of eight attenuator units. According to the signal transmission direction, the attenuator unit D1 realizes 32dB attenuation, the attenuator unit D2 realizes 16dB attenuation, the attenuator unit D3 realizes 8dB attenuation, the attenuator unit D4 realizes 4dB attenuation, the attenuator unit D5 realizes 2dB attenuation, the attenuator unit D6 realizes 1dB attenuation, the attenuator unit D7 realizes 0.5dB attenuation, and the attenuator unit D8 realizes 0.25dB attenuation. The 7th step attenuation (e.g., D2-D8) can realize a phase shift within the range of 0deg-90deg. For example, the 8th bit is selected to pass directly (that is, without passing through the attenuator unit D1), and then the phase shift in the range of 0deg-90deg is achieved through the attenuation range of 0-31.75dB. 8-bit step attenuation (for example, D1-D8) can achieve phase shift and amplitude attenuation in the range of 0deg-90deg. For example, the 8th bit is selected to be turned on to achieve an attenuation range of 0-63.75dB. Among them, the attenuation range of 0-31.75dB achieves a phase shift in the range of 0deg-90deg, and the attenuation range of 31.75dB-63.75dB achieves amplitude attenuation.

[0056] The phase shift attenuation circuit disclosed in the present application is designed based on a differential circuit architecture and has the characteristics of small size and high bandwidth. The phase shift and attenuation functions are realized through a digital attenuator unit, and the logic control is simple. In addition, based on the characteristics of the differential circuit, smaller insertion loss, higher bandwidth and better performance can be achieved.

[0057] The present application also discloses a phase shift attenuation network including the above phase shift attenuation circuit. Figure 5 The phase shift attenuation network 500 shown in some embodiments of the present application may include a first node circuit 510, a second node circuit 540, and a first signal channel 520 and a second signal channel 530 coupled between the first node circuit 510 and the second node circuit 540. The input signal of the input phase shift attenuation network 500 enters from the first node circuit 510 and will be split into a pair of orthogonal signals, for example, an in-phase signal I (or I-path signal) and an orthogonal signal Q (or Q-path signal). The I / Q signals have the same frequency but a phase difference of 90°. The pair of orthogonal signals can be simultaneously output to the first signal channel 520 and the second signal channel 530 to perform signal attenuation and / or quadrant transformation to achieve attenuation and / or phase shifting. For example, the I-path signal can be input to the first signal channel 520 for processing, and the Q-path signal can be input to the second signal channel 530 for processing.

[0058] The first signal channel 520 and the second signal channel 530 can be implemented based on the architecture of the differential circuit. Based on this, the above-mentioned orthogonal signals (that is, the I-channel signal and the Q-channel signal) will be processed to generate a pair of differential signals respectively. For example, the differential signal pair will be input to the first signal channel 520 for processing, and the second differential signal pair will be input to the second signal channel 530 for processing. In an achievable embodiment, the exemplary circuit structure of the differential circuit can be to connect the switch die between each positive and negative interface of the input port and the output port. The circuit structure can reduce insertion loss, enhance anti-interference ability, and can take into account the requirements of high performance and small size of the device through the switch die. In other words, the device of the first signal channel 520 and the second signal channel 530 constructed using the differential circuit can not only enable the device to achieve high isolation, but also reduce the size and insertion loss of the device. The first signal channel 520 and the second signal channel 530 can perform signal attenuation and / or quadrant transformation on the input differential signal pair to achieve phase shift and amplitude attenuation of the input signal. For example, the first signal channel 520 and the second signal channel 530 may include a phase shift attenuation circuit and / or a quadrant conversion circuit, respectively. Exemplarily, the phase shift attenuation circuit may be the phase shift attenuation circuit 100 as described above. The quadrant conversion circuit realizes quadrant change by turning on and off the positive and negative interfaces between the input and output ends of the differential circuit. For example, one of four quadrants is selected, including the first quadrant (0deg to 90deg), the second quadrant (90deg to 180deg), the third quadrant (180deg to 270deg), and the fourth quadrant (270deg to 360deg). The phase shift realized by the phase shift attenuation circuit is combined with the starting phase obtained by the quadrant selection of the quadrant conversion circuit, thereby realizing a phase shift of 0-360deg.

[0059] The second node circuit 540 can be used to vector synthesize the first phase-shifted signal output by the first signal channel 520 and the second phase-shifted signal output by the second signal channel 530. In an achievable implementation, the second node circuit 540 can be constructed by differential coupling, and the insertion loss can be reduced and the isolation can be improved by designing the electrical length of the coupling line and improving the input / output terminal connection method. The output signal output by the second node circuit 540 can be a differential signal pair or a single-ended signal. For example, the differential signal is converted into a single-ended signal and output by a device.

[0060] The following is an exemplary description of various components of the phase shift attenuation network 500. It should be noted that the following description is not restrictive.

[0061] like Figure 6The first node circuit 510 provided in the present application as shown in the figure may include a signal processor 610 and a first transformer 620 and a second transformer 630 electrically connected to the two output ends of the signal processor 610, respectively. The signal processor 610 may be any electronic component capable of realizing a signal splitting function of a 90° phase difference, such as a hybrid coupler, an orthogonal coupler, a 90° bridge, etc. Taking the signal processor 610 as a 90° bridge as an example, it includes a single-ended input port IN and two output ports. The port impedance of the single-ended input port may be 50 ohms. After the input signal enters the single-ended input port IN, it will be processed to output a pair of orthogonal signals, which are an I-way signal and a Q-way signal. The pair of orthogonal signals will be output from the two output ports to the first transformer 620 and the second transformer 630, respectively. The first transformer 620 and the second transformer 630 may utilize the coil induction characteristics (e.g., the middle section of the coil is drawn) to convert the orthogonal signal into a differential signal and then output it from the output ends OUT1 and OUT2. Exemplarily, the first transformer 620 may be used to process the I signal to output differential signals I1+ and I1- at the output terminal OUT1. The second transformer 630 may be used to process the Q signal to output second differential signals Q1+ and Q1- at the output terminal OUT2.

[0062] The first signal channel 520 and the second signal channel 530 may include the phase shift attenuation circuit 100 / 400 as described above and a quadrant conversion circuit connected to the phase shift attenuation circuit 100. For the description of the phase shift attenuation unit 100 / 400, reference may be made to the aforementioned part. Figure 7 The quadrant conversion circuit provided by the present application as shown in FIG. 1 includes a second differential circuit 700. Figure 7 As shown, the second differential circuit 700 may include a second differential input port composed of a positive electrode interface IN4+ and a negative electrode interface I4-, and a second differential output port composed of a positive electrode structure OUT5+ and a negative electrode interface OUT5-. Switch cores are connected between the positive and negative electrode interfaces of the second differential input port and the positive and negative electrode interfaces of the second differential output port, including the twenty-fifth switch core T25, the twenty-sixth switch core T26, the twenty-seventh switch core T27 and the twenty-eighth switch core T28. The input end of the twenty-fifth switch core T25 is coupled to the input end of the twenty-seventh switch core T27 and is commonly connected to the interface IN4+. The input end of the twenty-sixth switch core T26 is coupled to the input end of the twenty-eighth switch core T28 and is commonly connected to the interface IN4-. The output end of the twenty-fifth switch core T28 is coupled to the output end of the twenty-sixth switch core T26 and is commonly connected to the interface OUT5+. The output end of the twenty-seventh switch core T27 is coupled to the output end of the twenty-eighth switch core T28 and is commonly connected to the interface OUT5-.

[0063] Of course, the second differential circuit 700 can also adjust the isolation and insertion loss by adjusting the size of the switch core and the resistance of each pole, and reduce the return loss by connecting the matching circuit. For specific implementation, please refer to the above description of the first differential circuit.

[0064] In the above second differential circuit 700, by setting the supply voltage of each switch core, the conduction or closing between the positive and negative interfaces of the second differential input port and the second differential output port can be realized, thereby realizing the state change of the second differential circuit 700. The combination of different states of the two second differential circuits 700 (for example, respectively included in the first signal channel 520 and the second channel signal 130) for processing the I-way signal and the Q-way signal can realize quadrant conversion, thereby changing the starting phase of the phase-shifted differential signal and the second differential signal output after being processed by the phase shift attenuation circuit 100 / 400. Combined with the phase shift in the range of 0deg-90deg realized by it and the starting phase change of the quadrant conversion circuit, the phase shift attenuation network 600 realizes a phase shift in the range of 0-360°.

[0065] Exemplarily, the second differential circuit 700 may have four states, combining Figure 8 For explanation. Figure 8 The state diagram of the third differential circuit 700 provided by the present application is shown, including the through state thr( Figure 8 (a)), differential state diff ( Figure 8 (b)), open circuit state open ( Figure 8 (c)) and short circuit state short ( Figure 8 As shown in (d)). In the through state thr, the interface IN4+ to the interface OUT5+ is turned on, the interface IN4- to the interface OUT5- is turned on, the interface IN4+ to the interface OUT5+ is turned off, and the interface IN4- to the interface OUT5+ is turned off. In the differential state diff, the interface IN4+ to the interface OUT5+ is turned off, the interface IN4- to the interface OUT5- is turned off, the interface IN4+ to the interface OUT5+ is turned on, and the interface IN4- to the interface OUT5+ is turned on. In the open state open, the interface IN4+ to the interface OUT5+ is turned off, the interface IN4- to the interface OUT5- is turned off, the interface IN4+ to the interface OUT5+ is turned off, and the interface IN4- to the interface OUT5+ is turned off. In the short state short, the interface IN4+ to the interface OUT5+ is turned on, the interface IN4- to the interface OUT5- is turned on, the interface IN4+ to the interface OUT5+ is turned on, and the interface IN4- to the interface OUT5+ is turned on.

[0066] The selection of four quadrants can be achieved by combining the states of the two second differential circuits 700 included in the first signal channel 520 and the second channel signal 130. Exemplarily, when the state of the second differential circuit 700 in the first signal channel 520 processing the I-channel signal is the through state thr, and the state of the second differential circuit in the second signal channel 530 processing the Q-channel signal is the through state thr, it is the first quadrant Q1 (0deg-90deg). When the state of the second differential circuit 700 in the first signal channel 520 processing the I-channel signal is the through state thr, and the state of the second differential circuit in the second signal channel 530 processing the Q-channel signal is the differential state diff, it is the second quadrant Q2 (90deg-180deg). When the state of the second differential circuit 700 in the first signal channel 520 processing the I-channel signal is the differential state diff, and the state of the second differential circuit in the second signal channel 530 processing the Q-channel signal is the differential state diff, it is the third quadrant Q3 (180deg-270deg). The state of the second differential circuit 700 in the first signal channel 520 for processing the I signal is the differential state diff, and the state of the second differential circuit in the second signal channel 530 for processing the Q signal is the through state thr, which is the fourth quadrant Q4 (270deg-360deg). The open state open can be used to realize the disconnection of the device to which it is applied, such as a phase shifter, and the short state short can be used to realize the short circuit of the device to which it is applied, such as a phase shifter. Fig. 9 The above content can be more clearly understood by an example diagram showing the corresponding characteristics of the four quadrants provided by the present application and the connectivity status of the differential circuit.

[0067] The differential signals I1+ and I1-, or the second differential signals Q1+ and Q1- outputted by the first node circuit 520 will be inputted from the differential input port of the phase shift attenuation circuit 100 / 400 included in the first signal channel 520 or the second signal channel 530 (for example, from the first differential input port of the first differential circuit 200 located at the head and tail), and after being processed by the phase shift attenuation circuit 100 / 400, the differential signals I2+ and I2-, Q2+ and Q2- after amplitude attenuation and / or phase shift (for example, within the range of 0deg-90deg) will be outputted. The differential signals I2+ and I2-, and Q2+ and Q2- can be respectively inputted to the second differential circuit 700 as a quadrant conversion circuit, for example, from the interfaces IN4+ and IN4- of the second differential input port, and the interfaces OUT5+ and OUT5- of the second differential output end will output the differential signals I3+ and I3-, Q3+ and Q3- after quadrant conversion. After selecting the starting phase through quadrant change, combined with the 0deg-90deg phase shift achieved through amplitude attenuation, the phase shift within the range of 0-360° is achieved. The differential signals I3+ and I3-, Q3+ and Q3- can be differential signals after amplitude attenuation and / or phase shift, and then input to the second node circuit 540 for subsequent processing.

[0068] like Fig.10 The second node circuit 540 provided in the present application as shown in the figure can be used to vector synthesize the input differential signals I3+ and I3-, and the second phase-shifted signals O3+ and O3-. The second node circuit 540 may include a combiner 1010 constructed based on a differential circuit. The combiner 1010 includes two third differential input ports, which are respectively composed of interfaces IN5+ and IN5-, and interfaces IN6+ and IN6-. It is used to receive differentials I3+ and I3-, and O3+ and O3-, respectively. In other words, the differential signals I3+ and I3- will be input from interfaces IN5+ and IN5-, and the differentials O3+ and O3- will be input from interfaces IN6+ and IN6-. The combiner 1010 will vector synthesize the input signals and output a pair of synthesized differential signals from the third differential output port (composed of interfaces OUT6+ and OUT6-), which may be referred to as synthesized signals in the present application. If the phase shift attenuation network 500 is applied to a differential system (for example, to differentiate the input signal), the synthesized signal can be designated as the output signal after phase shifting. In some applications, the second node circuit 540 can also include a third transformer 1020. The third transformer 1020 can be electrically connected to the third differential output port of the combiner 1010, and convert the synthesized differential signal into a single-ended signal output and then output it from the single-ended output port OUT. The single-ended signal can be designated as the output signal after phase shifting.

[0069] Fig.11As shown in the figure, the third differential circuit 1100 provided by the present application can be used as a combiner 1010. Fig.12 As shown, the third differential circuit 1100 may include an input differential network, an input differential unit, an output differential unit, and an output differential network. The input differential network may include an input port consisting of a first port P+ and a second port P-. The input differential unit may include an input differential coupling line Ca. The positive input terminal of the input differential coupling line Ca is connected to the first port P+, and the negative input terminal is connected to the second port P-. The output differential unit may include a first coupling line C1 and a second coupling line C2. The positive input terminal of the first coupling line C1 is connected to the positive output terminal of the input differential coupling line Ca, and the negative input terminal of the second coupling line C2 is connected to the negative output terminal of the input differential coupling line Ca. At the same time, the negative input terminal of the first coupling line C1 is connected to the positive input terminal of the second coupling line C2. The output differential network may include a first output differential port and a second output differential port. The positive interface D1+ of the first output differential port is connected to the positive output terminal of the first coupling line C1, and the negative interface D1- is connected to the negative output terminal of the second coupling line C2. The positive electrode interface D2+ of the second output differential port is connected to the positive electrode of the output end of the second coupling line C2, and the negative electrode interface D2- is connected to the negative electrode of the output end of the first coupling line C1.

[0070] The third differential circuit 1100 above, its first output differential port D1+ / D1- can be used as a third differential input port IN5+ / IN5- of the combiner 1010, and the second output differential port D2+ / D2- can be used for another third differential input port IN6+ / IN6- of the combiner 1010. Its input differential network P+ / P- can be used for the third differential output port OUT6+ / OUT6- of the combiner 1010. The differential signals I3+ and I3- will be input from the first output differential port D1+ / D1-, and the differential signals O3+ and O3- will be input from the second output differential port D2+ / D2-. The third differential circuit 1200 will realize the vector synthesis function, and output a pair of synthesized differential signals from the input differential network P+ / P-.

[0071] The combiner 1010 constructed using the third differential circuit 1100 disclosed in the present application can realize the differential / combining function. The isolation, broadband characteristics, insertion loss and return loss can be adjusted by adjusting the electrical length, odd-mode impedance and even-mode impedance of the coupling line. It is designed using differential coupling lines, and the electrical length of the coupling line is adjustable, which can be adjusted to a wavelength far less than 1 / 4 of the center frequency, so that a small size can be achieved, insertion loss can be reduced, and isolation can be improved. The use of differential coupling lines also makes it have strong anti-interference ability and high suppression performance for stray and noise.

[0072] The present application is further described below with reference to some embodiments. Figure 5 The phase shift / attenuator of the phase shift attenuation network shown in the figure has an operating frequency of 5 GHz to 15 GHz, a phase shift number of 7 bits, and an attenuation number of 7 bits. The selection of the attenuator unit is realized by a differential switch, a high level is effective, marked as 1, indicating passing the attenuator unit; a low level is marked as 0, indicating passing directly.

[0073] like Fig.12 The schematic diagram of the amplitude-phase relationship is shown. In the case of no attenuation (i.e. the initial amplitude state, marked as ATT0), the amplitude phase is controlled by the 7th bit step attenuation (BIT7), and the 8th bit (BIT8) is always in a low level state. Among them: in the initial amplitude (ATT0) state, the insertion loss of the entire phase shifter / attenuator is -7dB, and the phase selection range from 0deg to 360deg can be achieved. Taking the typical phase values ​​of 0deg, 45deg, and 90deg in the first quadrant, the corresponding attenuation characteristics of the I and Q paths are: 0deg (I path: 31.75dB, Q path: 0dB), 45deg (I path: 3dB, Q path: 3dB), 90deg (I path: 0dB, Q path: 31.75dB). The simulation results of the phase and S parameters in the three states are shown in the figure. Fig.14 As shown, the corresponding logic control truth table is shown in Table 1 below:

[0074] Table 1: Logic control truth value of phase shifting with 7-way step attenuation

[0075]

[0076] It should be noted that the three phases of the first quadrant are used in the above embodiments, and as mentioned above, the other three quadrants can be switched arbitrarily through the quadrant selection circuit.

[0077] like Fig.13 The schematic diagram of different attenuation amplitudes shown in FIG. 1 can realize the amplitude selection function of 0dB (initial amplitude ATT0) to -32dB (maximum attenuation ATT127) by combining the step attenuation of the 8th bit. Among them, 0dB corresponds to the initial amplitude state ATT0, and ATT0 = -7dB. Fig.14 The insertion loss value in 7-bit digital controlled attenuator has a total of 128 amplitude states, with ATT0 defined as the through state or initial amplitude, ATT127 as the highest attenuation state, and ATT63 as the intermediate attenuation state, specifically ATT0 = -7dB (corresponding to 0dB), ATT63 = -23dB (corresponding to -16dB), and ATT127 = -39dB (corresponding to -32dB).

[0078] like Fig.15The schematic diagram of different phase S parameters and phase performance under an attenuation amplitude is shown, including the phase and S parameter simulation results of ATT63 under three phases. The corresponding logic control truth table is shown in Table 2 below. It can be seen that Fig.14 Compared to the results shown in , the amplitude varies from 0 to -16dB without any change in phase.

[0079] Table 2: Logical control truth value of 8-way step attenuation

[0080]

[0081] like Fig.16 The schematic diagram of different phase S parameters and phase performance under another attenuation amplitude is shown, including the phase and S parameter simulation results of ATT127 under three phases. The corresponding logic control truth table is as follows Figure 3 As shown. It can be seen that Fig.14 Compared to the results shown in , the amplitude varies from 0 to -32dB without any change in phase.

[0082] Table 3: Logical control truth value of 8-way step attenuation

[0083]

[0084] The phase shift attenuation network disclosed in this application has simple logic control and realizes the effects of phase shifting and amplitude attenuation simultaneously through multi-bit step attenuation control. The phase shifter / attenuator constructed using it has a smaller size and better cost advantage compared to the general design architecture. It also has smaller insertion loss and higher performance, that is, the insertion loss performance of a single phase shifter and a phase shifter + attenuator is basically the same, and the insertion loss will not be doubled due to the addition of an attenuation circuit. In addition, phase shifting does not bring additional attenuation, and attenuation does not bring additional phase.

[0085] The present application also discloses a radio frequency / microwave transmission system. The radio frequency / microwave transmission system may include the phase shift attenuation circuit or phase shift attenuation network as described above. For example, a digitally controlled phase shifter / attenuator constructed by the phase shift attenuation circuit or phase shift attenuation network. Fig.17The exemplary structural diagram of the RF / microwave transmission system provided by the present application is shown, and the RF / microwave transmission system 1700 may include a one-to-four differential power divider for converting an input signal as a differential signal into four equal-amplitude and in-phase differential signals. Four digitally controlled phase shifters / attenuators, whose input ends are respectively connected to the four output differential ports of the one-to-four differential power divider, are used to attenuate and phase shift the four differential signals output by the one-to-four differential power divider to achieve amplitude attenuation and / or phase shift. Four baluns, whose differential ports are respectively connected to the output ends of four digitally controlled phase shifters, are used to convert the four differential signals output by the digitally controlled phase shifter / attenuator into four single-ended signals. Four amplifiers, whose input ends are respectively connected to the matching ports of four baluns, are used to amplify the four single-ended signals output by the baluns. Four antennas, whose receiving ends are respectively connected to the output ends of the four amplifiers, are used to transmit the four single-ended signals output by the amplifiers. This four-channel RF / microwave transmission system can be used in multi-beam power division networks, 5G MIMO communications, low-orbit satellite communications and other systems. Fig.17 Just to give an example, the number of digitally controlled phase shifters / attenuators, baluns, amplifiers, and antennas included in the RF / microwave transmission system is the same as the number of output differential ports of the differential power divider. For example, when a one-to-two differential power divider is used, the number of the above devices can be two, and when a one-to-eight differential power divider is used, the number of the above devices can be eight. When no differentiation is performed, the number of the above devices can be single.

[0086] The present application also discloses a radio frequency / microwave receiving system. The radio frequency / microwave receiving system may include the phase shift circuit as described above. For example, a digitally controlled phase shifter / attenuator constructed by the phase shift attenuation circuit or phase shift attenuation network. Fig.18 The exemplary structural diagram of the RF / microwave receiving system provided by the present application is shown. The RF / microwave receiving system 1800 may include four antennas for receiving four single-ended signals. Four low-noise amplifiers, whose input ends are respectively connected to the four antennas, are used to amplify the four single-ended signals received by the antennas. Four baluns, whose matching ports are respectively connected to the output ends of the four low-noise amplifiers, are used to convert the four single-ended signals output by the low-noise amplifiers into four differential signals. Four digitally controlled phase shifters / attenuators, whose input ends are respectively connected to the differential ports of the four baluns, are used to perform phase shifting and attenuation processing on the four differential signals output by the baluns, so as to achieve amplitude attenuation and / or phase shift. A one-to-four differential power divider, whose four output differential ports are respectively connected to the output ends of the four digitally controlled attenuators, is used to convert the four differential signals output by the digitally controlled phase shifter / attenuator into one differential signal. The four-channel RF / microwave receiving system can be used in multi-beam power division networks, 5G MIMO communications, low-orbit satellite communications and other systems. Similarly, Fig.18Just to give an example, the number of digitally controlled attenuators, digitally controlled phase shifters, baluns, amplifiers, and antennas included in the RF / microwave receiving system is the same as the number of output differential ports of the differential power divider. For example, when a one-to-two differential power divider is used, the number of the above devices can be two, and when a one-to-eight differential power divider is used, the number of the above devices can be eight. When differential combining is not performed, the number of the above devices can be one.

[0087] The basic concepts have been described herein. Obviously, for those skilled in the art, the above detailed disclosure is only for example and does not constitute a limitation of the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and amendments to the present application. Such modifications, improvements and amendments are suggested in the present application, so such modifications, improvements and amendments still belong to the spirit and scope of the exemplary embodiments of the present application.

[0088] At the same time, the present application uses specific words to describe the embodiments of the present application. For example, "one embodiment", "an embodiment", and / or "some embodiments" refer to a certain feature, structure or characteristic related to at least one embodiment of the present application. Therefore, it should be emphasized and noted that "one embodiment" or "an embodiment" or "an alternative embodiment" mentioned twice or multiple times in different positions in the present application does not necessarily refer to the same embodiment. In addition, some features, structures or characteristics in one or more embodiments of the present application can be appropriately combined.

[0089] Similarly, it should be noted that in order to simplify the description of the disclosure of this application and thus help understand one or more embodiments of the invention, in the above description of the embodiments of this application, multiple features are sometimes combined into one embodiment or its description. However, this disclosure method does not mean that the features required by the object of this application are more than the features mentioned in the claims. In fact, the features of the embodiments are less than all the features of the single embodiment disclosed above.

[0090] Finally, it should be understood that the embodiments described in this application are only used to illustrate the principles of the embodiments of the present application. Other variations may also fall within the scope of the present application. Therefore, as an example and not a limitation, the alternative configurations of the embodiments of the present application may be considered to be consistent with the teachings of the present application. Accordingly, the embodiments of the present application are not limited to the embodiments explicitly introduced and described in the present application.

Claims

1. A phase shift attenuation circuit, It is characterized in that The phase shift attenuation circuit comprises: A plurality of first differential circuits electrically connected in sequence; the electrical connection between two adjacent first differential circuits includes a direct connection and / or a connection through an attenuator unit; wherein, The phase-shift attenuation circuit realizes 8-bit step attenuation through the attenuator unit; the 7-bit step attenuation included in the 8-bit step attenuation is used to realize the phase shift function, and the 8-bit step attenuation is used to realize the phase shift and attenuation functions.

2. The phase shift attenuation circuit according to claim 1, It is characterized in that The first differential circuit comprises: One or more first differential input ports, one or more first differential output ports, and a plurality of switch dies; A switch die is connected between the positive and negative electrode interfaces of each first differential input port and the positive and negative electrode interfaces of each first differential output port; The switch core is used to realize the conduction or disconnection between the first differential input port and the first differential output port, so as to select the electrical connection mode between two adjacent first differential circuits.

3. The phase shift attenuation circuit according to claim 2, It is characterized in that The plurality of first differential circuits are the same and / or different.

4. The phase shift attenuation circuit according to claim 1, It is characterized in that The attenuation range of the 7-bit step attenuation is 31.75 dB, which is used to achieve phase shift within the range of 0deg-90deg; the attenuation range of the 8-bit attenuation is 63.75 dB, which is used to achieve phase shift and amplitude attenuation within the range of 0-90deg.

5. A phase shift attenuation network, It is characterized in that The phase-shift attenuation network comprises a phase-shift attenuation circuit as claimed in any one of claims 1 to 4.

6. The phase shift attenuation network according to claim 5, It is characterized in that The phase shift attenuation network further includes: a first node circuit; a second node circuit; and A first signal path and a second signal path coupled between the first node circuit and the second node circuit; wherein, The first node circuit and the second node circuit both include the phase shift attenuation circuit.

7. The phase shift attenuation network according to claim 6, It is characterized in that Both the first node circuit and the second node circuit also include a quadrant conversion circuit electrically connected to the phase shift attenuation circuit; the quadrant conversion circuit is constructed based on a second differential circuit, and the second differential circuit realizes quadrant conversion of phase by turning on or off the positive and negative interfaces of the second differential input port and the positive and negative interfaces of the second differential output port, and combines with the phase shift attenuation circuit to realize a wide range of phase movement.

8. The phase shift attenuation network according to claim 7, It is characterized in that The phase shift range of the first node circuit or the second node circuit is 0 degrees to 360 degrees.

9. The phase shift circuit according to claim 6, It is characterized in that The second node circuit includes a third differential circuit, including: An input differential network includes: a first port and a second port; An input differential unit comprises: an input differential coupling line; An output differential unit comprises: a first coupling line and a second coupling line; and An output differential network, comprising: a first output differential port and a second output differential port; The positive electrode of the input terminal of the input differential coupling line is connected to the first port, and the negative electrode of the input terminal is connected to the second port; The positive electrode of the input end of the first coupling line is connected to the positive electrode of the output end of the input differential coupling line, and the negative electrode of the input end of the second coupling line is connected to the negative electrode of the output end of the input differential coupling line; The negative electrode of the input end of the first coupling line is connected to the positive electrode of the input end of the second coupling line; The positive electrode interface of the first output differential port is connected to the positive electrode of the output end of the first coupling line, and the negative electrode interface is connected to the negative electrode of the output end of the second coupling line; The positive electrode interface of the second output differential port is connected to the positive electrode of the output end of the second coupling line, and the negative electrode interface is connected to the negative electrode of the output end of the first coupling line; The first output differential port and the second output differential port of the output differential network are used to receive the first phase-shifted signal and the second phase-shifted signal respectively, and the input differential network is used to output the composite signal.

10. A radio frequency microwave system, It is characterized in that It comprises the phase-shift attenuation circuit as described in any one of claims 1-4 or the phase-shift attenuation network as described in any one of claims 5-9.

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