Branch line coupler with working frequency band capable of being digitally controlled

By using the on-off control of lumped parameter elements and transistors in the branch line coupler, the ability to work at different frequencies is achieved, solving the problem of unadjustable frequency of traditional branch line couplers, and improving frequency flexibility and production efficiency .

CN119171901APending Publication Date: 2024-12-20ZHE JIANG YAN HUANG KE JI YOU XIAN GONG SI
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Patent Information

Application Number
CN202311160382.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-09-11
Publication Date
2024-12-20

AI Technical Summary

Technical Problem

Traditional branch line couplers can only work at specific frequency designed and cannot be used normally at other frequencies, resulting in redesign and processing when frequency changes, increasing workload and cost.

Method used

The capacitance inductance of the lumped parameter element is used instead of the microstrip line, and the on-off of the transistor is used to realize digital control of the operating frequency, so that the branch line coupler can operate at different frequencies.

Benefits of technology

The operating frequency switching capability of branch line couplers is realized, and can work and use normally at different frequencies, reducing the complexity and cost of design and production.

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Abstract

The invention discloses a branch line coupler with a digitally controllable working frequency band. A port 1, a source electrode of M3, a drain electrode of M1 and a positive end of C1 are connected with V1; the grid electrode of M3 is connected with the negative end of R3; the positive end of the R3 is connected with a port 5; the drain electrode of the M3 is connected with the positive end of the L3; the negative end of the L3 is connected with the drain electrode of the M4; the grid electrode of the M4 is connected with the positive end of the R4; the negative end of the R4 is connected with the port 6; the source electrode of the M1 is connected with the positive end of the L1; the grid electrode of the M1 is connected with the negative end of the R1; the positive end of the R1 is connected with the positive end of the R2, and a port 9 is connected with the V5; the port 2, the negative end of the L1, the source electrode of the M4 and the positive end of the C2 are connected with the V2; the port 3, the negative end of the L2, the negative end of the C2 and the source electrode of the M6 are connected with the V3; the source electrode of M2 is connected with the positive end of L2; the grid electrode of the M6 is connected with the positive end of the R6; the negative end of the R6 is connected with a port 7; the grid electrode of M2 is connected with the negative end of R2; the drain electrode of the M5 is connected with the positive end of the L4; the grid electrode of the M5 is connected with the negative end of the R5; the positive end of the R5 is connected with a port 8; the invention designs the branch line coupler of which the working frequency band can be digitally controlled, so that the digital control of the working frequency is realized, and the coupler can work under different frequencies.
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Description

Technical Field

[0001] The invention relates to the technical field of radio frequency circuits, in particular to a branch line coupler with a digitally controllable working frequency band. Background Art

[0002] Branch line coupler is one of the key passive components in RF front end, which is often used for power distribution and power synthesis, providing equal power distribution between the through port and the coupled port. The traditional branch line coupler has the following geometry: Figure 1 As shown, port 1 is the input port, port 2 and port 3 are the output ports, and port 4 is the isolation port. Ideally, the input power is equally distributed to output ports 2 and 3, the output phases of the two ports differ by 90°, and there is no power signal at the isolation port 4.

[0003] However, once the traditional branch line coupler is designed, it can only work at a specific frequency and cannot be used normally at other frequencies. If the working frequency of the coupler needs to be changed, the only way is to redesign and process the branch line coupler of the corresponding frequency, which not only increases the workload and cost, but also takes a certain amount of time to process and manufacture. Summary of the invention

[0004] The object of the present invention is to provide a branch line coupler with digitally controllable working frequency band. The present invention has the advantage of being able to switch working frequency and thus being able to work and be used at different frequencies.

[0005] The technical solution of the present invention is: a branch line coupler with digitally controllable working frequency band, port 1, the source of the third FET tube, the drain of the first FET tube and the positive end of the first capacitor are all connected to V1; the gate of the third FET tube is connected to the negative end of the third resistor, and the positive end of the third resistor is connected to port 5; the drain of the third FET tube is connected to the positive end of the third inductor, and the negative end of the third inductor is connected to the drain of the fourth FET tube; the gate of the fourth FET tube is connected to the positive end of the fourth resistor, and the negative end of the fourth resistor is connected to port 6;

[0006] The source of the No. 1 FET is connected to the positive end of the No. 1 inductor, and the gate of the No. 1 FET is connected to the negative end of the first resistor; the positive end of the first resistor, the positive end of the second resistor and port 9 are all connected to V5;

[0007] Port 2, the negative end of the No. 1 inductor, the source of the No. 4 FET tube and the positive end of the second capacitor are all connected to V2;

[0008] Port 3, the negative end of the second inductor, the negative end of the second capacitor and the source of the sixth FET are all connected to V3;

[0009] The source of the second FET is connected to the positive end of the second inductor, and the gate of the second FET is connected to the negative end of the second resistor;

[0010] The gate of the sixth FET is connected to the positive end of the sixth resistor, and the negative end of the sixth resistor is connected to port 7;

[0011] The drain of the fifth FET is connected to the positive end of the fourth inductor, the gate of the fifth FET is connected to the negative end of the fifth resistor, and the positive end of the fifth resistor is connected to port 8;

[0012] Port 4, the source of the fifth FET tube, the drain of the second FET tube and the negative end of the first capacitor are all connected to V4.

[0013] In the aforementioned branch line coupler with digitally controllable working frequency band, the FET tube No. 1, FET tube No. 2, FET tube No. 3, FET tube No. 4, FET tube No. 5 and FET tube No. 6 are all N-type enhancement FET tubes under the gallium arsenide semiconductor compound pHEMT process.

[0014] In the aforementioned branch line coupler with digitally controllable working frequency band, port 1 is the input end of the branch line coupler, port 2 is the through end of the branch line coupler, port 3 is the coupling end of the branch line coupler, and port 4 is the isolation end of the branch line coupler.

[0015] In the aforementioned branch line coupler with digitally controllable working frequency band, the sizes of the first FET tube, the second FET tube, the third FET tube, the fourth FET tube, the fifth FET tube and the sixth FET tube are the same.

[0016] In the aforementioned branch line coupler with digitally controllable working frequency band, the resistance values ​​of the first resistor, the second resistor, the third resistor, the fourth resistor, the fifth resistor and the sixth resistor are the same.

[0017] In the aforementioned branch line coupler with digitally controllable operating frequency band, the capacitance values ​​of the first capacitor and the second capacitor are the same.

[0018] In the aforementioned branch line coupler with digitally controllable working frequency band, the inductance values ​​of the first inductor and the second inductor are the same; the inductance values ​​of the third inductor and the fourth inductor are the same.

[0019] Compared with the prior art, the present invention designs a branch line coupler with digitally controllable working frequency band. By using lumped parameter elements such as capacitors and inductors to replace microstrip lines and utilizing the on and off of transistors to achieve digital control of the working frequency, the branch line coupler of the present application can operate at different frequencies.

[0020] Therefore, the present invention has the advantage of being able to switch the operating frequency so as to be able to operate and be used at different frequencies. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1is a schematic diagram of the geometry of a conventional branch-line coupler;

[0022] Figure 2 It is a circuit schematic diagram of the present invention;

[0023] Figure 3 It is a schematic diagram of transistor on-off equivalent of the present invention;

[0024] Figure 4 1 is a diagram of simulation results of different frequency bands according to an embodiment of the present invention.

[0025] Marks in the accompanying drawings: M1-FET tube No. 1, M2-FET tube No. 2, M3-FET tube No. 3, M4-FET tube No. 4, M5-FET tube No. 5, M6-FET tube No. 6, R1-first resistor, R2-second resistor, R3-third resistor, R4-fourth resistor, R5-fifth resistor, R6-sixth resistor, C1-first capacitor, C2-second capacitor, L1-inductor No. 1, L2-inductor No. 2, L3-inductor No. 3, L4-inductor No. 4. DETAILED DESCRIPTION

[0026] The present invention is further described below in conjunction with the accompanying drawings and embodiments, but they are not intended to limit the present invention.

[0027] Embodiment. A branch line coupler with a digitally controllable operating frequency band, such as Figure 2 As shown, port 1, the source of the third FET tube M3, the drain of the first FET tube M1 and the positive end of the first capacitor C1 are all connected to V1; the gate of the third FET tube M3 is connected to the negative end of the third resistor R3, and the positive end of the third resistor R3 is connected to port 5; the drain of the third FET tube M3 is connected to the positive end of the third inductor L3, and the negative end of the third inductor L3 is connected to the drain of the fourth FET tube M4; the gate of the fourth FET tube M4 is connected to the positive end of the fourth resistor R4, and the negative end of the fourth resistor R4 is connected to port 6;

[0028] The source of the first FET tube M1 is connected to the positive end of the first inductor L1, and the gate of the first FET tube M1 is connected to the negative end of the first resistor R1; the positive end of the first resistor R1, the positive end of the second resistor R2 and the port 9 are all connected to V5;

[0029] Port 2, the negative end of the first inductor L1, the source of the fourth FET tube M4 and the positive end of the second capacitor C2 are all connected to V2;

[0030] Port 3, the negative end of the second inductor L2, the negative end of the second capacitor C2 and the source of the sixth FET tube M6 are all connected to V3;

[0031] The source of the second FET tube M2 is connected to the positive end of the second inductor L2, and the gate of the second FET tube M2 is connected to the negative end of the second resistor R2;

[0032] The gate of the sixth FET tube M6 is connected to the positive end of the sixth resistor R6, and the negative end of the sixth resistor R6 is connected to the port 7;

[0033] The drain of the fifth FET tube M5 is connected to the positive end of the fourth inductor L4, the gate of the fifth FET tube M5 is connected to the negative end of the fifth resistor R5, and the positive end of the fifth resistor R5 is connected to the port 8;

[0034] Port 4, the source of the fifth FET tube M5, the drain of the second FET tube M2 and the negative end of the first capacitor C1 are all connected to V4.

[0035] The first FET tube M1, the second FET tube M2, the third FET tube M3, the fourth FET tube M4, the fifth FET tube M5 and the sixth FET tube M6 are all N-type enhancement FET tubes under the gallium arsenide semiconductor compound pHEMT process.

[0036] The port 1 is the input end of the branch line coupler, the port 2 is the through end of the branch line coupler, the port 3 is the coupling end of the branch line coupler, and the port 4 is the isolation end of the branch line coupler.

[0037] The sizes of the first FET tube M1, the second FET tube M2, the third FET tube M3, the fourth FET tube M4, the fifth FET tube M5 and the sixth FET tube M6 are the same.

[0038] The first resistor R1 , the second resistor R2 , the third resistor R3 , the fourth resistor R4 , the fifth resistor R5 and the sixth resistor R6 have the same resistance value.

[0039] The first capacitor C1 and the second capacitor C2 have the same capacitance value.

[0040] The inductance values ​​of the first inductor L1 and the second inductor L2 are the same; the inductance values ​​of the third inductor L3 and the fourth inductor L4 are the same.

[0041] Implementation principle:

[0042] The digital control of the present invention is realized by turning on and off the transistor. The equivalent schematic diagram of turning on and off the transistor is shown in FIG. Figure 3 shown.

[0043] When the gate-source voltage V gs Greater than the transistor's turn-on voltage V th When the transistor is turned on, the transistor can be equivalent to an on-resistance R on , whose size is:

[0044]

[0045] Where μ is the electron mobility of the transistor, C ox is the gate oxide capacitance per unit area of ​​the transistor, W is the gate width of the transistor, and L is the gate length of the transistor. From formula (1), we can see that when the transistor is turned on, the larger the gate width W, the larger the on-resistance R on The smaller the gate length L, the larger the on-resistance R on The bigger.

[0046] When the gate-source voltage V gs Less than the transistor's turn-on voltage V th When , the transistor is cut off. At this time, the transistor can be equivalent to a turn-off capacitor, and its size is:

[0047] C off =C gs +C gd +C other (2)

[0048] Among them, V gs is the gate-source capacitance of the transistor, C gd is the gate-drain capacitance of the transistor, C other Represents other parasitic capacitances, such as substrate coupling capacitance, and all capacitances can be represented by a turn-off capacitor C off From formula (2), we can see that the larger the gate width, the larger the C off Increase.

[0049] When the gate-source voltage V gs Lower than the turn-on voltage V th When M1 and M2 are turned off, the equivalent of the turn-off capacitor C off , presenting low resistance characteristics to RF signals; the gate-source voltage V gs Higher than the transistor's turn-on voltage V th When , M3, M4, M5, and M6 are turned on, which are equivalent to the turn-on resistor, with the resistance ranging from several thousand ohms to tens of kiloohms, showing high resistance characteristics to the RF signal, and the RF signal cannot pass through.

[0050] At this time, inductors L1 and L2 are connected, inductors L3 and L4 are disconnected, and the branch line coupler operates at frequency f1. Using the odd-even analysis method, the circuit is separated along the symmetry plane, and is symmetrical up and down. Therefore, using the conditions of ideal matching of each port and ideal isolation between ports, the following formula can be obtained:

[0051] G 2 +1=H 2 (3)

[0052]

[0053]

[0054] Among them, C is called the coupling degree of the branch line coupler, G is the normalized value of the characteristic admittance of the branch where the capacitor is located (normalized to the admittance value corresponding to the 50 ohm impedance), H is the normalized value of the characteristic admittance of the branch where the inductor is located, μ1, μ2, μ3, and μ4 are the input voltages of the ports, and it can be seen that the phase difference between output ports 2 and 3 is 90°. When the coupling degree is 3dB, substituting it into the above formula, we can get G=1,

[0055] Similarly, when the gate-source voltage V gs Lower than the turn-on voltage V th When M3, M4, M5, and M6 are turned off, the equivalent of the turn-off capacitor C off , presenting low resistance characteristics to radio frequency signals;

[0056] The gate-source voltage V of M1 and M2 gs Higher than the transistor's turn-on voltage V th When , M1 and M2 are turned on, equivalent to the on resistance, the resistance value ranges from several thousand ohms to tens of kiloohms, showing high resistance characteristics to the RF signal, and the RF signal cannot pass. At this time, inductors L3 and L4 are in the on state, inductors L1 and L2 are disconnected, and the branch line coupler operates at frequency f2.

[0057] To sum up, when M1 and M2 are turned off and M3, M4, M5 and M6 are turned on, the branch line coupler operates at frequency f1; when M1 and M2 are turned on and M3, M4, M5 and M6 are turned off, the branch line coupler operates at frequency f2, thereby realizing a branch line coupler with digitally controllable operating frequency band.

[0058] like Figure 4 As shown, the circuit designed in this application realizes a digitally controlled variable frequency branch line coupler circuit, and the operating frequencies of the final simulation results are 2.7GHz and 5.2GHz respectively. At 2.7GHz, S21=S31=-3.737dB; at 5.2GHz, S21=S31=-3.692dB (Note: Since the components used in the circuit are actual components and the existence of transistors, the circuit has certain losses, so S21 and S31 are greater than -3dB).

Claims

1. A branch line coupler with digitally controllable working frequency band, characterized in that: Port 1, the source of the third FET tube (M3), the drain of the first FET tube (M1) and the positive end of the first capacitor (C1) are all connected to V1; the gate of the third FET tube (M3) is connected to the negative end of the third resistor (R3), and the positive end of the third resistor (R3) is connected to port 5; the drain of the third FET tube (M3) is connected to the positive end of the third inductor (L3), and the negative end of the third inductor (L3) is connected to the drain of the fourth FET tube (M4); the gate of the fourth FET tube (M4) is connected to the positive end of the fourth resistor (R4), and the negative end of the fourth resistor (R4) is connected to port 6; The source of the first FET tube (M1) is connected to the positive end of the first inductor (L1), and the gate of the first FET tube (M1) is connected to the negative end of the first resistor (R1); the positive end of the first resistor (R1), the positive end of the second resistor (R2) and port 9 are all connected to V5; Port 2, the negative end of the first inductor (L1), the source of the fourth FET tube (M4) and the positive end of the second capacitor (C2) are all connected to V2; Port 3, the negative terminal of the second inductor (L2), the negative terminal of the second capacitor (C2) and the source of the sixth FET tube (M6) are all connected to V3; The source of the second FET tube (M2) is connected to the positive end of the second inductor (L2), and the gate of the second FET tube (M2) is connected to the negative end of the second resistor (R2); The gate of the sixth FET tube (M6) is connected to the positive end of the sixth resistor (R6), and the negative end of the sixth resistor (R6) is connected to the port 7; The drain of the fifth FET tube (M5) is connected to the positive end of the fourth inductor (L4), the gate of the fifth FET tube (M5) is connected to the negative end of the fifth resistor (R5), and the positive end of the fifth resistor (R5) is connected to the port 8; Port 4, the source of the fifth FET tube (M5), the drain of the second FET tube (M2) and the negative end of the first capacitor (C1) are all connected to V4.

2. A branch line coupler with digitally controllable working frequency band according to claim 1, characterized in that: The first FET tube (M1), the second FET tube (M2), the third FET tube (M3), the fourth FET tube (M4), the fifth FET tube (M5) and the sixth FET tube (M6) are all N-type enhancement FET tubes under the gallium arsenide semiconductor compound pHEMT process.

3. The branch line coupler with digitally controllable working frequency band according to claim 1, characterized in that: The port 1 is the input end of the branch line coupler, the port 2 is the through end of the branch line coupler, the port 3 is the coupling end of the branch line coupler, and the port 4 is the isolation end of the branch line coupler.

4. The branch line coupler with digitally controllable working frequency band according to claim 1, characterized in that: The sizes of the first FET tube (M1), the second FET tube (M2), the third FET tube (M3), the fourth FET tube (M4), the fifth FET tube (M5) and the sixth FET tube (M6) are the same.

5. The branch line coupler with digitally controllable working frequency band according to claim 1, characterized in that: The first resistor (R1), the second resistor (R2), the third resistor (R3), the fourth resistor (R4), the fifth resistor (R5) and the sixth resistor (R6) have the same resistance value.

6. The branch line coupler with digitally controllable working frequency band according to claim 1, characterized in that: The capacitance values ​​of the first capacitor (C1) and the second capacitor (C2) are the same.

7. The branch line coupler with digitally controllable working frequency band according to claim 1, characterized in that: The inductance values ​​of the first inductor (L1) and the second inductor (L2) are the same; the inductance values ​​of the third inductor (L3) and the fourth inductor (L4) are the same.