Communication method and related device
By detecting PCIe bus exceptions and performing reset processing, PCIe link establishment training is initiated, which solves the problem of long-term interruption in PCIe bus communication exceptions, and quickly restores communication services and improves user experience.
Patent Information
- Application Number
- CN202310756308.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-06-25
- Publication Date
- 2024-12-27
AI Technical Summary
When a communication abnormality occurs in the module of PCIe bus interconnection, the existing technology adopts the power outage of the entire machine and restarts, resulting in a long interruption of communication for a long time, poor user experience, and traditional methods cannot effectively restore communication services.
By detecting the communication abnormal status of the PCIe bus, the reset process is performed, including cleaning up processes and resources, uninstalling the driver, resetting the bus and reloading the driver, entering the preparatory state, initiate PCIe link establishment training to restore communication services, and avoiding hardware Power down and restart.
Quickly recover communication services in the event of communication abnormalities, shorten recovery time, greatly improve user experience, and do not rely on complex fault diagnosis algorithms to achieve symmetric communication reconstruction and adaptation.
Smart Images
Figure CN119201508A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of computer technology, and in particular to a communication method and related devices. Background Art
[0002] The Peripheral Component Interconnect Express (PCIe) bus is a high-speed serial communication bus that is widely used for inter-chip interconnection, such as high-speed data exchange between application processors and data transmission between application processors and network chips.
[0003] Currently, when communication abnormalities occur, the communication is restored by powering off and restarting the entire machine and then reestablishing PCIe communication. However, powering off the entire machine will cause communication interruption for a long time, resulting in a poor user experience. Summary of the invention
[0004] In view of this, the present application provides a communication method and related devices, which can quickly restore the communication services of two modules interconnected by a PCIe bus, greatly improving the user experience.
[0005] In a first aspect, an embodiment of the present application provides a communication method, which is applied to a first module, wherein the first module and a second module are connected to each other through a peripheral component express interconnect (PCIe) bus to establish a communication service, and the method includes:
[0006] If it is detected that the PCIe bus is in a communication abnormal state, synchronizing the communication abnormal state to the second module;
[0007] Executing a first reset process, wherein the first reset process includes: clearing a first process and a first resource of the communication service, unloading a first driver, resetting a first bus, reloading the first driver, and entering a standby state;
[0008] If it is detected that the second module is in the preparation state and the type of the first module is the first type, PCIe link establishment training is initiated to the second module to restore the communication service.
[0009] In a second aspect, an embodiment of the present application provides a communication method, which is applied to a second module, wherein a first module and the second module are connected to each other through a peripheral component express interconnection (PCIe) bus to establish a communication service, and the method includes:
[0010] In response to synchronization of the first module, determining that the PCIe bus is in a communication abnormal state;
[0011] Executing a second reset process, wherein the second reset process includes: clearing the second process and the second resource of the communication service, unloading the second driver, resetting the second bus, reloading the second driver and entering a standby state;
[0012] If the first module is in the ready state and the type of the first module is the first type, respond to the PCIe link establishment training initiated by the first module to resume the communication service.
[0013] In a third aspect, an embodiment of the present application provides a communication device, which is applied to a first module, wherein the first module and the second module are connected to each other through a peripheral component express interconnection PCIe bus to establish a communication service, and the device includes a processing unit, wherein the processing unit is used to:
[0014] If it is detected that the PCIe bus is in a communication abnormal state, synchronizing the communication abnormal state to the second module;
[0015] Executing a first reset process, wherein the first reset process includes: clearing a first process and a first resource of the communication service, unloading a first driver, resetting a first bus, reloading the first driver, and entering a standby state;
[0016] If it is detected that the second module is in the preparation state and the type of the first module is the first type, PCIe link establishment training is initiated to the second module to restore the communication service.
[0017] In a fourth aspect, an embodiment of the present application provides a communication device, which is applied to a second module, wherein the first module and the second module are connected to each other through a peripheral component express interconnection PCIe bus to establish a communication service, and the device includes a processing unit, wherein the processing unit is used to:
[0018] In response to synchronization of the first module, determining that the PCIe bus is in a communication abnormal state;
[0019] Executing a second reset process, wherein the second reset process includes: clearing the second process and the second resource of the communication service, unloading the second driver, resetting the second bus, reloading the second driver and entering a standby state;
[0020] If the first module is in the ready state and the type of the first module is the first type, respond to the PCIe link establishment training initiated by the first module to resume the communication service.
[0021] In a fifth aspect, an embodiment of the present application provides an electronic device, comprising a processor, a memory, a communication interface, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, and the program includes instructions for executing the steps of any method in the first aspect or the second aspect of the embodiment of the present application.
[0022] In a sixth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program for electronic data exchange, wherein the computer program enables a computer to execute part or all of the steps described in any method of the first aspect or the second aspect of the embodiment of the present application.
[0023] In a seventh aspect, an embodiment of the present application provides a computer program product, wherein the computer program product includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to cause a computer to execute some or all of the steps described in any method of the first aspect or the second aspect of the embodiment of the present application. The computer program product may be a software installation package.
[0024] It can be seen that through the above communication method and related devices, the first module and the second module are connected to each other through the peripheral component fast interconnection PCIe bus to establish a communication service. First, respond to the synchronization of the first module to determine that the PCIe bus is in a communication abnormality state; then, perform a second reset process, and the second reset process includes: clearing the second process and second resources of the communication service, unloading the second driver, resetting the second bus, reloading the second driver and entering the preparatory state; finally, if the first module is in the preparatory state and the type of the first module is the first type, respond to the PCIe link establishment training initiated by the first module to restore the communication service. When a communication abnormality occurs, the other end can be notified in time, and the communication link can be quickly rebuilt. The communication service recovery time is greatly shortened, which greatly improves the user experience. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying any creative work.
[0026] Figure 1 A system architecture diagram of a communication method provided in an embodiment of the present application;
[0027] Figure 2 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application;
[0028] Figure 3 A flow chart of a communication method provided in an embodiment of the present application;
[0029] Figure 4 A flowchart of another communication method provided in an embodiment of the present application;
[0030] Figure 5 A block diagram of the functional units of a communication device provided in an embodiment of the present application;
[0031] Figure 6 A block diagram of the functional units of another communication device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0032] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0033] The terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices.
[0034] It should be understood that the term "and / or" in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article indicates that the associated objects before and after are in an "or" relationship. The "plurality" appearing in the embodiments of the present application refers to two or more.
[0035] In the embodiments of the present application, "at least one item" or similar expressions refer to any combination of these items, including any combination of single items or plural items, and refer to one or more, and multiple refers to two or more. For example, at least one item of a, b, or c can represent the following seven situations: a, b, c, a and b, a and c, b and c, a, b, and c. Among them, each of a, b, and c can be an element or a set containing one or more elements.
[0036] The "connection" that appears in the embodiments of the present application refers to various connection methods such as direct connection or indirect connection to achieve communication between devices, and the embodiments of the present application do not impose any limitations on this.
[0037] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.
[0038] The following is an explanation of the relevant contents, concepts, meanings, technical issues, technical solutions, beneficial effects, etc. involved in the embodiments of the present application.
[0039] Related terms:
[0040] PCIe link training belongs to the PCIe physical layer protocol specification. It is the process of initializing the physical layer, port configuration information, transceiver module and related link status of the devices at both ends of the PCIe link, and finally establishing data communication. The state transition during link training is LTSSM (Link Training and Status State Machine). The state machine contains detection, polling, configuration, recovery, L0, L0S, L1, L2, disabled, loopback, and hot reset states. Most of the states have multiple sub-states. In the prior art, PCIe link training is completed by a hardware system consisting of a controller, a physical coding sublayer (PCS) and a physical media attachment (PMA). The software only initializes some hardware configurations before the start of link training and does not participate much in the link training process.
[0041] At present, when two modules are interconnected through the PCIe bus, generally when communication anomalies occur, one solution is to adopt the strategy of powering off and restarting the entire machine, that is, re-establishing the PCIe communication between the two modules after the system is powered off and restarted; another solution is that since the PCIe bus standard provides two communication signal lines, reset and wake, and provides a simple handshake recovery mechanism for the two modules at both ends of the communication to negotiate and establish a link, the communication link can be re-established through the two communication signal lines, reset and wake. However, the first solution will cause the communication service to be interrupted for a long time, and the user experience is not good, while the second solution only provides a multiple retry mechanism when establishing a communication connection, and cannot restore the communication service.
[0042] To solve the above problems, the embodiments of the present application provide a communication method and related devices, which can quickly restore communication services when communication is abnormal, greatly improving the user experience.
[0043] Combine the following Figure 1 The system architecture of a communication method in an embodiment of the present application is described. Figure 1 A system architecture diagram of a communication method provided for an embodiment of the present application includes a first module 110 and a second module 120, wherein the first module 110 can be an application processor, a system-level chip, a chip module, etc., and the second module 120 can be an application processor, a system-level chip, a chip module, etc. The first module 110 and the second module 120 are interconnected via a PCIe bus to establish a communication service.
[0044] Among them, other interconnection buses and / or other general-purpose input and output interfaces are also included between the first module 110 and the second module 120. The first module 110 can be a root controller (Root Complex, RC) or a slave endpoint (End point, EP), and the second module 120 can be a root controller (Root Complex, RC) or a slave endpoint (End point, EP).
[0045] When any end detects abnormal PCIe bus communication between the first module 110 and the second module 120, it can quickly notify the other end through other interconnection buses and / or other general-purpose input and output interfaces, and simultaneously destroy PCIe upper-layer services and resources, uninstall drivers, reset hardware, and then reload drivers at both ends, build links and train to restore to normal data communication. Communication services can be quickly restored without powering off and restarting the entire machine, greatly improving user experience.
[0046] Combine the following Figure 2 The electronic device in the embodiment of the present application is described. Figure 2 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application is shown in FIG. Figure 2As shown, the electronic device includes one or more application processors 220, a memory 230, a communication module 240 and one or more programs 231. The application processor 220 is communicatively connected with the memory 230 and the communication module 240 via an internal communication bus.
[0047] The one or more programs 231 are stored in the memory 230 and configured to be executed by the application processor 220 . The one or more programs 231 include instructions for executing any step in the method embodiment.
[0048] Among them, the application processor 220 can be, for example, a central processing unit (CPU), a general processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. It can implement or execute various exemplary logic blocks, units and circuits described in conjunction with the disclosure of this application. The application processor 220 can also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of DSP and microprocessors, and the like. The communication unit can be a communication module 240, a transceiver, a transceiver circuit, etc., and the storage unit can be a memory 230.
[0049] The memory 230 may be a volatile memory or a nonvolatile memory, or may include both volatile and nonvolatile memories. Among them, the nonvolatile memory may be a read-only memory (ROM), a programmable ROM (PROM), an erasable programmable ROM (EPROM), an electrically erasable programmable ROM (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of random access memory (RAM) are available, such as static RAM (SRAM), dynamic random access memory (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus RAM (DR RAM).
[0050] It is understandable that the electronic device 20 may include more or fewer structural elements than those in the above structural block diagram, for example, including a power module, a physical button, a Wi-Fi module, a speaker, a Bluetooth module, a sensor, a display module, etc., which are not limited here. The electronic device 20 may be a first module or a second module, and the first module and the second module may also be integrated on the electronic device 20.
[0051] After understanding the software and hardware architecture of the embodiment of the present application, Figure 3 A communication method in an embodiment of the present application is described. Figure 3 A flow chart of a communication method provided in an embodiment of the present application specifically includes the following steps:
[0052] Step 301: The first module and the second module are connected to each other via a PCIe bus to establish a communication service.
[0053] Step 302: If the first module detects that the PCIe bus is in a communication abnormality state, the first module synchronizes the communication abnormality state to the second module.
[0054] Among them, in the abnormal communication state, the communication service is interrupted, and the first module can perform periodic detection on the PCIe bus through its own first driver. When the first driver detects that the bus communication is abnormal and it is an unrecoverable fault, it can notify the first kernel thread of the first module to update the first communication monitoring variable, and adjust the first communication monitoring variable from indicating a normal communication state to indicating an abnormal communication state.
[0055] In a possible embodiment, since the first module and the second module are also connected through a preset bus, the preset bus can be an I2C bus or an SPI bus, etc., which is not specifically limited here. The first module can synchronize the communication abnormal state to the second module by sending communication abnormality data to the second module through the preset bus, so that the second module determines that the PCIe bus is in a communication abnormal state.
[0056] In a possible embodiment, since the first module and the second module are also connected through a preset interface, the preset interface can be a general purpose input and output interface (General Purpose I / O Ports, GPIO), which is not specifically limited here. The first module can adjust the first level signal data of the preset interface to the second level signal data to synchronize the communication abnormal state to the second module. For example, the first module can increase the level of the preset interface or lower the level of the preset interface, and the second module can determine whether it is in a communication abnormal state based on monitoring the level signal data of the preset interface.
[0057] Step 303: The second module determines that the PCIe bus is in a communication abnormal state in response to the synchronization of the first module.
[0058] After receiving the synchronization from the first module, the second kernel thread of the second module may update the second communication monitoring variable, and adjust the second communication monitoring variable from indicating a normal communication state to indicating an abnormal communication state.
[0059] In a possible embodiment, the second module may receive communication abnormality data from the first module through the preset bus to determine that the PCIe bus is in a communication abnormality state.
[0060] In a possible embodiment, the second module may determine that the PCIe bus is in an abnormal communication state when detecting that the first level signal data of the preset interface is adjusted to the second level signal data.
[0061] It can be seen that the first module can quickly inform the second module of the abnormality of the bus communication at this time based on the existing hardware, so that the second module can prepare for communication reconstruction and improve the speed of communication reconstruction.
[0062] Step 304: The first module performs a first reset process.
[0063] The first reset process includes: clearing the first process and the first resource of the communication service, unloading the first driver, resetting the first bus, reloading the first driver and entering a standby state.
[0064] Specifically, the first kernel thread can notify the system daemon process on the upper layer of the first module. After receiving the notification, the system daemon process can destroy the communication service process, clean up related resources, and finally uninstall the first driver, reset the local PCIe hardware bus, reload the first driver and enter the preparatory state to wait for the establishment of PCIe link training.
[0065] It can be seen that the first reset process can enable the first module to quickly enter the standby state, which is convenient for subsequent communication service recovery.
[0066] Step 305: The second module performs a second reset process.
[0067] The second reset process includes: clearing the second process and second resources of the communication service, unloading the second driver, resetting the second bus, reloading the second driver and entering a standby state.
[0068] Specifically, the second kernel thread can notify the system daemon process on the upper layer of the second module. After receiving the notification, the system daemon process can destroy the communication service process, clean up related resources, and finally uninstall the second driver, reset the local PCIe hardware bus, reload the second driver and enter the preparatory state to wait for the establishment of PCIe link training.
[0069] It can be seen that the second reset process can enable the second module to quickly enter the standby state, which is convenient for subsequent communication service recovery.
[0070] Step 306: If it is detected that the second module is in the preparation state and the type of the first module is the first type, the first module initiates PCIe link establishment training to the second module to restore the communication service.
[0071] Among them, the first type indicates that the first module is the RC end, and the second module is the EP end. Generally, the RC end initiates the PCIe link establishment training. After the PCIe link between the first module and the second module is successfully established, the logical link will be allocated immediately and the corresponding communication service will be started. The specific PCIe link establishment training refers to the existing method and will not be repeated here.
[0072] Step 307: If the first module is in the ready state and the type of the first module is the first type, the second module responds to the PCIe link establishment training initiated by the first module to resume the communication service.
[0073] In a possible embodiment, if the second module detects that the first module is in the preparation state and the type of the second module is the first type, it initiates PCIe link establishment training to the first module to restore the communication service, that is, if the second module is in the preparation state and the type of the second module is the first type, the first module responds to the PCIe link establishment training initiated by the second module to restore the communication service.
[0074] Specifically, if the second module is the RC end and the first module is the EP end, the second module initiates PCIe link establishment training, and the first module responds to the PCIe link establishment training initiated by the second module to complete the link establishment and resume communication services, which will not be elaborated here.
[0075] It can be seen that through the above communication method, there is no need to power off and restart the hardware, nor to rely on complex PCIe fault diagnosis algorithms. The business recovery of communication reconstruction can be quickly performed when communication is abnormal, which greatly improves the user experience.
[0076] Combine the following Figure 4 Another communication method in the embodiment of the present application is described. Figure 4 A flow chart of another communication method provided in an embodiment of the present application specifically includes the following steps:
[0077] Step 401: The first module and the second module are connected to each other via a PCIe bus to establish a communication service.
[0078] Step 402: The first driver of the first module periodically detects the PCIe bus;
[0079] Step 403: When the first driver program detects that the bus communication is abnormal and is an unrecoverable fault, the first kernel thread of the first module may be notified to update the first communication monitoring variable.
[0080] Step 404: The first kernel thread notifies the second module through a preset bus and / or a preset interface that the PCIe bus is in a communication abnormal state.
[0081] Step 405: The first kernel thread notifies the system daemon process of the first module to perform a first reset process.
[0082] Step 406: When the second kernel thread determines that the PCIe bus is in a communication abnormal state, the second communication monitoring variable is updated.
[0083] Step 407: The second kernel thread notifies the system daemon process of the second module to perform a second reset process.
[0084] Step 408: After both the first module and the second module enter the preparation state, the RC end initiates PCIe link establishment training to the EP end.
[0085] Step 409, restore the communication service.
[0086] It can be seen that through the above communication method, there is no need to power off and restart the hardware, nor to rely on complex PCIe fault diagnosis algorithms. It can quickly restore the communication service when the communication is abnormal. It is symmetrical at both ends of the communication and can be deployed in the same way. It can automatically adapt to the RC end or EP end identity. After a fault occurs at either end, it can promptly and reliably notify the other end and quickly restore the abnormal communication service, which greatly improves the user experience.
[0087] The steps not described in detail above can be found in Figure 3 The description of the steps of the method will not be repeated here.
[0088] The above mainly introduces the scheme of the embodiment of the present application from the perspective of the execution process on the method side. It is understandable that, in order to realize the above functions, the electronic device includes a hardware structure and / or software module corresponding to the execution of each function. It should be easily appreciated by those skilled in the art that, in combination with the units and algorithm steps of each example described in the embodiments provided herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present application.
[0089] The embodiment of the present application can divide the electronic device into functional units according to the above method example. For example, each functional unit can be divided according to each function, or two or more functions can be integrated into one processing unit. The above integrated unit can be implemented in the form of hardware or in the form of software functional units. It should be noted that the division of units in the embodiment of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation.
[0090] In the case of an integrated unit, the following combination Figure 5A communication device 500 in an embodiment of the present application is described in detail, and the communication device 500 includes a processing unit 501 and a communication unit 502, wherein the processing unit 501 is used to execute any step in the above method embodiment, and when performing data transmission such as sending, the communication unit 502 can be selectively called to complete the corresponding operation.
[0091] The communication device 500 may further include a storage unit 503 for storing program codes and data. The processing unit 501 may be a processor, the communication unit 502 may be a wireless communication module, and the storage unit 503 may be a memory, which is applied to the first module, the first module and the second module are connected to each other through a peripheral component interconnection express PCIe bus to establish a communication service, and the processing unit 501 is specifically used for:
[0092] If it is detected that the PCIe bus is in a communication abnormal state, synchronizing the communication abnormal state to the second module;
[0093] Executing a first reset process, wherein the first reset process includes: clearing a first process and a first resource of the communication service, unloading a first driver, resetting a first bus, reloading the first driver, and entering a standby state;
[0094] If it is detected that the second module is in the preparation state and the type of the first module is the first type, PCIe link establishment training is initiated to the second module to restore the communication service.
[0095] It can be seen that through the above communication method and related devices, the first module and the second module are connected to each other through the peripheral component fast interconnection PCIe bus to establish a communication service. First, respond to the synchronization of the first module to determine that the PCIe bus is in a communication abnormality state; then, perform a second reset process, and the second reset process includes: clearing the second process and second resources of the communication service, unloading the second driver, resetting the second bus, reloading the second driver and entering the preparatory state; finally, if the first module is in the preparatory state and the type of the first module is the first type, respond to the PCIe link establishment training initiated by the first module to restore the communication service. When a communication abnormality occurs, the other end can be notified in time, and the communication link can be quickly rebuilt. The communication service recovery time is greatly shortened, which greatly improves the user experience.
[0096] It should be noted that the specific implementation of each operation can adopt the corresponding description of the method embodiment shown above, and the communication device 500 can be used to execute the above method embodiment of the present application, which will not be repeated here.
[0097] In the case of an integrated unit, the following combination Figure 6 Another communication device 600 in an embodiment of the present application is described in detail, and the communication device 600 includes a processing unit 601 and a communication unit 602, wherein the processing unit 601 is used to execute any step in the above method embodiment, and when performing data transmission such as sending, the communication unit 602 can be selectively called to complete the corresponding operation.
[0098] The communication device 600 may further include a storage unit 603 for storing program codes and data. The processing unit 601 may be a processor, the communication unit 602 may be a wireless communication module, the storage unit 603 may be a memory, applied to the second module, the first module and the second module are connected to each other through a peripheral component interconnection express PCIe bus to establish a communication service, the device includes a processing unit, and the processing unit 601 is specifically used to:
[0099] In response to synchronization of the first module, determining that the PCIe bus is in a communication abnormal state;
[0100] Executing a second reset process, wherein the second reset process includes: clearing the second process and the second resource of the communication service, unloading the second driver, resetting the second bus, reloading the second driver and entering a standby state;
[0101] If the first module is in the ready state and the type of the first module is the first type, respond to the PCIe link establishment training initiated by the first module to resume the communication service.
[0102] It can be seen that through the above communication method and related devices, the first module and the second module are connected to each other through the peripheral component fast interconnection PCIe bus to establish a communication service. First, respond to the synchronization of the first module to determine that the PCIe bus is in a communication abnormality state; then, perform a second reset process, and the second reset process includes: clearing the second process and second resources of the communication service, unloading the second driver, resetting the second bus, reloading the second driver and entering the preparatory state; finally, if the first module is in the preparatory state and the type of the first module is the first type, respond to the PCIe link establishment training initiated by the first module to restore the communication service. When a communication abnormality occurs, the other end can be notified in time, and the communication link can be quickly rebuilt. The communication service recovery time is greatly shortened, which greatly improves the user experience.
[0103] It should be noted that the specific implementation of each operation can adopt the corresponding description of the method embodiment shown above, and the communication device 600 can be used to execute the above method embodiment of the present application, which will not be repeated here.
[0104] An embodiment of the present application also provides a chip, including a processor, a memory, and a computer program or instructions stored in the memory, wherein the processor executes the computer program or instructions to implement the steps described in the above method embodiment.
[0105] An embodiment of the present application also provides a chip module, including a transceiver component and a chip, the chip including a processor, a memory and a computer program or instructions stored in the memory, wherein the processor executes the computer program or instructions to implement the steps described in the above method embodiment.
[0106] An embodiment of the present application also provides a computer storage medium, wherein the computer storage medium stores a computer program for electronic data exchange, wherein the computer program enables a computer to execute part or all of the steps of any method recorded in the above method embodiment, and the above computer includes an electronic device.
[0107] The embodiment of the present application also provides a computer program product, the computer program product includes a non-transitory computer-readable storage medium storing a computer program, the computer program is operable to cause a computer to execute some or all of the steps of any method described in the method embodiment. The computer program product may be a software installation package, and the computer includes an electronic device.
[0108] It should be noted that, for the above-mentioned various embodiments, for the sake of simple description, they are all expressed as a series of action combinations. Those skilled in the art should be aware that the present application is not limited by the described order of actions, because some steps in the embodiments of the present application can be performed in other orders or simultaneously. In addition, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions, steps, modules or units involved are not necessarily required by the embodiments of the present application.
[0109] In the above embodiments, the embodiments of the present application have different focuses on the description of each embodiment. For parts that are not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.
[0110] The steps of the method or algorithm described in the embodiments of the present application can be implemented in hardware or by executing software instructions by a processor. The software instructions can be composed of corresponding software modules, and the software modules can be stored in RAM, flash memory, ROM, EPROM, electrically erasable programmable read-only memory (electrically EPROM, EEPROM), registers, hard disks, mobile hard disks, read-only compact disks (CD-ROMs) or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and the storage medium can be located in an ASIC. In addition, the ASIC can be located in a terminal device or a management device. Of course, the processor and the storage medium can also be present in a terminal device or a management device as discrete components.
[0111] Those skilled in the art should be aware that in one or more of the above examples, the functions described in the embodiments of the present application can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiments of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, computer, server, or data center to another website site, computer, server, or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (digital subscriber line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrations. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a digital video disc (DVD)), or a semiconductor medium (eg, a solid state disk (SSD)).
[0112] The modules / units included in the devices and products described in the above embodiments may be software modules / units or hardware modules / units, or may be partially software modules / units and partially hardware modules / units. For example, for the devices and products applied to or integrated in the chip, the modules / units included therein may all be implemented in the form of hardware such as circuits, or at least some of the modules / units may be implemented in the form of software programs, which run on the processor integrated inside the chip, and the remaining (if any) modules / units may be implemented in the form of hardware such as circuits; for the devices and products applied to or integrated in the chip module, the modules / units included therein may all be implemented in the form of hardware such as circuits, and different modules / units may be located in the same component (such as a chip, circuit module, etc.) or in different components of the chip module, or at least some of the modules / units may be implemented in the form of software programs. The software programs run on the processor integrated inside the chip, and the remaining (if any) modules / units may be implemented in the form of hardware such as circuits. It is implemented in the form of a software program, which runs on a processor integrated inside the chip module, and the remaining (if any) modules / units can be implemented in hardware such as circuits; for various devices and products applied to or integrated in the terminal equipment, the various modules / units contained therein can be implemented in hardware such as circuits, and different modules / units can be located in the same component (for example, chip, circuit module, etc.) or in different components in the terminal equipment, or, at least some modules / units can be implemented in the form of a software program, which runs on a processor integrated inside the terminal equipment, and the remaining (if any) modules / units can be implemented in hardware such as circuits.
[0113] The specific implementation methods described above further illustrate the purpose, technical solutions and beneficial effects of the embodiments of the present application. It should be understood that the above description is only the specific implementation method of the embodiments of the present application and is not intended to limit the protection scope of the embodiments of the present application. Any modifications, equivalent substitutions, improvements, etc. made on the basis of the technical solutions of the embodiments of the present application should be included in the protection scope of the embodiments of the present application.
Claims
1. A communication method, characterized in that: Applied to a first module, the first module and the second module are connected to each other via a peripheral component express interconnect (PCIe) bus to establish a communication service, the method comprising: If it is detected that the PCIe bus is in a communication abnormal state, synchronizing the communication abnormal state to the second module; Executing a first reset process, wherein the first reset process includes: clearing a first process and a first resource of the communication service, unloading a first driver, resetting a first bus, reloading the first driver, and entering a standby state; If it is detected that the second module is in the preparation state and the type of the first module is the first type, PCIe link establishment training is initiated to the second module to restore the communication service.
2. The method according to claim 1, characterized in that After performing the first reset process, the method further includes: If the second module is in the ready state and the type of the second module is the first type, respond to the PCIe link establishment training initiated by the second module to resume the communication service.
3. The method according to claim 1, characterized in that The first module and the second module are also connected via a preset bus; if it is detected that the PCIe bus is in a communication abnormal state, synchronizing the communication abnormal state to the second module includes: The communication abnormality data is sent to the second module via the preset bus to synchronize the communication abnormality state to the second module.
4. The method according to claim 1, characterized in that: The first module and the second module are also connected via a preset interface; if it is detected that the PCIe bus is in a communication abnormal state, synchronizing the communication abnormal state to the second module includes: The first level signal data of the preset interface is adjusted to the second level signal data to synchronize the communication abnormal state to the second module.
5. A communication method, characterized in that: Applied to the second module, the first module and the second module are connected to each other via a peripheral component express interconnect (PCIe) bus to establish a communication service, the method comprising: In response to synchronization of the first module, determining that the PCIe bus is in a communication abnormal state; Executing a second reset process, wherein the second reset process includes: clearing the second process and the second resource of the communication service, unloading the second driver, resetting the second bus, reloading the second driver and entering a standby state; If the first module is in the ready state and the type of the first module is the first type, respond to the PCIe link establishment training initiated by the first module to resume the communication service.
6. The method according to claim 5, characterized in that After performing the second reset process, the method further includes: If it is detected that the first module is in the preparation state and the type of the second module is the first type, PCIe link establishment training is initiated to the first module to restore the communication service.
7. The method according to claim 5, characterized in that The first module and the second module are also connected via a preset bus; and the step of determining that the PCIe bus is in a communication abnormal state in response to the synchronization of the first module includes: The communication abnormality data from the first module is received through the preset bus to determine that the PCIe bus is in a communication abnormality state.
8. The method according to claim 5, characterized in that The first module and the second module are also connected via a preset interface; the step of determining that the PCIe bus is in an abnormal communication state in response to synchronization of the first module includes: If it is detected that the first level signal data of the preset interface is adjusted to the second level signal data, it is determined that the PCIe bus is in an abnormal communication state.
9. A communication device, characterized in that: Applied to a first module, the first module and the second module are connected to each other through a peripheral component express interconnect (PCIe) bus to establish a communication service, the device includes a processing unit, and the processing unit is used to: If it is detected that the PCIe bus is in a communication abnormal state, synchronizing the communication abnormal state to the second module; Executing a first reset process, wherein the first reset process includes: clearing a first process and a first resource of the communication service, unloading a first driver, resetting a first bus, reloading the first driver, and entering a standby state; If it is detected that the second module is in the preparation state and the type of the first module is the first type, PCIe link establishment training is initiated to the second module to restore the communication service.
10. A communication device, characterized in that: Applied to the second module, the first module and the second module are connected to each other through a peripheral component express interconnection PCIe bus to establish a communication service, and the device includes a processing unit, and the processing unit is used to: In response to synchronization of the first module, determining that the PCIe bus is in a communication abnormal state; Executing a second reset process, wherein the second reset process includes: clearing the second process and the second resource of the communication service, unloading the second driver, resetting the second bus, reloading the second driver and entering a standby state; If the first module is in the ready state and the type of the first module is the first type, respond to the PCIe link establishment training initiated by the first module to resume the communication service.
11. An electronic device, characterized in that: include: A processor, a memory, and one or more programs; the one or more programs are stored in the memory and are configured to be executed by the processor, the programs comprising instructions for executing the steps in the method as described in any one of claims 1-4 or claims 5-8.
12. A computer storage medium, characterized in that: The computer storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the processor executes the method according to any one of claims 1 to 4 or claims 5 to 8.