Domestic platform onboard DDR5 memory particle mainboard fault positioning method, system and device

By using the control device on the motherboard to analyze the printing information in real time and form the memory particle number table, the problem of fault location caused by poor welding of the onboard DDR5 memory particles is solved, and the faulty memory particles are quickly identified and maintenance efficiency is improved.

CN119201567APending Publication Date: 2024-12-27SHANDONG CHAOYUE DATA CONTROL ELECTRONICS CO LTD
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Patent Information

Application Number
CN202411262996.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-10
Publication Date
2024-12-27

AI Technical Summary

Technical Problem

In the server platform, poor welding of onboard DDR5 memory particles leads to failures in memory training stage, making it difficult to quickly locate the faulty memory particles, affecting maintenance efficiency.

Method used

By using control devices such as microcontrollers and CPLDs on the motherboard, the printing information of the server boot stage is analyzed in real time, and the information of each stage is presented in real time on display media such as digital tubes to form a memory particle number table, and a fault location program is written to quickly identify it. Failed memory particles.

Benefits of technology

It realizes rapid positioning of abnormal memory channels and specific memory particles, shortens fault location time, improves maintenance efficiency and memory-related problem detection efficiency in the production process.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a method, a system and a device for locating faults of a domestic platform onboard DDR5 (Double Data Rate 5) memory particle mainboard, and relates to the technical field of domestic servers. The information of each stage, including initialization and link training information of each controller, is displayed on a display medium in real time, so that the state of the startup process is monitored in real time; in the memory training stage, the current progress of the memory training and the specific information of the fault memory particles can be displayed in real time, so that the abnormal memory channel and the corresponding specific memory particles can be quickly positioned. According to the method, the memory training information of the processor is analyzed in real time by using the original control device on the mainboard, the memory training state is displayed in real time, abnormal memory particles are positioned, the time for positioning memory problems is saved, and the troubleshooting efficiency of memory related problems in links such as production, debugging and maintenance is improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of domestic servers, and specifically to a method, system and device for locating faults of a mainboard of a domestic platform onboard DDR5 memory particles. Background Art

[0002] Server platforms require memory training to ensure reliable memory operation and system stability, especially when using high-performance, large-capacity memory configurations. For designs in the form of DDR5 memory sticks, memory training failures can be resolved by replacing the memory sticks, cleaning the gold fingers, etc. For designs of onboard DDR5 memory particles, due to the dense layout of the memory part of the motherboard and the large number of solder joints, it is more likely to cause poor soldering problems, which can lead to problems during the memory training phase. Due to the large number of memory particles, if problems occur during the initial power-on debugging after welding and during later product maintenance, it is difficult to locate poorly soldered or damaged memory particles. Summary of the invention

[0003] The technical task of the present invention is to address the above shortcomings and provide a method, system and device for locating the fault of a mainboard of DDR5 memory particles on a domestic platform, which can shorten the time for locating faulty memory particles and improve maintenance efficiency.

[0004] The technical solution adopted by the present invention to solve its technical problem is:

[0005] The method for locating the fault of the motherboard with DDR5 memory particles on the domestic platform uses the existing control devices on the motherboard such as the single-chip microcomputer and CPLD to analyze the print information output by the server during the startup phase in real time through the serial port, and presents the information of each stage including the initialization of each controller and the link training information in real time on the display media such as the digital tube, so as to realize the real-time monitoring of the startup process status;

[0006] During the memory training phase, the current progress of the memory training and the specific information of the faulty memory particles can be displayed in real time, so as to quickly locate the abnormal memory channel and the corresponding specific memory particles.

[0007] Furthermore, the specific implementation of the method includes the following steps:

[0008] 1) During the server startup phase, the CPU outputs the printing information of each phase through its own debugging serial port; during the motherboard hardware design phase, the CPU debugging serial port is connected to the control device on the motherboard so that the control device on the motherboard can parse the CPU debugging information; at the same time, the display medium is connected to the control device to realize the function of displaying content on demand;

[0009] 2) Confirm the electrical connection properties of each memory chip in the hardware design schematic, number the memory chips according to their parameters, and form a memory chip number table;

[0010] 3) Write a program to locate the faulty memory particles of the control device. When the memory part fails, the CPU prints information with specific memory particle parameter information. Write a program to analyze the keywords of the memory training part in the debugging information, and match the print information characteristics of each memory particle when a problem occurs with the memory particle number table one by one, so as to locate the specific memory particle.

[0011] 4) Displaying the faulty memory chip information externally: When a memory chip is abnormal, the control device displays the number of the faulty memory chip externally through a display medium; at this time, the faulty memory chip can be found on the mainboard according to the displayed number.

[0012] Furthermore, the control devices on the mainboard include MCU and CPLD.

[0013] Furthermore, the display medium includes a digital tube, and the display medium is connected to the MCU or CPLD via communication methods such as GPIO, I2C, and UART.

[0014] Furthermore, the memory particle numbering table numbers the memory particles according to the memory channel, rank and slice parameters to which each memory particle belongs.

[0015] Furthermore, when a fault occurs in part of the memory, the CPU prints information containing specific faulty memory channel, rank, and slice information.

[0016] Furthermore, in order to facilitate the location of the memory particles, the silk-screen information of the memory particle number is added near the corresponding memory particle during the motherboard PCB design process.

[0017] The present invention also claims protection for a domestic platform onboard DDR5 memory particle motherboard fault location system, which runs on a domestic platform server including an onboard DDR5 memory particle motherboard, the DDR5 memory particle motherboard having a control device, the control device performs real-time analysis of the print information output during the server startup phase through a serial port, and presents each controller initialization and link training phase in real time on a display medium, thereby achieving real-time monitoring of the startup process status;

[0018] The system also includes a memory training process analysis module for displaying the current progress of memory training and specific information of faulty memory particles in real time, so as to quickly locate abnormal memory channels and corresponding specific memory particles.

[0019] Furthermore, the DDR5 memory particle motherboard connects the CPU debugging serial port with the control device on the motherboard during the motherboard hardware design, so that the control device on the motherboard can parse the CPU debugging information, and at the same time connects the control device with the display medium to realize the function of displaying content on demand;

[0020] Confirm the electrical connection properties of each memory chip in the hardware design schematic, number the memory chips according to their parameters, and form a memory chip number table;

[0021] During the server startup phase, the CPU outputs the printing information of each phase through its own debugging serial port;

[0022] The memory training process analysis module includes a faulty memory particle positioning program of the control device. When a fault occurs in the memory part, the CPU print information contains specific memory particle parameter information; the memory training part keywords in the debugging information are analyzed, and the print information characteristics when each memory particle has a problem are matched with the memory particle number table one by one, so as to realize the positioning of the specific memory particle;

[0023] When a memory chip is abnormal, the control device displays the number of the faulty memory chip through a display medium; at this time, the faulty memory chip can be found on the mainboard according to the displayed number.

[0024] The present invention also claims protection for a domestic platform onboard DDR5 memory particle motherboard fault location device, the device comprising at least one memory and at least one processor;

[0025] The at least one memory is used to store a machine-readable program;

[0026] The at least one processor is used to call a machine-readable program stored in the memory to implement the above method.

[0027] Compared with the prior art, the method, system and device for locating faults of a DDR5 memory particle motherboard on a domestic platform of the present invention have the following beneficial effects:

[0028] By using the original control components on the motherboard to analyze the processor's memory training information in real time, the memory training status can be displayed in real time and abnormal memory particles can be located, thus saving time in locating memory problems and improving the efficiency of troubleshooting memory-related problems in various links such as production, debugging, and maintenance. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a system block diagram of a method for locating a fault of a DDR5 memory particle motherboard on a domestic platform provided by an embodiment of the present invention;

[0030] Figure 2It is a flowchart of locating a faulty DDR5 memory particle provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0031] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0032] The embodiment of the present invention provides a method for locating a fault of a motherboard of a DDR5 memory particle on a domestic platform, using existing control devices on the motherboard such as a single-chip microcomputer and a CPLD to analyze the print information output during the server startup phase in real time through a serial port, and presenting the information of each stage such as initialization of each controller and link training in real time on a display medium such as a digital tube, so as to realize real-time monitoring of the startup process status;

[0033] During the memory training phase, the current progress of the memory training and the specific information of the faulty memory particles can be displayed in real time, so as to quickly locate the abnormal memory channel and the corresponding specific memory particles.

[0034] The specific implementation of this method includes the following steps:

[0035] 1. During the server startup phase, the CPU will output the printing information of each stage through its own debugging serial port; during the motherboard hardware design phase, the CPU debugging serial port will be connected to the control device (such as MCU, CPLD) on the motherboard so that the control device on the motherboard can parse the CPU debugging information; at the same time, the display media such as digital tubes will be connected to the MCU or CPLD through GPIO, I2C, UART and other communication methods to realize the function of displaying content on demand.

[0036] 2. Confirm the electrical connection properties of each memory chip in the hardware design schematic, and number the memory chips according to the memory channel, rank, slice and other parameters to form a memory chip number table. To facilitate the location of the memory chip, the numbering information of the memory chip needs to be added near the corresponding memory chip during the motherboard PCB design.

[0037] 3. Write a program to locate the faulty memory particles of MCU / CPLD. When the memory part fails, the CPU print information contains specific information such as the faulty memory channel, rank, slice, etc. Write a program to analyze the keywords of the memory training part in the debugging information, and match the print information characteristics of each memory particle with the number table of the memory particle one by one, so as to locate the specific memory particle.

[0038] 4. Display the faulty memory chip information externally. When the memory chip is abnormal, the control device can display the number of the faulty memory chip externally through the display medium; at this time, the faulty memory chip can be found on the mainboard according to the displayed number.

[0039] The embodiment of the present invention further provides a domestic platform onboard DDR5 memory particle motherboard fault positioning system, which runs on a domestic platform server including an onboard DDR5 memory particle motherboard, the DDR5 memory particle motherboard has control devices such as a single-chip microcomputer and a CPLD, and the control device performs real-time analysis of the print information output during the server startup phase through a serial port, and presents various stages such as initialization of each controller and link training in real time on a display medium such as a digital tube, thereby realizing real-time monitoring of the startup process status;

[0040] The system also includes a memory training process analysis module for displaying the current progress of memory training and specific information of faulty memory particles in real time, so as to quickly locate abnormal memory channels and corresponding specific memory particles.

[0041] The DDR5 memory particle motherboard connects the CPU debugging serial port with the control device (such as MCU, CPLD) on the motherboard during the motherboard hardware design, so that the control device on the motherboard can parse the CPU debugging information, and at the same time connects the display media such as the digital tube with the MCU or CPLD through GPIO, I2C, UART and other communication methods to realize the function of displaying content on demand;

[0042] Confirm the electrical connection properties of each memory chip in the hardware design schematic, and number the memory chips according to the memory channel, rank, slice and other parameters to form a memory chip number table. To facilitate the location of the memory chip, the numbering information of the memory chip needs to be added near the corresponding memory chip during the motherboard PCB design.

[0043] During the server startup phase, the CPU outputs the printing information of each phase through its own debugging serial port.

[0044] The memory training process analysis module includes a faulty memory particle positioning program for MCU / CPLD. When a fault occurs in the memory part, the CPU's print information contains specific information such as the faulty memory channel, rank, slice, etc. The memory training part keywords in the debugging information are analyzed, and the print information characteristics when problems occur in each memory particle are matched one by one with the number table of the memory particles, thereby locating the specific memory particles.

[0045] When a memory chip is abnormal, the control device can display the number of the faulty memory chip through a display medium; at this time, the faulty memory chip can be found on the mainboard according to the displayed number.

[0046] The embodiment of the present invention also provides a domestic platform onboard DDR5 memory particle motherboard fault location device, the device includes at least one memory and at least one processor;

[0047] The at least one memory is used to store a machine-readable program;

[0048] The at least one processor is used to call the machine-readable program stored in the memory to implement the method for locating the fault of the mainboard of the domestic platform onboard DDR5 memory particles described in the above embodiment.

[0049] Through the above specific implementations, those skilled in the art can easily implement the present invention. However, it should be understood that the present invention is not limited to the above specific implementations. On the basis of the disclosed implementations, those skilled in the art can arbitrarily combine different technical features to achieve different technical solutions.

[0050] Except for the technical features described in the specification, all other technical features are known technologies to those skilled in the art.

Claims

1. A method for locating a fault of a DDR5 memory particle motherboard on a domestic platform, characterized in that: Use the existing control device on the mainboard to analyze the printed information output during the server startup phase in real time through the serial port, and present the information of each phase, including the initialization of each controller and link training information, on the display medium in real time to achieve real-time monitoring of the startup process status; During the memory training phase, the current progress of the memory training and the specific information of the faulty memory particles can be displayed in real time, so as to quickly locate the abnormal memory channel and the corresponding specific memory particles.

2. The method for locating a fault of a DDR5 memory chip motherboard on a domestic platform according to claim 1, characterized in that: The specific implementation of this method includes the following steps: 1) During the server startup phase, the CPU outputs the printing information of each phase through its own debugging serial port; during the motherboard hardware design phase, the CPU debugging serial port is connected to the control device on the motherboard so that the control device on the motherboard can parse the CPU debugging information; at the same time, the display medium is connected to the control device to realize the function of displaying content on demand; 2) Confirm the electrical connection properties of each memory chip in the hardware design schematic, number the memory chips according to their parameters, and form a memory chip number table; 3) Write a program to locate the faulty memory particles of the control device. When the memory part fails, the CPU prints information with specific memory particle parameter information. Write a program to analyze the keywords of the memory training part in the debugging information, and match the print information characteristics of each memory particle when a problem occurs with the memory particle number table one by one, so as to locate the specific memory particle. 4) Displaying the faulty memory particle information externally: When a memory particle is abnormal, the control device displays the number of the faulty memory particle externally through a display medium.

3. The method for locating a fault of a DDR5 memory particle motherboard on a domestic platform according to claim 1 or 2, characterized in that: The control devices on the main board include MCU and CPLD.

4. The method for locating a fault of a DDR5 memory particle motherboard on a domestic platform according to claim 1 or 2, characterized in that: The display medium includes a digital tube, and the display medium is connected to the MCU or CPLD through the communication mode of GPIO, I2C, and UART.

5. The method for locating a fault of a DDR5 memory particle motherboard on a domestic platform according to claim 2, characterized in that: The memory particles are numbered according to the memory channel, rank, and slice parameters to which each memory particle belongs.

6. The method for locating a fault of a DDR5 memory particle motherboard on a domestic platform according to claim 5, characterized in that: When a memory fault occurs, the CPU printout contains specific information about the faulty memory channel, rank, and slice.

7. The method for locating a fault of a DDR5 memory chip motherboard on a domestic platform according to claim 2, characterized in that: During the motherboard PCB design phase, the memory chip number silkscreen information is added close to the corresponding memory chip.

8. Domestic platform onboard DDR5 memory particle motherboard fault location system, characterized by: The system runs on a domestic platform server with a motherboard containing DDR5 memory particles onboard. The motherboard has a control device. The control device analyzes the print information output by the server during the startup phase in real time through the serial port, and presents each controller initialization and link training phase in real time on the display medium, so as to realize real-time monitoring of the startup process status. The system also includes a memory training process analysis module for displaying the current progress of memory training and specific information of faulty memory particles in real time, so as to quickly locate abnormal memory channels and corresponding specific memory particles.

9. The domestic platform onboard DDR5 memory particle motherboard fault location system according to claim 8 is characterized in that: The DDR5 memory particle motherboard connects the CPU debugging serial port with the control device on the motherboard during the motherboard hardware design, so that the control device on the motherboard can parse the CPU debugging information, and at the same time connects the control device with the display medium to realize the function of displaying content on demand; Confirm the electrical connection properties of each memory chip in the hardware design schematic, number the memory chips according to their parameters, and form a memory chip number table; During the server startup phase, the CPU outputs the printing information of each phase through its own debugging serial port; The memory training process analysis module includes a faulty memory particle positioning program of the control device. When a fault occurs in the memory part, the CPU print information contains specific memory particle parameter information; the memory training part keywords in the debugging information are analyzed, and the print information characteristics when each memory particle has a problem are matched with the memory particle number table one by one, so as to realize the positioning of the specific memory particle; When a memory chip is abnormal, the control device displays the number of the faulty memory chip externally through a display medium.

10. A domestic platform onboard DDR5 memory particle motherboard fault location device, characterized in that: The apparatus comprises at least one memory and at least one processor; The at least one memory is used to store a machine-readable program; The at least one processor is configured to call a machine-readable program stored in the memory to implement the method according to any one of claims 1 to 7.