High-reliability multilayer ceramic capacitor

Abstract

The invention discloses a high-reliability multilayer ceramic capacitor, which comprises an outer electrode and a laminated body, and is characterized in that the laminated body comprises dielectric material layers and inner electrode layers which are alternately laminated; an outer electrode is arranged on the laminated body; the outer electrode is electrically connected with the inner electrode layer; the inner electrode layer comprises a main body part and an arc bulge part; the main body part and the arc bulge part are of an integrated structure; the four corners of the main body part are arc corners; the arc protruding parts are arranged on the two opposite side edges of the main body part. The arc protruding part is formed by arranging arc parts. According to the multilayer ceramic capacitor provided by the invention, the structure of the inner electrode layer is arranged to be the main body part with the arc corner and the arc bulge part, so that the multilayer ceramic capacitor has relatively high reliability, the edge position warping phenomenon of the inner electrode layer is avoided, and the occurrence rate of peripheral failure of a product is reduced.

Description

Technical Field

[0001] The invention belongs to the field of electronic components, and in particular relates to a high-reliability multilayer ceramic capacitor. Background Art

[0002] A multilayer ceramic capacitor in the related art includes a laminate body formed by stacking a plurality of dielectric sheets, and external electrodes formed on an outer surface of the laminate body and having different polarities, wherein internal electrodes alternately stacked in the laminate body can be electrically connected to corresponding external electrodes.

[0003] As the number of dielectric layers stacked in a multilayer ceramic capacitor increases, steps due to the difference in thickness between the internal electrodes and the dielectric layers increase. The dielectric layers are stretched in the lateral direction during the densification process of the pressed body, and these steps cause the ends of the internal electrodes to warp.

[0004] In order to prevent the end of the inner electrode from warping and improve product reliability, the prior art adopts a method of additionally printing a separate dummy electrode pattern in the edge portion. However, in this case, a separate printing process is required, and therefore, there are problems such as low productivity, difficulty in accurately printing the dummy electrode pattern in the edge portion, and difficulty in completely preventing the end of the inner electrode from warping. Summary of the invention

[0005] In order to overcome at least one technical problem existing in the above-mentioned prior art, one of the objectives of the present invention is to provide a multilayer ceramic capacitor.

[0006] In order to achieve the above object, the technical solution adopted by the present invention is:

[0007] The present invention provides a multilayer ceramic capacitor, comprising an external electrode and a stack, wherein the stack comprises dielectric material layers and internal electrode layers alternately stacked; the stack is provided with an external electrode; the external electrode is electrically connected to the internal electrode layer; the internal electrode layer comprises a main body and an arc-shaped protrusion; the main body and the arc-shaped protrusion are an integral structure; the four corners of the main body are all arc-shaped corners; the arc-shaped protrusions are provided on two opposite sides of the main body; and the arc-shaped protrusions are formed by arranging arc portions.

[0008] Preferably, the radius of the arc corner is R, the radius of the arc portion is Rx, and 0.3R≤R X ≤1R; the vertical distance between the top of the arc portion and the main body is H, 0.1R X ≤H≤0.4R X ; The distance between two adjacent arc portions is L, 0≤L≤0.05R X .

[0009] Preferably, the radius R of the arc corner is 0.3-0.6 mm.

[0010] Preferably, the stacked body further comprises a dummy electrode, and the dummy electrode is disposed on at least one side of the inner electrode layer; the dummy electrode and the arc convex portion are arranged relatively parallel and both are located in the same plane.

[0011] Preferably, the internal electrode layer includes first internal electrodes and second internal electrodes that are alternately arranged.

[0012] Preferably, the dummy electrode is disposed on at least one side of the first internal electrode.

[0013] Preferably, the dummy electrode is disposed on at least one side of the second internal electrode.

[0014] Preferably, the distance between the top of the arc portion and the side of the dielectric material layer is M, the width of the dummy electrode is F, 0.1M≤F≤0.25M, and the minimum distance between the dummy electrode and the side of the dielectric material layer is W, 0.5M≤W≤0.8M.

[0015] Preferably, the length of the dummy electrode is Lx, and Lx is 2-3.5 mm.

[0016] Preferably, M is 0.25-0.5 mm.

[0017] Preferably, a value of at least one selected from R, Rx, L, H, M, Lx, F, and W in the first internal electrode is different from that of the second internal electrode.

[0018] Preferably, the stack has a first main surface and a second main surface arranged opposite to each other in a height direction, a first side surface and a second side surface arranged opposite to each other in a width direction, and a first end surface and a second end surface arranged opposite to each other in a length direction; the first internal electrode and the second internal electrode are exposed to the first end surface and the second end surface, respectively.

[0019] Preferably, a first external electrode and a second external electrode are respectively disposed on the first end surface and the second end surface of the stacked body, the first external electrode is electrically connected to the first internal electrode, and the second external electrode is electrically connected to the second internal electrode.

[0020] The beneficial effect of the present invention is that the multilayer ceramic capacitor in the present invention has higher reliability by setting the structure of the inner electrode layer to a main body portion and an arc convex portion with arc corners, avoiding warping at the edge of the inner electrode layer, thereby reducing the incidence of peripheral failure of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1Schematic diagram of the structure of the inner electrode layer in an embodiment of the present invention.

[0022] Figure 2 It is a peak curve diagram of the inner electrode layer in the prior art and the embodiment of the present invention.

[0023] Figure 3 Schematic diagram of the process of laminating and pressing the inner electrode layer and the dielectric material layer in an embodiment of the present invention.

[0024] Figure 4 Schematic diagram of the cross-sectional structure of a multilayer ceramic capacitor in an embodiment of the present invention.

[0025] Figure 5 WT diagram of a multilayer ceramic capacitor according to an embodiment of the present invention.

[0026] Figure 6 Schematic diagram of the structure of the inner electrode layer and the dummy electrode in an embodiment of the present invention.

[0027] Figure 7 Schematic diagram of the structure of a multilayer ceramic capacitor in an embodiment of the present invention. DETAILED DESCRIPTION

[0028] The specific implementation of the present invention is further described in detail below in conjunction with the accompanying drawings and examples, but the implementation and protection of the present invention are not limited thereto. It should be noted that if there are processes that are not particularly described in detail below, they can be implemented or understood by those skilled in the art with reference to the prior art. The reagents or instruments used that do not indicate the manufacturer are all conventional products that can be purchased commercially.

[0029] Reference Figure 1 As shown, in some embodiments of the present invention, the present invention provides a multilayer ceramic capacitor, including an external electrode and a laminate, the laminate including dielectric material layers and internal electrode layers alternately laminated; the laminate is provided with an external electrode; the external electrode is electrically connected to the internal electrode layer; the internal electrode layer includes a main body and an arc convex portion; the main body and the arc convex portion are an integral structure; the four corners of the main body are arc corners; the two opposite sides of the main body are provided with arc convex portions; the arc convex portion is formed by arranging a plurality of arc portions on the side of the main body, and distributed on the side of the entire main body. The arc portion is an arc-shaped convexity formed on the main body and extending in a direction away from the main body. The multilayer ceramic capacitor in the present invention has a higher reliability by setting the structure of the internal electrode layer to a main body and an arc convex portion with arc corners, avoiding the warping phenomenon at the edge of the internal electrode layer, thereby reducing the incidence of peripheral failure of the product.

[0030] like Figure 2 As shown, Figure 2 The upper middle part is the peak curve of the inner electrode layer in the prior art. Figure 2 The following is the peak curve of the inner electrode layer in the present invention. Figure 2 The peak position in the term "peak" refers to the position of the hump. In the structure of the inner electrode layer of the prior art, the hump exerts a greater squeezing effect on the inner electrode layer due to the height difference, resulting in a greater degree of deformation of the inner electrode layer at the peak position. Combined with the thickness difference of the outer periphery of the inner electrode layer, multilayer ceramic capacitors, especially high-capacity or high-voltage multilayer ceramic capacitors, deform at the edge of the inner electrode layer or cause other defects, which can easily lead to the failure of the multilayer ceramic capacitor. In the inner electrode layer of the present invention, the inner electrode layer includes a main body and an arc convex portion, and the main body is provided with arc corners and arc convex portions. This special structure causes the peak position to move inward, and the deformation position of the inner electrode layer is "transferred" from the edge position to a position close to the interior, thereby reducing the occurrence of peripheral failure of the multilayer ceramic capacitor product and avoiding warping at the edge of the inner electrode layer.

[0031] In some embodiments of the present invention, the internal electrode layer is formed on the surface of the dielectric material layer by screen printing the internal electrode paste.

[0032] In some embodiments of the present invention, there is a gap between two adjacent arc portions.

[0033] In some embodiments of the present invention, the radius of the arc corner is R, the radius of the arc portion is Rx, and 0.3R≤R X ≤1R; the vertical distance between the top of the arc (the top of the arc refers to the point on the arc that is farthest from the main body) and the main body is H, which is collectively referred to as the height of the arc below, 0.1R X ≤H≤0.4R X ; The distance between two adjacent arc parts is L, 0≤L≤0.05R X . The radius of the arc corner is related to the specifications of the multilayer ceramic capacitor. Different multilayer ceramic capacitors have different radii of the arc corner. The radius of the arc portion is adjusted according to the radius of the arc corner. The larger the radius R of the arc corner, the more the hump position moves inside the inner electrode layer, and the transition of the edge position of the inner electrode layer tends to be smoother. In addition, considering the impact of the improvement of the special structure of the inner electrode layer on the actual capacity of the multilayer ceramic capacitor product, the radius of the arc portion needs to be controlled within the range of 0.3R to 1R, and by optimizing the height of the arc portion and the spacing between two adjacent arc portions, the impact of the structural improvement of the inner electrode layer on the capacity of the multilayer ceramic capacitor product is less than 2%.

[0034] In some embodiments of the present invention, the radius R of the arc corner is 0.3-0.6 mm.

[0035] In some embodiments of the present invention, the stack further includes a dummy electrode, and the dummy electrode is provided on at least one side of the inner electrode layer; the dummy electrode and the arc convex portion are arranged relatively parallel and both are located in the same plane. The dummy electrode and the inner electrode layer are both located between two adjacent dielectric material layers. The design of the dummy electrode does not participate in the circuit operation inside the multilayer ceramic capacitor.

[0036] like Figure 3 As shown, the dummy electrode can move the deformation area at the edge of the inner electrode layer outward, thereby improving the deformation at the edge of the inner electrode layer and avoiding warping at the edge of the inner electrode layer, thereby improving the reliability of the multilayer ceramic capacitor product.

[0037] like Figure 4 As shown, in some embodiments of the present invention, the internal electrode layer includes first internal electrodes and second internal electrodes that are alternately arranged, and a dielectric material layer is provided between the first internal electrodes and the second internal electrodes.

[0038] In some embodiments of the present invention, a dummy electrode is provided on one side of the first inner electrode, no dummy electrode is provided on the other side of the first inner electrode, and no dummy electrode is provided on both sides of the second inner electrode. In this case, in the multilayer ceramic capacitor, the number of the first inner electrodes is the same as the number of the dummy electrodes. In some specific embodiments of the present invention, all the dummy electrodes are located on the same side of the first inner electrode.

[0039] In some embodiments of the present invention, a dummy electrode is disposed on each side of the first internal electrode, and no dummy electrode is disposed on both sides of the second internal electrode. In this case, the number of dummy electrodes in the multilayer ceramic capacitor is twice the number of first internal electrodes.

[0040] In some embodiments of the present invention, a dummy electrode is provided on one side of the second inner electrode, no dummy electrode is provided on the other side of the second inner electrode, and no dummy electrode is provided on both sides of the first inner electrode. In this case, in the multilayer ceramic capacitor, the number of the second inner electrodes is the same as the number of the dummy electrodes. In some specific embodiments of the present invention, all the dummy electrodes are located on the same side of the second inner electrode.

[0041] In some embodiments of the present invention, a dummy electrode is provided on each side of the second internal electrode, and no dummy electrode is provided on either side of the first internal electrode. In this case, the number of dummy electrodes in the multilayer ceramic capacitor is twice the number of the second internal electrodes.

[0042] In some embodiments of the present invention, a dummy electrode is provided on one side of the first inner electrode and one side of the second inner electrode, and no dummy electrode is provided on the other side of the first inner electrode and the other side of the second inner electrode. In this case, the number of dummy electrodes is the same as the sum of the number of the first inner electrode and the second inner electrode. In some embodiments of the present invention, the dummy electrodes are respectively located on the same side of the first inner electrode and the same side of the second inner electrode.

[0043] like Figure 5 As shown, in some embodiments of the present invention, a dummy electrode is provided on both sides of the first inner electrode and on both sides of the second inner electrode. In this case, the number of the dummy electrodes is twice the sum of the number of the first inner electrodes and the second inner electrodes. Figure 5 This is a WT plane diagram of a multilayer ceramic capacitor. The WT plane is the plane along the thickness direction (T direction) and the width direction (W direction) is called the WT plane.

[0044] like Figure 6 As shown, in some embodiments of the present invention, the distance between the top of the arc portion and the side of the dielectric material layer (i.e., the side of the dielectric material layer parallel to the arc convex portion) is M, the width of the dummy electrode is F, 0.1M≤F≤0.25M, and the minimum distance between the dummy electrode and the side of the dielectric material layer is W, 0.5M≤W≤0.8M. The design of W and M mainly takes into account the printing accuracy of the inner electrode layer and the cutting accuracy of the multilayer ceramic capacitor product, and it is necessary to ensure that the multilayer ceramic capacitor product has sufficient margin size.

[0045] In some embodiments of the present invention, the length of the dummy electrode is Lx, and Lx is 2-3.5 mm.

[0046] In some embodiments of the present invention, M is 0.25-0.5 mm.

[0047] In some embodiments of the present invention, the value of at least one selected from R, Rx, L, H, M, Lx, F, and W in the first internal electrode is different from that in the second internal electrode.

[0048] like Figure 7 As shown, in some embodiments of the present invention, the stack has a first main surface and a second main surface arranged opposite to each other in the height direction, a first side surface and a second side surface arranged opposite to each other in the width direction, and a first end surface and a second end surface arranged opposite to each other in the length direction; the first internal electrode and the second internal electrode are exposed to the first end surface and the second end surface, respectively.

[0049] In some embodiments of the present invention, a dielectric material layer is disposed on each of the first main surface and the second main surface of the stack as a covering layer to prevent the first internal electrode and the second internal electrode from being exposed.

[0050] In some embodiments of the present invention, surfaces of the first external electrode and the second external electrode are provided with a plating film.

[0051] In some embodiments of the present invention, the number of layers of the plating film is two.

[0052] In some embodiments of the present invention, a first plating film and a second plating film are sequentially disposed on the surface of the first external electrode and / or the second external electrode.

[0053] In some embodiments of the present invention, the material of the first plating film is selected from Ni, Cu, and Ni-Cu alloy.

[0054] In some embodiments of the present invention, the material of the second plating film is selected from tin or solder.

[0055] In some embodiments of the present invention, the dielectric material layer is prepared by forming a dielectric material slurry into a film using a method selected from a lip coating method, a doctor blade method or a casting method.

[0056] In some embodiments of the present invention, the external electrode includes a first external electrode and a second external electrode, the first external electrode and the second external electrode are respectively arranged on the first end surface and the second end surface of the stack, the first external electrode is electrically connected to the first internal electrode, and the second external electrode is electrically connected to the second internal electrode.

[0057] In some embodiments of the present invention, a multilayer ceramic capacitor is manufactured using a manufacturing method comprising the following steps:

[0058] S1: forming a dielectric material slurry into a film to obtain a dielectric material layer;

[0059] S2: printing an internal electrode slurry on the dielectric material layer to obtain an internal electrode layer;

[0060] S3: stacking, heat treatment, and sintering to obtain a laminate;

[0061] S4: coating the outer electrode slurry on the laminate, and baking to obtain a multi-layer ceramic capacitor.

[0062] In some embodiments of the present invention, a multilayer ceramic capacitor is manufactured using a manufacturing method comprising the following steps:

[0063] (1) forming a dielectric material slurry into a film to obtain a dielectric material layer;

[0064] (2) printing an internal electrode slurry on the dielectric material layer to obtain an internal electrode layer;

[0065] (3) laminating to obtain a laminate;

[0066] (4) The external electrode slurry is coated on the laminate, baked, and sintered to produce a multi-layer ceramic capacitor.

[0067] In some embodiments of the present invention, the heat treatment temperature is 250-350°C.

[0068] In some embodiments of the present invention, the sintering temperature is 1100-1300°C.

[0069] In some embodiments of the present invention, the sintering atmosphere is a strong reducing atmosphere containing nitrogen, hydrogen and water. -11 ~10-13 Pa.

[0070] In some embodiments of the present invention, the baking temperature is 600-900°C.

[0071] In some embodiments of the present invention, the external electrode paste includes at least one of Ag and Cu.

[0072] In some embodiments of the present invention, Ni is included in the internal electrode paste.

[0073] The specific implementation of the present invention is further described in detail below in conjunction with specific embodiments:

[0074] It should be noted that “above” and “below” in the following embodiments refer to the above and below as viewed from a top view of the laminate.

[0075] Example 1

[0076] The multilayer ceramic capacitor in this example includes a laminate, a first external electrode, and a second external electrode, wherein:

[0077] The laminate has a first main surface and a second main surface disposed opposite to each other in the thickness direction, a first side surface and a second side surface disposed opposite to each other in the width direction, and a first end surface and a second end surface disposed opposite to each other in the length direction.

[0078] The stack includes a dielectric material layer and alternately arranged first and second internal electrodes, a dielectric material layer is arranged between the first and second internal electrodes, and the first and second internal electrodes are exposed to the first end surface and the second end surface respectively; a dielectric material layer is respectively arranged on the first main surface and the second main surface of the stack as a covering layer to prevent the first and second internal electrodes from being exposed.

[0079] The first external electrode and the second external electrode are respectively disposed on the first end surface and the second end surface of the stacked body, the first external electrode is electrically connected to the first internal electrode, and the second external electrode is electrically connected to the second internal electrode;

[0080] The first inner electrode and the second inner electrode have the same structure. They both include a main body and an arc convex portion. The main body and the arc convex portion are an integrated structure. The four corners of the main body are all set as arc corners. The radius of the arc corner is R, and R is 0.5 mm. The arc convex portion is set on two opposite sides of the main body. The arc convex portion is composed of a plurality of arc portions arranged at intervals. The radius of the arc portion is Rx, and R is 0.5 mm. X =0.3R, which is 0.15mm; the height of the arc portion H = 0.2R X, is 0.03mm; the spacing between two adjacent arc portions is L, L=0.02Rx, which is 0.003mm; the distance between the top of the arc portion and the side of the dielectric material layer (that is, the side of the dielectric material layer parallel to the arc protrusion) is M, M is 0.35mm, and the specific parameter data are shown in Table 1.

[0081] Example 2 to Example 14

[0082] Table 1 shows the differences between the multilayer ceramic capacitors in Examples 2 to 14 and Example 1.

[0083] Embodiment 15

[0084] The multilayer ceramic capacitor in this example is different from that in Example 1 only in that: the multilayer ceramic capacitor in this example further includes dummy electrodes, one dummy electrode is arranged in parallel above and below each first inner electrode (i.e., the number of dummy electrodes on both sides of each first inner electrode is 2), and one dummy electrode is arranged in parallel above and below each second inner electrode (i.e., the number of dummy electrodes on both sides of each second inner electrode is 2). The radius R of the arc corner is 0.4 mm. The length of the dummy electrode is Lx, L X =3.0mm, the width of the dummy electrode F=0.1M, i.e. 0.035mm, and the minimum distance between the outer edge of the dummy electrode and the side of the dielectric material layer W=0.5M, i.e. 0.175mm. The specific parameter data are shown in Table 1.

[0085] Example 16 to Example 19

[0086] The multilayer ceramic capacitors in Examples 16 to 19 have the same number and arrangement of dummy electrodes as those in Example 15, except that some parameter data are different. The specific parameter data are shown in Table 1.

[0087] Embodiment 20

[0088] The difference between the multilayer ceramic capacitor in this example and Example 15 is that in this example, a dummy electrode is arranged above each first internal electrode, and a dummy electrode is arranged above each second internal electrode, and the dummy electrodes and the first internal electrodes and the second internal electrodes are arranged in parallel. The specific parameter data are shown in Table 1.

[0089] Embodiment 21

[0090] The difference between the multilayer ceramic capacitor in this example and Example 15 is that: in this example, a dummy electrode is arranged under each first internal electrode, and a dummy electrode is arranged under each second internal electrode, and the dummy electrodes and the first internal electrodes and the second internal electrodes are arranged in parallel. The specific parameter data are shown in Table 1.

[0091] Embodiment 22

[0092] The multilayer ceramic capacitor in this example is different from that in Example 15 only in that the structures of the first inner electrode and the second inner electrode in this example are different. The specific parameter data are shown in Table 2.

[0093] Embodiment 23

[0094] The multilayer ceramic capacitor in this example is different from that in Example 15 only in that the structures of the first inner electrode and the second inner electrode in this example are different, and no dummy electrode is provided in this example. The specific parameter data are shown in Table 2.

[0095] Embodiment 24

[0096] The multilayer ceramic capacitor in this example is different from that in Example 15 only in that the structures of the first inner electrode and the second inner electrode in this example are different, and in this example only one dummy electrode is arranged under each second inner electrode. The specific parameter data are shown in Table 2.

[0097] Embodiment 25

[0098] The multilayer ceramic capacitor in this example is different from that in Example 15 only in that the structures of the first inner electrode and the second inner electrode in this example are different, and in this example only one dummy electrode is arranged above and below each second inner electrode, that is, the number of dummy electrodes on both sides of each second inner electrode is 2, and the number of dummy electrodes on both sides of each first inner electrode is 0. The specific parameter data are shown in Table 2.

[0099] Comparative Example 1 to Comparative Example 5

[0100] The differences between the multilayer ceramic capacitors in Comparative Examples 1 to 5 and Example 1 are shown in Table 1.

[0101] Comparative Example 6 to Comparative Example 7

[0102] The differences between the multilayer ceramic capacitors in Comparative Examples 6 to 7 and Example 18 are shown in Table 1.

[0103] Comparative Example 8

[0104] The multilayer ceramic capacitor in this example is different from Example 18 only in that in this example, only one dummy electrode is arranged above each first internal electrode and each second internal electrode, and the dummy electrode and the first internal electrode and the second internal electrode are arranged in parallel. The specific parameter data are shown in Table 1.

[0105] Comparative Example 9

[0106] The multilayer ceramic capacitor in this example is different from Example 18 only in that in this example, only one dummy electrode is arranged under each first internal electrode and each second internal electrode, and the dummy electrode and the first internal electrode and the second internal electrode are arranged in parallel. The specific parameter data are shown in Table 1.

[0107] Table 1 Parameter data of multilayer ceramic capacitors in Examples 1 to 21 and Comparative Examples 1 to 9

[0108]

[0109]

[0110] Table 2 Parameter data of multilayer ceramic capacitors in Examples 22 to 25

[0111]

[0112]

[0113] In the present invention, the specifications of the multilayer ceramic capacitor are different, and the values ​​of R, Lx, and M are also different. As an example, the embodiment of the present invention and the comparative example both use a multilayer ceramic capacitor with a specification of 1210, whose R is 0.3-0.6mm; L X is 2-3.5mm; M is 0.25-0.5mm. If technicians in this field prepare other types of multilayer ceramic capacitors, they need to adjust the value ranges of R, Lx, and M accordingly to meet the specification requirements of the multilayer ceramic capacitors.

[0114] The multilayer ceramic capacitors in Examples 1 to 25 and Comparative Examples 1 to 9 can be prepared by referring to the following preparation method, specifically:

[0115] 1. Put the dielectric porcelain powder, organic binder, organic solvent and ball milling medium into a ball mill and mix them in a wet manner to make a ceramic slurry. The ceramic slurry is molded by a lip coating method to make a ceramic green sheet (a dielectric material layer is formed after subsequent sintering).

[0116] 2. Prepare a conductive paste for internal electrodes with Ni and other base metal materials as the main components, and use the conductive paste for internal electrodes to implement screen printing on the ceramic green sheet to form a conductive film of a given pattern on the surface of the ceramic green sheet (forming the first internal electrode and the second internal electrode in the subsequent sintering process).

[0117] 3. Multiple ceramic green sheets with conductive films formed thereon are stacked in a given direction, and ceramic sheets without conductive films formed thereon are arranged on the uppermost layer, and the stacks are pressed and bonded, and cut into given sizes to produce ceramic laminates. The ceramic laminates are then heat treated at 300°C in an atmospheric atmosphere to burn and remove the binder, and then heated in a strong reducing atmosphere consisting of H2-N2-H2O gas (oxygen partial pressure of 10 -11 The sintered body (i.e., laminated body) was sintered at 1250°C for about 2 hours to obtain a ceramic sintered body (i.e., laminated body).

[0118] 4. Apply conductive paste for external electrodes (whose main component is Cu) to both end surfaces of the ceramic sintered body and bake them at 600°C to form a first external electrode and a second external electrode, respectively, to obtain the multilayer ceramic capacitor in this example.

[0119] Performance Testing

[0120] The printed appearance qualification rate, capacity hit rate and durability performance of the multilayer ceramic capacitors in Examples 1 to 25 and Comparative Examples 1 to 9 were tested respectively, and the specific testing methods are as follows:

[0121] (1) Printing appearance qualification rate

[0122] In the actual printing of the product, there are burrs on the edge of the electrode. According to the inspection standard, it is determined whether it is NG. The judgment standard can be set to 10ppm. If it meets the standard, it is OK, otherwise it is NG. This test takes 100 products to test the pass rate.

[0123] (2) Capacity Hit Ratio

[0124] According to the product's calibrated capacity Cp, 0.9<Cp<1.1 is considered OK, and anything above that is considered NG. This test takes 100 products to test the pass rate.

[0125] (3) Durability

[0126] 100 test samples were selected for each performance, and the durability was tested according to the test method described in Table 3 below, and then the average value was calculated.

[0127] Table 3 Durability test method

[0128]

[0129] The performance data of the multilayer ceramic capacitors in Examples 1 to 25 and Comparative Examples 1 to 9 measured according to the above test method are shown in Table 4 below.

[0130] Table 4 Performance data of multilayer ceramic capacitors in Examples 1 to 25 and Comparative Examples 1 to 9

[0131]

[0132]

[0133] It can be seen from Table 4 that the multilayer ceramic capacitor in the present invention optimizes parameters such as the radius of the arc portion and the height of the arc portion, so that the obtained multilayer ceramic capacitor simultaneously meets the following performances: durability is less than 3ppm, the printing appearance qualification rate is not less than 90%, and the capacity hit rate is not less than 80%, which is significantly better than comparative examples 1 to 9.

[0134] Compared with Example 1, the radius of the arc portion is too small (for example, Comparative Example 1), the radius of the arc portion is too large (for example, Comparative Example 2), the height of the arc portion is too small (for example, Comparative Example 3), the height of the arc portion is too large (for example, Comparative Example 4), and the distance between two adjacent arc portions is too large (for example, Comparative Example 5), all of which cannot improve the durability, printing qualification rate and capacity hit rate.

[0135] Compared with Example 18, Comparative Examples 6 and 8 use smaller dummy electrode widths, and Comparative Examples 7 and 9 use larger dummy electrode widths, but none of them can make the durability less than 10 ppm, and will also lead to reduced printing qualification rate and capacity hit rate.

[0136] The above is a detailed description of the embodiments of the present invention, but the present invention is not limited to the above embodiments. Various changes can be made within the knowledge of ordinary technicians in the relevant technical field without departing from the purpose of the present invention. In addition, the embodiments of the present invention and the features in the embodiments can be combined with each other without conflict.

Claims

1. A multilayer ceramic capacitor, comprising an external electrode and a laminate, wherein the laminate comprises dielectric material layers and internal electrode layers alternately laminated; the laminate is provided with an external electrode; the external electrode is electrically connected to the internal electrode layer; and characterized in that: The inner electrode layer includes a main body and a circular arc protrusion; the main body and the circular arc protrusion are an integrated structure; the four corners of the main body are all circular arc corners; the circular arc protrusion is provided on two opposite sides of the main body; the circular arc protrusion is formed by arranging circular arc parts.

2. The multilayer ceramic capacitor according to claim 1, wherein: The radius of the arc corner is R, the radius of the arc portion is Rx, 0.3R≤R X ≤1R; the vertical distance between the top of the arc portion and the main body is H, 0.1R X ≤H≤0.4R X ; The distance between two adjacent arc portions is L, 0≤L≤0.05R X .

3. The multilayer ceramic capacitor according to claim 2, wherein: The radius R of the arc corner is 0.3-0.6 mm.

4. The multilayer ceramic capacitor according to claim 2, wherein: The stacked body also includes a dummy electrode, which is disposed on at least one side of the inner electrode layer; the dummy electrode and the arc convex portion are disposed relatively parallel and both are located in the same plane.

5. The multilayer ceramic capacitor according to claim 4, wherein: The internal electrode layer includes first internal electrodes and second internal electrodes that are alternately arranged; the dummy electrode is arranged on at least one side of the first internal electrode, and / or the dummy electrode is arranged on at least one side of the second internal electrode.

6. The multilayer ceramic capacitor according to claim 4 or 5, characterized in that: The distance between the top of the arc portion and the side of the dielectric material layer is M, the width of the dummy electrode is F, 0.1M≤F≤0.25M, and the minimum distance between the dummy electrode and the side of the dielectric material layer is W, 0.5M≤W≤0.8M.

7. The multilayer ceramic capacitor according to claim 6, wherein: The length of the dummy electrode is Lx, Lx is 2-3.5 mm, and / or, M is 0.25-0.5 mm.

8. The multilayer ceramic capacitor according to claim 7, wherein: The value of at least one selected from R, Rx, L, H, M, Lx, F, and W in the first internal electrode is different from that of the second internal electrode.

9. The multilayer ceramic capacitor according to claim 5, wherein: The stacked body comprises a first main surface and a second main surface arranged opposite to each other in a height direction, a first side surface and a second side surface arranged opposite to each other in a width direction, and a first end surface and a second end surface arranged opposite to each other in a length direction; the first internal electrode and the second internal electrode are exposed to the first end surface and the second end surface, respectively.

10. The multilayer ceramic capacitor according to claim 9, wherein: The external electrodes include a first external electrode and a second external electrode, the first external electrode and the second external electrode are respectively disposed on a first end surface and a second end surface of the stack, the first external electrode is electrically connected to the first internal electrode, and the second external electrode is electrically connected to the second internal electrode.

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