Power supply voltage control circuit and control method thereof

Abstract

According to the power supply voltage control circuit, a charging control circuit is adopted, an input power supply is used for charging a power supply capacitor, or when the output voltage of a voltage conversion circuit is low, the charging control circuit is used for charging the power supply capacitor, and when the output voltage of the voltage conversion circuit is high, an auxiliary winding is used for charging the power supply capacitor. Therefore, the problems of high voltage withstanding requirement of the voltage conversion control chip and large circuit loss caused by the wide output voltage range of the voltage conversion circuit are avoided.

Description

Technical Field

[0001] Embodiments of the present invention relate to electronic circuits, and more particularly, to a power supply voltage control circuit. Background Art

[0002] As the functions of smartphones increase, power consumption becomes faster and faster, and fast charging technology comes into being. Figure 1 FIG. 1 shows an existing voltage conversion circuit 10 for a fast charging power supply. Figure 1 As shown, the AC voltage Vac provides a DC voltage Vbus to the transformer T1 of the voltage conversion circuit 10 after passing through the rectifier bridge 101 and the input capacitor Cbus. The voltage conversion control chip 112 controls the duty cycle of the primary switch M1 coupled to the transformer T1 to control the primary-to-secondary energy conversion of the transformer T1, thereby controlling the output voltage Vout. The voltage conversion control chip 112 is powered by the auxiliary winding Lt. The power supply voltage Vcc provided by the auxiliary winding Lt is proportional to the output voltage Vout, and the proportionality coefficient is determined by the turns ratio of the auxiliary winding Lt and the secondary winding Ls, that is, Vcc:Vout=N(Lt):N(Ls), where N represents the number of turns of the winding. It should be understood that in order to maintain the normal operation of the voltage conversion control chip 112, the power supply voltage Vcc has a minimum voltage limit, usually around 10V. When the output voltage Vout has a larger range, for example, from 3.3V to 20V, in order to make the power supply voltage Vcc still reach the minimum voltage requirement when the output voltage Vout = 3.3V, the turns ratio of the auxiliary winding Lt to the secondary winding Ls must be at least 3:1. When the turns ratio of the auxiliary winding Lt to the secondary winding Ls is 3:1, when the output voltage Vout = 20V, the power supply voltage Vcc is 60V. This results in a relatively high withstand voltage requirement for the voltage conversion control chip 112, and the power loss will also be very large. Summary of the invention

[0003] In order to solve the above technical problems, an embodiment of the present invention provides a power supply voltage control circuit, which uses the input power supply to charge the power supply capacitor when the input voltage of the voltage conversion circuit is low. At the same time, the power supply voltage control circuit and the auxiliary winding can be combined, and when the output voltage of the voltage conversion circuit is low, the power supply capacitor is charged by the power supply voltage control circuit and the input power supply, and when the output voltage is high, the power supply capacitor is charged by the auxiliary winding, thereby avoiding the problem of high voltage resistance requirements and large circuit loss of the voltage conversion control chip caused by the wide output voltage range of the voltage conversion circuit.

[0004] According to an embodiment of the present invention, a power supply voltage control circuit is proposed, comprising: a charging control circuit, which outputs a charging control signal based on an input voltage and a power supply voltage; and a charging current source, which is coupled between the input voltage and the power supply capacitor and has a control end for receiving the charging control signal and providing a charging current under the control of the charging control signal; wherein, when the input voltage drops to an input voltage reference, the charging control signal controls the charging current source to provide a charging current, and when the power supply voltage rises to a charging stop reference, the charging control signal controls the charging current source to stop providing a charging current.

[0005] According to an embodiment of the present invention, a power supply circuit is also proposed, including the aforementioned power supply voltage control circuit, and also including a power supply capacitor having a charging end coupled to a charging current source and a grounding end coupled to a reference ground.

[0006] According to an embodiment of the present invention, a voltage conversion circuit is also proposed, including the aforementioned power supply circuit, and also including: a transformer having a primary winding and a secondary winding; a primary switch coupled to the primary winding; and a voltage conversion control chip, outputting a primary control signal to the control end of the primary switch to control the on and off of the primary switch.

[0007] In some embodiments, the transformer of the voltage conversion circuit further includes an auxiliary winding, and the auxiliary winding is coupled to the charging end of the power capacitor through a diode.

[0008] According to an embodiment of the present invention, a power supply capacitor charging control method is also proposed, including: when the input voltage is less than the input voltage reference, controlling the charging current source to provide current to the power supply capacitor; when the power supply voltage is greater than the charging stop reference, controlling the charging current source to stop providing current; and when the power supply voltage is greater than the charging stop reference, adjusting the input voltage reference based on the input voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to better understand the present invention, the present invention will be described in detail according to the following drawings:

[0010] Figure 1 An existing voltage conversion circuit 10 for a fast charging power source is shown;

[0011] Figure 2 FIG. 2 shows a schematic diagram of a circuit structure of a voltage conversion circuit 20 according to an embodiment of the present invention;

[0012] Figure 3 A schematic diagram showing waveforms of various signals of the charging control circuit 23 according to an embodiment of the present invention; and

[0013] Figure 4 FIG. 4 is a schematic diagram showing a circuit structure of an input voltage reference adjustment circuit 40 according to an embodiment of the present invention;

[0014] Figure 5 FIG. 5 is a schematic diagram showing a circuit structure of an input voltage reference adjustment circuit 50 according to an embodiment of the present invention;

[0015] Figure 6 FIG. 4 shows a circuit structure diagram of a voltage conversion circuit 60 according to an embodiment of the present invention;

[0016] Figure 7 FIG. 4 is a schematic diagram showing a circuit structure of a voltage conversion circuit 70 according to an embodiment of the present invention;

[0017] Figure 8 FIG. 8 is a schematic diagram showing a circuit structure of a voltage conversion circuit 80 according to an embodiment of the present invention;

[0018] Fig. 9 FIG. 4 shows a circuit structure diagram of a voltage conversion circuit 90 according to an embodiment of the present invention;

[0019] Fig.10 FIG. 1 shows a circuit structure diagram of a voltage conversion circuit 100 according to an embodiment of the present invention;

[0020] Fig.11 FIG. 1 is a flow chart of a power capacitor charging control method 110 according to an embodiment of the present invention. DETAILED DESCRIPTION

[0021] The specific embodiments of the present invention will be described in detail below. It should be noted that the embodiments described herein are only for illustration and are not intended to limit the present invention. In the following description, a large number of specific details are set forth in order to provide a thorough understanding of the present invention. However, it is obvious to those of ordinary skill in the art that these specific details do not have to be used to implement the present invention. In other examples, in order to avoid confusing the present invention, known circuits, materials or methods are not specifically described.

[0022] Throughout the specification, references to "one embodiment," "an embodiment," "an example," or "an example" mean that a particular feature, structure, or characteristic described in conjunction with the embodiment or example is included in at least one embodiment of the present invention. Therefore, the phrases "in one embodiment," "in an embodiment," "an example," or "an example" appearing in various places throughout the specification do not necessarily all refer to the same embodiment or example. In addition, particular features, structures, or characteristics may be combined in one or more embodiments or examples in any appropriate combination and / or sub-combination. In addition, it will be appreciated by those of ordinary skill in the art that the figures provided herein are for illustrative purposes and that the figures are not necessarily drawn to scale. The same reference numerals indicate the same elements. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0023] Figure 2 The circuit structure schematic diagram of the voltage conversion circuit 20 according to an embodiment of the present invention is shown. The voltage conversion circuit 20 includes rectifier circuits 24 and 25, a transformer T1, a primary switch M1, a secondary switch Ds, a voltage conversion control chip 21 and a power supply voltage control circuit 22. The rectifier circuit 24 rectifies the AC voltage output by the AC power supply Vac into a DC voltage Vbus and provides it to the transformer T1. The transformer T1 has a primary winding Lp and a secondary winding Ls. The primary switch M1 is coupled to the primary winding Lp. The secondary switch Ds is coupled to the secondary winding Ls. The voltage conversion control chip 21 outputs a primary control signal G1 to the control end of the primary switch M1 to control the on and off of the primary switch M1. Specifically, when the primary switch M1 is turned on, the secondary switch Ds is turned off, the current flowing through the primary winding Lp increases, the primary winding Lp stores energy, and the output capacitor Co supplies power to the load. When the primary switch M1 is turned off, the secondary switch Ds is turned on, and the energy of the primary winding Lp is transferred to the secondary winding Ls. The secondary winding Ls supplies power to the load and charges the output capacitor Co to maintain the output voltage Vout. The rectifier circuit 25 rectifies the AC voltage output by the AC power source Vac into an input voltage Vin with a half-sine wave waveform. The power supply voltage control circuit 22 receives the input voltage Vin and outputs a power supply voltage Vcc for powering the voltage conversion control chip 21.

[0024] In some embodiments, the rectifier circuit 24 includes a rectifier bridge and an input capacitor, and the rectifier circuit 25 includes a rectifier bridge.

[0025] like Figure 2 As shown, the power supply voltage control circuit 22 includes a power supply capacitor Cvcc, a charging current source Is and a charging control circuit 23. The power supply capacitor Cvcc has a charging terminal coupled to the charging current source Is, and has a ground terminal coupled to the reference ground PGND. The charging control circuit 23 outputs a charging control signal Gc to the charging current source Is, controls the charging current source Is to charge the power supply capacitor Cvcc, forms a power supply voltage Vcc thereon, and supplies power to the voltage conversion control chip 21.

[0026] exist Figure 2In the embodiment, the charging control circuit 23 includes an input voltage comparison circuit 231, a power supply voltage comparison circuit 232, a charging control logic circuit 233 and an input voltage reference adjustment circuit 234. The input voltage comparison circuit 231 receives an input voltage Vin and an input voltage reference Vin_ref, and provides an input voltage charging enable signal Vin_en. The power supply voltage comparison circuit 232 receives a power supply voltage Vcc, a charging voltage reference Vccs and a charging stop reference Vccd, and outputs a power supply voltage charging enable signal Vcc_en and a charging stop signal Rd. The charging control logic circuit 233 receives an input voltage charging enable signal Vin_en, a power supply voltage charging enable signal Vcc_en and a charging stop signal Rd, and outputs a charging control signal Gc to control the charging current source Is. Figure 2 In an embodiment, the charging control logic circuit 233 includes an RS trigger FF1 and an AND gate circuit A1. The AND gate circuit A1 outputs a charging set signal Sc based on the input voltage charging enable signal Vin_en and the power supply voltage charging enable signal Vcc_en. The set end of the RS trigger FF1 receives the charging set signal Sc, the reset end receives the charging stop signal Rd, and the output end outputs the charging control signal Gc. When the input voltage Vin is lower than the input voltage reference Vin_ref and the power supply voltage Vcc is lower than the charging voltage reference Vccs, the charging control signal Gc controls the charging current source Is to charge the power supply capacitor Cvcc. When the power supply voltage Vcc reaches the charging stop reference Vccd, the charging control signal Gc controls the charging current source Is to stop charging the power supply capacitor Cvcc. The input voltage reference adjustment circuit 234 receives the charging stop signal Rd and the input voltage Vin, and when the charging stop signal Rd indicates that the power supply capacitor Cvcc is stopped, the input voltage reference Vin_ref is updated according to the input voltage Vin.

[0027] exist Figure 2 In the circuit, the charging stop signal Rd is provided to the input voltage reference adjustment circuit 234 to indicate the charging stop time. It should be understood by those skilled in the art that any signal that can be used to indicate charging stop, that is, the charging current source Is stops providing current, can be provided to the input voltage reference adjustment circuit 234 instead of the charging stop signal Rd, such as the charging control signal Gc.

[0028] The input voltage comparison circuit 231 receives an input voltage reference Vin_ref and an input voltage Vin. When the input voltage Vin is less than the input voltage reference Vin_ref, the input voltage charging enable signal Vin_en provided by the input voltage comparison circuit 231 is valid. The input voltage comparison circuit 231 can be a comparator. It should be understood that any circuit that can generate a valid signal to represent that the input voltage Vin drops to the input voltage reference Vin_ref can be used as an input voltage comparison circuit.

[0029] The power supply voltage comparison circuit 232 can be a hysteresis comparator or can include two separate comparators. In one embodiment, the charging voltage reference Vccs is less than the charging stop reference Vccd. When the power supply voltage Vcc is lower than the charging voltage reference Vccs, the power supply voltage charging enable signal Vcc_en is valid and the charging stop signal Rd is invalid. When the power supply voltage Vcc is higher than the charging stop reference Vccd, the power supply voltage charging enable signal Vcc_en is invalid and the charging stop signal Rd is valid. It should be understood that any circuit that can generate a valid signal to indicate that the power supply voltage Vcc drops to the charging voltage reference Vccs or rises to the charging stop reference Vccd can be used as a power supply voltage comparison circuit.

[0030] The valid state of a signal may be a level state, such as a high level, and the invalid state may be another level state, such as a low level. It may also be just the opposite, that is, a low level characterizes the valid state of a signal, and a high level characterizes the invalid state of a signal. In the embodiment of the present invention, not only the level state of a signal can characterize the valid or invalid state of a signal, but also the rising edge, falling edge or other features of a signal can be used to characterize the valid or invalid state of a signal.

[0031] Figure 3 FIG. 2 is a schematic diagram showing waveforms of various signals of the charging control circuit 23 according to an embodiment of the present invention. Figure 2 and Figure 3 The working principle of the charging control circuit 23 will be described below.

[0032] like Figure 3As shown, the input voltage Vin has a sine half-wave waveform after the AC voltage is rectified. At time t1, the input voltage Vin drops to the input voltage reference Vin_ref. The input voltage charging enable signal Vin_en output by the input voltage comparison circuit 231 is at a high level. At this time, the power supply voltage Vcc is lower than the charging voltage reference Vccs, and the power supply voltage charging enable signal Vcc_en output by the power supply voltage comparison circuit 232 is also at a high level. Correspondingly, the AND gate A1 outputs a high-level charging set signal Sc. The RS trigger FF1 is triggered by the rising edge of the charging set signal Sc, and the output charging control signal Gc controls the charging current source Is to provide current. After the power supply capacitor Cvcc is charged, the power supply voltage Vcc rises. At time t2, the power supply voltage Vcc rises to the charging stop reference Vccd, the charging stop signal Rd jumps to a high level, resets the RS trigger FF1, and the charging control signal Gc controls the charging current source Is to stop providing current. After that, the power supply voltage Vcc gradually decreases during the process of powering the voltage conversion control chip 21. At the same time, after the charging current source Is stops charging, because the input voltage Vin is less than the input voltage reference Vin_ref, the input voltage reference adjustment circuit 234 then updates the input voltage reference Vin_ref and reduces the value of the input voltage reference Vin_ref. At time t3, the input voltage Vin rises to the input voltage reference Vin_ref, and the input voltage charging enable signal Vin_en flips to a low level. At time t4, the power supply voltage Vcc drops to the charging voltage reference Vccs, and the power supply voltage charging enable signal Vcc_en flips to a high level. However, since the input voltage charging enable signal Vin_en is at a low level at this time, the RS trigger FF1 cannot be triggered, and the charging current source Is does not provide current to charge the power supply capacitor Cvcc. Until the moment t5, the input voltage Vin drops to the input voltage reference Vin_ref again, and the input voltage charging enable signal Vin_en flips to a high level. After being ANDed with the power supply voltage charging enable signal Vcc_en, the AND gate circuit A1 outputs the charging set signal Sc to trigger the RS trigger FF1, and the charging control signal Gc controls the charging current source Is to provide current to charge the power supply capacitor Cvcc, and the power supply voltage Vcc rises again. At the moment t6, the power supply voltage Vcc rises to the charging stop reference Vccd, the charging stop signal Rd jumps to a high level, and the RS trigger FF1 is reset. The charging control signal Gc controls the charging current source Is to stop providing current. After a certain delay, the input voltage reference Vin_ref is updated again, that is, it is reduced again. At the moment t7, the input voltage Vin rises to the input voltage reference Vin_ref, and the input voltage charging enable signal Vin_en flips to a low level. At the moment t8, the power supply voltage Vcc drops to the charging voltage reference Vccs, and the power supply voltage charging enable signal Vcc_en flips to a high level.However, since the input voltage charging enable signal Vin_en is at a low level at this time, the RS trigger FF1 cannot be triggered, and the charging current source Is does not provide current to charge the power supply capacitor Cvcc. Until time t9, the input voltage Vin drops to the input voltage reference Vin_ref, and a new charging cycle begins again. At time t10, the input voltage Vin rises to the input voltage reference Vin_ref, and the input voltage charging enable signal Vin_en flips to a low level. At time t11, the power supply voltage Vcc rises to the charging stop reference Vccd, the power supply voltage charging enable signal Vcc_en flips to a low level, the charging stop signal Rd flips to a high level, the RS trigger FF1 is reset, and the charging control signal Gc controls the charging current source Is to stop providing current. Since at time t11, the input voltage Vin is greater than the input voltage reference Vin_ref, after time t11, the input voltage reference Vin_ref is updated again, and the value of the input voltage reference Vin_ref increases. This cycle repeats itself, and by adjusting the value of the input voltage reference Vin_ref, the charging time of the power capacitor Cvcc is controlled to the bottom of the input voltage Vin, and tends to be symmetrical based on the zero voltage point of the input voltage Vin, thereby reducing the power loss of the system.

[0033] Figure 4 FIG. 4 is a schematic diagram showing a circuit structure of an input voltage reference adjustment circuit 40 according to an embodiment of the present invention. Figure 4As shown, the input voltage reference adjustment circuit 40 receives the input voltage Vin and the charge stop signal Rd, and provides the input voltage reference Vin_ref based on the input voltage Vin and the charge stop signal Rd. The input voltage reference adjustment circuit 40 includes a reference comparison circuit 401, a reference adjustment logic circuit 402 and a reference circuit 403. The reference comparison circuit 401 receives the input voltage Vin and the input voltage reference Vin_ref, and outputs a voltage adjustment control signal Uc. The reference adjustment logic circuit 402 receives the voltage adjustment control signal Uc and the charge stop signal Rd, and outputs a reference up-adjustment signal P1 and a reference down-adjustment signal P2. The reference adjustment logic circuit 402 includes AND gate circuits A2 and A3, and pulse circuits 4021 and 4022. The AND gate circuit A2 receives the voltage adjustment control signal Uc and the charge stop signal Rd, and outputs the result of the AND of the two. The pulse circuit 4021 provides the reference up-adjustment signal P1 according to the output of the AND gate circuit A2. The AND gate circuit A3 receives the inverted signal of the voltage adjustment control signal Uc and the charging stop signal Rd, and outputs the result of the AND of the two. The pulse circuit 4022 provides the reference down-adjustment signal P2 according to the output of the AND gate circuit A3. In one embodiment, the reference up-adjustment signal P1 and the reference down-adjustment signal P2 are both pulse signals. In one embodiment, when the voltage adjustment control signal Uc is at a logic high level, that is, the input voltage Vin is greater than the input voltage reference Vin_ref, and at the same time the charging stop signal Rd is at a logic high level, that is, the power supply capacitor Cvcc stops being charged, the reference up-adjustment signal P1 has a pulse control reference circuit 403 to increase the input voltage reference Vin_ref; when the voltage adjustment control signal Uc is at a logic low level, that is, the input voltage Vin is less than the input voltage reference Vin_ref, and at the same time the charging stop signal Rd is at a logic high level, that is, the power supply capacitor Cvcc stops being charged, the reference down-adjustment signal P2 has a pulse control reference circuit 403 to lower the input voltage reference Vin_ref. Figure 5 In the embodiment, the reference circuit 403 is an analog reference circuit, including a current source Ic, a current source Id and a capacitor Cref. The reference up-adjustment signal P1 controls the current source Ic, and the reference down-adjustment signal P2 controls the current source Id. When the input voltage Vin is greater than the input voltage reference Vin_ref, and the power supply capacitor Cvcc stops being charged, the reference up-adjustment signal P1 controls the current source Ic to charge the capacitor Cref, and the input voltage reference Vin_ref rises. When the input voltage Vin is less than the input voltage reference Vin_ref, and the power supply capacitor Cvcc stops being charged, the reference down-adjustment signal P2 controls the current source Id to discharge the capacitor Cref, and the input voltage reference Vin_ref decreases.

[0034] Figure 5FIG. 4 is a schematic diagram showing a circuit structure of an input voltage reference adjustment circuit 50 according to an embodiment of the present invention. Figure 5 As shown, the input voltage reference adjustment circuit 50 receives the input voltage Vin and the charging stop signal Rd, and outputs the input voltage reference Vin_ref based on the input voltage Vin and the charging stop signal Rd. The input voltage reference adjustment circuit 50 includes a reference comparison circuit 401, a reference adjustment logic circuit 402 and a reference circuit 503. Figure 5 In an embodiment, the reference circuit 503 may be a digital reference circuit, which receives a reference up-adjustment signal P1 and a reference down-adjustment signal P2, and adjusts the input voltage reference Vin_ref up based on the reference up-adjustment signal P1, and adjusts the input voltage reference Vin_ref down based on the reference down-adjustment signal P2. In an embodiment, each time the input voltage reference Vin_ref is adjusted up, a fixed up-adjustment step value is increased, and each time it is adjusted down, a fixed down-adjustment step value is reduced. The up-adjustment step value and the down-adjustment step value may be the same or different.

[0035] Figure 6 FIG. 6 is a schematic diagram of a circuit structure of a voltage conversion circuit 60 according to an embodiment of the present invention. In some applications, due to the influence of the subsequent circuit, for example, the coupling point between the voltage conversion control chip 21 and the input voltage Vin may have a high impedance, and the waveform of the input voltage Vin cannot be as Figure 3 The waveform shown in FIG. 1 is a complete steamed bun waveform, but it is possible that after filtering, the waveform at the bottom of the valley cannot be displayed. In order to prevent the power supply voltage control circuit 22 from not working properly in this case, the input voltage Vin needs to be processed so that it appears as shown in FIG. Figure 3 The steamed bun waveform shown. Figure 6 In the embodiment, the voltage conversion circuit 60 includes a power supply voltage control circuit 62. The power supply voltage control circuit 62 includes a power supply capacitor Cvcc, a charging current source Is, a charging control circuit 23, a leakage current source Il and a leakage control circuit 26. The leakage control circuit 26 receives the power supply voltage Vcc, and compares the power supply voltage Vcc with a leakage charging reference Lk1 and a leakage stop reference Lk2. When the power supply voltage Vcc is less than the leakage charging reference Lk1, the leakage control circuit 26 outputs a leakage control signal Lct to control the leakage current source Il to charge the power supply capacitor Cvcc. When the power supply voltage Vcc is greater than the leakage stop reference Lk2, the leakage control circuit 26 outputs a leakage control signal Lct to control the leakage current source Il to stop providing current. Figure 6In the embodiment, the leakage control circuit 26 includes a leakage comparison circuit 261 and an RS trigger FF2. The leakage comparison circuit 261 compares the power supply voltage Vcc with the leakage charging reference Lk1 and the leakage stop reference Lk2, and provides a leakage set signal Ls and a leakage reset signal Lr according to the comparison result. The set terminal of the RS trigger FF2 receives the leakage set signal Ls, the reset terminal receives the leakage reset signal Lr, and the output terminal provides a leakage control signal Lct. In one embodiment, the leakage charging reference Lk1 is less than the leakage stop reference Lk2.

[0036] In some embodiments, the leakage comparison circuit 261 may be a hysteresis comparator. In other embodiments, the leakage comparison circuit 261 may also be two independent comparators.

[0037] exist Figure 6 In the embodiment, a small current is pulled down at the endpoint where the input voltage Vin is located through the leakage current source Il, thereby eliminating the influence of the internal high resistance and large parasitic capacitance of the voltage conversion control chip 21 on the input voltage Vin through the power supply voltage Vcc, so that the input voltage Vin maintains a steamed bun waveform, thereby allowing the power supply voltage control circuit 22 to operate normally.

[0038] Figure 7 FIG. 2 shows a schematic diagram of a circuit structure of a voltage conversion circuit 70 according to an embodiment of the present invention. Figure 6 Compared with the embodiment, Figure 7 The power supply voltage control circuit 72 in the embodiment includes a leakage control circuit 27, which receives the charging stop signal Rd and the power supply voltage charging enable signal Vcc_en, and outputs a leakage control signal Lct to control the leakage current source Il. Figure 7 In the embodiment, the leakage control circuit 27 includes an RS trigger FF3. The set end of the RS trigger FF3 receives the power supply voltage charging enable signal Vcc_en, the reset end receives the charging stop signal Rd, and the output end provides the leakage control signal Lct. When the power supply voltage charging enable signal Vcc_en indicates that the power supply voltage Vcc drops to the charging voltage reference Vccs, the RS trigger FF3 is set, and the leakage control signal Lct controls the leakage current source I1 to provide current to charge the power supply capacitor Cvcc. When the charging stop signal Rd indicates that the power supply voltage Vcc rises to the charging stop reference Vccd, the leakage control signal Lct controls the leakage current source I1 to stop providing current.

[0039] In some applications, the circuit powered by the power supply voltage Vcc, such as the voltage conversion control chip 21, consumes a large amount of power, resulting in the power supply capacitor Cvcc needing to be charged in each cycle of the input voltage Vin to maintain the power supply voltage Vcc. Figure 2Compared with the embodiment, the power voltage charging enable signal Vcc_en does not need to be added to the charging loop of the power capacitor Cvcc.

[0040] Figure 8 The circuit structure diagram of the voltage conversion circuit 80 according to an embodiment of the present invention is shown. The voltage conversion circuit 80 includes rectifier circuits 24 and 25, a transformer T1, a primary switch M1, a secondary switch Ds, a voltage conversion control chip 21 and a power supply voltage control circuit 82. The power supply voltage control circuit 82 includes a power supply capacitor Cvcc, a charging current source Is and a charging control circuit 28. The charging control circuit 28 outputs a charging control signal Gc to the charging current source Is, controls the charging current source Is to charge the power supply capacitor Cvcc, forms a power supply voltage Vcc thereon, and supplies power to the voltage conversion control chip 21.

[0041] exist Figure 8 In the embodiment, the charging control circuit 28 includes an input voltage comparison circuit 231, a power supply voltage comparison circuit 282, a charging control logic circuit 283 and an input voltage reference adjustment circuit 234. The structure and working principle of the input voltage comparison circuit 231 and the input voltage reference adjustment circuit 234 have been described in detail above and will not be repeated here. The power supply voltage comparison circuit 282 receives the power supply voltage Vcc and the charging stop reference Vccd, and outputs a charging stop signal Rd. The charging control logic circuit 283 receives the input voltage charging enable signal Vin_en and the charging stop signal Rd, and outputs a charging control signal Gc to control the charging current source Is. Figure 8 In an embodiment, the charging control logic circuit 233 includes an RS trigger FF1. The set end of the RS trigger FF1 receives the input voltage charging enable signal Vin_en, the reset end receives the charging stop signal Rd, and the output end outputs the charging control signal Gc. When the input voltage Vin is lower than the input voltage reference Vin_ref, the charging control signal Gc controls the charging current source Is to charge the power supply capacitor Cvcc. When the power supply voltage Vcc reaches the charging stop reference Vccd, the charging control signal Gc controls the charging current source Is to stop charging the power supply capacitor Cvcc. Figure 2 The difference in the embodiment is that in Figure 8 In the embodiment, the charging control signal Gc controls the charging current source Is to provide a current triggered by the input voltage charging enable signal Vin_en, rather than being triggered by both the input voltage charging enable signal Vin_en and the power supply voltage charging enable signal Vcc_en.

[0042] The working principle of the charging control circuit 28 is similar to that of the charging control circuit 23 and will not be described in detail here.

[0043] Fig. 9A circuit structure schematic diagram of a voltage conversion circuit 90 according to an embodiment of the present invention is shown. The voltage conversion circuit 90 includes: a transformer T1, a primary switch M1, a secondary switch Ds, a power supply control chip 21, and a power supply voltage control circuit 22. The transformer T1 has a primary winding Lp, a secondary winding Ls, and an auxiliary winding Lt. The primary switch M1 is coupled to the primary winding Lp. The secondary switch Ds is coupled to the secondary winding Ls. The power supply control chip 21 outputs a primary control signal G1 to the control end of the primary switch M1 to control the on and off of the primary switch M1. The power supply control chip 21 is powered by a power supply voltage Vcc. The power supply voltage Vcc is formed by charging the power supply capacitor Cvcc by the charging current source Is. The power supply voltage control circuit 22 includes a charging control circuit 23, a current source Is, and a power supply capacitor Cvcc. The charging control circuit 23 receives an input voltage Vin and a power supply voltage Vcc, and when the input voltage Vin is less than an input voltage reference Vin_ref and the power supply voltage Vcc is less than a charging voltage reference Vccs, the charging control circuit 23 outputs a charging control signal Gc to control the charging current source Is to charge the power supply capacitor Cvcc.

[0044] exist Fig. 9 In the embodiment, the auxiliary winding Lt of the transformer T1 is coupled to the charging end of the power supply capacitor Cvcc through a diode Dt. When the voltage provided by the auxiliary winding Lt is higher than the voltage that can be reached by the charging control circuit 23 to control the charging current source Is to charge the power supply capacitor Cvcc, that is, the charging stop reference Vccd, the auxiliary winding Lt charges the power supply capacitor Cvcc. After understanding the principle of the present invention, those skilled in the art can set a reasonable value of the charging stop reference Vccd and the turns ratio between the auxiliary winding Lt and the secondary winding Ls according to application requirements, so that when the output voltage Vout is low, the charging control circuit 23 can be used to control the charging current source Is to charge the power supply capacitor Cvcc to maintain the power supply of the voltage conversion control chip 21, and when the output voltage Vout is high, the auxiliary winding Lt is used to charge the power supply capacitor Cvcc to maintain the power supply voltage Vcc.

[0045] When the output voltage Vout is low, the charging control circuit 23 is used to control the charging of the power supply capacitor Cvcc. It is not necessary to maintain a high turns ratio between the auxiliary winding Lt and the secondary winding Ls. The turns ratio between the two can be as low as 1:1, or even 1:2, or lower. When the turns ratio between the auxiliary winding Lt and the secondary winding Ls is 1:2, even if the output voltage Vout reaches 20V, the power supply voltage Vcc is only 10V. In other words, when the turns ratio between the auxiliary winding Lt and the secondary winding Ls is relatively low, even if the output voltage Vout is relatively high, the voltage provided by the auxiliary winding Lt will not be too high, causing the voltage conversion control chip 21 to need to withstand a higher voltage, and the circuit loss caused by the high voltage is also reduced.

[0046] It should be understood that Fig. 9 In the embodiment, the power supply voltage control circuit 22 can be replaced by a power supply voltage control circuit 82. The operation of the power supply voltage control circuit 82 is as described above and will not be described in detail here.

[0047] Fig.10 FIG. 1 is a schematic diagram showing a circuit structure of a voltage conversion circuit 100 according to an embodiment of the present invention. Fig. 9 Compared with the embodiment, Fig.10 In the embodiment, the voltage conversion circuit 100 includes a power supply voltage control circuit 62. As described above, when the power supply voltage Vcc is lower than the leakage charging reference Lk1, the leakage current source I1 charges the power supply capacitor Cvcc, and when the power supply voltage Vcc is higher than the leakage stop reference Lk2, the leakage current source I1 stops providing current.

[0048] It should be understood that Fig.10 In the embodiment, the power supply voltage control circuit 62 can be replaced by a power supply voltage control circuit 72. The operation of the power supply voltage control circuit 72 is as described above and will not be described in detail here.

[0049] It should be understood that the logic circuits in the embodiments of the present invention, such as the charging control logic circuit 233, the AND gate circuit and the trigger, are only used to illustrate the principles of the invention. When the polarity of the input and output signals of the logic circuit changes, the logic circuit will change accordingly.

[0050] The voltage conversion circuits 20, 60, 70, 80, 90 and 100 in the embodiments of the present invention have a Flyback topology. It should be understood that the power supply voltage control circuit in the embodiments of the present invention can be used for any voltage conversion circuit with other topologies, such as Buck topology, Boost topology, etc.

[0051] In some embodiments, part or all of the charging control circuit 23, the leakage control circuit 26, the charging control circuit 27, the charging control circuit 28, the charging current source Is, and the leakage current source I1 are integrated into the voltage conversion control chip 21. In one embodiment, the charging current source Is includes a switch. The control end of the switch receives the charging control signal Gc.

[0052] Fig.11 FIG. 1 is a flow chart of a power capacitor charging control method 110 according to an embodiment of the present invention. The power capacitor charging control method 110 can be used to control a charging current source to charge a power capacitor to establish a power supply voltage to supply power to a chip. The charging current source is coupled between an input voltage and a power capacitor. The chip can be Figure 2 , 6-9 shows the voltage conversion control chip 21. The input voltage has a steamed wave, that is, a half-sine wave waveform after rectification of an AC voltage with a sine waveform. The power capacitor charging control method 110 includes: step 111, when the input voltage is less than the input voltage reference, controlling the charging current source to provide current to the power capacitor; step 112, when the power voltage is greater than the charging stop reference, controlling the charging current source to stop providing current; and step 113, when the power voltage is greater than the charging stop reference, adjusting the input voltage reference based on the input voltage.

[0053] There is no order requirement for the implementation of the steps of the power capacitor charging control method 110 .

[0054] In one embodiment, step 113, when the power supply voltage is greater than the charge stop reference, adjusting the input voltage reference based on the input voltage includes: when the input voltage is greater than the input voltage reference, increasing the input voltage reference by an increasing step value; and when the input voltage is less than the input voltage reference, decreasing the input voltage reference by a decreasing step value. The increasing step value and the decreasing step value may be the same or different.

[0055] In one embodiment, there is also a leakage current source between the input voltage and the power supply capacitor, and the power supply capacitor charging control method 110 also includes: step 114, when the power supply voltage is less than the leakage charging reference, controlling the leakage current source to charge the power supply capacitor; and step 115, when the power supply voltage is greater than the leakage stop reference, controlling the leakage current source to stop providing current.

[0056] In one embodiment, the drain stop reference is greater than the drain charge reference.

[0057] In one embodiment, in step 111, the prerequisite for controlling the charging current source to provide current to the power capacitor further includes that the power supply voltage is less than a charging voltage reference.

[0058] In one embodiment, the value of the leakage stop reference is the same as the value of the charge stop reference, and the value of the leakage charge reference is the same as the value of the charge voltage reference.

[0059] It should be understood that the circuit and working process provided in the present invention are only for illustrative purposes, and any circuit that can realize the function and working process of the circuit of the present invention does not deviate from the spirit or essence of the present invention.

[0060] Although the present invention has been described with reference to several typical embodiments, it should be understood that the terms used are illustrative and exemplary, rather than restrictive. Since the present invention can be embodied in a variety of forms without departing from the spirit or essence of the invention, it should be understood that the above embodiments are not limited to any of the foregoing details, but should be interpreted broadly within the spirit and scope defined by the appended claims, so all changes and modifications falling within the scope of the claims or their equivalents should be covered by the appended claims.

Claims

1. A power supply voltage control circuit, comprising: A charging control circuit outputs a charging control signal based on an input voltage and a power supply voltage; as well as A charging current source is coupled between the input voltage and the power supply capacitor, has a control terminal for receiving a charging control signal, and provides a charging current under the control of the charging control signal; When the input voltage drops to an input voltage reference, the charging control signal controls the charging current source to provide a charging current. When the power supply voltage rises to a charging stop reference, the charging control signal controls the charging current source to stop providing a charging current.

2. The power supply voltage control circuit according to claim 1, wherein the charging control circuit comprises: An input voltage comparison circuit provides an input voltage charging enable signal based on the input voltage and an input voltage reference; a power supply voltage comparison circuit, providing a charge stop signal based on the power supply voltage and a charge stop reference; as well as The charging control logic circuit outputs a charging control signal to control the charging current source based on the input voltage charging enable signal and the charging stop signal.

3. The power supply voltage control circuit as claimed in claim 1, wherein when the input voltage decreases to an input voltage reference and the power supply voltage drops to a charging threshold, the charging control signal controls the charging current source to provide a charging current, and when the power supply voltage rises to a charging stop reference, the charging control signal controls the charging current source to stop providing a charging current.

4. The power supply voltage control circuit as claimed in claim 3, wherein the charging control circuit comprises: An input voltage comparison circuit provides an input voltage charging enable signal based on the input voltage and an input voltage reference; A power supply voltage comparison circuit, based on the power supply voltage, the charging voltage reference and the charging stop reference, provides a power supply voltage charging enable signal and a charging stop signal; as well as The charging control logic circuit outputs a charging control signal to control the charging current source based on an input voltage charging enable signal, a power supply voltage charging enable signal and a charging stop signal.

5. The power supply voltage control circuit according to claim 1, wherein: The charging control circuit comprises: The input voltage reference adjustment circuit updates the input voltage reference based on the input voltage after the charging current source stops providing the charging current.

6. The power supply voltage control circuit according to claim 5, wherein: The input voltage reference adjustment circuit comprises: A reference comparison circuit outputs a voltage adjustment control signal based on an input voltage and an input voltage reference; a reference adjustment logic circuit, which outputs a reference up adjustment signal and a reference down adjustment signal based on the voltage adjustment control signal and the charge stop signal; and The reference circuit provides an input voltage reference based on a reference up signal and a reference down signal.

7. The power supply voltage control circuit according to claim 6, wherein: The reference circuit comprises: A reference capacitor, wherein the voltage across the reference capacitor is an input voltage reference; an up-regulation current source to charge a reference capacitor based on a reference up-regulation signal; and The step-down current source discharges the reference capacitor based on the reference step-down signal.

8. The power supply voltage control circuit according to claim 6, wherein: The reference circuit comprises: A digital reference circuit receives a reference up signal and a reference down signal and provides an input voltage reference; The digital reference circuit increases the input voltage reference by a fixed increase step value based on the reference increase signal, and decreases the input voltage reference by a fixed decrease step value based on the reference decrease signal.

9. The power supply voltage control circuit as claimed in claim 1, further comprising: A leakage control circuit outputs a leakage control signal based on a power supply voltage, a leakage charge reference, and a leakage stop reference; as well as A leakage current source is connected in parallel with the charging current source, has a control terminal for receiving a leakage control signal, and provides a leakage current to the power supply capacitor under the control of the leakage control signal; Wherein, when the power supply voltage is less than the leakage charging reference, the leakage control signal controls the leakage current source to provide leakage current; When the power supply voltage is greater than the leakage stop reference, the leakage control signal controls the leakage current source to stop providing the leakage current.

10. The power supply voltage control circuit according to claim 9, wherein: The value of the leakage voltage reference is the same as the value of the charge voltage reference, and the value of the leakage stop reference is the same as the value of the charge stop reference.

11. A power supply circuit, comprising the power supply voltage control circuit as claimed in any one of claims 1 to 10, and further comprising a power supply capacitor having a charging terminal coupled to a charging current source and a grounding terminal coupled to a reference ground.

12. The power supply circuit according to claim 11, wherein: The charging end of the power capacitor is also coupled to the auxiliary winding of the voltage conversion circuit.

13. The power supply circuit according to claim 11, wherein: The charging current source includes a switch.

14. A voltage conversion circuit, comprising the power supply circuit according to claim 11, further comprising: A transformer having a primary winding and a secondary winding; A primary switch coupled to the primary winding; as well as The voltage conversion control chip outputs a primary control signal to the control end of the primary switch to control the on and off of the primary switch.

15. The voltage conversion circuit according to claim 14, wherein: The transformer further includes an auxiliary winding, and the auxiliary winding is coupled to the charging end of the power supply capacitor through a diode.

16. The voltage conversion circuit according to claim 14, wherein: The charging control circuit and the charging current source are integrated into a voltage conversion control chip.

17. A power supply capacitor charging control method, comprising: When the input voltage is less than the input voltage reference, the charging current source is controlled to provide current to the power capacitor; When the power supply voltage is greater than the charging stop reference, the charging current source is controlled to stop providing current; as well as When the power supply voltage is greater than the charge stop reference, the input voltage reference is adjusted based on the input voltage.

18. The power supply capacitor charging control method according to claim 17, wherein: When the power supply voltage is greater than the charge stop reference, adjusting the input voltage reference based on the input voltage includes: When the input voltage is greater than the input voltage reference, the input voltage reference is increased; and When the input voltage is less than the input voltage reference, the input voltage reference is adjusted downward.

19. The power supply capacitor charging control method according to claim 17, further comprising: When the power supply voltage is less than the leakage charging reference, the leakage current source is controlled to charge the power supply capacitor; as well as When the power supply voltage is greater than the leakage stop reference, the leakage current source is controlled to stop providing current.

20. The power capacitor charging control method according to any one of claims 17 to 19, wherein when the input voltage is less than an input voltage reference, in the step of controlling the charging current source to provide current to the power capacitor, the prerequisite for controlling the charging current source to provide current to the power capacitor further includes that the power voltage is less than the charging voltage reference.

21. The power supply capacitor charging control method according to claim 20, wherein: The value of the leakage stop reference is the same as the value of the charge stop reference, and the value of the leakage charge reference is the same as the value of the charge voltage reference.

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