Intelligent separation microsystem preparation method

Abstract

The invention provides an intelligent separation microsystem preparation method, which comprises the following steps of: injecting ions or irradiating laser at different depths of an adapter plate wafer to form a damaged layer in advance, and separating the wafer at the damaged layer by using an annealing or chemical method after the adapter plate process is completed. According to the invention, one wafer can be separated into three pieces for use, so that the utilization efficiency of the wafer is improved, and the production cost is reduced; as the wafer is finally divided into three parts, the miniaturization of the whole package can be realized without thinning the substrate, and the process flow is simplified. Meanwhile, thick wafers are used in the technological processes of pinboard cavity digging, TSV and the like, and technological mechanical support can be provided for the wafers without temporary bonding, so that the technological difficulty and complexity are reduced; because the two adapter plates are processed on one surface, the processes such as TSV etching, passivation layer deposition and through hole metal filling can be combined together through reasonable design. And compared with a single-chip separate processing mode, the process flow is simplified, and the process uniformity is improved.

Description

Technical Field

[0001] The invention relates to the technical field of electrical components, and in particular to a method for preparing an intelligent separation microsystem. Background Art

[0002] With the accelerated development of technologies such as the Internet, cloud computing, and artificial intelligence, electronic systems are facing the challenges of massive and diverse data and complex transmission environments. Size and power consumption have become important bottlenecks restricting the development of electronic systems. Therefore, it is urgent to change the traditional discrete stand-alone model of electronic systems and realize high-performance, small-size, intelligent, and multifunctional integration of electronic systems. Three-dimensional heterogeneous integrated microsystems use silicon-based microelectromechanical systems (MEMS) and through-silicon via (TSV) technology to integrate chips of different materials and functions on a three-dimensional spatial scale, thereby forming a multifunctional, miniaturized, and low-power electronic system.

[0003] At present, the three-dimensional heterogeneous integrated microsystem mainly adopts the three-dimensional stacking method of multi-layer silicon adapter boards. The processing method is to process each layer of silicon adapter board separately, then embed or surface mount functional chips in the adapter board, and finally realize three-dimensional stacking through wafer-level bonding or module bonding. The current processing method has the following problems:

[0004] (1) In order to ensure the overall size of the package and reduce power consumption, each layer of the silicon adapter needs to be thinned to 100-200 μm during processing. The thickness of a complete silicon wafer is 500-800 μm, and most of the silicon is removed after grinding and polishing, which reduces the utilization efficiency of the wafer;

[0005] (2) In order to provide mechanical support for the thinned wafer, it is usually necessary to develop a technical solution for ultra-thin wafer holding. Currently, the most common method is to temporarily bond the wafer to the carrier. Temporary bonding of the wafer to the carrier and cleaning of the wafer surface after separation increase the difficulty and complexity of the process;

[0006] (3) The processing of each adapter board is separate. For example, the processes such as TSV etching, passivation layer deposition and through-hole metal filling cannot be combined together, which increases the process steps and production costs. Summary of the invention

[0007] The present invention aims to solve the problems of utilization efficiency and process difficulty in microsystem preparation, and provides a method for preparing a microsystem with intelligent separation, which forms a damage layer by pre-implanting ions or irradiating lasers at different depths of the transfer plate wafer, and then performs processes such as cavity digging and TSV on the entire transfer plate wafer. After the transfer plate process is completed, the wafer is separated at the damage layer by annealing or chemical methods. This method divides the wafer into multiple parts and some processes can be completed at one time, thereby overcoming the shortcomings of low wafer utilization, complex process, and high cost in traditional microsystem processes.

[0008] The present invention provides a method for preparing a microsystem for intelligent separation, comprising the following steps:

[0009] S1. Forming a first damaged layer and a second damaged layer in a double-sided polished silicon wafer by ion implantation or laser irradiation, wherein the first damaged layer is located above the second damaged layer, and the first damaged layer and the second damaged layer divide the silicon wafer into a transfer plate A, a transfer plate B, and a transfer plate C from top to bottom;

[0010] S2, placing one side of the transfer plate A in the silicon wafer upward, and preparing a first TSV through hole, a first cavity, and a second TSV through hole located below the first cavity and between the first damaged layer in the transfer plate A;

[0011] S3, facing one side of the adapter board C in the silicon wafer upward, preparing a second cavity in the adapter board C, the number of the second cavities is at least two, preparing a third cavity on the surface of the adapter board B through a part of the second cavity, preparing a third TSV through hole in the adapter board B through another part of the second cavity, and then preparing a fourth TSV through hole in the adapter board C;

[0012] S4. Annealing or wet-etching the silicon wafer to generate bubbles or micro-nano structures in the first damaged layer and the second damaged layer to obtain independent adapter plates A, B and C, and the second cavity is a through hole; embedding a chip in the first cavity and interconnecting the chip with adapter plate A to obtain an adapter plate A component, attaching the chip on the surface of adapter plate B and interconnecting it with external signals through gold wires to obtain an adapter plate B component, and then performing wafer-level bonding, slicing, bonding with the cover layer, and interconnecting with the PCB to obtain a microsystem. A method for preparing an intelligent separation microsystem is completed.

[0013] The method for preparing a smart separation microsystem of the present invention is preferably such that in step S1, the thickness of the silicon wafer is 500 μm to 800 μm.

[0014] The distance from the first damaged layer to the upper surface of the silicon wafer is 100 μm to 200 μm, the distance from the second damaged layer to the upper surface of the silicon wafer is 200 μm to 300 μm, and the thickness of the first damaged layer and the second damaged layer are both 20 μm to 30 μm.

[0015] The method for preparing a microsystem for intelligent separation according to the present invention, as a preferred embodiment, step S2 comprises:

[0016] S21, facing one side of the transfer plate A in the silicon wafer upward, performing photolithography and etching in the transfer plate A to obtain a through hole, depositing a passivation layer on the side wall of the through hole, filling the through hole with metal, and exposing the metal by chemical mechanical polishing or metal etching to obtain a first TSV through hole;

[0017] S22, photolithography and etching are performed on the surface of the adapter plate A to obtain a first cavity, wherein the depth of the first cavity is less than the thickness of the adapter plate A; after removing the photoresist and cleaning, a passivation layer is deposited on the sidewall and bottom of the first cavity;

[0018] S23, photolithography is performed on the surface of the adapter board A, a through hole is etched at the bottom of the first cavity, a passivation layer is deposited on the sidewall of the through hole, metal is filled in the through hole, and a metal etching method is used to expose the metal at the bottom of the first cavity to obtain a second TSV through hole.

[0019] The method for preparing a smart separation microsystem described in the present invention is, as a preferred embodiment, in steps S21 and S23, the etching methods include: reactive ion etching and inductively coupled plasma etching; the first TSV through hole and the second TSV through hole are both filled with metal Cu, and the etching depth reaches the first damaged layer;

[0020] In step S22 , the method of etching to obtain the first cavity is any one of the following: RIE, ICP or wet etching, and the etching depth is half of the adapter plate A.

[0021] The method for preparing a microsystem for intelligent separation according to the present invention, as a preferred embodiment, step S3 comprises the following steps:

[0022] S31, with one side of the adapter plate C of the silicon wafer facing upward, photolithography and etching are performed in the adapter plate C to obtain a second cavity, the etching is stopped to the interface between the second damaged layer and the adapter plate B, the number of the second cavities is at least two, and cleaning is performed after removing the photoresist;

[0023] S32, performing photolithography on the surface of the adapter plate C, etching a third cavity on the surface of the adapter plate B through a window left by a part of the second cavity, wherein the depth of the third cavity is less than the thickness of the adapter plate B, removing the photoresist, and depositing a passivation layer on the sidewall and bottom of the third cavity and the sidewall of the second cavity after cleaning;

[0024] S33, photolithography is performed on the surface of the adapter C, and a through hole is etched in the adapter B through a window reserved in another part of the second cavity, and the etching stops at the first damaged layer; after removing the photoresist and cleaning, a passivation layer is deposited on the side wall of the through hole, and a metal is filled in the through hole to expose the metal at the bottom of the second cavity to obtain a third TSV through hole;

[0025] S34, photolithography is performed on the surface of the adapter board C and a through hole is etched in the adapter board C to the second damaged layer, the photoresist is removed, a passivation layer is deposited on the side wall of the through hole after cleaning, the through hole is filled with metal, and the metal Cu at the bottom of the cavity is exposed to obtain a fourth TSV through hole.

[0026] The method for preparing a smart separation microsystem described in the present invention is, as a preferred mode, when the thickness of the adapter plate C is the same as the thickness of the adapter plate B, steps S33 and S34 can be combined together to prepare the third TSV through hole and the fourth TSV through hole at the same time; the third TSV through hole and the fourth TSV through hole can be exactly the same TSV, and after filling with metal, a metal etching method is used at the same time to expose the metal.

[0027] The method for preparing a smart separation microsystem of the present invention is preferably such that in steps S31 and S32, the etching methods of the second cavity and the third cavity are RIE, ICP or wet etching, and the depth of the third cavity is one third of the thickness of the adapter plate B;

[0028] In steps S33 and S34, the through-holes are etched by RIE or ICP; metal Cu is filled in both. In step S33, metal etching is used to expose the metal Cu at the bottom of the cavity. In step S34, CMP or metal etching is used to expose the metal Cu at the bottom of the cavity.

[0029] The method for preparing a microsystem for intelligent separation according to the present invention, as a preferred embodiment, step S4 comprises the following steps:

[0030] S41, annealing or wet etching the silicon wafer to generate bubbles or micro-nano structures in the first damaged layer and the second damaged layer to obtain independent adapter plates A, B and C, and the second cavity is a through hole;

[0031] S42, embedding a chip in the first cavity of the adapter board A, and interconnecting the chip and the surface of the adapter board A through RDL to obtain an adapter board A component; mounting a chip on the surface of the adapter board B and interconnecting the chip with external signals through gold wire to obtain an adapter board B component; performing wafer-level bonding on the adapter board A component, the adapter board B component, and the adapter board C, and performing heterogeneous integration and signal interconnection to obtain a hybrid module;

[0032] S43, cutting the hybrid module into bare chips, bonding the adapter board C in the bare chip to the cover layer, planting balls on the bottom of the adapter board A component in the bare chip to obtain BGA, and obtaining a microsystem through interconnection between BGA and PCB, thereby completing a method for preparing an intelligently separated microsystem.

[0033] The method for preparing a smart separation microsystem of the present invention is, as a preferred embodiment, when the first damaged layer and the second damaged layer are obtained by ion implantation in step S1, in step S41, bubbles are generated in the first damaged layer and the second damaged layer by annealing at a temperature between 300° C. and 600° C. to obtain independent adapter plates A, B, and C;

[0034] When the first damaged layer and the second damaged layer are obtained by laser irradiation in step S1, in step S41, a micro-nano structure is obtained by a chemical method of wet etching to generate a micro-nano structure in the first damaged layer and the second damaged layer to obtain independent adapter plates A, B and C, and the etching solution for wet etching includes: potassium hydroxide solution, tetramethylammonium hydroxide solution, hydrofluoric acid solution, and a mixed solution of hydrofluoric acid and concentrated nitric acid.

[0035] The method for preparing a smart separation microsystem of the present invention is preferably such that in step S42, the number of the first cavities is at least two, the chips C1 and C2 are embedded in the first cavities, the surface of the adapter board B without the third cavity is facing upwards and the chip C3 is surface mounted;

[0036] During wafer-level bonding, the adapter plate A component is located at the bottom and the surface on which the first cavity is set faces upward, the adapter plate B component is bonded to the upper part of the adapter plate A component and the first cavity is connected to the third cavity, and the adapter plate C is bonded to the upper part of the adapter plate B component.

[0037] The present invention proposes a microsystem preparation process based on intelligent separation technology, which forms a damage layer by pre-implanting ions or irradiating laser at different depths of a transfer plate wafer, and then uses annealing or chemical methods to separate the wafer at the damage layer after completing the transfer plate process, thereby improving wafer utilization efficiency, simplifying the process procedure and reducing production costs.

[0038] The present invention has the following advantages:

[0039] (1) The present invention can separate a wafer into three wafers for use, thereby improving the utilization efficiency of the wafers and reducing the production cost;

[0040] (2) Since the wafer is finally divided into three parts, the overall package can be miniaturized without thinning the substrate, which simplifies the process flow. At the same time, thick wafers are used in the processes such as adapter plate cavity digging and TSV, which can provide process mechanical support for the wafer without temporary bonding, thus reducing the process difficulty and complexity;

[0041] (3) Since the two adapter plates are processed on one side, processes such as TSV etching, passivation layer deposition, and through-hole metal filling can be combined together through reasonable design. Compared with the method of processing a single piece separately, the process flow is simplified and the process uniformity is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 A schematic diagram of step S1 of a method for preparing a microsystem for intelligent separation, ion implantation or laser irradiation;

[0043] Figure 2 A schematic diagram of step S21 of a method for preparing a microsystem for intelligent separation;

[0044] Figure 3 A schematic diagram of step S22 of a method for preparing a microsystem for intelligent separation;

[0045] Figure 4 A schematic diagram of step S23 of a method for preparing a microsystem for intelligent separation;

[0046] Figure 5 A schematic diagram of step S31 of a method for preparing a microsystem for intelligent separation;

[0047] Figure 6 A schematic diagram of step S32 of a method for preparing a microsystem for intelligent separation;

[0048] Figure 7 A schematic diagram of step S33 of a method for preparing a microsystem for intelligent separation;

[0049] Figure 8 A schematic diagram of step S34 of a method for preparing a microsystem for intelligent separation;

[0050] Fig. 9 A schematic diagram of step S41 of a method for preparing a microsystem for intelligent separation;

[0051] Fig.10 A schematic diagram of step S42 of a method for preparing a microsystem for intelligent separation;

[0052] Fig.11 Schematic diagram of step S43 of a method for preparing a microsystem for intelligent separation.

[0053] Reference numerals:

[0054] 1. Silicon wafer; 21. First damaged layer; 22. Second damaged layer; 31. First TSV via; 32. Second TSV via; 33. Third TSV via; 41. First cavity; 42. Second cavity; 43. Third cavity; 5. RDL; 6. Gold wire; 7. Cover layer; 8. BGA. DETAILED DESCRIPTION

[0055] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0056] Example 1

[0057] like Figures 1 to 11 As shown, a method for preparing a microsystem for intelligent separation comprises the following steps:

[0058] (1) A first damaged layer 21 and a second damaged layer 22 are formed by injecting H ions or He ions or H / He ions co-injection into a double-sided polished silicon wafer 1 with a thickness of 500μm to 800μm. The two damaged layers divide the silicon wafer into three parts: adapter plate A, adapter plate B and adapter plate C. The injection depth can be controlled by changing parameters such as ion injection dose and current density. During injection, the surface is tilted 5° to 10° to reduce the channel effect. The injection depth is 200μm to 300μm and 100μm to 200μm from the upper surface of the wafer, respectively. The width of the first damaged layer 21 and the second damaged layer 22 is between 20μm and 30μm;

[0059] (2) Production of adapter board A:

[0060] (21) The adapter A faces upward, and is photolithographically etched into a through hole in the adapter A by using reactive ion etching (RIE) or inductively coupled plasma etching (ICP), with the etching depth being the same as the first damaged layer 21. The photoresist is removed, and the through hole is cleaned. Then, a passivation layer (TSV liner) is deposited on the sidewall of the through hole, and the through hole is filled with metal. Finally, the metal Cu is exposed by chemical mechanical polishing (CMP) or metal etching to form a first TSV through hole 31;

[0061] (22) Photolithography is performed on the surface of the transfer board A processed in step (21), and a first cavity 41 is etched by RIE, ICP or wet etching, and the etching depth is one-half of the transfer board A. The photoresist is removed, the surface is cleaned, and a passivation layer is deposited on the sidewall and bottom of the cavity;

[0062] (23) Photolithography is performed on the surface of the adapter A processed in step (22), and a through hole is etched at the bottom of the first cavity 41 of the adapter A by RIE or ICP, and the etching stops at the first damaged layer 21. The photoresist is removed, the plate is cleaned, and then a passivation layer is deposited on the sidewall of the through hole. The through hole is filled with metal, and finally a metal etching method is used to expose the metal Cu at the bottom of the cavity to form a second TSV through hole 32;

[0063] (3) Production of adapter plates B and C:

[0064] (31) Place the wafer transfer plate C processed in step (2) facing upward, perform photolithography, and etch out the second cavity 42 by RIE, ICP or wet etching, and stop etching to the interface between the second damaged layer 22 and the transfer plate B. Remove the photoresist and clean;

[0065] (32) Photolithography is performed on the surface of the adapter plate C processed in step (31), and a third cavity 43 is etched on the surface of the adapter plate B through the window left by the second cavity 42 in the adapter plate C by RIE, ICP or wet etching. The etching depth is about one third of the adapter plate. The photoresist is removed, the plate is cleaned, and a passivation layer is deposited on the sidewall and bottom of the third cavity 43 and the sidewall of the second cavity 42;

[0066] (33) Photolithography is performed on the surface of the adapter C processed in step (32), and a through hole is etched in the adapter B through the window reserved in the second cavity 42 in the adapter C by RIE or ICP, and the etching stops at the first damaged layer 21. The photoresist is removed and the process is cleaned. A passivation layer is then deposited on the sidewall of the through hole, and metal is filled in the through hole. Finally, a metal etching method is used to expose the metal Cu at the bottom of the cavity to form a third TSV through hole 33;

[0067] (34) Photolithography is performed on the surface of the adapter C processed in step (33), and a through hole is etched in the adapter C by RIE or ICP, and the etching stops at the second damaged layer 22. The photoresist is removed and the plate is cleaned. Then a passivation layer is deposited on the sidewall of the through hole, and metal is filled in the through hole. Finally, CMP or metal etching is used to expose the metal Cu at the bottom of the cavity to form a fourth TSV through hole 34;

[0068] Preferably, if the adapter plate C and the adapter plate B have the same thickness, step (7) and step (8) can be combined together, that is, TSV through hole 33 and TSV through hole 34 are etched simultaneously; through holes 33 and 34 can be completely the same TSV, and finally a metal etching method is used together to expose Cu, so as to simplify the process flow and reduce the cost;

[0069] (4) Intelligent separation and stacking:

[0070] (41) annealing the wafer processed in step (3) at a temperature between 300° C. and 600° C., so that the implanted ions diffuse due to the heat and generate bubbles in the first damaged layer 21 and the second damaged layer 22, thereby separating the three parts of the wafer into independent transfer plates A, B, and C;

[0071] (42) Chips C1 and C2 are embedded in the first cavity 41 of adapter board A, and the chips and the surface of adapter board A are interconnected by RDL 5. Chip C3 is surface mounted on the surface of adapter board B, and gold wire 6 is used to interconnect the chip and external signals. Adapter board A, adapter board B and adapter board C are bonded at the wafer level to achieve heterogeneous chip integration and signal interconnection.

[0072] (43) The hybrid module processed in step (42) is cut into a single die, bonded to the cover layer 7, and the bottom ball 8 is used to interconnect the module and the PCB, thereby realizing a four-layer three-dimensional heterogeneous integrated microsystem.

[0073] Example 2

[0074] like Figures 1 to 11 As shown, a method for preparing a microsystem for intelligent separation comprises the following steps:

[0075] (1) A first damaged layer 21 and a second damaged layer 22 are formed in a double-sided polished silicon wafer 1 with a thickness of 500μm to 800μm by certain laser irradiation. The two damaged layers divide the silicon wafer into three parts: adapter plate A, adapter plate B, and adapter plate C. By changing parameters such as laser frequency and irradiation time, the thickness and depth of the damaged layer can be controlled. The depths of the two damaged layers are 200μm to 300μm and 100μm to 200μm from the upper surface of the wafer, respectively, and the widths of the first damaged layer 21 and the second damaged layer 22 are between 20μm and 30μm;

[0076] (2) Production of adapter board A:

[0077] (21) The adapter A faces upward, and is photolithographically etched into a through hole in the adapter A by using reactive ion etching (RIE) or inductively coupled plasma etching (ICP), with the etching depth being the same as the first damaged layer 21. The photoresist is removed, and the through hole is cleaned. Then, a passivation layer (TSV liner) is deposited on the sidewall of the through hole, and the through hole is filled with metal. Finally, the metal Cu is exposed by chemical mechanical polishing (CMP) or metal etching to form a first TSV through hole 31;

[0078] (22) Photolithography is performed on the surface of the transfer board A processed in step (21), and a first cavity 41 is etched by RIE, ICP or wet etching, and the etching depth is one-half of the transfer board A. The photoresist is removed, the surface is cleaned, and a passivation layer is deposited on the sidewall and bottom of the cavity;

[0079] (23) Photolithography is performed on the surface of the adapter A processed in step (22), and a through hole is etched at the bottom of the first cavity 41 of the adapter A by RIE or ICP, and the etching stops at the first damaged layer 21. The photoresist is removed, the plate is cleaned, and then a passivation layer is deposited on the sidewall of the through hole. The through hole is filled with metal, and finally a metal etching method is used to expose the metal Cu at the bottom of the cavity to form a second TSV through hole 32;

[0080] (3) Production of adapter plates B and C:

[0081] (31) Place the wafer transfer plate C processed in step (2) facing upward, perform photolithography, and etch out the second cavity 42 by RIE, ICP or wet etching, and stop etching to the interface between the second damaged layer 22 and the transfer plate B. Remove the photoresist and clean;

[0082] (32) Photolithography is performed on the surface of the adapter plate C processed in step (31), and a third cavity 43 is etched on the surface of the adapter plate B through the window left by the second cavity 42 in the adapter plate C by RIE, ICP or wet etching. The etching depth is about one third of the adapter plate. The photoresist is removed, the plate is cleaned, and a passivation layer is deposited on the sidewall and bottom of the third cavity 43 and the sidewall of the second cavity 42;

[0083] (33) Photolithography is performed on the surface of the adapter C processed in step (32), and a through hole is etched in the adapter B through the window reserved in the second cavity 42 in the adapter C by RIE or ICP, and the etching stops at the first damaged layer 21. The photoresist is removed and the process is cleaned. A passivation layer is then deposited on the sidewall of the through hole, and metal is filled in the through hole. Finally, a metal etching method is used to expose the metal Cu at the bottom of the cavity to form a third TSV through hole 33;

[0084] (34) Photolithography is performed on the surface of the adapter C processed in step (33), and a through hole is etched in the adapter C by RIE or ICP, and the etching stops at the second damaged layer 22. The photoresist is removed and the plate is cleaned. Then a passivation layer is deposited on the sidewall of the through hole, and metal is filled in the through hole. Finally, CMP or metal etching is used to expose the metal Cu at the bottom of the cavity to form a fourth TSV through hole 34;

[0085] Preferably, if the adapter plate C and the adapter plate B have the same thickness, step (7) and step (8) can be combined together, that is, TSV through hole 33 and TSV through hole 34 are etched simultaneously; through holes 33 and 34 can be completely the same TSV, and finally a metal etching method is used together to expose Cu, so as to simplify the process flow and reduce the cost;

[0086] (4) Intelligent separation and stacking:

[0087] (41) The wafer treated in step (3) is selectively removed from the modified area (i.e., the first damaged layer 21 and the second damaged layer 22) by a corresponding chemical method, thereby separating the three parts of the wafer to form independent transfer plates A, B, and C. The chemical method is wet etching, and a solution is used to react and remove the exposed part of the silicon surface, thereby obtaining a micro-nano structure. The etching solution includes: potassium hydroxide solution, tetramethylammonium hydroxide solution, hydrofluoric acid solution, and a mixed solution of hydrofluoric acid and concentrated nitric acid;

[0088] (42) Chips C1 and C2 are embedded in the first cavity 41 of adapter board A, and the chips and the surface of adapter board A are interconnected by RDL 5. Chip C3 is surface mounted on the surface of adapter board B, and gold wire 6 is used to interconnect the chip and external signals. Adapter board A, adapter board B and adapter board C are bonded at the wafer level to achieve heterogeneous chip integration and signal interconnection.

[0089] (43) The hybrid module processed in step (42) is cut into a single die, bonded to the cover layer 7, and the bottom ball 8 is used to interconnect the module and the PCB, thereby realizing a four-layer three-dimensional heterogeneous integrated microsystem.

[0090] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A method for preparing a microsystem for intelligent separation, characterized in that: The following steps are involved: S1. Forming a first damaged layer (21) and a second damaged layer (22) in a double-sided polished silicon wafer (1) by ion implantation or laser irradiation, wherein the first damaged layer (21) is located above the second damaged layer (22), and the first damaged layer (21) and the second damaged layer (22) divide the silicon wafer (1) into a transfer plate A, a transfer plate B, and a transfer plate C from top to bottom in sequence; S2, placing the adapter plate A in the silicon wafer (1) with one side thereof facing upward, and preparing a first TSV through hole (31), a first cavity (41), and a second TSV through hole (32) located below the first cavity (41) and between the first damaged layer (21) in the adapter plate A; S3, placing one side of the adapter plate C in the silicon wafer (1) upward, preparing a second cavity (42) in the adapter plate C, wherein the number of the second cavities (42) is at least two, preparing a third cavity (43) on the surface of the adapter plate B through a portion of the second cavity (42), preparing a third TSV through hole (33) in the adapter plate B through another portion of the second cavity (42), and then preparing a fourth TSV through hole (34) in the adapter plate C; S4. Annealing or wet etching the silicon wafer (1) to generate bubbles or micro-nano structures in the first damaged layer (21) and the second damaged layer (22) to obtain independent adapter plates A, B and C, wherein the second cavity (42) is a through hole; embedding a chip in the first cavity (41) and interconnecting the chip with the adapter plate A to obtain an adapter plate A component; attaching a chip to the surface of the adapter plate B and interconnecting the chip with an external signal via a gold wire to obtain an adapter plate B component; then performing wafer-level bonding, slicing, bonding with a cover layer (7) and interconnecting with a PCB to obtain the microsystem, thereby completing a method for preparing an intelligently separated microsystem.

2. The method for preparing a microsystem for intelligent separation according to claim 1, characterized in that: In step S1, the thickness of the silicon wafer (1) is 500 μm to 800 μm, the distance from the first damaged layer (21) to the upper surface of the silicon wafer (1) is 100 μm to 200 μm, the distance from the second damaged layer (22) to the upper surface of the silicon wafer (1) is 200 μm to 300 μm, and the thickness of the first damaged layer (21) and the second damaged layer (22) are both 20 μm to 30 μm.

3. The method for preparing a microsystem for intelligent separation according to claim 1, characterized in that: Step S2 includes: S21, placing the adapter plate A in the silicon wafer (1) with one side facing upward, performing photolithography and etching in the adapter plate A to obtain a through hole, depositing a passivation layer on the side wall of the through hole, filling the through hole with metal, and exposing the metal using chemical mechanical polishing or metal etching to obtain the first TSV through hole (31); S22, photolithography and etching are performed on the surface of the adapter plate A to obtain the first cavity (41), wherein the depth of the first cavity (41) is less than the thickness of the adapter plate A; after removing the photoresist and cleaning, a passivation layer is deposited on the sidewall and bottom of the first cavity (41); S23, performing photolithography on the surface of the adapter board A, etching a through hole at the bottom of the first cavity (41), depositing a passivation layer on the side wall of the through hole, filling the through hole with metal, and using a metal etching method to expose the metal at the bottom of the first cavity (41) to obtain the second TSV through hole (32).

4. The method for preparing a microsystem for intelligent separation according to claim 3, characterized in that: In steps S21 and S23, the etching methods include: reactive ion etching and inductively coupled plasma etching; the first TSV through hole (31) and the second TSV through hole (32) are both filled with metal Cu, and the etching depth reaches the first damaged layer (21); In step S22, the method of etching to obtain the first cavity (41) is any one of the following: RIE or ICP or wet etching, and the etching depth is half of the adapter plate A.

5. The method for preparing a microsystem for intelligent separation according to claim 1, characterized in that: Step S3 includes the following steps: S31, placing the adapter plate C of the silicon wafer (1) with one side facing upwards, photolithography and etching in the adapter plate C to obtain the second cavity (42), etching stops at the interface between the second damaged layer (22) and the adapter plate B, the number of the second cavity (42) is at least two, and cleaning is performed after removing the photoresist; S32, performing photolithography on the surface of the adapter plate C, etching the third cavity (43) on the surface of the adapter plate B through a window left by a part of the second cavity (42), wherein the depth of the third cavity (43) is less than the thickness of the adapter plate B, removing the photoresist, and depositing a passivation layer on the side wall and bottom of the third cavity (43) and the side wall of the second cavity (42) after cleaning; S33, performing photolithography on the surface of the adapter plate C, etching a through hole in the adapter plate B through a window reserved in another part of the second cavity (42), and stopping the etching to the first damaged layer (21); after removing the photoresist and cleaning, depositing a passivation layer on the side wall of the through hole, filling the through hole with metal, and exposing the metal at the bottom of the second cavity (42) to obtain the third TSV through hole (33); S34, photolithography is performed on the surface of the adapter plate C and a through hole is etched in the adapter plate C to terminate at the second damaged layer (22), the photoresist is removed, a passivation layer is deposited on the side wall of the through hole after cleaning, metal is filled in the through hole, and the metal Cu at the bottom of the cavity is exposed to obtain the fourth TSV through hole (34).

6. The method for preparing a microsystem for intelligent separation according to claim 5, characterized in that: When the thickness of the adapter plate C is the same as the thickness of the adapter plate B, steps S33 and S34 can be combined together to prepare the third TSV through hole (33) and the fourth TSV through hole (34) at the same time; the third TSV through hole (33) and the fourth TSV through hole (34) can be completely the same TSV, and after filling with metal, a metal etching method is used at the same time to expose the metal.

7. The method for preparing a microsystem for intelligent separation according to claim 5, characterized in that: In steps S31 and S32, the etching methods of the second cavity (42) and the third cavity (43) are RIE, ICP or wet etching, and the depth of the third cavity (43) is one third of the thickness of the adapter plate B; In steps S33 and S34, the through-holes are etched by RIE or ICP; metal Cu is filled in both. In step S33, metal etching is used to expose the metal Cu at the bottom of the cavity. In step S34, CMP or metal etching is used to expose the metal Cu at the bottom of the cavity.

8. The method for preparing a microsystem for intelligent separation according to claim 1, characterized in that: Step S4 includes the following steps: S41, annealing or wet etching the silicon wafer (1) to generate bubbles or micro-nano structures in the first damaged layer (21) and the second damaged layer (22) to obtain independent adapter plates A, B and C, wherein the second cavity (42) is a through hole; S42, embedding a chip in the first cavity (41) in the adapter board A, and interconnecting the chip and the surface of the adapter board A through RDL (5) to obtain the adapter board A component; mounting the chip on the surface of the adapter board B and interconnecting the chip with external signals through gold wires (6) to obtain the adapter board B component; performing wafer-level bonding on the adapter board A component, the adapter board B component, and the adapter board C to perform heterogeneous integration and signal interconnection to obtain a hybrid module; S43, cutting the hybrid module into bare chips, bonding the adapter board C in the bare chips to the cover layer (7), implanting balls at the bottom of the adapter board A component in the bare chips to obtain BGA (8), and interconnecting the BGA (8) with the PCB to obtain the microsystem, thereby completing a method for preparing an intelligently separated microsystem.

9. The method for preparing a microsystem for intelligent separation according to claim 8, characterized in that: When the first damaged layer (21) and the second damaged layer (22) are obtained by ion implantation in step S1, bubbles are generated in the first damaged layer (21) and the second damaged layer (22) by annealing at a temperature between 300° C. and 600° C. in step S41 to obtain independent transfer plates A, B and C; When the first damaged layer (21) and the second damaged layer (22) are obtained by laser irradiation in step S1, in step S41, a micro-nano structure is obtained by a chemical method of wet etching so that the first damaged layer (21) and the second damaged layer (22) are generated with a micro-nano structure to obtain independent transfer plates A, B and C, and the etching solution of the wet etching includes: potassium hydroxide solution, tetramethylammonium hydroxide solution, hydrofluoric acid solution, and a mixed solution of hydrofluoric acid and concentrated nitric acid.

10. The method for preparing a microsystem for intelligent separation according to claim 8, characterized in that: In step S42, the number of the first cavities (41) is at least two, and the chips C1 and C2 are embedded in the first cavities (41), so that the surface of the adapter board B without the third cavity (43) faces upward and the chip C3 is surface mounted; During wafer-level bonding, the adapter plate A component is located at the bottom and the surface on which the first cavity (41) is arranged faces upward, the adapter plate B component is bonded to the upper portion of the adapter plate A component and the first cavity (41) is connected to the third cavity (43), and the adapter plate C is bonded to the upper portion of the adapter plate B component.

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