Probe card and wafer detection equipment

Abstract

The embodiment of the invention relates to the technical field of wafer testing, and discloses a probe card, which comprises a main circuit board, a plurality of equipment testing units and a first surface distributed on the main circuit board, each equipment testing unit comprises a real-mounted circuit board and a plurality of probes, and the real-mounted circuit board is arranged on the surface of the equipment testing unit; the plurality of probes are positioned on the surface, far away from the main circuit board, of the real-mounted circuit board and are electrically connected to the real-mounted circuit board; and the plurality of anisotropic conductive adhesive films are in one-to-one correspondence with the equipment test units, are mechanically connected with the surface, close to the main circuit board, of the real-mounted circuit board and the first surface, and are electrically connected with the plurality of probes and the main circuit board. According to the technical scheme, when the equipment testing units are damaged, the equipment testing units can be singly replaced without replacing all the equipment testing units, and maintenance is convenient. In addition, the equipment testing unit is electrically and mechanically connected with the main circuit board through the anisotropic conductive adhesive film, the structure is simple, and the application range is wide.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of wafer detection technology, and in particular, to a probe card and wafer detection equipment. Background Art

[0002] Wafer testing is an important part of integrated circuit design and manufacturing, which is used to ensure that the products designed and manufactured by integrated circuits meet the requirements of their specifications. In wafer testing, the probe card is a key component for the interaction between automatic test equipment (ATE) and wafer signals. Specifically, the wafer is composed of individual crystal chips, and the probe card includes multiple device test units (DUT), which correspond to each chip on the wafer.

[0003] However, some probe cards known to the inventor of the present application have multiple device test units soldered to the same circuit board surface. When some device test units are damaged in small areas, the entire probe card is scrapped and difficult to repair. Summary of the invention

[0004] The main technical problem solved by the embodiments of the present application is how to make the probe card easy to maintain and widely used.

[0005] To solve the above technical problems, the embodiments of the present application adopt the following technical solutions:

[0006] In a first aspect, an embodiment of the present application provides a probe card, comprising:

[0007] A main circuit board; a plurality of device test units, distributed on the first surface of the main circuit board, the device test unit comprising a mounted circuit board and a plurality of probes, the mounted circuit board being arranged on the surface of the device test unit; the plurality of probes being located on a surface of the mounted circuit board away from the main circuit board, and being electrically connected to the mounted circuit board; a plurality of anisotropic conductive adhesive films, the anisotropic conductive adhesive films corresponding to the device test units one by one, the anisotropic conductive adhesive films mechanically connecting a surface of the mounted circuit board close to the main circuit board and the first surface, and electrically connecting the plurality of probes to the main circuit board.

[0008] In some embodiments, the thickness of the anisotropic conductive adhesive film is 3-5 μm.

[0009] In some embodiments, the main circuit board includes a first via, which is electrically connected to a first metal pad disposed on the first surface; and / or the installed circuit board includes a second via, which is electrically connected to a second metal pad, and the second metal pad is located on the surface of the installed circuit board close to the main circuit board.

[0010] In some embodiments, the first via is a solid metal via, and / or the second via is a solid metal via.

[0011] In some embodiments, the first metal pad is in a grid shape.

[0012] In some embodiments, the second metal pad is in a grid shape.

[0013] In some embodiments, the mounted circuit board further includes a marking point, and the marking point is located on a surface of the mounted circuit board away from the main circuit board.

[0014] In some embodiments, the mounting circuit board further includes a positioning hole, and the positioning hole is located on a surface of the mounting circuit board away from the main circuit board.

[0015] In some embodiments, at least a portion of the main circuit board is a ceramic circuit board.

[0016] In a second aspect, an embodiment of the present application provides a wafer inspection device, including an automatic testing device and a probe card as described in any one of the first aspects.

[0017] The present scheme discloses a probe card, comprising: a main circuit board; a plurality of device test units, distributed on the first surface of the main circuit board, the device test unit comprising a mounted circuit board and a plurality of probes, the mounted circuit board being arranged on the surface of the device test unit; the plurality of probes being located on the surface of the mounted circuit board and being electrically connected to the mounted circuit board; a plurality of anisotropic conductive adhesive films, the anisotropic conductive adhesive films corresponding to the device test units one by one, the anisotropic conductive adhesive films mechanically connecting the surface of the mounted circuit board close to the main circuit board and the first surface, and electrically connecting the plurality of probes to the main circuit board. In the above technical scheme, the device test unit is used as an independent printed circuit board assembly, so that each device unit is independent of each other, so when it is damaged, the damaged single device unit or multiple device test units can be replaced, without replacing all the device test units, which is convenient for maintenance and can effectively avoid the loss of materials and waste of manpower. In addition, the device test unit is electrically and mechanically connected to the main circuit board through the anisotropic conductive adhesive film, has a simple structure, high applicability, can be applied to probe cards with multiple pins or probe cards with micro device test units, and has a wide range of applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0019] Figure 1 This is a schematic diagram of the structure of a wafer testing device in some embodiments of the present application;

[0020] Figure 2 A schematic diagram of a process of connecting a probe tip to a metal pad in some embodiments of the present application;

[0021] Figure 3 A schematic diagram of the connection technology between the device test unit and the main circuit board known to the inventor of the present application;

[0022] Figure 4 A schematic diagram of a portion of the structure of a probe card in some embodiments of the present application;

[0023] Figure 5 A surface schematic diagram of a device testing unit in some embodiments of the present application;

[0024] Figure 6 This is a schematic diagram of the structure of anisotropic conductive adhesive films in some embodiments of the present application;

[0025] Figure 7 This is a structural schematic diagram of a device test unit fixing method in some embodiments of the present application;

[0026] Figure 8 This is a schematic diagram of the structure of vias and pads in some embodiments of the present application. DETAILED DESCRIPTION

[0027] The present application is described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the present application, but do not limit the present application in any form. It should be noted that, for those of ordinary skill in the art, several variations and improvements can also be made without departing from the concept of the present application. These all belong to the protection scope of the present application.

[0028] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0029] It should be noted that, if there is no conflict, the various features in the embodiments of the present application can be combined with each other, all within the scope of protection of the present application. In addition, although the functional module division is performed in the device schematic diagram and the logical order is shown in the flow chart, in some cases, the steps shown or described can be performed in a sequence different from the module division in the device or the flow chart. In addition, the words "first", "second", "third", etc. used herein do not limit the data and execution order, but only distinguish the same items or similar items with basically the same functions and effects.

[0030] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used in this specification and in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used in this specification includes any and all combinations of one or more of the related listed items.

[0031] In addition, the technical features involved in each embodiment of the present application described below can be combined with each other as long as they do not conflict with each other.

[0032] Wafer is the basic material for semiconductor manufacturing. It is a round, thin sheet usually made of silicon, used to manufacture integrated circuits (ICs) and various semiconductor devices. The production process of wafers starts with high-purity silicon materials, and finally forms a round thin sheet with a smooth surface and precise geometric specifications through a series of process steps such as purification, single crystal growth, slicing, and polishing. The above-mentioned processed wafers can be used for chip manufacturing. Through steps such as photolithography, etching, ion implantation, and metallization, a multi-layer circuit structure is formed on the wafer, and finally a functional integrated circuit is formed. There can be multiple repeated and identical integrated circuits on a wafer, and the above-mentioned integrated circuits are the functional circuits of the chip. The wafers that have formed the integrated circuit are subjected to corresponding wafer tests to screen out chips with qualified performance. After the wafers are cut into chips, the qualified chips are packaged for final testing.

[0033] Wafer testing is a key step in the semiconductor manufacturing process. It refers to the functional and performance testing of integrated circuits on a single wafer after wafer manufacturing is completed. The purpose of wafer testing is to ensure that the chips on each wafer are qualified and functional before packaging and final testing, so as to reduce the cost and time of subsequent processes and ensure the quality of the final product. Unqualified chips will be marked and will not be packaged, thus avoiding the waste of resources.

[0034] Figure 1 A schematic structural diagram of a wafer inspection device according to an embodiment of the present invention is shown.

[0035] The wafer inspection device 1000 includes a probe card 100 and an automatic test device 200. The probe card 100 is Figure 4 The probe card 100 described in .

[0036] The automatic testing equipment 200 includes a clamping device 210 , a support rod 220 , a carrier platform 230 , and a wafer 240 .

[0037] The clamping device 210 is used to clamp the probe card 100. The clamping device 210 is connected to the support rod 220. For example, it can slide relative to the support rod 220 so that the probe card 100 can move up and down in the vertical direction. The support platform 230 is located below the clamping device 210 and is used to carry the wafer 240 to be tested. The position of the support platform 230 is opposite to that of the clamping device 210, so that the probe card 100 is just above the wafer 240. During the test, the probes 22 of the probe card 100 correspond one-to-one with the pads on the wafer 240. The probe card 100 can move in the clamping device 210 and can follow the clamping device 210 to move above the wafer 240.

[0038] Among them, when the wafer inspection equipment 1000 performs electrical testing on the wafer 240, the wafer 240 is first placed on the wafer clamp of the carrier 230 to ensure that the wafer 240 is flat and correctly aligned; by controlling the clamping device 210, the probe 22 is vertically lowered until it contacts the metal pad on the surface of the wafer 240, and according to the slight movement of the probe 22, whether the contact between the probe 22 and the metal pad is good. The automatic test equipment 200 is built with test software, and the automatic test equipment 200 sends the test signal to the probe 22. The probe 22 transmits the received test signal to the wafer 240 by contacting the metal pad of the wafer 240 and receives the feedback signal returned by it, such as current, voltage, etc. The probe 22 sends the received feedback signal to the automatic test equipment 200, and the test software in the automatic test equipment 200 performs data analysis based on the received feedback signal and compares it with the expected performance standard to determine whether the chip is qualified, obtain the test result and store it in the storage medium. Testers screen the wafers under test based on the test results in the storage medium. For chips that fail the test, they are usually marked on the wafer so that they can be excluded from the subsequent cutting and packaging processes.

[0039] From the above probe test process, we can see that Figure 2As shown, during the test, the object to be tested is placed on the probe station, and then the probe on the probe card directly contacts the metal pad or bump on the chip. Usually, the surface of each metal pad is covered with a thin layer of aluminum oxide. In order to contact the metal below and form an electrical connection, the probe tip must penetrate this thin oxide. Because the probes are very thin, with a diameter of about 60um, they will bend or deform when they contact the wafer. When they bend, the probe tip will slide or scrub on the surface of the metal pad or bump. This scrubbing action causes the probe tip to penetrate the surface oxide, which helps to form a good electrical contact with the metal below. When the probe card and the metal pad or bump are pressed against each other, the probe will undergo elastic deformation, and the normal Z-axis deformation is between 150-250um. Coupled with the manufacturing process defects of the probe card and the introduction of adverse factors during use, the probe card often has probe deviation, breakage, short circuit burning and other phenomena, and the daily maintenance work places too high requirements on maintenance engineers.

[0040] The common probe card now is a whole card design, that is, multiple device test units are welded on a whole circuit board. In the case of small area damage on the probe card or damage to a single device test unit, it is difficult to repair it by simply replacing parts. At this time, the entire probe card needs to be reset or replaced, which will prolong the maintenance cycle of the probe card and cause serious waste of materials.

[0041] In addition, in some other solutions known to the inventor of the present application, the device test unit is a separate printed circuit component. Figure 3 As shown, the device test unit is electrically and mechanically connected to the main circuit board through the through-hole interlacing technology or the grid array packaging technology. It is understandable that since the above connection method requires the formation of through holes on the main circuit board, and the through holes reduce the toughness of the main circuit board, it is relatively fragile and easy to break, and is prone to irreversible damage, destroying the function of the main circuit board itself. Therefore, the above scheme is not suitable for multi-pin probe cards and / or probe cards with micro device test units.

[0042] In view of this, this solution uses anisotropic conductive adhesive film to mechanically and electrically connect the device test unit to the main circuit board by treating it as an independent surface mounted component. If the probe on the surface of the device test unit is deformed or damaged during wafer testing, the technician can maintain and repair the probe card by replacing a single damaged device test unit, avoiding loss of manpower and waste of materials. At the same time, compared to connecting the device test unit and the main circuit board through through-hole penetration technology, the use of anisotropic conductive adhesive film for connection can better maintain the toughness of the main circuit board and avoid reducing its service life due to connection technology. The use of anisotropic conductive adhesive film for electrical and mechanical connection has a simple structure and high applicability, and can be applied to multi-pin probe cards or probe cards with micro device test units.

[0043] Figure 4 The schematic diagram of the structure of the probe card 100 provided in the embodiment of the present application is shown in FIG. Figure 4 The probe card 100 includes a main circuit board 10, a plurality of device test units 20, and a plurality of anisotropic conductive adhesive films 30. The plurality of device test units 20 are distributed on the first surface 11 of the main circuit board 10, and the plurality of anisotropic conductive adhesive films 30 correspond to the device test units 20 one by one, and each anisotropic conductive adhesive film 30 mechanically and electrically connects the corresponding device test unit 20 to the main circuit board 10. In this way, each device test unit 20 is fixed to the first surface 11 of the main circuit board 10, and can transmit electrical signals with the main circuit board 10.

[0044] The main circuit board 10 may be a printed circuit board (PCB). In some embodiments, a conductive circuit is printed on the first side of the PCB; in some embodiments, a conductive circuit is printed on both the first side and the second side of the PCB. In some embodiments, considering that during the wafer test process, the main circuit board 10 transmits the electrical signal from the equipment test unit 20 to the automatic test equipment 200, which generates heat and causes the temperature of the main circuit board 10 to increase, at least a portion of the main circuit board 10 is set as a ceramic circuit board, which can avoid irreversible damage such as deformation of the main circuit board 10 due to the temperature rise, resulting in damage to its function.

[0045] The device testing unit 20 includes a circuit board (PCBA) 21 and a plurality of probes 22, such as Figure 5As shown, the mounting circuit board 21 is arranged on the surface of the device test unit 20. The mounting circuit board 21 includes the functional circuit corresponding to the device test unit 20 and the components required for the functional circuit, that is, the mounting circuit board 21 is obtained by assembling various electronic components on the PCB. A plurality of probes 22 are located on the surface of the mounting circuit board away from the main circuit board 10 and are electrically connected to the mounting circuit board 21.

[0046] Please refer again Figure 5 . Based on the fact that wafer testing includes electrical parameter testing, functional testing, reliability testing, and thermal characteristics testing, the circuit components required for different tests are not exactly the same. For example, the components required for thermal characteristics testing include heating elements and thermocouples. It can be seen that the surface of the installed circuit board 21 has circuit components required for various tests, such as capacitors, granular resistors, and strip resistors, etc., to ensure that the various test functions of the probe card 100 are correct. And on the same surface of the installed circuit board 21 where various electronic components are connected, the installed circuit board 21 is also connected to a plurality of probes 22. During the wafer testing process, the probes 22 establish electrical connections by contacting the metal pads or protrusions of the wafer to be tested, ensuring that during the wafer testing process, the electrical signals can be transmitted to the probes 22 through the various electronic components of the installed circuit board 21, and then transmitted to the wafer to be tested by the probes 22. The probes 22 can also receive the electrical signals fed back by the wafer to be tested to complete the required test functions.

[0047] Among them, the anisotropic conductive adhesive film 30 corresponds to the device test unit 20 one by one, and is located between the mounted circuit board 21 and the main circuit board 10 and the first surface 11, and each anisotropic conductive adhesive film 30 mechanically and electrically connects the corresponding mounted circuit board 21 to the main circuit board 10. It can be understood that based on the electrical connection between the probe 22 and the mounted circuit board 21, the mounted circuit board 21 is electrically connected to the main circuit board 10 through the anisotropic conductive adhesive film 30, so that the probe 22 can be electrically connected to the main circuit board 10.

[0048] The anisotropic conductive film 30 is formed by curing or drying a conductive adhesive, and is conductive in the thickness direction and insulated in the horizontal direction. The anisotropic conductive film 30 has various structures. In some embodiments, for example, Figure 6 As shown, the anisotropic conductive film 30 includes a matrix resin 31 and a conductive filler, namely, conductive particles 32. The conductive particles 32 are metal conductive particles or other conductive particles. The conductive particles 32 are connected to the electronic devices on both sides of the conductive particles 32 in the vertical direction by the bonding effect of the matrix resin to form a conductive path. Since the conductive particles 32 have matrix resin on both sides of the horizontal direction, they are not conductive in the horizontal direction and cannot perform electrical transmission.

[0049] During the process of connecting the device test unit 20 with the main circuit board 10 through the anisotropic conductive film 30, the position of the anisotropic conductive film 30 on the first surface 11 of the main circuit board 10 is determined, and hot pressing curing is performed. By pressing, the matrix resin 31 on the vertical direction of the conductive particles 32 in the anisotropic conductive film 30 is arranged in the horizontal direction to ensure that the conductive particles 32 are in direct contact with the components on both sides of the vertical direction, that is, the device test unit 20 and the main circuit board 10 are in direct contact with the conductive particles 32 to form an electrical connection.

[0050] In this embodiment, the device test unit 20 is used as an independent printed circuit board assembly and is electrically connected to the main circuit board 10. When a small area of ​​the probe card 100 is damaged or partially damaged, the single device test unit 20 can be maintained or replaced. Compared with connecting the probe card 100 as a whole to the main circuit board 10, the above method can shorten the maintenance time of the probe card 100 and reduce unnecessary waste of manpower and material resources. At the same time, the use of anisotropic conductive adhesive film 30 to connect the device test unit 20 and the main circuit board 10 can not only ensure that the two can be electrically connected, but also prevent the main circuit board 10 from being damaged compared to the above-mentioned through-hole plug-in connection, avoid the main circuit board 10 from being reduced in toughness due to the connection technology, thereby causing irreversible damage and reducing the service life of the main circuit board 10. In addition, it can also ensure that the above scheme can be applied to probe cards with multiple pins or probe cards with micro device test units, so that the probe card can be widely used.

[0051] In some embodiments, the thickness of the anisotropic conductive adhesive film 30 is 3 μm to 5 μm.

[0052] It is understandable that, during the preparation of the probe card 100, uncured anisotropic conductive adhesive is applied on the main circuit board 10, the device test unit 20 is placed on the uncured anisotropic conductive adhesive, pressure is applied to the device test unit 20, and the matrix resin in the anisotropic conductive adhesive that contacts the devices on both sides in the vertical direction is arranged to both sides in the horizontal direction to ensure that the main circuit board 10 and the device test unit 20 are in direct contact with the conductive particles 32 respectively. Then, the uncured anisotropic conductive adhesive is thermally cured to form anisotropic conductive adhesive film 30. In this way, the anisotropic conductive adhesive film 30 electrically connects the main circuit board 10 and the device test unit 20 in the vertical direction.

[0053] The thickness of the anisotropic conductive adhesive film 30 formed by curing through the above process has a certain influence on its own conductivity, electrical properties and adhesion. For example, if the thickness of the anisotropic conductive adhesive film 30 is less than 3 μm, it contains fewer conductive particles 32, so it cannot provide good conductivity, and the adhesion between the thinner anisotropic conductive adhesive film 30 and the base material such as the main circuit board 10 or the device test unit 20 is poor, and there is a risk of falling off during actual use. If the thickness of the anisotropic conductive adhesive film 30 is greater than 5 μm, the distance between the conductive particles 32 contained therein increases, and the increased distance between the conductive particles 32 is likely to cause the conductivity of the anisotropic conductive adhesive film 30 to decrease, and the thermal conductivity of the thicker anisotropic conductive adhesive film 30 is poor, so that it cannot complete thermal management well during actual use. At the same time, the thicker anisotropic conductive adhesive film 30 also makes it inconvenient for technicians to remove or reposition it when performing maintenance.

[0054] It can be seen that setting the thickness of the anisotropic conductive adhesive film 30 to 3μm to 5μm can ensure that the anisotropic conductive adhesive film 30 has good conductivity while ensuring that it also has good adhesion and thermal conductivity, so that the above-mentioned anisotropic conductive adhesive film 30 can form a relatively strong mechanical connection with the main circuit board 10 and the equipment test unit 20 respectively, and can perform effective thermal management during actual use.

[0055] In some embodiments, the anisotropic conductive film 30 may also have a directional conductive filler or a multiphase structure. Wherein, the directional conductive filler refers to a conductive filler embedded in the film in a directional arrangement, such as metal nanowires, carbon nanotubes or conductive polymer fibers. These fillers form a continuous conductive path in one direction, but do not form such a path in the vertical direction. Therefore, the above-mentioned directional conductive filler can make the conductive film have the characteristics of being conductive in one direction and non-conductive in the other direction. In addition, the anisotropic conductive film 30 may also have a multiphase structure, and anisotropic conductivity can be achieved by introducing different phases in the film, such as a polymer phase and a conductive particle phase. The arrangement and distribution of these phases can be regulated by controlling the phase separation behavior of the polymer.

[0056] In some embodiments, see Figure 5 The mounting circuit board 21 further includes a marking point 213, and the marking point 213 is located on the surface of the mounting circuit board 21 away from the main circuit board 10. Figure 5As shown, the surface of the mounted circuit board 21 includes a copper circuit, electronic components required for the circuit, and a plurality of probes 22. In actual use, the surface of the copper circuit is covered with a layer of solder resist to protect the copper traces, pads, and other areas on the mounted circuit board that do not require soldering, to prevent short circuits or bridges during soldering. The components required for the mounted circuit board 21 and the probes 22 are connected to the mounted circuit board 21 through a mounting process, for example, using a special adhesive to stick the components on the mounted circuit board 21, or using a fixture or other mechanical device to fix the components on the mounted circuit board 21, or using a hot pressing process to firmly mount the components on the mounted circuit board 21.

[0057] In the above-mentioned mounting process, the marking point 213 on the surface of the mounted circuit board 21 away from the main circuit board 10 is conducive to the mounting tool to better identify the position and posture of the mounted circuit board 21, locate the position of the components to be mounted, and facilitate the tool to accurately mount the components. While ensuring the required test functions of the probe card 100 are correct, it reduces material loss caused by mounting misalignment.

[0058] It is understandable that the position of the above-mentioned mark point 213 can be diagonally or on the same side. In some embodiments, the above-mentioned mark point 213 can also be used to accurately locate and calibrate the chip position on the wafer, and ensure that the test probe 100 is accurately aligned with the metal pad on the wafer during the wafer testing process.

[0059] In some embodiments, Figure 5 As shown, the mounted circuit board 21 also includes a positioning hole 214, and the positioning hole 214 is located on the surface of the mounted circuit board 21 away from the main circuit board 10. In order to be able to quickly perform maintenance when a small area of ​​the probe card 100 is damaged or partially damaged, and not to waste resources, the present application adopts a single device test unit 20 as an independent printed circuit board assembly to be electrically connected to the main circuit board 10, and the first surface 11 of the main circuit board 10 is connected to a plurality of device test units 20. It can be seen that the device test unit 20 has a corresponding positional relationship with the printed circuit of the first surface 11 of the main circuit board 10. Therefore, the positioning hole 214 is set at the diagonal position of the mounted circuit board 21 away from the surface of the main circuit board 10 where the marking point 213 is not set. The above-mentioned positioning hole 214 is convenient for locating the position of the device test unit 20 on the first surface 11 of the main circuit board 10, and can also help technicians to accurately determine the position of the device test unit 20 when performing manual maintenance and mounting.

[0060] As can be seen from the above, a single device test unit 20 is mechanically and electrically connected to the main circuit board 10 through its corresponding anisotropic conductive film 30. First, a layer of anisotropic conductive film 30 is applied to the corresponding position of the first surface 11 of the main circuit board 10, and the position of the device test unit 20 is determined according to the positioning hole 214, and then appropriate pressure and temperature are applied for curing. Figure 7 As shown, a positioning hole 214 is set on the surface of the installed circuit board 21 away from the main circuit board 10, and the device test unit 20 is fixed to the main circuit board 10 by a positioning rod 215, so that during the above-mentioned curing process, the device test unit 20 will not produce slight displacement due to the applied pressure, thereby avoiding the malfunction of the probe card 100 due to the displacement of the device test unit 20 during the connection with the main circuit board 10, shortening the time for producing qualified probe cards 100, and reducing unnecessary material loss.

[0061] In some embodiments, the main circuit board 10 also includes a first via 12, which is electrically connected to a first metal pad 111 disposed on the first surface 11; and / or, the mounted circuit board 21 includes a second via 211, which is electrically connected to a second metal pad 212, and the second metal pad is located on the surface of the mounted circuit board 21 close to the main circuit board 10.

[0062] In wafer testing, the main circuit board 10 sends a test signal to the device test unit 20, and the device test unit 20 transmits the test signal to the probe 22. The probe 22 establishes an electrical connection with the metal pad of the chip under test, sends the test signal back to the chip under test, receives the feedback signal from the chip, and sends the feedback signal to the test device through the main circuit board 100. The test software on the test device determines whether the chip under test is qualified. It can be understood that if Figure 4 As shown, in the above process, the test signal of the main circuit board 10 is transmitted to the first metal pad 111 connected thereto through the first via 12, and the metal pad 111 transmits the test signal to the second metal pad 212 through the conductive particles 32 in the anisotropic conductive film 30, and the second metal pad 212 transmits the received test signal to the plurality of probes 22 mounted on the surface of the mounting circuit board 21 through the via 211. It can be seen that the first via 12 and the first pad 111, as well as the second via 211 and the second pad 212 are arranged relative to each other to ensure that the test signal can be effectively transmitted from the automatic test equipment 200 to the probe 22, and then transmitted from the probe 22 to the chip on the wafer, and the design of the first pad 111 and the second pad 212 needs to take into account the positions of the first via 12 and the second via 211, to ensure that the probe 22 can be stably fixed on the probe card 100 and the signal transmission will not be hindered.

[0063] The first via hole 12 is a solid metal via hole, and / or the second via hole 211 is a solid metal via hole. In the actual wafer testing process, the first via 12 and / or the second via 211 are not only used to conduct the test signal, but also bear part of the support and heat dissipation requirements. The first via 12 and / or the second via 211 are set as solid metal vias. On the one hand, it can effectively avoid the negative impact caused by the flow of other materials such as resin into the hollow via during use. For example, the resin may be blocked after flowing into the hollow via, resulting in a decrease in or complete loss of conductivity of the via, affecting the transmission of the test signal, thereby affecting the accuracy and efficiency of the wafer testing; or the inflow of resin may change the structure of the hollow via, thereby affecting the mechanical stability of the probe card, causing the probe card to deform or be damaged, and increasing material loss. On the other hand, the first via 12 and / or the second via 211 can also help the probe card with thermal management. During the wafer testing process, the transmission of electrical signals between the probe card 100 and the wafer will generate heat. The first via 122 and / or the second via 11 help transfer the heat to the bottom layer of the probe card 100, and dissipate it through the heat sink or other heat dissipation mechanisms, thereby keeping the temperature of the probe card 100 and the wafer stable.

[0064] In some embodiments, the first metal pad 111 is in a grid shape. In some embodiments, the second metal pad 212 is in a grid shape.

[0065] In actual wafer testing, as electrical signals are transmitted between the chip and the probe card 100 during the test, corresponding heat is generated through the various electronic components on the installed circuit board 21. Therefore, the temperature of the probe card 100 gradually increases with the increase of test time. Since the materials of the circuit printed board that the first via 12 and / or the second via 211 contact with are different, the thermal expansion coefficients of the two are also different.

[0066] In some embodiments, the material of the first via 12 and / or the second via 211 is copper, and the material of the printed circuit board in contact with the first via 12 and / or the second via 211 is aluminum oxide. The thermal expansion coefficients of copper and aluminum oxide are different. Therefore, when the temperature of the probe card rises, the first via 12 and / or the second via 211 are prone to fall off from the printed circuit board in contact with the first via 12 and / or the second via 211. In order to prevent this situation, Figure 8As shown, copper grids are arranged around the first metal pads 111 and / or the second metal pads 212, which can increase the electrical contact area between the first metal pads 111 and / or the second metal pads 212 and the circuit printed board, and avoid the decrease in interlayer adhesion and the shedding of the metal copper layer due to the different thermal expansion coefficients of metal copper and aluminum oxide under high and low temperature conditions. In some embodiments, if the number of first metal pads 111 and / or second metal pads 212 is large or the number of probe card pins is large, if copper grids are arranged around all pads, or the required space is insufficient, adjacent copper grids may come into contact and establish electrical connection, which affects the test function of the probe card 100. Therefore, in the above case, part of the first metal pads 111 or part of the second metal pads 212 can be arranged as copper grids.

[0067] To summarize, on the one hand, the present application connects the device test unit 20 as a separate printed circuit board assembly to the main circuit board 10, so that when a small area or partial damage occurs on the probe card 100, the damaged single or multiple device test units 20 can be maintained or replaced, thereby greatly saving the manpower required for maintenance and the material loss caused; on the other hand, the present application electrically and mechanically connects the device test unit 20 to the main circuit board 10 through anisotropic conductive adhesive film 30. Compared with connecting the two through through-hole penetration technology, this connection method can not only avoid damage to the toughness of the main circuit board 10, but also can be applied to pin probe cards and / or probe cards with micro device test units, and has a wide range of applications.

[0068] It should be noted that the device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0069] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Under the concept of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other changes in different aspects of the present application as described above, which are not provided in detail for the sake of simplicity. Although the present application has been described in detail with reference to the aforementioned embodiments, a person of ordinary skill in the art should understand that the technical solutions described in the aforementioned embodiments can still be modified, or some of the technical features can be replaced by equivalents. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A probe card (100), characterized in that: include: Main circuit board (10); A plurality of device test units (20) are distributed on the first surface (11) of the main circuit board (10), the device test unit (20) comprising a mounted circuit board (21) and a plurality of probes (22), the mounted circuit board (21) being arranged on the surface of the device test unit (20); the plurality of probes (22) are located on a surface of the mounted circuit board (21) away from the main circuit board (10), and are electrically connected to the mounted circuit board (21); A plurality of anisotropic conductive adhesive films (30), the anisotropic conductive adhesive films (30) corresponding one to one with the device test units (20), the anisotropic conductive adhesive films (30) mechanically connecting a surface of the mounted circuit board (21) close to the main circuit board (10) and the first surface (11), and electrically connecting the plurality of probes (22) and the main circuit board (10).

2. The probe card (100) according to claim 1, characterized in that: The thickness of the anisotropic conductive adhesive film (30) is 3 μm to 5 μm.

3. The probe card (100) according to claim 1, characterized in that: The main circuit board (10) comprises a first via hole (12), the first via hole (12) being electrically connected to a first metal pad (111) arranged on the first surface (11); and / or, The mounted circuit board (21) comprises a second via hole (211), the second via hole (211) being electrically connected to a second metal pad (212), and the second metal pad (212) being located on a surface of the mounted circuit board (21) close to the main circuit board (10).

4. The probe card (100) according to claim 3, characterized in that: The first via hole (12) is a solid metal via hole, and / or the second via hole (211) is a solid metal via hole.

5. The probe card (100) according to claim 4, characterized in that: The first metal pad (111) is in a grid shape.

6. The probe card (100) according to claim 4, characterized in that: The second metal pad (212) is in a grid shape.

7. The probe card (100) according to claim 1, characterized in that: The mounted circuit board (21) further comprises a marking point (213), wherein the marking point (213) is located on a surface of the mounted circuit board (21) away from the main circuit board (10).

8. The probe card (100) according to claim 7, characterized in that: The mounted circuit board (21) further comprises a positioning hole (214), wherein the positioning hole (214) is located on a surface of the mounted circuit board (21) away from the main circuit board (10).

9. The probe card (100) according to claim 6, characterized in that: At least a portion of the main circuit board (10) is a ceramic circuit board.

10. A wafer inspection device, characterized in that: The invention comprises automatic testing equipment and a probe card as claimed in any one of claims 1 to 9.

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