Function detection method of vehicle gauge level digital-analog hybrid circuit and related equipment

Abstract

The invention provides a function detection method for a vehicle-gauge-level digital-analog hybrid circuit, and the method comprises the steps: carrying out the logic self-detection of a digital circuit after a vehicle-gauge-level chip is powered on, and obtaining a logic detection result; under the condition that the logic detection result represents that the logic detection is passed, the vehicle gauge level chip is controlled to execute a user program function; in the process that the vehicle gauge level chip executes a user program function to carry out data frame communication, in the frame interval stage of a current data frame and a next data frame, a digital circuit controls a buffer switch to be switched on so as to communicate a signal sending end with a signal receiving end, and an analog transceiving circuit is controlled to send preset detection data to the signal sending end; the detection data is transmitted to the signal receiving end through the buffer switch, the digital circuit compares the data signal received through the signal receiving end with the detection data so as to carry out loopback self-inspection of the analog transceiver circuit according to the comparison result, and the reliability and coverage rate of function safety detection are effectively improved.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of electronic circuit technology, and in particular to a function detection method and related equipment for an automotive-grade digital-analog hybrid circuit. Background Art

[0002] Currently, with the advancement of SoC chip production technology, the integration of chips is getting higher and higher, from single-function ASICs to highly integrated, digital-analog hybrid ultra-large-scale SoC chips that integrate multiple functional modules. In these chips, digital circuits and analog circuits work together to achieve the required functions. However, since digital and analog circuits are usually designed and verified by different teams, problems are prone to occur at the interface between them, such as inconsistencies in circuit design, which may cause defects in the chip or cause it to be in an unsafe state.

[0003] At present, the functional safety testing of digital-analog hybrid circuits is mainly carried out through independent functional circuits, such as using analog circuits to detect power supply voltage and clock frequency, and using digital circuits to detect digital control logic. However, this testing method can only achieve functional safety testing of certain specific circuits, and cannot perform timely safety testing of analog transceiver circuits and related digital circuits, resulting in potential safety hazards in digital-analog hybrid circuits, and poor reliability and coverage of functional safety testing. Summary of the invention

[0004] An embodiment of the present application provides a functional detection method for an automotive-grade digital-analog hybrid circuit. By adding a buffer switch that can be timely controlled by the digital circuit between the digital circuit and the analog transceiver circuit, the digital circuit is used to control the analog transceiver circuit to enter a loop self-test mode during the data frame interval, thereby realizing functional safety detection of the analog transceiver circuit and effectively improving the reliability and coverage of the functional safety detection.

[0005] To achieve the above-mentioned purpose, a first aspect of an embodiment of the present application provides a function detection method for an automotive-grade digital-analog hybrid circuit, the method being applied to an automotive-grade chip, the automotive-grade chip comprising an analog transceiver circuit and a digital circuit, the digital circuit being connected to a signal sending end and a signal receiving end of the analog transceiver circuit through a buffer switch, the method comprising: after the automotive-grade chip is powered on, performing a logic self-test on the digital circuit to obtain a logic test result; when the logic test result indicates that the logic test has passed, controlling the automotive-grade chip to execute a user program function; in the process of the automotive-grade chip executing the user program function to perform data frame communication, in the frame interval phase between the current data frame and the next data frame, controlling the buffer switch to be closed through the digital circuit to connect the signal sending end and the signal receiving end, controlling the analog transceiver circuit to send preset detection data to the signal sending end, the detection data being transmitted to the signal receiving end through the buffer switch, and the digital circuit comparing the detection data with the data signal received through the signal receiving end to perform a loopback self-test of the analog transceiver circuit according to the comparison result.

[0006] In some embodiments, the analog transceiver circuit includes a power supply detection circuit, and the logic self-test of the digital circuit is performed to obtain a logic test result, including: when the power supply detection circuit of the analog transceiver circuit detects that the circuit in the automotive-grade chip is powered on and stable, controlling the automotive-grade chip to release an internal reset signal, so that the automotive-grade chip performs a logic self-test to obtain a logic test result.

[0007] In some embodiments, controlling the automotive-grade chip to execute user program functions includes: resetting the digital circuit, and controlling the automotive-grade chip to enter a working state after the reset is completed to execute the user program functions.

[0008] In some embodiments, after obtaining the logic test result, it also includes: when the logic test result indicates that the logic test has failed, reporting functional safety error status information to the main controller corresponding to the automotive-grade chip, and determining the subsequent working status and working mode of the automotive-grade chip according to the control information sent by the main controller.

[0009] In some embodiments, during the process of the automotive-grade chip executing user program functions to perform data frame communication, in the frame interval stage between the current data frame and the next data frame, the buffer switch is controlled to close through the digital circuit, including: controlling the analog transceiver circuit to start working to send or receive the current data frame; when the sending or receiving of the current data frame is completed, closing the analog transceiver circuit according to the working timing of the analog transceiver circuit; while waiting for the working instruction for the next data frame, entering the frame interval stage between the current data frame and the next data frame, controlling the analog transceiver circuit to start working again, and controlling the buffer switch to close through the digital circuit to control the analog transceiver circuit to send preset detection data to the signal sending end.

[0010] In some embodiments, before the analog transceiver circuit is controlled to start working to send or receive the current data frame, the method also includes: determining the current working state by a software program pre-installed in the automotive-grade chip; when the current working state is a working state that requires data frame communication, driving the digital circuit to receive or send data frames through the software program.

[0011] In some embodiments, the data signal includes ADC data, the digital circuit includes a digital data analysis circuit, a digital sending circuit, a digital analog interface circuit and a digital analog control timing module, and the method further includes: sending the detection data to the signal sending end during the frame interval stage through the digital sending circuit and the digital analog control timing module; receiving the ADC data of the signal receiving end through the digital analog interface circuit, and obtaining the analysis result through the digital data analysis circuit of the ADC data, and comparing the analysis result with the detection data to perform a loopback self-check of the analog transceiver circuit according to the comparison result.

[0012] To achieve the above-mentioned purpose, the second aspect of an embodiment of the present application provides a function detection circuit, which is applied to an automotive-grade chip, and the function detection circuit is used to execute the function detection method of the automotive-grade digital-analog hybrid circuit as described in any one of the first aspects.

[0013] To achieve the above-mentioned purpose, the third aspect of an embodiment of the present application provides an automotive-grade chip, which includes an analog transceiver circuit and a digital circuit. The digital circuit is connected to the signal sending end and the signal receiving end of the analog transceiver circuit through a buffer switch, and the automotive-grade chip is provided with a function detection circuit as described in claim 8.

[0014] To achieve the above-mentioned purpose, the fourth aspect of an embodiment of the present application provides an electronic device, comprising: at least one processor; at least one memory for storing at least one program; when at least one of the programs is executed by at least one of the processors, a functional detection method for an automotive-grade digital-analog hybrid circuit as described in any one of the first aspects is implemented.

[0015] The embodiments of the present application provide a functional detection method for an automotive-grade digital-analog hybrid circuit and related equipment. The method of the present application can establish a connection between the signal sending end and the receiving end of the analog circuit by introducing a buffer switch controlled by the digital circuit in a timely manner. This enables the analog circuit to perform self-detection in a non-working state without the need for additional hardware support, thereby making full use of existing circuit resources and reducing manufacturing costs. In addition, after the automotive-grade chip is powered on, the present application first performs a logic self-test on the digital circuit. Only when the logic test confirms that the digital circuit is working normally, the chip will execute the user program function to ensure the reliability of the digital circuit before the user program is executed; further, in the process of the chip executing the user program and performing data frame communication, the digital circuit controls the buffer switch to close during the frame interval between the data frames, so that the analog circuit enters the loopback self-test mode, so that the analog circuit can perform functional safety testing without interfering with normal communication; further, the preset test data is sent through the analog circuit, transmitted to the signal receiving end through the buffer switch, and compared with the preset data after being received by the digital circuit to determine whether the analog transceiver circuit is working normally. Through the above mechanism, the method of the present application not only realizes the functional safety testing of the analog transceiver circuit, but also because it is carried out in a timely manner under the control of the digital circuit, the reliability and coverage of the functional safety testing are improved without affecting the normal function, so that the method of the present application can realize timely safety testing of the analog circuit, the corresponding digital control circuit, the digital analog interface circuit and the timing logic of the digital control analog circuit, thereby providing a functional safety testing mechanism that cannot be achieved by traditional methods, ensuring the accuracy of the test results. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A flow chart of a method for detecting a function of a vehicle-grade digital-analog hybrid circuit provided in one embodiment of the present application;

[0017] Figure 2 A schematic diagram of a module of an automotive-grade chip provided in one embodiment of the present application;

[0018] Figure 3 Another flow chart of a method for detecting the function of a vehicle-grade digital-analog hybrid circuit provided in an embodiment of the present application;

[0019] Figure 4Another flow chart of a method for detecting the function of a vehicle-grade digital-analog hybrid circuit provided in an embodiment of the present application;

[0020] Figure 5 Another flow chart of a method for detecting the function of a vehicle-grade digital-analog hybrid circuit provided in an embodiment of the present application;

[0021] Figure 6 Another flow chart of a method for detecting the function of a vehicle-grade digital-analog hybrid circuit provided in an embodiment of the present application;

[0022] Figure 7 Another flow chart of a method for detecting the function of a vehicle-grade digital-analog hybrid circuit provided in an embodiment of the present application;

[0023] Figure 8 A timing diagram of a function detection method for an automotive-grade digital-analog hybrid circuit provided in an embodiment of the present application;

[0024] Fig. 9 Another timing diagram of a function detection method for an automotive-grade digital-analog hybrid circuit provided in an embodiment of the present application;

[0025] Fig.10 A schematic diagram of the structure of an electronic device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0027] In some embodiments, although the functional modules are divided in the system schematic diagram and the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the system or the order in the flowchart. The terms first, second, etc. in the specification, claims and the above drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0028] In addition, unless otherwise clearly specified and limited, the term "connected" should be understood in a broad sense. For example, it can be a fixed connection or a movable connection, a detachable connection or a non-detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or the two can communicate with each other; it can be a direct connection or an indirect connection through an intermediate medium.

[0029] In the description of the embodiments of the present application, the description of reference terms "one embodiment / implementation", "another embodiment / implementation" or "certain embodiments / implementations", "in the above embodiments / implementations", etc. means that the specific features, structures, materials or characteristics described in combination with the implementation or example are included in at least two embodiments or implementations disclosed in the present application. In the disclosure of this application, the schematic representation of the above terms does not necessarily refer to the same embodiment or implementation. It should be noted that although the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in an order different from that in the flowchart.

[0030] Currently, with the advancement of SoC chip production technology, the integration of chips is getting higher and higher, from single-function ASICs to highly integrated, digital-analog hybrid ultra-large-scale SoC chips that integrate multiple functional modules. In these chips, digital circuits and analog circuits work together to achieve the required functions. However, since digital and analog circuits are usually designed and verified by different teams, problems are prone to occur at the interface between them, such as inconsistencies in circuit design, which may cause defects in the chip or cause it to be in an unsafe state.

[0031] At present, the functional safety testing of digital-analog hybrid circuits is mainly carried out through independent functional circuits, such as using analog circuits to detect power supply voltage and clock frequency, and using digital circuits to detect digital control logic. However, this testing method can only achieve functional safety testing of certain specific circuits, and cannot perform timely safety testing of analog transceiver circuits and related digital circuits, resulting in potential safety hazards in digital-analog hybrid circuits, and poor reliability and coverage of functional safety testing.

[0032] It can be understood that in order to overcome the limitations of the prior art, the embodiments of the present application provide a functional detection method for an automotive-grade digital-analog hybrid circuit. A buffer switch that can be controlled in a timely manner by the digital circuit is added between the digital circuit and the analog transceiver circuit. The digital circuit is used to control the analog transceiver circuit to enter a loop self-test mode during the data frame interval, thereby realizing functional safety detection of the analog transceiver circuit and effectively improving the reliability and coverage of the functional safety detection.

[0033] The embodiments of the present application are further described below in conjunction with the accompanying drawings.

[0034] refer to Figure 1 , Figure 1A flow chart of a function detection method for an automotive-grade digital-analog hybrid circuit provided in an embodiment of the present application; in some embodiments, the present application provides a function detection method for an automotive-grade digital-analog hybrid circuit, which is applied to an automotive-grade chip, the automotive-grade chip includes an analog transceiver circuit and a digital circuit, the digital circuit is connected to a signal transmitting end and a signal receiving end of the analog transceiver circuit through a buffer switch, and the method includes the following steps:

[0035] Step S110, after the automotive-grade chip is powered on, a logic self-test is performed on the digital circuit to obtain a logic test result;

[0036] Step S120, when the logic test result indicates that the logic test has passed, controlling the automotive-grade chip to execute the user program function;

[0037] Step S130, when the automotive-grade chip executes the user program function to perform data frame communication, in the frame interval phase between the current data frame and the next data frame, the buffer switch is controlled to close through the digital circuit to connect the signal sending end and the signal receiving end, and the analog transceiver circuit is controlled to send preset detection data to the signal sending end. The detection data is transmitted to the signal receiving end through the buffer switch, and the digital circuit compares the data signal received through the signal receiving end with the detection data to perform a loop self-test of the analog transceiver circuit according to the comparison result.

[0038] Among them, automotive-grade digital-analog hybrid circuits refer to integrated circuits (ICs) specially designed for the automotive industry, which contain two parts: analog circuits and digital circuits. The analog circuits process continuous signals, such as sound or sensor inputs; while the digital circuits process discrete binary signals, such as signals in processors or controllers.

[0039] Automotive-grade chips: refers to integrated circuits that meet automotive industry standards, which are generally more stringent than consumer electronics to ensure reliability, durability and safety in automobiles.

[0040] Analog transceiver circuit: This part of the circuit is responsible for processing the sending and receiving of analog signals, such as sensor input or audio signals.

[0041] Digital circuit: This part of the circuit processes digital signals and is usually used for functions such as logic operations, control and data processing.

[0042] Buffer switch: An electronic component that can be switched between an on and off state to connect or disconnect different parts of a circuit. In this application, it is used to connect the signal sending end and the signal receiving end of the analog transceiver circuit.

[0043] Logic self-test: This refers to a series of checks that a digital circuit automatically performs after startup to verify whether its logical function is normal.

[0044] User program function: refers to the main task or application that the chip is designed to perform.

[0045] Data frame communication: This refers to the process in which information is organized into data frames for transmission in the communication protocol. Each data frame contains a certain amount of information and has clear start and end marks.

[0046] Loopback self-test: refers to sending a signal into the system and receiving it back to check whether the system is working as expected. If the sent data matches the received data, it indicates that the system is normal.

[0047] refer to Figure 2 , Figure 2 A module schematic diagram of an automotive-grade chip provided for an embodiment of the present application; wherein A1 and A2 represent externally connected transceiver antennas, ADC represents an analog-to-digital converter, which converts analog signals into digital signals for processing by digital circuits; BUF represents a buffer switch, which is used to enhance signal strength or reduce impedance to enable better signal transmission; digital circuit: including a digital logic module, a digital decoding circuit, a digital working main control module, etc., which together constitute the digital circuit part, which is used to process digital signals and control the operation of the entire system; main controller: responsible for coordinating and managing the workflow of the entire system. During this data frame communication process, data is packaged into frames in a specific format for one-frame transmission. The short time window between two data frames can be used for other operations, such as loop self-test of the analog transceiver circuit.

[0048] Among them, C1 and C2 can be capacitors used to stabilize voltage, suppress noise or serve as signal paths, P1 and P2 can be operational amplifiers (operational amplifiers) or other types of amplifiers, which may be used to amplify analog signals, drive loads or implement certain specific signal processing functions. The buffer switch is connected to the signal transmitting end through C1, and to the signal receiving end through C2. It can be understood that when the automotive-grade chip is powered on, this application will first perform a logic self-test on the digital circuit to confirm that it functions normally. Then, if the logic self-test passes, the system will enter the user program mode and start executing the predetermined task. During the data frame communication, using the frame interval time, the digital circuit will control the buffer switch to close, so that the analog transceiver circuit can send preset detection data to the signal transmitting end. These data are transmitted to the signal receiving end through the buffer switch, and the digital circuit compares the data received from the signal receiving end with the original detection data to determine whether the analog transceiver circuit is working properly.

[0049] Among them, the method of the present application can establish a connection between the signal sending end and the receiving end of the analog circuit by introducing a buffer switch controlled by the digital circuit in a timely manner, which enables the analog circuit to perform self-detection in a non-working state without the need for additional hardware support, thereby making full use of existing circuit resources and reducing manufacturing costs; in addition, after the automotive-grade chip is powered on, the present application first performs a logic self-test on the digital circuit. Only when the logic test confirms that the digital circuit is working normally, the chip will execute the user program function to ensure the reliability of the digital circuit before the user program is executed; further, in the process of the chip executing the user program and performing data frame communication, the digital circuit controls the buffer switch to close during the frame interval between the data frames, so that the analog circuit enters the loopback self-test mode, so that the analog circuit can perform functional safety testing without interfering with normal communication; further, the preset test data is sent through the analog circuit, transmitted to the signal receiving end through the buffer switch, and compared with the preset data after being received by the digital circuit to determine whether the analog transceiver circuit is working normally. Through the above mechanism, the method of the present application not only realizes the functional safety testing of the analog transceiver circuit, but also because it is carried out in a timely manner under the control of the digital circuit, the reliability and coverage of the functional safety testing are improved without affecting the normal function, so that the method of the present application can realize timely safety testing of the analog circuit, the corresponding digital control circuit, the digital analog interface circuit and the timing logic of the digital control analog circuit, thereby providing a functional safety testing mechanism that cannot be achieved by traditional methods, ensuring the accuracy of the test results.

[0050] In some embodiments, the logic self-test includes: when the automotive-grade chip is powered on, the built-in self-test logic (BIST) will be activated and start to execute the pre-programmed test sequence. The logic self-test usually includes a series of test cases, which cover various functions of digital circuits, such as register reading and writing, addition and subtraction operations, shift operations, comparison operations, etc. These test cases are designed to verify whether the basic functions of the digital circuit are normal; the self-test logic executes the test cases one by one and records the results in a temporary storage area, such as a dedicated self-test register or memory block; after the test, the self-test logic will analyze all the test results to determine whether any errors have occurred. If there is an error, it is marked as a logic test failure; if there is no error, it is marked as a logic test pass. The self-test logic reports the results of the logic test to the main control unit, such as the CPU, for subsequent processing.

[0051] refer to Figure 3 , Figure 3 Another flow chart of a method for functional detection of a vehicle-grade digital-analog hybrid circuit provided in an embodiment of the present application; in some embodiments, the analog transceiver circuit includes a power detection circuit, and a logic self-test is performed on the digital circuit to obtain a logic detection result, including the following steps:

[0052] Step S310, when the power detection circuit of the analog transceiver circuit detects that the circuit in the automotive-grade chip is powered on and stable, the automotive-grade chip is controlled to release an internal reset signal so that the automotive-grade chip performs a logic self-test to obtain a logic test result.

[0053] In some embodiments, controlling the automotive-grade chip to execute a user program function includes: resetting the digital circuit, and controlling the automotive-grade chip to enter a working state after the reset is completed to execute the user program function.

[0054] Among them, the analog transceiver circuit refers to the part responsible for signal transmission and reception, usually including the RF (radio frequency) front end, such as the antenna interface part in the wireless communication chip. The power detection circuit is used to monitor whether the power supply voltage is stable within the required range to ensure that the chip works at the correct voltage; the internal reset signal is that when the power detection circuit detects that the power supply is stable, it will release a signal to inform the chip that it can release the reset state and start the initialization and self-test process; the logic self-test refers to a series of self-tests performed by the digital circuit after startup to confirm whether its logical function is normal, including but not limited to the detection of components such as RAM, ROM, and registers, which can realize the detection of corresponding digital control circuits and digital analog interface circuits. After the logic self-test passes, the system will reset the digital circuit again to ensure that all states are reset to the initial conditions. After the reset is completed, the automotive-grade chip is controlled to enter the working state, which means that after the reset is completed, the system will enter the normal operating mode and be ready to execute the user's program or instructions, such as starting to execute the corresponding functions according to the user's program or set tasks, such as data processing, communication, etc., so that the automotive-grade chip can ensure that it is in good working condition when it is started, and is ready to perform the tasks specified by the user.

[0055] refer to Figure 4 , Figure 4 Another flow chart of the function detection method of the automotive-grade digital-analog hybrid circuit provided in one embodiment of the present application; in some embodiments, after obtaining the logic detection result, the following steps are also included:

[0056] Step S410, when the logic test result indicates that the logic test has failed, report the functional safety error status information to the main controller corresponding to the automotive-grade chip, and determine the subsequent working status and working mode of the automotive-grade chip according to the control information sent by the main controller.

[0057] It is understandable that when the logic test results indicate that the logic test has failed, the automotive-grade chip will report functional safety error status information to the main controller in the system. Functional safety error status information refers to detected logic errors or potential risks, prompting the main controller that the current chip has functional safety issues, and letting the main controller in the system know the current status of the chip, that is, the chip has failed self-test and may have functional defects or faults.

[0058] The subsequent working status and working mode of the automotive-grade chip are determined according to the control information sent by the main controller. After receiving the error status information, the main controller will evaluate the situation and send corresponding control commands to instruct the automotive-grade chip on how to operate next. This may include but is not limited to entering safe mode, restarting, isolating faulty modules and other measures to prevent potential safety hazards from affecting the overall operation of the system.

[0059] refer to Figure 5 , Figure 5 Another flow chart of a function detection method for an automotive-grade digital-analog hybrid circuit provided by an embodiment of the present application; in some embodiments, during the process of the automotive-grade chip executing the user program function to communicate data frames, in the frame interval between the current data frame and the next data frame, the buffer switch is controlled to be closed by a digital circuit, including the following steps:

[0060] Step S510, controlling the analog transceiver circuit to start working to send or receive the current data frame;

[0061] Step S520, when the sending or receiving of the current data frame is completed, the analog transceiver circuit is turned off according to the working sequence of the analog transceiver circuit;

[0062] Step S530, while waiting for the working instruction of the next data frame, enter the frame interval phase between the current data frame and the next data frame, control the analog transceiver circuit to start working again, and control the buffer switch to close through the digital circuit to control the analog transceiver circuit to send the preset detection data to the signal sending end.

[0063] Among them, the analog transceiver circuit is controlled to start working to send or receive the current data frame. This means that when it is necessary to send or receive a data frame, the analog transceiver circuit is activated to perform the data transmission task; when the current data frame is sent or received, the analog transceiver circuit is turned off according to the working sequence of the analog transceiver circuit. This step is to turn off the analog transceiver circuit after the data frame is successfully transmitted to save power and reduce interference; when waiting for the working instruction of the next data frame, the frame interval phase between the current data frame and the next data frame is entered, and the analog transceiver circuit is controlled to start working again, and the buffer switch is controlled to close through the digital circuit to control the analog transceiver circuit to send the preset detection data to the signal sending end. This step shows that in the time interval between two data frames, the analog transceiver circuit is reactivated, and the buffer switch is controlled to close through the digital circuit to send the predetermined detection data.

[0064] It can be understood that the working timing of the analog transceiver circuit is the timing of turning on and off the analog transceiver circuit according to the actual data transmission requirements. The frame interval phase refers to the time gap between two consecutive data frames. During this time, the system can check the status of the communication link by sending preset detection data. The preset detection data is used to detect the health of the communication link to ensure that the communication link is still available and no failure occurs before the next data frame is transmitted, so as to improve the reliability of communication.

[0065] refer to Figure 6 , Figure 6 Another flow chart of a function detection method for a vehicle-grade digital-analog hybrid circuit provided by an embodiment of the present application; in some embodiments, before controlling the analog transceiver circuit to start working to send or receive the current data frame, the method further includes the following steps:

[0066] Step S610, determining the current working state by a software program preset in the automotive-grade chip;

[0067] Step S620: When the current working state is a working state that requires data frame communication, the digital circuit is driven by a software program to receive or send data frames.

[0068] Among them, the current working state is determined by the software program preset in the automotive-grade chip, which means that before starting any data frame communication, the software program on the chip will first check the current working state to determine whether it is in a state where communication can be performed; when the current working state is a working state that requires data frame communication, the digital circuit is driven by the software program to receive or send the data frame. If it is determined that the current working state does require data frame communication, the software program will further drive the digital circuit to perform the data frame reception or transmission operation. This design ensures that before performing data frame communication, the system can correctly judge the current working state and correctly perform the data frame sending or receiving operation as needed.

[0069] refer to Figure 7 , Figure 7 Another flow chart of a method for functional detection of a vehicle-grade digital-analog hybrid circuit provided in an embodiment of the present application; in some embodiments, the data signal includes ADC data, the digital circuit includes a digital data analysis circuit, a digital transmission circuit, a digital-analog interface circuit, and a digital-analog control timing module, and the method further includes the following steps:

[0070] Step S710, sending detection data to the signal sending end in the frame interval phase through the digital sending circuit and the digital analog control timing module;

[0071] Step S720, receiving ADC data from the signal receiving end through the digital analog interface circuit, obtaining analysis results through the ADC data of the digital data analysis circuit, and comparing the analysis results with the detection data to perform loopback self-test of the analog transceiver circuit according to the comparison results.

[0072] Among them, the above steps send detection data to the signal sending end in the frame interval stage through the digital sending circuit and the digital analog control timing module, which means that during the gap between two frames of data, the digital sending circuit will send preset detection data to the signal sending end under the control of the digital analog control timing module; further, the ADC data of the signal receiving end is received through the digital analog interface circuit, and the ADC data is analyzed by the digital data analysis circuit to obtain the analysis result, and the analysis result is compared with the detection data to perform a loopback self-test of the analog transceiver circuit according to the comparison result; it can be understood that the digital analog interface circuit is responsible for receiving the ADC (analog-to-digital conversion) data from the signal receiving end, and the digital data analysis circuit will analyze the received ADC data to extract useful information. The analyzed data will be compared with the detection data sent before to verify the integrity and accuracy of the data transmission. If the analysis result is consistent with the detection data, it means that the analog transceiver circuit is working normally; if not, there may be a fault and further diagnosis is required, so that the method of the present application realizes timely safety detection of the timing logic of the analog circuit, the corresponding digital control circuit, the digital analog interface circuit and the digital control analog circuit.

[0073] refer to Figure 8 , Figure 8 A timing diagram of a function detection method for an automotive-grade digital-analog hybrid circuit provided in an embodiment of the present application; Figure 8 The startup process of the automotive-grade chip is shown, corresponding to "step S110, after the automotive-grade chip is powered on, a logic self-test is performed on the digital circuit to obtain a logic test result; step S120, when the logic test result indicates that the logic test has passed, the automotive-grade chip is controlled to execute the user program function", wherein each part is explained as follows:

[0074] External power supply: Automotive-grade chips rely on an external power supply, usually a DC voltage provided by a car battery.

[0075] Power-on stability: After the power is turned on, the system needs a certain amount of time to ensure that the power supply voltage is stable to avoid abnormal behavior caused by power fluctuations.

[0076] Reset release: After the power supply is stable, the reset signal is released, marking the beginning of system initialization.

[0077] Logic BIST: The built-in self-test logic starts to work and performs a logic self-test on the digital circuit, which is part of step S110.

[0078] Reset: After a period of time, the system enters the standby state and prepares to execute the next operation.

[0079] CPU boot: The central processing unit begins to boot the system, loading the necessary firmware and programs to prepare for the execution of user programs.

[0080] Work according to user programs: If the logic self-test is successful (step S120), the automotive-grade chip starts to execute user programs stored therein, which are specific to vehicle applications and are used to control various vehicle functions.

[0081] In summary, Figure 8 It reflects a series of startup steps of the automotive-grade chip after power-on, including logic self-test and execution of user programs.

[0082] refer to Fig. 9 , Fig. 9 Another timing diagram of the functional detection method of the automotive-grade digital-analog hybrid circuit provided by an embodiment of the present application; wherein, Fig. 9 The following is an explanation of the various parts of the process when the automotive-grade chip executes the user program function to communicate data frames, corresponding to step S130:

[0083] The software completes basic settings: After the automotive-grade chip is started, the software first completes basic configuration and initialization work to ensure that the system is in the correct working state.

[0084] The software modifies settings based on demand: Depending on the specific application scenario and requirements, the software will adjust some parameters to optimize performance or meet special conditions.

[0085] Start of a frame: Data frame communication begins, the analog transceiver circuit starts working, preparing to send and receive data.

[0086] One frame of analog circuit operation: The analog transceiver circuit sends and receives data frames according to the predetermined protocol and format.

[0087] When a frame ends, the analog circuit stops working: When the data frame transmission is completed, the analog transceiver circuit stops working and waits for the arrival of the next data frame.

[0088] Inter-frame interval, controls the corresponding circuit to perform functional safety testing: In the frame interval stage between two data frames, the digital circuit controls the buffer switch to close, connects the signal sending end and the receiving end, and the analog transceiver circuit sends the preset test data to the signal sending end.

[0089] The detection data is transmitted to the signal receiving end through the buffer switch: the detection data is transmitted from the transmitting end to the receiving end through the buffer switch.

[0090] The digital circuit compares the received data signal with the detection data: The digital circuit compares the received data signal with the sent detection data to confirm the integrity of the communication link.

[0091] Perform loopback self-check of the analog transceiver circuit according to the comparison result: According to the comparison result, the analog transceiver circuit performs self-check to ensure that it works normally.

[0092] The above cycle process ensures that during data frame communication, the system can continuously monitor and verify the status of the communication link, thereby improving the reliability and security of the system.

[0093] To achieve the above-mentioned purpose, the second aspect of an embodiment of the present application provides a function detection circuit, which is applied to an automotive-grade chip, and the function detection circuit is used to execute a function detection method for an automotive-grade digital-analog hybrid circuit such as any one of the first aspects.

[0094] To achieve the above-mentioned purpose, the third aspect of an embodiment of the present application provides an automotive-grade chip, which includes an analog transceiver circuit and a digital circuit. The digital circuit is connected to the signal sending end and the signal receiving end of the analog transceiver circuit through a buffer switch. The automotive-grade chip is configured as any one of the items in the first aspect.

[0095] Some embodiments of the present application provide an electronic device, Fig.10 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application, referring to Fig.10 The electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the function detection method of the automotive-grade digital-analog hybrid circuit of any one of the above embodiments is implemented. For example, the above described Figure 1 Steps S110 to S130 of the method, Figure 3 In method step S310, Figure 4 In method step S410, Figure 5 Steps S510 to S530 of the method, Figure 6 Steps S610 to S620 of the method, Figure 7 Method steps S710 to S720.

[0096] The electronic device 1000 of the embodiment of the present application includes one or more processors 1010 and a memory 1020. Fig.10 In the figure, a processor 1010 and a memory 1020 are taken as an example.

[0097] The processor 1010 and the memory 1020 may be connected via a bus or other means. Fig.10 The example of connecting through bus is taken in the following.

[0098] The memory 1020, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer executable programs. In addition, the memory 1020 may include a high-speed random access memory, and may also include a non-transitory memory, such as at least one disk storage device, a flash memory device, or other non-transitory solid-state storage device. In some embodiments, the memory 1020 may optionally include a memory 1020 remotely disposed relative to the processor 1010, and these remote memories may be connected to the electronic device 1000 via a network. At the same time, examples of the above-mentioned network include but are not limited to the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.

[0099] In some embodiments, when the processor executes the computer program, the functional detection method of the automotive-grade digital-analog hybrid circuit of any one of the above embodiments is performed at preset intervals.

[0100] Those skilled in the art will understand that Fig.10 The device structure shown in the figure does not constitute a limitation on the electronic device 1000, and may include more or less components than shown in the figure, or combine certain components, or arrange the components differently.

[0101] exist Fig.10 In the electronic device 1000 shown, the processor 1010 can be used to call the functional detection method of the automotive-grade digital-analog hybrid circuit stored in the memory 1020, thereby implementing the functional detection method of the automotive-grade digital-analog hybrid circuit.

[0102] Based on the hardware structure of the above-mentioned electronic device 1000, various embodiments of the functional detection device of the automotive-grade digital-analog hybrid circuit of the present application are proposed. At the same time, the non-transient software programs and instructions required to implement the functional detection method of the automotive-grade digital-analog hybrid circuit of the above-mentioned embodiments are stored in the memory. When executed by the processor, the functional detection method of the automotive-grade digital-analog hybrid circuit of the above-mentioned embodiments is executed.

[0103] It will be appreciated by those skilled in the art that all or some of the steps and systems in the disclosed method above may be implemented as software, firmware, hardware and appropriate combinations thereof. Some physical components or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor or a microprocessor, or may be implemented as hardware, or may be implemented as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer-readable storage medium (or a non-transitory medium) and a communication medium (or a temporary medium). As known to those skilled in the art, the term computer-readable storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules or other data). Computer-readable storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD to ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, disk storage or other magnetic storage devices, or any other medium that may be used to store desired information and may be accessed by a computer. In addition, it is well known to those skilled in the art that communication media typically include computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery media. The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the above implementation mode. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present application, and these equivalent modifications or substitutions are all included in the scope defined by the claims of the present application.

Claims

1. A functional detection method for automotive-grade digital-analog hybrid circuits, characterized in that: The method is applied to an automotive-grade chip, which includes an analog transceiver circuit and a digital circuit. The digital circuit is connected to a signal transmitting end and a signal receiving end of the analog transceiver circuit through a buffer switch. The method includes: After the automotive-grade chip is powered on, a logic self-test is performed on the digital circuit to obtain a logic test result; When the logic test result indicates that the logic test has passed, controlling the automotive-grade chip to execute a user program function; During the process of the automotive-grade chip executing user program functions to perform data frame communication, in the frame interval stage between the current data frame and the next data frame, the buffer switch is controlled to be closed through the digital circuit to connect the signal sending end and the signal receiving end, and the analog transceiver circuit is controlled to send preset detection data to the signal sending end. The detection data is transmitted to the signal receiving end through the buffer switch, and the digital circuit compares the data signal received through the signal receiving end with the detection data to perform a loop self-check of the analog transceiver circuit according to the comparison result.

2. The function detection method of the automotive-grade digital-analog hybrid circuit according to claim 1 is characterized in that: The analog transceiver circuit includes a power supply detection circuit, and the logic self-test of the digital circuit is performed to obtain a logic test result, including: When the power detection circuit of the analog transceiver circuit detects that the circuit in the automotive-grade chip is powered on stably, the automotive-grade chip is controlled to release an internal reset signal so that the automotive-grade chip performs a logic self-test to obtain a logic test result.

3. The function detection method of the automotive-grade digital-analog hybrid circuit according to claim 1 is characterized in that: The controlling the automotive-grade chip to execute a user program function includes: The digital circuit is reset, and after the reset is completed, the automotive-grade chip is controlled to enter a working state to execute user program functions.

4. The function detection method of the automotive-grade digital-analog hybrid circuit according to claim 1 is characterized in that: After obtaining the logic test result, the method further includes: When the logic test result indicates that the logic test has failed, functional safety error status information is reported to the main controller corresponding to the automotive-grade chip, and the subsequent working status and working mode of the automotive-grade chip are determined according to the control information sent by the main controller.

5. The function detection method of the automotive-grade digital-analog hybrid circuit according to claim 1 is characterized in that: In the process of executing the user program function to perform data frame communication in the automotive-grade chip, in the frame interval phase between the current data frame and the next data frame, controlling the buffer switch to be closed by the digital circuit includes: Controlling the analog transceiver circuit to start working to send or receive the current data frame; When the sending or receiving of the current data frame is completed, shutting down the analog transceiver circuit according to the working timing of the analog transceiver circuit; While waiting for the working instruction of the next data frame, the frame interval phase between the current data frame and the next data frame is entered, the analog transceiver circuit is controlled to start working again, and the buffer switch is controlled to close through the digital circuit to control the analog transceiver circuit to send preset detection data to the signal sending end.

6. The function detection method of the automotive-grade digital-analog hybrid circuit according to claim 5 is characterized in that: Before controlling the analog transceiver circuit to start working to send or receive the current data frame, the method further includes: The current working state is determined by a software program preset in the automotive-grade chip; When the current working state is a working state requiring data frame communication, the digital circuit is driven by the software program to receive or send data frames.

7. The function detection method of the automotive-grade digital-analog hybrid circuit according to claim 1 is characterized in that: The data signal includes ADC data, the digital circuit includes a digital data analysis circuit, a digital sending circuit, a digital analog interface circuit and a digital analog control timing module, and the method further includes: Sending the detection data to the signal sending end in the frame interval phase through the digital sending circuit and the digital analog control timing module; The ADC data of the signal receiving end is received through the digital analog interface circuit, the ADC data is analyzed through the digital data analysis circuit to obtain an analysis result, and the analysis result is compared with the detection data to perform a loop self-check of the analog transceiver circuit according to the comparison result.

8. A function detection circuit, characterized in that: The function detection circuit is applied to an automotive-grade chip, and the function detection circuit is used to execute the function detection method of an automotive-grade digital-analog hybrid circuit as described in any one of claims 1 to 7.

9. An automotive-grade chip, characterized in that: The automotive-grade chip includes an analog transceiver circuit and a digital circuit. The digital circuit is connected to the signal sending end and the signal receiving end of the analog transceiver circuit through a buffer switch. The automotive-grade chip is provided with the function detection circuit as described in claim 8.

10. An electronic device, characterized in that: include: at least one processor; at least one memory for storing at least one program; When at least one of the programs is executed by at least one of the processors, a functional detection method for an automotive-grade digital-analog hybrid circuit as described in any one of claims 1 to 7 is implemented.

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